WO2024024000A1 - Power control device, power control system, power control method, and power control program - Google Patents

Abstract

A server (70) comprises: an accelerator power supply unit (50) that individually supplies power to each accelerator (77); a power saving controller unit (10) that selects the accelerator (77) to be subjected to power control as a target accelerator, and selects a power control method for the target accelerator; and a resource release/power cutting unit (20) that instructs the accelerator power supply unit (50) to control the power of the target accelerator, after an application (74) using the target accelerator no longer exists.

Description

Power control device, power control system, power control method, and power control program

The present invention relates to a power control device, a power control system, a power control method, and a power control program.

Servers equipped with both a CPU (general-purpose processor) that supports general-purpose processing and an accelerator (hereinafter sometimes abbreviated as ACC) specialized for specific calculations are becoming popular. A server improves processing capacity by offloading specific arithmetic processing from a general-purpose processor running software to an accelerator.

FIG. 11 is a configuration diagram of the server 70.
The server 70 includes a userland 71 that stores an application 74, an OS 72 that stores a device driver 75, and hardware 73. The hardware 73 includes a CPU 76, an accelerator 77, and a power supply section 78.
The application 74 is software that runs on the CPU 76 and uses the accelerator 77. The device driver 75 provides the application 74 with a function for using the accelerator 77.
CPU 76 executes application 74. The accelerator 77 is an expansion card equipped with an arithmetic circuit specialized for specific processing.
The power supply unit 78 supplies power to the entire server 70.

The power supply unit 78 realizes power saving of the server 70 by controlling power not only for the CPU 76 but also for the accelerator 77.
A specific implementation of the power supply section 78 will be illustrated below.
- Non-Patent Document 1 describes PCIe (Peripheral Component Interconnect Express) Hotplug. PCIe Hotplug is a mechanism for hot insertion and removal of accelerators, and is implemented in PCI Express, which is the connection interface for accelerators. By removing the accelerator from the server, it is possible to cut off the power supply from the server and save power.
- Non-Patent Document 2 describes a mechanism for changing the balance between processing performance and power consumption by changing the operating frequency (clock change) as a power saving mechanism for an accelerator.

The Linux Kernel 4.14.0, "PCI Hotplug Support Library", [online], [searched on July 12, 2022], Internet <URL: https://www.kernel.org/doc/html/v4.14/ driver-api/pci.html#pci-hotplug-support-library〉 OPAE LINUX KERNEL DRIVERS, "FPGA frequency setting change command guide (Intel OPAE Toolkit)", [online], [searched on July 12, 2022], Internet <URL: https://opae.github.io/latest/ docs/fpga_tools/userclk/userclk.html〉

When controlling the power supplied to the accelerator, it is necessary to consider the following requirements in addition to power saving.
・Availability: Stable operation even with power saving. For example, when stopping the power supply to the accelerator, the time during which the service is interrupted due to a server crash, etc. must be as short as possible.
・Versatility: Being able to control the power supplied to the offload destination accelerator without requiring the offload source (device driver and application) to have its own power management function for each accelerator.

However, the conventional techniques such as those described in Non-Patent Documents 1 and 2 do not provide a power control means for an accelerator that is both available and versatile.
With PCIe Hotplug in Non-Patent Document 1, if the offload source does not have an implementation that supports hot plugging (such as resource release and rediscovery), a system crash may occur due to sudden device disconnection, and availability may be reduced. does not satisfy. On the other hand, even if the offload source has an implementation that supports hot plugging, the offload source will need software support specific to each accelerator, and PCIe Hotplug does not satisfy the need for versatility.
Furthermore, the power saving mechanism of Non-Patent Document 2 requires a clock control mechanism in the accelerator, and thus does not satisfy versatility.

In addition, because the load on the accelerator changes over time due to traffic fluctuations, power control of the accelerator (when and how much power is supplied) is not set fixedly, but based on the current load. It is necessary to perform detailed control according to the situation. Generally, under high load conditions, it is necessary to increase the amount of power to the accelerator to improve its processing power.

Therefore, the main problem of the present invention is to appropriately control the power supplied to the offload destination hardware while simultaneously satisfying the availability and versatility of the offload destination hardware in a situation where there is load fluctuation. do.

In order to solve the above problems, the power supply control device of the present invention has the following features.
The present invention includes a power supply section that individually supplies power to each accelerator;
a controller unit that selects the accelerator to be subjected to power control as a target accelerator based on the usage status and load status of each accelerator used by each application, and selects a power control method for the target accelerator; ,
The application that is using the target accelerator is instructed to release the target accelerator, and after the application that is using the target accelerator no longer exists, the power supply unit controls the power of the target accelerator. and a control instruction section for instructing.

According to the present invention, in a situation where there is load fluctuation, it is possible to appropriately control the power supplied to the offload destination hardware while simultaneously satisfying the availability and versatility of the offload destination hardware.

FIG. 2 is a configuration diagram of a server according to the present embodiment. FIG. 2 is a configuration diagram of a usage status database related to the present embodiment. FIG. 2 is a configuration diagram of a load status database according to the present embodiment. FIG. 2 is a configuration diagram of a slot power supply configuration recording unit according to the present embodiment. 7 is a flowchart illustrating a process for selecting a power saving method according to the load according to the present embodiment. 7 is a flowchart illustrating power saving control processing based on a power cut instruction according to the present embodiment. 7 is a flowchart showing power saving control processing based on a circuit change instruction or a clock change instruction according to the present embodiment. 3 is a table showing power saving methods instructed by an ACC state instruction unit according to the present embodiment. FIG. 3 is a three-dimensional diagram showing a box for accommodating a PCI Express expansion card as an example of implementation of the accelerator power supply unit according to the present embodiment. FIG. 2 is a hardware configuration diagram of a server according to the present embodiment. FIG. 2 is a configuration diagram of a server.

Hereinafter, each embodiment of the present invention will be described in detail with reference to the drawings.

FIG. 1 is a configuration diagram of the server 70X.
The server (power control device) 70X includes a userland 71X, an OS 72X that stores a device driver 75, and hardware 73X. The user land 71X stores a power saving controller section (controller section) 10, a resource release/power cut section (control instruction section) 20, and an application 74.
The application 74 is software that runs on the CPU and uses the accelerator 77 via the device driver 75. The device driver 75 is software that runs on the CPU. The device driver 75 performs hardware control of the accelerator 77 and provides an interface for use by the application 74.

The hardware 73X includes an accelerator 77, an accelerator power supply section (power supply section) 50, and a power switch section 60.
The accelerator 77 is dedicated hardware 73X that takes over some of the processing of the application 74. The accelerator 77 receives target data from the application 74, performs some processing, and returns the result to the application 74.
The accelerator power supply unit 50 supplies power to each slot of the accelerator 77 individually. The power switch unit 60 performs power control such as turning on and off the power supplied by the accelerator power supply unit 50.

The power saving controller unit 10 selects an accelerator 77 to be subjected to power control as a target accelerator based on the usage status and load status of each accelerator 77 used by each application 74, and performs power control on the target accelerator. Choose a method.
In the following, the accelerator 77 will be exemplified as an object of power control. On the other hand, as long as the hardware is the offload destination of the application 74, any hardware device can be subject to power control, whether it is a device inside the server 70X or a device connected from outside the server 70X. Good too.
Note that instead of the configuration in which the accelerator power supply unit 50 individually supplies power to each accelerator 77, a configuration may be adopted in which the accelerator power supply unit 50 individually supplies power to each power domain in which a plurality of accelerators 77 are grouped. In that case, the power saving controller unit 10 simultaneously selects a plurality of accelerators 77 belonging to the same power domain as target accelerators to be subjected to power control.

The power saving controller section 10 includes a state change ACC selection section 11 , an ACC state instruction section 12 , an in-use software/resource collection section 13 , and an in-use software driver recording section 14 .
The state change ACC selection unit 11 selects the accelerator 77 whose power state is to be changed as the target accelerator based on the following information.
- The usage status of the accelerator 77 by the application 74 stored in the usage status database 14A of FIG. 2 (combination of the accelerator 77 targeted for power control and the application 74 currently using the accelerator 77).
- Load status of the accelerator 77 (processed data amount based on maximum throughput) stored in the load status database 14B in FIG. 3.

The currently used software driver recording unit 14 stores a usage status database 14A and a load status database 14B (details will be described later). The currently used software driver recording unit 14 stores the usage status and load status of the accelerator 77 collected from the application 74 in association with the identifier of the slot in which the currently used accelerator 77 is installed. Alternatively, a method of associating slots in use with processes based on information obtained from the OS 72X or middleware may be used for the recorded contents of the software driver in use recording section 14.

The ACC state instructing unit 12 provides the resource release securing instructing unit 21 with an instruction to change the power state of the target accelerator selected by the state change ACC selecting unit 11. Further, the ACC state instruction unit 12 causes the state change notification unit 22 to notify the application 74 that power control of the target accelerator will be performed, and instructs the state change notification unit 22 to change the power state.
The content of the instruction to change the power state is an instruction to change the accelerator 77 to a low power consumption mode dependent on various cards, which is determined based on the contents of the software driver recording unit 14 in use, and for example, by any of the following instructions. Yes (see Figure 8 for details).
・Instruction to turn off the power of the accelerator 77 ・Instruction to change the clock of the arithmetic unit of the accelerator 77 ・Instruction to change the FPGA circuit configuration of the accelerator 77 The ACC status instruction unit 12 is called by the application 74 or by a method such as periodic execution. It will be done. Note that a method is conceivable in which the ACC state instruction section 12 is not divided into the state change ACC selection section 11 but is implemented as a single functional section.

The in-use software/resource collection unit 13 is activated by a change in the hardware configuration or a change in the usage status of the accelerator 77 by the application 74, and updates the usage status database 14A that records the usage status of the accelerator 77. The in-use software/resource collection unit 13 also collects more detailed information such as power consumption and power efficiency from the OS 72X, middleware, and applications 74, and updates the collection results to the load status database 14B.

The resource release/power cut unit 20 instructs the application 74 that is using the target accelerator to release the target accelerator, and after the application 74 that is using the target accelerator no longer exists, controls the power supply of the target accelerator. is instructed to the accelerator power supply unit 50. Therefore, the resource release/power cut section 20 includes a resource release securing instruction section 21 , a state change notification section 22 , a slot power supply configuration recording section 23 , and a power state instruction section 24 .
The resource release securing instruction unit 21 changes the power status of the device of the accelerator 77 (hereinafter abbreviated as device) according to the instruction to change the power status (including the slot identifier and power saving method) received from the ACC status instruction unit 12. Perform the steps below to make the change.
(Procedure 1) Before turning off the power of a device, the application 74 is notified of a device that will become unavailable due to a change in the power state, and is instructed to release the device.
(Step 2) Check whether the device driver 75 is being used, perform termination processing for the device driver 75, and then turn off the power to the accelerator 77. In this case, the resource is released and the device driver 75 is terminated, so that the target accelerator 77 can be disconnected.
(Step 3) When restoring a device whose power was cut off, appropriate processing is performed to associate the device driver 75 with the restored device after the power is restored. The appropriate process is, for example, a process that allocates resources and configures the device driver 75 to make the target accelerator 77 usable.

When the state change notification unit 22 shuts off the power based on the instruction from the resource release securing instruction unit 21, the state change notification unit 22 notifies the application 74 of the accelerator 77 that will no longer be available at that time. In response to this notification, the application 74 stops using the accelerator 77 and switches to another accelerator 77 or software processing.
Alternatively, the state change notification unit 22 may manage handlers and the like secured by the application 74 and notify the application 74 of handlers that will no longer be available when the accelerator 77 is released. The state change notification unit 22 may return an error when the application 74 uses the device after forcibly releasing the device.

The slot power supply configuration recording unit 23 stores, as a slot power supply configuration, the correspondence between externally controllable power switches and slots whose power is controlled by the power switches when it is not possible to open and close the power switches for each individual slot. do. The slot power supply configuration recording unit 23 is an optional component that may or may not be included in the resource release/power cut unit 20.
Note that the slot power supply configuration recording unit 23 may record an identifier that can uniquely identify a slot and a power domain to which the slot belongs in association with each other.
Alternatively, the slot power supply configuration recording unit 23 may dynamically generate the correspondence between slots and power switches from the OS 72X, the device driver 75, or other external interfaces.
Furthermore, when retaining the slot power supply configuration, the slot power supply configuration recording unit 23 also stores the purpose of the accelerator 77 (constant activation, expansion when the load increases, etc.), and when the power supply state is changed, The power of the slot in which the expansion accelerator 77 is installed may be cut off preferentially.

The power state instruction section 24 instructs the power switch section 60 to open and close the power switch of the slot by sending a command to the power switch section 60, thereby cutting off and restoring the power supply. Note that a device driver 75 that abstracts the operation of the power switch may be installed between the power state instruction section 24 and the power switch section 60.

Above, the specific components of the server 70X have been explained in order with reference to FIG. The following three effects obtained from the components of the server 70X will be explained in order.
・Availability: Stable operation even with power saving.
- Versatility: Eliminating the need for unique power management functions for each accelerator.
・Power efficiency: Reducing the power consumption of the accelerator.

First, the effect of availability will be explained.
The in-use software/resource collection unit 13 records information on the applications 74 and device drivers 75 that use each accelerator 77 in the in-use software driver recording unit 14 (usage status database 14A, load status database 14B). I'll keep it. The state change ACC selection unit 11 instructs the ACC state instruction unit 12 to release the accelerator 77 based on the usage status recorded in the usage status database 14A.
This makes it possible to prevent the application 74 from crashing even if the accelerator 77 is powered off (removed) by eliminating the application 74 that depends on the released accelerator 77. In other words, availability can be met.

Note that the conventional OS72X is equipped with a USB device hot plug. With this hot plug, in response to a user's removal instruction, if the USB device is in use, an error message is displayed and the user is informed that the removal has failed. In other words, the conventional technology aims at safe removal itself, and the USB device to be stopped is determined by the user, and the USB device to be resumed is also the one connected by the user.
On the other hand, the resource release/power cut unit 20 of this embodiment notifies the application 74 that is using the accelerator 77 when power saving control of the accelerator 77 occurs, and autonomously releases the accelerator 77 in cooperation with the application 74. It has the feature of completing the process.
Thereby, by eliminating the need for a removal instruction from the user, it is possible to operate the power saving system transparently in a manner invisible to the user, and it is also possible to improve the frequency of power supply control.

In addition, in the power saving control of the accelerator 77 (for example, turning off the power), the resource release/power cut unit 20 of this embodiment secures resources assuming an operation to return to the state before the power saving control (for example, turning the power back on). A mechanism may be provided. The resource securing mechanism records the resources (physical addresses and I/O addresses) secured by the accelerator 30 before the power saving control, and allocates the same recorded area when the accelerator 30 returns.

Next, the effect of versatility will be explained.
In the server 70X of this embodiment, the accelerator power supply section 50 that supplies power to the accelerator 77 is made independent from the power supply section 78 (FIG. 11) of the server 70X, and the power supply state instruction section 24 can control the power supply separately. It has a control mechanism (see Figure 9 for details). The accelerator power supply unit 50 can individually control the power supply of the accelerator 77 from outside, without depending on the implementation of the device driver 75 or the implementation of the accelerator 77. The resource release/power cut unit 20 instructs the accelerator power supply unit 50 to perform power control.

As a result, even if the accelerator 77 is not aware of hot plugging or does not have a power saving function, the power can be cut off from the outside without using its own power control function, ensuring high versatility. be done.
On the other hand, even in the past, the device driver 75 and the accelerator 77 may have implementations that support hot plugging. However, in the past, each individual accelerator 77 requires specific software support, which does not satisfy versatility.

Furthermore, the effect of power efficiency will be explained.
The state change ACC selection unit 11 executes power control such as power cutoff on the unused accelerator 77 selected based on the information in the currently used software driver recording unit 14 .
On the other hand, conventional power control methods involve changing the clock frequency or using design methods that take into account power savings in FPGA accelerators. These power control methods are performed while the power of the accelerator 77 is turned on, so power consumption cannot be reliably reduced to 0 [W], and the effects are limited.

FIG. 2 is a configuration diagram of the usage status database 14A.
The usage status database 14A stores usage status of the accelerator 77 by the application 74. The usage status is recorded by associating the PID (process ID) of the application 74 that is using the accelerator 77 that is subject to power control with the ID of the device driver 75 that uses the accelerator 77 that is subject to power control.

FIG. 3 is a configuration diagram of the load status database 14B.
The load status database 14B stores the load status of the accelerator 77 caused by the application 74. The load status is recorded for each server 70X (host) by associating the slot ID of the server 70X, the PID of the application 74 executed by the server 70X, and the load of the accelerator 77 to which the application 74 offloads.
Note that the load value indicates the ratio of the amount of data to be processed by the server 70X when the maximum throughput is taken as a reference (100%). Furthermore, the amount of data to be processed (the amount of traffic) varies over time, such as being large during the day and small during the night.

FIG. 4 is a configuration diagram of the slot power supply configuration recording section 23. As shown in FIG.
The slot power supply configuration recording unit 23 stores the ID of the slot in which the accelerator 77 can be mounted, which is accommodated in each server 70X (host), the power domain formed by each slot with other slots, and the Record it in association with the purpose.
Note that the power domain indicates constraints on power control between slots, and is a unit of power supply that can turn on and off the power. For example, slot ID=1 and 2 of the host (Host_1) belong to the same power domain A, so when the accelerator 77 with slot ID=1 is powered off, the accelerator 77 with slot ID=2 is also powered off at the same time. .

FIG. 5 is a flowchart showing a process for selecting a power saving method according to the load. Before executing the process shown in FIG. 5, the in-use software resource collection unit 13 collects the load on the accelerator 77 and records the result in the load status database 14B.
The state change ACC selection unit 11 acquires the application usage status (dependence relationship with the device) from the usage status database 14A (S101).
The state change ACC selection unit 11 determines whether the power supply of the slot of the accelerator 77 used by the application 74 acquired in S101 can be controlled independently (S102). If Yes in S102, proceed to S105, and if No, proceed to S103. Note that if the power domain is set as the power control method, the result in S102 is No.

The state change ACC selection unit 11 refers to the slot power supply configuration recording unit 23 and identifies the slot that belongs to the power domain (S103). The state change ACC selection unit 11 sums up the loads in the load status database 14B for each power domain for the slot identified in S103 (S104). As a result, power saving control can be performed even in the server 70X, which has restrictions on power control such as not being able to control the power of individual slots.

The ACC state instruction unit 12 selects a power saving method to be applied from now on, depending on the load on the accelerator 77 (S105). Note that the load on the accelerator 77 is the load of a single slot if Yes in S102, and the load for each power domain summed in S104 if No in S102.
- [When load = 0%-30%] Instructs the resource release ensuring instruction unit 21 to cut the power (S111, details are shown in FIG. 6).
- [When load = 31%-50%] Instructs the resource release securing instruction unit 21 to change the circuit of the accelerator with load (S112, details in FIG. 7).
- [When load = 51%-70%] Instructs the resource release securing instruction unit 21 to change the clock of the loaded accelerator (S113, details shown in FIG. 7).
- [When load = 71%-100%] Do nothing (S114).

The power saving controller unit 10 monitors the load status of each accelerator 77 (information obtained from the application 74) and the characteristics of each power control method (power reduction effect, transition time to power saving mode, return time from power saving mode, etc.). ), select the optimal power control method. The optimal power supply control is, for example, the power supply control in which the sum of the evaluation score of the power reduction effect and the evaluation score of the processing ability by power supply is the maximum value.
For example, the power saving controller unit 10 selects a power control method based on the load status of each accelerator 77, such as in S111 to S114, for a target accelerator with a lower load on the accelerator 77, which takes longer transition time and recovery time. do. This policy of the power saving controller unit 10 is based on the following reasons.
First, power supply control is required to minimize performance degradation by following load fluctuations. As a trend in power control, it is assumed that the power cut instruction in S111 takes a longer time to transition or return to, compared to a clock change, such as switching processing performed within the application 74 or initialization of an accelerator.
Therefore, taking into account that the load fluctuates gradually, we adopted a policy of switching to a method that takes into account the lower the load on the accelerator, the longer the recovery time, and the greater the power reduction effect.

FIG. 6 is a flowchart showing power saving control processing based on a power cut instruction (S111). The resource release securing instruction unit 21 receives the power cut instruction (S111) and starts the process shown in FIG. 6.
The state change notification unit 22 notifies the application 74 that is currently using the accelerator 77 (target accelerator) that is the target of the power cut instruction (S201). Therefore, the status change notification section 22 refers to the currently used software driver recording section 14 and the slot power supply configuration recording section 23 to identify the application 74 to which the notification is to be made.

Upon receiving the notification in S201, the application 74 instructs the power switch unit 60 to terminate the target accelerator specific to the application 74 (S202). As a result, the target accelerator is released from the application 74.
Note that, if the application 74 is executing a task using the target accelerator before releasing the target accelerator, it is desirable to move the task to another application 74 (redistribution of task load). The redistribution of the task load is performed by the application 74 based on the notification sent to the application 74 from the state change notification unit 22.

Here, the resource release securing instruction unit 21 determines whether there is an application 74 using the target accelerator (S203). If the termination process in S202 is insufficient and there are still applications 74 using the target accelerator (S203, Yes), the status cannot be changed, so the power cut instruction in S111 is assumed to have failed and the process ends. do.
If No in S203, the resource release securing instruction unit 21 terminates the device driver 75 for using the target accelerator (S204). This blocks instructions from the application 74 to the target accelerator.

The resource release securing instructing unit 21 instructs the power state instructing unit 24 to perform termination processing that is independent of the device of the target accelerator (S205). In response to the instruction in S205, the power state instruction unit 24 instructs the power switch unit 60 to turn off the power of the target accelerator (S206). The accelerator power supply unit 50 turns off (stops) the power of the instructed target accelerator.

FIG. 7 is a flowchart showing power saving control processing based on a circuit change instruction (S112) or a clock change instruction (S113). The resource release securing instruction unit 21 receives the circuit change instruction (S112) or the clock change instruction (S113) and starts the process shown in FIG. 7.
S301-S304 are the same processes as S201-S204 in FIG. 6, and the "target accelerator" receives the circuit change instruction (S112) or clock change instruction (S113) from the accelerator 77 that is the target of the power cut instruction (S111). ) is replaced by the accelerator 77 that is the instruction target.

Next, the processing in S304 and S306 assumes that when changing the state of the target accelerator (S305), it is necessary to temporarily stop the device driver 75 for accessing the target accelerator. On the other hand, if it is not necessary to temporarily stop the device driver 75, the processes in S304 and S306 may be omitted.
The resource release securing instructing unit 21 terminates the device driver 75 (S304), and instructs the power state instructing unit 24 to change the state of the target accelerator (power saving control) (S305). Upon receiving the instruction in S305, the power state instruction unit 24 instructs the power switch unit 60 to change the state of the target accelerator. The accelerator power supply unit 50 executes the instructed state change of the target accelerator.

Then, the resource release securing instruction unit 21 starts the device driver 75 (S306). The status change notification unit 22 refers to the in-use software driver recording unit 14 and the slot power supply configuration recording unit 23 that were updated by the status change in S305, and notifies the application 74 of the status change result (S307).

FIG. 8 is a table showing power saving techniques instructed by the ACC status instruction section 12.
The ACC state instruction unit 12 is not limited to the power saving methods exemplified in S111 to S113, and may execute the power saving methods listed in the table of FIG. 8.
The table in Figure 8 shows the processing capacity of the ACC (accelerator 77) when applying the power saving method and the power consumption reduction width (difference from the maximum configuration) for each power saving method classification and power saving method. ), the time required for transition/return, and the applicability of each ACC (accelerator 77) are associated.
Note that the power consumption reduction width is a calculated value assuming a specific configuration. Also, applicability refers to which accelerators 77 can be applied to FPGAs (field-programmable gate arrays), GPUs (Graphics Processing Units), and ASICs (application specific integrated circuits) among the accelerators 77 (marked with a circle). ) is the power saving method.

The following four categories differ in the range of variation in ACC processing capacity, the range of reduction in power consumption, the time required for transition, and the applicability of each ACC. The ACC state instruction unit 12 uses these depending on the load prediction result and the type of the accelerator 77 to be controlled.
The classification "circuit scale change" includes writing of an empty design and partial reconfiguration (circuit change in S112).
The classification "clock control" includes arithmetic unit clock control (clock change in S113) and clock gating.
The category "power control" includes turning off the ACC card (power cut in S111) and lowering the voltage of the ACC internal power supply.
The category “Others” includes fan control.

FIG. 9 is a three-dimensional diagram showing a box 90 (PCIe Box) for accommodating a PCI Express expansion card as an example of mounting the accelerator power supply unit 50.
This box (accelerator housing device) 90 may be configured as the same casing as the server 70X, or may be configured to be externally connected to the server 70X. The box 90 has a slot group 91 belonging to the first power domain of the accelerator power supply section 51 and a slot group 92 belonging to the second power domain of the accelerator power supply section 52.

The slot group 91 accommodates four slots, slots 91a to 91d, and an accelerator 77 can be attached to and removed from each slot. Similarly, the slot group 92 accommodates four slots, slots 92a to 92d. Further, each slot group 91 can be attached to and removed from the box 90 by a handle 91T, and the slot group 92 can also be attached to and removed from the box 90 by a handle 92T.
Alternatively, the box 90 may have a configuration in which the power supply can be controlled individually for each slot instead of for each power domain. By using such a box 90, it is possible to control the power to the accelerator 77 without modifying the power to control the accelerator 77.

FIG. 10 is a hardware configuration diagram of the server 70X.
Note that the hardware 73X of the server 70X includes the components already explained in FIG. FIG. 10 additionally explains the components included in the server 70X.
The server 70X is configured as a computer 900 having a CPU 901, a RAM 902, a ROM 903, an HDD 904, a communication I/F 905, an input/output I/F 906, and a media I/F 907.
Communication I/F 905 is connected to external communication device 915. The input/output I/F 906 is connected to the input/output device 916. The media I/F 907 reads and writes data from the recording medium 917. Further, the CPU 901 controls each unit by executing a program (also referred to as an application 74 in FIG. 1, or an application for short) loaded into the RAM 902. This program can also be distributed via a communication line or recorded on a recording medium 917 such as a CD-ROM.

[effect]
The server 70X of the present invention includes an accelerator power supply unit 50 that individually supplies power to each accelerator 77;
A power-saving controller that selects an accelerator 77 to be subjected to power control as a target accelerator based on the usage status and load status of each accelerator 77 used by each application 74, and selects a power control method for the target accelerator. Part 10 and
The application 74 using the target accelerator is instructed to release the target accelerator, and after the application 74 using the target accelerator no longer exists, the accelerator power supply unit 50 is instructed to control the power of the target accelerator. It is characterized by having a resource release/power cut section 20.
Note that the accelerator 77 is an example of offload destination hardware.

As a result, in the present invention, the accelerator power supply unit 50 that enables power control that does not depend on the individual implementation of the accelerator 77 ensures versatility that does not depend on the implementation of a specific accelerator 77.
Further, the resource release/power cut unit 20 performs power control after the application 74 using the target accelerator no longer exists, so crashes can be prevented and availability can be improved.

The present invention provides a configuration in which the accelerator power supply unit 50 supplies power individually to each power domain in which a plurality of accelerators 77 are grouped, instead of supplying power to each accelerator 77 individually.
The power saving controller unit 10 is characterized in that it simultaneously selects a plurality of accelerators 77 belonging to the same power domain as target accelerators to be subjected to power control.

As a result, even in an environment where it is not possible to adopt a configuration in which power is supplied individually to each accelerator 77, a power reduction effect can be expected for each power domain.

The present invention is characterized in that the power saving controller unit 10 selects an optimal power control method based on the load status of each accelerator 77 and the characteristics of each power control method.

As a result, an appropriate power control method is selected according to the load situation, which reflects the fluctuating traffic volume and the capacity of each accelerator 77, thereby balancing power reduction effects and reasonable processing capacity. I can balance it well.

10 Power saving controller section (controller section)
11 Status change ACC selection unit 12 ACC status instruction unit 13 In-use software/resource collection unit 14 In-use software driver recording unit 14A Usage status database 14B Load status database 20 Resource release/power cut unit (control instruction unit)
21 Resource release securing instruction unit 22 Status change notification unit 23 Slot power configuration recording unit 24 Power status instruction unit 50 Accelerator power supply unit (power supply unit)
60 Power switch unit 70X Server (power control device)
71X Userland 72X OS
73X Hardware 74 Application 75 Device driver 76 CPU
77 Accelerator 78 Power supply unit 90 Box (accelerator housing device)

Claims (7)

a power supply unit that supplies power to each accelerator individually;
a controller unit that selects the accelerator to be subjected to power control as a target accelerator based on the usage status and load status of each accelerator used by each application, and selects a power control method for the target accelerator; ,
The application that is using the target accelerator is instructed to release the target accelerator, and after the application that is using the target accelerator no longer exists, the power supply unit controls the power of the target accelerator. A power supply control device comprising: a control instruction section for instructing. The power supply unit is configured to individually supply power to each power domain in which a plurality of accelerators are grouped, instead of individually supplying power to each accelerator,
The power control device according to claim 1, wherein the controller section selects a plurality of the accelerators belonging to the same power domain as the target accelerators to be subjected to power control at the same time. The power control device according to claim 1, wherein the controller unit selects an optimal power control method based on the load status of each accelerator and the characteristics of each power control method. a power supply unit that individually supplies power to each hardware that each application uses as an offload destination;
a controller unit that selects the hardware to be subjected to power control as target hardware based on information obtained from each application, and selects a power control method for the target hardware;
Instructing the application that is using the target hardware to release the target hardware, and controlling the power supply of the target hardware after the application that is using the target hardware no longer exists. A power supply control device comprising: a control instruction unit that instructs the power supply unit. A power control system having a power control device and an accelerator housing device,
The accelerator accommodating device has a power supply unit that individually supplies power to each accelerator accommodated,
The power supply control device includes:
a controller unit that selects the accelerator to be subjected to power control as a target accelerator based on the usage status and load status of each accelerator used by each application, and selects a power control method for the target accelerator; ,
The application that is using the target accelerator is instructed to release the target accelerator, and after the application that is using the target accelerator no longer exists, the power supply unit controls the power of the target accelerator. A power supply control system comprising: a control instruction section for instructing. The power supply control device includes a power supply section, a controller section, and a control instruction section,
The power supply unit supplies power to each accelerator individually,
The controller unit selects the accelerator to be subjected to power control as a target accelerator based on the usage status and load status of each accelerator used by each application, and determines a power control method for the target accelerator. choose,
The control instruction unit instructs the application that is using the target accelerator to release the target accelerator, and after the application that is using the target accelerator no longer exists, turns off the power of the target accelerator. A power supply control method, comprising instructing the power supply unit to perform control. A power control program for causing a computer to function as the power control device according to any one of claims 1 to 4.

Images