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WO2022245333A1 - Bus interfaces control - Google Patents

Bus interfaces control Download PDF

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Publication number
WO2022245333A1
WO2022245333A1 PCT/US2021/032798 US2021032798W WO2022245333A1 WO 2022245333 A1 WO2022245333 A1 WO 2022245333A1 US 2021032798 W US2021032798 W US 2021032798W WO 2022245333 A1 WO2022245333 A1 WO 2022245333A1
Authority
WO
WIPO (PCT)
Prior art keywords
bus interface
communication
processor
communication characteristic
electronic device
Prior art date
Application number
PCT/US2021/032798
Other languages
French (fr)
Inventor
Binh T. Truong
Mark L. Hammons
Jeffrey P. Kenline
Original Assignee
Hewlett-Packard Development Company, L.P.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hewlett-Packard Development Company, L.P. filed Critical Hewlett-Packard Development Company, L.P.
Priority to PCT/US2021/032798 priority Critical patent/WO2022245333A1/en
Publication of WO2022245333A1 publication Critical patent/WO2022245333A1/en

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Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/382Information transfer, e.g. on bus using universal interface adapter

Definitions

  • Some computing or electronic devices include a bus interface to couple to other devices, such as peripheral devices.
  • the bus interface and the peripheral device have different capabilities such that interactions between the bus interface and the peripheral device may be managed, in part, by the computing or electronic devices.
  • FIG. 1 is an electronic device having a processor and a controller in accordance with various examples.
  • FIG. 2 is a flow diagram of a method for electronic device login in accordance with various examples.
  • FIG. 3 is a flow diagram of a method for electronic device login in accordance with various examples.
  • FIG. 4 is a flow diagram of a method for electronic device login in accordance with various examples.
  • Some bus interfaces are capable of communication at speeds, or according to characteristics, that may not be compatible with peripherals coupled to the bus interface.
  • a third-generation bus interface e.g., Universal Serial Bus (USB) 3.0
  • USB Universal Serial Bus
  • a peripheral device coupled to the third-generation bus interface may have been manufactured or programmed with a capability of communicating at the first speed.
  • the peripheral device may not be able to consistently operate at the first speed.
  • the bus interface and the peripheral device may perform an auto negotiation that determines that both the bus interface and the peripheral device are capable of communication at the first speed such that the bus interface subsequently attempts to interact with the peripheral device at the first speed.
  • an auto negotiation that determines that both the bus interface and the peripheral device are capable of communication at the first speed such that the bus interface subsequently attempts to interact with the peripheral device at the first speed.
  • a user experience resulting from the interaction between the bus interface and the peripheral device may be degraded. For example, there may be disconnections in communication between the bus interface and the peripheral device that may degrade a user experience.
  • Some examples of this disclosure include an electronic system (e.g., a computing device) having firmware that facilitates user specification of a communication speed for the bus interface.
  • the firmware may be a Basic Input/Output System (BIOS).
  • BIOS Basic Input/Output System
  • a user may provide user input to enter a firmware settings portion of executable code of the electronic system.
  • the user input may be pressing, or depressing, a button of the electronic system, a key on a keyboard of the electronic system, or a combination of buttons or keys.
  • the electronic system may provide a graphical user interface (GUI) to the user having options for modifying settings of the firmware of the electronic system.
  • GUI graphical user interface
  • Some of these settings include a speed at which the bus interface communicates.
  • the user may specify a speed of operation for the bus interface that is less than a rated speed of the bus interface (e.g., less than a speed for which the bus interface is manufactured to operate or programmed by default, such as according to industry specification, to operate).
  • the user may specify the speed explicitly, such as in units of data per unit of time, or as a function of other characteristics.
  • the user may provide user input that indicates a manufactured communication capability of the peripheral device, an approximate length of a conductor coupling the bus interface to the peripheral device, and any other suitable information.
  • the electronic system may determine the speed for communication by the bus interface based on the provided user input.
  • FIG. 1 is a block diagram depicting an electronic device 100, in accordance with some examples.
  • Electronic device 100 may be any suitable computing or processing device capable of performing the functions disclosed herein such as a computer system, a laptop (or other such) device, a tablet device, a smartphone, a personal computer, a server, an Internet of Things device, a cloud computing node, etc.
  • Electronic device 100 may implement at least some of the features/methods disclosed herein, for example, as described below with respect to any of the method 200, method 300, method 400, and/or method 500.
  • the electronic device 100 may comprise input devices 110. Some of the input devices 110 may be microphones, keyboards, touchscreens, buttons, toggle switches, cameras, sensors, and/or other devices that allow a user to interact with, and provide input to, the electronic device 100. Some of the input devices 110 may be downstream ports coupled to a transceiver (Tx/Rx) 120, which may be transmitters, receivers, or combinations thereof. The Tx/Rx 120 may transmit and/or receive data to and/or from other computing devices via at least some of the input devices 110.
  • the electronic device 100 may also comprise a plurality of output devices 140.
  • Some of the output devices 140 may be speakers, a display screen (which may also be an input device such as a touchscreen), lights, or any other device that allows a user to interact with, and receive output from, the electronic device 100.
  • At least some of the output devices 140 may be upstream ports coupled to another Tx/Rx 120, where the Tx/Rx 120 may transmit and/or receive data from other nodes via the upstream ports.
  • the downstream ports and/or the upstream ports may include electrical and/or optical transmitting and/or receiving components.
  • the electronic device 100 may comprise antennas (not shown) coupled to the Tx/Rx 120.
  • the Tx/Rx 120 may transmit and/or receive data from other computing or storage devices wirelessly via the antennas.
  • the electronic device 100 may include additional Tx/Rx 120 such that the electronic device 100 may have multiple networking or communication interfaces, for example, such that the electronic device 100 may communicate with a first device using a first communication interface (e.g., via the Internet) and may communicate with a second device using a second communication interface (e.g., another electronic device 100 without using the Internet).
  • at least some of the input devices 110, output devices 140, and/or Tx/Rx 120 are bus interfaces.
  • at least some of the input devices 110, output devices 140, and/or Tx/Rx 120 may be USB interfaces that may operate according to industry standards or specifications.
  • a processor 130 may be coupled to the Tx/Rx 120 and at least some of the input devices 110 and/or output devices 140 and may execute code, such as code of a BIOS 155, described below.
  • the processor 130 may comprise multi-core processors and/or memory modules 150 (although this configuration is not shown in FIG. 1), which function as data stores, buffers, etc.
  • the processor 130 may be implemented as a general processor or as part of application specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), and/or digital signal processors (DSPs). Although illustrated as a single processor, the processor 130 is not so limited and may comprise multiple processors. In at least some examples, the processor 130 may be, or may be referred to as, a CPU.
  • FIG. 1 also illustrates that a memory module 150 may be coupled to the processor 130 and may be a non-transitory medium to store various types of data.
  • Memory module 150 may comprise memory devices including secondary storage, read-only memory (ROM), and random-access memory (RAM).
  • the secondary storage may comprise disk drives, optical drives, solid-state drives (SSDs), and/or tape drives and may be used for non-volatile storage of data and as an over-flow storage device if the RAM is not large enough to hold all working data.
  • the secondary storage may be used to store programs that are loaded into the RAM when such programs are selected for execution.
  • the ROM may be used to store instructions and/or data that are read during program execution.
  • the ROM may be a non volatile memory device that may have a small memory capacity relative to the larger memory capacity of the secondary storage.
  • the RAM may be used to store volatile data and perhaps to store instructions. Access to both the ROM and RAM may be faster than to the secondary storage.
  • the memory module 150 may be used to house the instructions or executable code for execution by the processor 130.
  • the memory module 150 may store executable code of an operating system of the electronic device 100.
  • At least one of the processor 130 and/or the memory module 150 may be changed, transforming the electronic device 100 in part into a particular machine or apparatus, for example, a device having the functionality taught by the present disclosure.
  • the electronic device 100 may also include a BIOS 155 stored in a memory 157.
  • the memory 157 may be a non-transitory medium to store various types of data.
  • the BIOS 155 includes machine-readable instructions.
  • the BIOS 155 may include executable code usable to perform a power on self-test (POST), which includes hardware initialization, testing, and configuration during the boot-up process.
  • POST power on self-test
  • the BIOS 155 further includes executable code usable to launch a bootloader from a Master Boot Record (MBR), and to use the bootloader to launch an operating system.
  • MLR Master Boot Record
  • BIOS 155 is usable to provide operating system runtime services (e.g., communication with peripheral devices) for the operating system and applications.
  • Unified Extensible Firmware Interface may be used in lieu of a BIOS 155.
  • UEFI includes executable code usable to perform hardware initialization, testing, and configuration during the boot-up process, to launch the operating system, and to provide operating system runtime services for the operating system and applications.
  • GUID globally unique identifier
  • GPTs globally unique identifier partition tables
  • BIOS 155 (and the term BIOS generally) to refer to both BIOS and UEFI, and in some examples, to another form of firmware that interfaces with hardware elements of the electronic device 100 to communicate with and/or control the hardware elements.
  • An operating system comprises executable code that manages both hardware and executable code (e.g., applications) after a computer has booted up.
  • the memory 157 is a flash memory and the BIOS 155 is stored in the memory 157.
  • the BIOS 155 is instead stored in the memory module 150.
  • the BIOS 155 is stored in the processor 130, such as in a cache, register, or other storage device of the processor 130.
  • the BIOS 155 also includes executable code for controlling at least some bus interfaces of the electronic device 100.
  • the BIOS 155 may include executable code that controls a communication characteristic of the bus interface.
  • Communication characteristics of the bus interface may include a specification or protocol according to which the bus interface operates, a speed at which the bus interface communicates, latency of the bus interface, payload size, power and/or power states, disconnect voltage, current, drive strength, timeout time, etc.
  • the BIOS 155 determines communication characteristics for the bus interface automatically.
  • the BIOS 155 may detect a device type or device class of a peripheral device coupled to the bus interface and may specify the communication characteristics of the bus interface according to capabilities of the peripheral device.
  • the BIOS 155 may detect characteristics of a conductor coupling the bus interface to a peripheral device and may specify the communication characteristics of the bus interface according to capabilities of the peripheral device and/or the characteristics of the conductor. In other examples, the BIOS 155 may specify the communication characteristics of the bus interface according to a default state or default communication characteristics for the bus interface. In some examples, the BIOS 155 determines the communication characteristics of the bus interface according to an auto-negotiation process between the electronic device 100 and a peripheral device coupled to the bus interface in a manner that may be substantially transparent to a user of the electronic device 100 (e.g., such as involving minimal input from the user other than coupling the peripheral device to the bus interface).
  • the BIOS 155 may program the determined communication characteristics to the bus interface by writing a value or values to a control register or registers (not shown) of the bus interface.
  • the determined characteristics may be compliant with a standard or specification for operation of the bus interface and the peripheral device but may result in a diminished user experience. For example, despite the bus interface and the peripheral device each having the capability to communicate at a particular speed, and thus the BIOS 155 controlling the bus interface to operate at that particular speed, other factors may adversely affect user experience in using the peripheral device with the bus interface at that particular speed. For example, a length of a conductor coupling the peripheral device to the bus interface may affect the user experience.
  • the peripheral device, the bus interface, or the conductor coupling the peripheral device to the bus interface may affect the user experience.
  • Interference existing around the peripheral device, the bus interface, or the conductor coupling the peripheral device to the bus interface may also affect the user experience.
  • the diminished user experience may also include isolated or recurring communicative disconnection of the peripheral device from the bus interface and/or non responsiveness of the peripheral device.
  • the BIOS 155 may include executable code for rendering and/or presenting an interface to enable a user to specify operational parameters for the electronic device 100, such as a communication characteristic of the bus interface. Some of the operational parameters may be specified during startup or a boot process of the electronic device 100 (e.g., prior to loading an operating system). In some examples, the BIOS 155 may also be accessible after the operating system has been loaded and some of the operational parameters may be specified while the operating system is running. For some operational parameter changes, the electronic device 100 may be restarted to cause the change in the operational parameter to take effect. For other operational parameter changes, the change in the operational parameter may take effect without restarting the electronic device 100.
  • the user may specify a communication characteristic for the bus interface that causes the bus interface to operate in a non-standard manner.
  • a non-standard manner of operation of the bus interface may be the bus interface operating in a manner other than as specified according to an applicable standard or specification for the bus interface.
  • the standard or specification may specify that a bus interface operates at a highest speed at which the bus interface and a peripheral device coupled to the bus interface are capable of operating.
  • a user may specify a communication characteristic for the bus interface that causes the bus interface to operate in a non-standard manner by operating at a speed less than the highest speed at which the bus interface and a peripheral device coupled to the bus interface are capable of operating.
  • the user may do this by providing the speed at which the bus interface should communicate. In other examples, the user may do this by providing a length of a conductor coupling the bus interface to the peripheral device, a class of the peripheral device, or other information about an environment in which the bus interface is implemented, a conductor coupling the bus interface to the peripheral device, or the peripheral device and the BIOS 155 may determine a speed at which to operate (or other communication characteristic for the bus interface) according to the information provided by the user.
  • the BIOS 155 may write a value to a control register of the bus interface to cause the bus interface to operate according to the communication characteristic specified by the user.
  • the value written to the control register may replace or override a value previously stored in the control register.
  • the BIOS 155 may prevent the value stored in the control register from being overridden or replaced if the value stored in the control register is based on user input and a peripheral device coupled to the bus interface corresponding to the control register has not been de-coupled from the bus interface.
  • the BIOS 155 may store an association between a communication characteristic specified by the user, a unique identification of a peripheral device coupled to a bus interface, and/or a conductor coupling the bus interface to the peripheral device. Based on that association, the BIOS 155 may automatically control the bus interface to operate according to the communication characteristic subsequently if the peripheral device is again coupled to the bus interface and without involving the user again specifying the communication characteristic.
  • FIG. 2 is a flow diagram of a method 200 for bus interface control, in accordance with some examples.
  • the method 200 may be suitable for implementation on an electronic device, such as the electronic device 100 of FIG. 1.
  • the method 200 may be at least partially implemented by firmware, such as the BIOS 155.
  • the method 200 may be implemented at least in part as computer- executable instructions or code, stored on a computer-readable medium, such as the memory 157 of FIG. 1 , which, when executed by a processor, such as the processor 130 of FIG. 1 , may cause the processor 130 to execute the computer- executable instructions to perform operations.
  • the processor 130 may execute the computer-executable instructions to implement or execute control of a bus interface according to the BIOS 155.
  • first input is received from a user.
  • the first input causes the processor to execute a firmware settings selection portion of executable code of the BIOS.
  • the first input may cause the processor to present a user interface suitable for a user to provide further input.
  • the user provides the first input by pressing a button, or combination of buttons (either simultaneously or in a programmed and defined order), of the electronic device 100.
  • second user input may be received.
  • the second user input may specify a communication characteristic of the bus interface which is coupled to the processor.
  • the second input may specify a speed for operation of the bus interface, a length of a conductor coupled to the bus interface, a class of a device coupled to the bus interface, or other information, such as an application environment of the bus interface, the peripheral device, and/or the conductor that coupled the peripheral device to the bus interface.
  • the communication characteristic specified according to the second user input has a value different from a default programmed value of the bus interface.
  • the bus interface may have a first value as a default programmed value (e.g., a maximum speed at which both the bus interface and the peripheral device are capable of communicating).
  • the first value may be specified by a standard, specification, or other set of rules by which the bus interface and/or the peripheral device communicate.
  • the second user input may specify a second value that is different from the first value.
  • the processor may control the bus interface to operate according to the second user input (e.g., the communication characteristic).
  • the processor may write the communication characteristic, or a value corresponding to, representative of, or determined according to, the communication characteristic to a control register of the bus interface.
  • the value stored in the control register of the bus interface in some examples, may control at least a portion of operation of the bus interface.
  • the bus interface may operate or communicate at a speed determined according to the value stored in the control register.
  • FIG. 3 is a flow diagram of a method 300 for bus interface control, in accordance with some examples.
  • the method 300 may be suitable for implementation on an electronic device, such as the electronic device 100 of FIG. 1.
  • the method 300 may be at least partially implemented by firmware, such as the BIOS 155.
  • the method 200 may be implemented at least in part as computer- executable instructions or code, stored on a computer-readable medium, such as the memory 157 of FIG. 1 , which, when executed by a processor, such as the processor 130 of FIG. 1 , may cause the processor 130 to execute the computer- executable instructions to perform operations.
  • the processor 130 may execute the computer-executable instructions to implement or execute control of a bus interface according to the BIOS 155.
  • input may be received.
  • the input may be received via a firmware settings interface.
  • the firmware seeing interface may be invisible to a user, such that the interface is accessed via a background operation of the electronic device without involving user interaction.
  • the input may specify a communication characteristic of the bus interface.
  • the input may be obtained from a storage device or storage location, such as responsive to detection of a conductor of a certain length being plugged into the bus interface, a particular peripheral device, or device of a particular class of peripheral devices, being plugged into the bus interface, etc.
  • the input may specify a speed for operation of the bus interface, a length of a conductor coupled to the bus interface, a class of a device coupled to the bus interface, or other information, such as an application environment of the bus interface, the peripheral device, and/or the conductor that coupled the peripheral device to the bus interface.
  • the firmware settings interface may itself be presented based on user input. For example, the user may provide user input that causes the processor to execute a firmware settings selection portion of executable code of a firmware. In some examples, the user may provide the input to cause the processor to execute the firmware settings selection portion of the executable code by pressing a button or buttons according to a programmed pattern.
  • the processor may control the bus interface to operate according to the input (e.g., the communication characteristic). For example, the processor may write the communication characteristic, or a value corresponding to, representative of, or determined according to, the communication characteristic to a control register of the bus interface.
  • the value stored in the control register of the bus interface in some examples, may control at least a portion of operation of the bus interface.
  • the bus interface may operate or communicate at a speed determined according to the value stored in the control register.
  • the communication characteristic by which the processor controls the bus interface to operate has a value different from a default programmed value of the bus interface.
  • the bus interface may have a first value as a default programmed value (e.g., a maximum speed at which both the bus interface and the peripheral device are capable of communicating).
  • the first value may be specified by a standard, specification, or other set of rules by which the bus interface and/or the peripheral device communicate.
  • the input may specify a second value for the communication characteristic that is different from the first value.
  • FIG. 4 is a flow diagram of a method 400 for bus interface control, in accordance with some examples.
  • the method 400 may be suitable for implementation on an electronic device, such as the electronic device 100 of FIG. 1.
  • the method 400 may be at least partially implemented by firmware, such as the BIOS 155.
  • the method 400 may be implemented at least in part as computer- executable instructions or code, stored on a computer-readable medium, such as the memory 157 of FIG. 1 , which, when executed by a processor, such as the processor 130 of FIG. 1 , may cause the processor 130 to execute the computer- executable instructions to perform operations.
  • the processor 130 may execute the computer-executable instructions to implement or execute control of a bus interface according to the BIOS 155.
  • user input may be received.
  • the user input may specify a communication characteristic of the bus interface.
  • the user input may specify a speed for operation of the bus interface.
  • the user input may specify a length of a conductor coupled to the bus interface, a class of a device coupled to the bus interface, or other information, such as an application environment of the bus interface, the peripheral device, and/or the conductor that coupled the peripheral device to the bus interface.
  • the user input may specify both a length of a conductor coupled to the bus interface and a class of a device coupled to the bus interface.
  • the processor may provide the communication characteristic to a control register of the bus interface.
  • the processor may write a value provided as the user input, the communication characteristic, or a value corresponding to, representative of, or determined according to, the communication characteristic to the control register of the bus interface.
  • the value stored in the control register of the bus interface in some examples, may control at least a portion of operation of the bus interface.
  • the bus interface may operate or communicate at a speed determined according to the value stored in the control register.
  • the value written to the control register may replace or override a value previously stored in the control register.
  • the firmware may prevent the value stored in the control register from being overridden or replaced if the value stored in the control register is based on user input and a peripheral device coupled to the bus interface corresponding to the control register has not been de-coupled from the bus interface.
  • the processor may control the bus interface to operate according to the communication characteristic, based on the control register. In some examples, controlling the bus interface to operate according to the communication characteristic, based on the control register, may cause the bus interface to operate in a non-standard manner, as described above herein.

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Abstract

Aspects of the disclosure provide for a method. In some examples, the method includes receiving user input via a firmware settings interface, the input specifying a communication characteristic of a bus interface coupled to a processor. The method also includes controlling the bus interface to operate according to the communication characteristic, the communication characteristic having a value different from a default programmed value of the bus interface.

Description

BUS INTERFACES CONTROL
BACKGROUND
[0001] Some computing or electronic devices include a bus interface to couple to other devices, such as peripheral devices. Sometimes, the bus interface and the peripheral device have different capabilities such that interactions between the bus interface and the peripheral device may be managed, in part, by the computing or electronic devices.
BRIEF DESCRIPTION OF THE DRAWINGS [0002] Various examples will be described below referring to the following figures: [0003] FIG. 1 is an electronic device having a processor and a controller in accordance with various examples.
[0004] FIG. 2 is a flow diagram of a method for electronic device login in accordance with various examples.
[0005] FIG. 3 is a flow diagram of a method for electronic device login in accordance with various examples.
[0006] FIG. 4 is a flow diagram of a method for electronic device login in accordance with various examples.
DETAILED DESCRIPTION
[0007] Some bus interfaces are capable of communication at speeds, or according to characteristics, that may not be compatible with peripherals coupled to the bus interface. For example, a third-generation bus interface (e.g., Universal Serial Bus (USB) 3.0) may be capable of communication at a first speed. A peripheral device coupled to the third-generation bus interface may have been manufactured or programmed with a capability of communicating at the first speed. However, due to an environment in which the peripheral device is implemented, damage to the peripheral device, interference, damage to a coupling between the peripheral device and the third-generation bus interface, a length of a conductor coupling the peripheral device and the third-generation bus interface, etc., the peripheral device may not be able to consistently operate at the first speed. In some examples, the bus interface and the peripheral device may perform an auto negotiation that determines that both the bus interface and the peripheral device are capable of communication at the first speed such that the bus interface subsequently attempts to interact with the peripheral device at the first speed. However, due to the degradation in performance of the peripheral device as described above, a user experience resulting from the interaction between the bus interface and the peripheral device may be degraded. For example, there may be disconnections in communication between the bus interface and the peripheral device that may degrade a user experience.
[0008] Some examples of this disclosure include an electronic system (e.g., a computing device) having firmware that facilitates user specification of a communication speed for the bus interface. In some electronic systems, the firmware may be a Basic Input/Output System (BIOS). For example, on power-up of the electronic system, a user may provide user input to enter a firmware settings portion of executable code of the electronic system. The user input may be pressing, or depressing, a button of the electronic system, a key on a keyboard of the electronic system, or a combination of buttons or keys. Responsive to the user input, the electronic system may provide a graphical user interface (GUI) to the user having options for modifying settings of the firmware of the electronic system. Some of these settings include a speed at which the bus interface communicates. In at least some examples, the user may specify a speed of operation for the bus interface that is less than a rated speed of the bus interface (e.g., less than a speed for which the bus interface is manufactured to operate or programmed by default, such as according to industry specification, to operate). The user may specify the speed explicitly, such as in units of data per unit of time, or as a function of other characteristics. For example, the user may provide user input that indicates a manufactured communication capability of the peripheral device, an approximate length of a conductor coupling the bus interface to the peripheral device, and any other suitable information. The electronic system may determine the speed for communication by the bus interface based on the provided user input.
[0009] FIG. 1 is a block diagram depicting an electronic device 100, in accordance with some examples. Electronic device 100 may be any suitable computing or processing device capable of performing the functions disclosed herein such as a computer system, a laptop (or other such) device, a tablet device, a smartphone, a personal computer, a server, an Internet of Things device, a cloud computing node, etc. Electronic device 100 may implement at least some of the features/methods disclosed herein, for example, as described below with respect to any of the method 200, method 300, method 400, and/or method 500.
[0010] The electronic device 100 may comprise input devices 110. Some of the input devices 110 may be microphones, keyboards, touchscreens, buttons, toggle switches, cameras, sensors, and/or other devices that allow a user to interact with, and provide input to, the electronic device 100. Some of the input devices 110 may be downstream ports coupled to a transceiver (Tx/Rx) 120, which may be transmitters, receivers, or combinations thereof. The Tx/Rx 120 may transmit and/or receive data to and/or from other computing devices via at least some of the input devices 110. The electronic device 100 may also comprise a plurality of output devices 140. Some of the output devices 140 may be speakers, a display screen (which may also be an input device such as a touchscreen), lights, or any other device that allows a user to interact with, and receive output from, the electronic device 100. At least some of the output devices 140 may be upstream ports coupled to another Tx/Rx 120, where the Tx/Rx 120 may transmit and/or receive data from other nodes via the upstream ports. The downstream ports and/or the upstream ports may include electrical and/or optical transmitting and/or receiving components. In other examples, the electronic device 100 may comprise antennas (not shown) coupled to the Tx/Rx 120. The Tx/Rx 120 may transmit and/or receive data from other computing or storage devices wirelessly via the antennas. In yet other examples, the electronic device 100 may include additional Tx/Rx 120 such that the electronic device 100 may have multiple networking or communication interfaces, for example, such that the electronic device 100 may communicate with a first device using a first communication interface (e.g., via the Internet) and may communicate with a second device using a second communication interface (e.g., another electronic device 100 without using the Internet). In at least some examples, at least some of the input devices 110, output devices 140, and/or Tx/Rx 120 are bus interfaces. For example, at least some of the input devices 110, output devices 140, and/or Tx/Rx 120 may be USB interfaces that may operate according to industry standards or specifications. [0011] A processor 130 may be coupled to the Tx/Rx 120 and at least some of the input devices 110 and/or output devices 140 and may execute code, such as code of a BIOS 155, described below. In some examples, the processor 130 may comprise multi-core processors and/or memory modules 150 (although this configuration is not shown in FIG. 1), which function as data stores, buffers, etc. The processor 130 may be implemented as a general processor or as part of application specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), and/or digital signal processors (DSPs). Although illustrated as a single processor, the processor 130 is not so limited and may comprise multiple processors. In at least some examples, the processor 130 may be, or may be referred to as, a CPU.
[0012] FIG. 1 also illustrates that a memory module 150 may be coupled to the processor 130 and may be a non-transitory medium to store various types of data. The term non-transitory, as used herein, includes all electronic mediums/media of storage, except transitory propagating signals. Memory module 150 may comprise memory devices including secondary storage, read-only memory (ROM), and random-access memory (RAM). The secondary storage may comprise disk drives, optical drives, solid-state drives (SSDs), and/or tape drives and may be used for non-volatile storage of data and as an over-flow storage device if the RAM is not large enough to hold all working data. The secondary storage may be used to store programs that are loaded into the RAM when such programs are selected for execution. The ROM may be used to store instructions and/or data that are read during program execution. The ROM may be a non volatile memory device that may have a small memory capacity relative to the larger memory capacity of the secondary storage. The RAM may be used to store volatile data and perhaps to store instructions. Access to both the ROM and RAM may be faster than to the secondary storage. The memory module 150 may be used to house the instructions or executable code for execution by the processor 130. For example, the memory module 150 may store executable code of an operating system of the electronic device 100.
[0013] By programming and/or loading executable instructions onto the electronic device 100, at least one of the processor 130 and/or the memory module 150 may be changed, transforming the electronic device 100 in part into a particular machine or apparatus, for example, a device having the functionality taught by the present disclosure.
[0014] In at least some examples, the electronic device 100 may also include a BIOS 155 stored in a memory 157. The memory 157 may be a non-transitory medium to store various types of data. In some examples, the BIOS 155 includes machine-readable instructions. For example, the BIOS 155 may include executable code usable to perform a power on self-test (POST), which includes hardware initialization, testing, and configuration during the boot-up process. The BIOS 155 further includes executable code usable to launch a bootloader from a Master Boot Record (MBR), and to use the bootloader to launch an operating system. After launching the operating system, the BIOS 155 is usable to provide operating system runtime services (e.g., communication with peripheral devices) for the operating system and applications. In examples, Unified Extensible Firmware Interface (UEFI) may be used in lieu of a BIOS 155. Like BIOS, UEFI includes executable code usable to perform hardware initialization, testing, and configuration during the boot-up process, to launch the operating system, and to provide operating system runtime services for the operating system and applications. However, UEFI employs globally unique identifier (GUID) partition tables (GPTs) in lieu of MBRs. For the sake of convenience and brevity, this disclosure uses the BIOS 155 (and the term BIOS generally) to refer to both BIOS and UEFI, and in some examples, to another form of firmware that interfaces with hardware elements of the electronic device 100 to communicate with and/or control the hardware elements. An operating system comprises executable code that manages both hardware and executable code (e.g., applications) after a computer has booted up. In some examples, the memory 157 is a flash memory and the BIOS 155 is stored in the memory 157. In other examples, the BIOS 155 is instead stored in the memory module 150. In other examples, the BIOS 155 is stored in the processor 130, such as in a cache, register, or other storage device of the processor 130.
[0015] In at least some examples, the BIOS 155 also includes executable code for controlling at least some bus interfaces of the electronic device 100. For example, the BIOS 155 may include executable code that controls a communication characteristic of the bus interface. Communication characteristics of the bus interface may include a specification or protocol according to which the bus interface operates, a speed at which the bus interface communicates, latency of the bus interface, payload size, power and/or power states, disconnect voltage, current, drive strength, timeout time, etc. In at least some examples, the BIOS 155 determines communication characteristics for the bus interface automatically. For example, the BIOS 155 may detect a device type or device class of a peripheral device coupled to the bus interface and may specify the communication characteristics of the bus interface according to capabilities of the peripheral device. In other examples, the BIOS 155 may detect characteristics of a conductor coupling the bus interface to a peripheral device and may specify the communication characteristics of the bus interface according to capabilities of the peripheral device and/or the characteristics of the conductor. In other examples, the BIOS 155 may specify the communication characteristics of the bus interface according to a default state or default communication characteristics for the bus interface. In some examples, the BIOS 155 determines the communication characteristics of the bus interface according to an auto-negotiation process between the electronic device 100 and a peripheral device coupled to the bus interface in a manner that may be substantially transparent to a user of the electronic device 100 (e.g., such as involving minimal input from the user other than coupling the peripheral device to the bus interface). The BIOS 155 may program the determined communication characteristics to the bus interface by writing a value or values to a control register or registers (not shown) of the bus interface. [0016] In some examples, the determined characteristics may be compliant with a standard or specification for operation of the bus interface and the peripheral device but may result in a diminished user experience. For example, despite the bus interface and the peripheral device each having the capability to communicate at a particular speed, and thus the BIOS 155 controlling the bus interface to operate at that particular speed, other factors may adversely affect user experience in using the peripheral device with the bus interface at that particular speed. For example, a length of a conductor coupling the peripheral device to the bus interface may affect the user experience. Similarly, damage to the peripheral device, the bus interface, or the conductor coupling the peripheral device to the bus interface may affect the user experience. Interference existing around the peripheral device, the bus interface, or the conductor coupling the peripheral device to the bus interface may also affect the user experience. In at least some examples, the diminished user experience may also include isolated or recurring communicative disconnection of the peripheral device from the bus interface and/or non responsiveness of the peripheral device.
[0017] In some examples, the BIOS 155 may include executable code for rendering and/or presenting an interface to enable a user to specify operational parameters for the electronic device 100, such as a communication characteristic of the bus interface. Some of the operational parameters may be specified during startup or a boot process of the electronic device 100 (e.g., prior to loading an operating system). In some examples, the BIOS 155 may also be accessible after the operating system has been loaded and some of the operational parameters may be specified while the operating system is running. For some operational parameter changes, the electronic device 100 may be restarted to cause the change in the operational parameter to take effect. For other operational parameter changes, the change in the operational parameter may take effect without restarting the electronic device 100.
[0018] In some examples, the user may specify a communication characteristic for the bus interface that causes the bus interface to operate in a non-standard manner. A non-standard manner of operation of the bus interface, as used herein, may be the bus interface operating in a manner other than as specified according to an applicable standard or specification for the bus interface. For example, the standard or specification may specify that a bus interface operates at a highest speed at which the bus interface and a peripheral device coupled to the bus interface are capable of operating. Flowever, in some examples, a user may specify a communication characteristic for the bus interface that causes the bus interface to operate in a non-standard manner by operating at a speed less than the highest speed at which the bus interface and a peripheral device coupled to the bus interface are capable of operating. In some examples, the user may do this by providing the speed at which the bus interface should communicate. In other examples, the user may do this by providing a length of a conductor coupling the bus interface to the peripheral device, a class of the peripheral device, or other information about an environment in which the bus interface is implemented, a conductor coupling the bus interface to the peripheral device, or the peripheral device and the BIOS 155 may determine a speed at which to operate (or other communication characteristic for the bus interface) according to the information provided by the user.
[0019] In some examples, the BIOS 155 may write a value to a control register of the bus interface to cause the bus interface to operate according to the communication characteristic specified by the user. The value written to the control register may replace or override a value previously stored in the control register. In at least some examples, the BIOS 155 may prevent the value stored in the control register from being overridden or replaced if the value stored in the control register is based on user input and a peripheral device coupled to the bus interface corresponding to the control register has not been de-coupled from the bus interface.
[0020] In some examples, the BIOS 155 may store an association between a communication characteristic specified by the user, a unique identification of a peripheral device coupled to a bus interface, and/or a conductor coupling the bus interface to the peripheral device. Based on that association, the BIOS 155 may automatically control the bus interface to operate according to the communication characteristic subsequently if the peripheral device is again coupled to the bus interface and without involving the user again specifying the communication characteristic.
[0021] FIG. 2 is a flow diagram of a method 200 for bus interface control, in accordance with some examples. In at least some examples, the method 200 may be suitable for implementation on an electronic device, such as the electronic device 100 of FIG. 1. For example, in at least some implementations, the method 200 may be at least partially implemented by firmware, such as the BIOS 155. Accordingly, the method 200 may be implemented at least in part as computer- executable instructions or code, stored on a computer-readable medium, such as the memory 157 of FIG. 1 , which, when executed by a processor, such as the processor 130 of FIG. 1 , may cause the processor 130 to execute the computer- executable instructions to perform operations. For example, the processor 130 may execute the computer-executable instructions to implement or execute control of a bus interface according to the BIOS 155.
[0022] At operation 202, first input is received from a user. In at least some examples, the first input causes the processor to execute a firmware settings selection portion of executable code of the BIOS. For example, the first input may cause the processor to present a user interface suitable for a user to provide further input. In at least some examples, the user provides the first input by pressing a button, or combination of buttons (either simultaneously or in a programmed and defined order), of the electronic device 100.
[0023] At operation 204, second user input may be received. In at least some examples, the second user input may specify a communication characteristic of the bus interface which is coupled to the processor. For example, the second input may specify a speed for operation of the bus interface, a length of a conductor coupled to the bus interface, a class of a device coupled to the bus interface, or other information, such as an application environment of the bus interface, the peripheral device, and/or the conductor that coupled the peripheral device to the bus interface. In some examples, the communication characteristic specified according to the second user input has a value different from a default programmed value of the bus interface. For example, for a particular combination of bus interface, conductor, and peripheral device, the bus interface may have a first value as a default programmed value (e.g., a maximum speed at which both the bus interface and the peripheral device are capable of communicating). In some examples, the first value may be specified by a standard, specification, or other set of rules by which the bus interface and/or the peripheral device communicate. The second user input may specify a second value that is different from the first value. [0024] At operation 206, the processor may control the bus interface to operate according to the second user input (e.g., the communication characteristic). For example, the processor may write the communication characteristic, or a value corresponding to, representative of, or determined according to, the communication characteristic to a control register of the bus interface. The value stored in the control register of the bus interface, in some examples, may control at least a portion of operation of the bus interface. For example, the bus interface may operate or communicate at a speed determined according to the value stored in the control register.
[0025] FIG. 3 is a flow diagram of a method 300 for bus interface control, in accordance with some examples. In at least some examples, the method 300 may be suitable for implementation on an electronic device, such as the electronic device 100 of FIG. 1. For example, in at least some implementations the method 300 may be at least partially implemented by firmware, such as the BIOS 155. Accordingly, the method 200 may be implemented at least in part as computer- executable instructions or code, stored on a computer-readable medium, such as the memory 157 of FIG. 1 , which, when executed by a processor, such as the processor 130 of FIG. 1 , may cause the processor 130 to execute the computer- executable instructions to perform operations. For example, the processor 130 may execute the computer-executable instructions to implement or execute control of a bus interface according to the BIOS 155.
[0026] At operation 302, input may be received. In at least some examples, the input may be received via a firmware settings interface. In some examples, the firmware seeing interface may be invisible to a user, such that the interface is accessed via a background operation of the electronic device without involving user interaction. The input may specify a communication characteristic of the bus interface. In some examples, the input may be obtained from a storage device or storage location, such as responsive to detection of a conductor of a certain length being plugged into the bus interface, a particular peripheral device, or device of a particular class of peripheral devices, being plugged into the bus interface, etc. The input may specify a speed for operation of the bus interface, a length of a conductor coupled to the bus interface, a class of a device coupled to the bus interface, or other information, such as an application environment of the bus interface, the peripheral device, and/or the conductor that coupled the peripheral device to the bus interface. [0027] In some examples, the firmware settings interface may itself be presented based on user input. For example, the user may provide user input that causes the processor to execute a firmware settings selection portion of executable code of a firmware. In some examples, the user may provide the input to cause the processor to execute the firmware settings selection portion of the executable code by pressing a button or buttons according to a programmed pattern.
[0028] At operation 304, the processor may control the bus interface to operate according to the input (e.g., the communication characteristic). For example, the processor may write the communication characteristic, or a value corresponding to, representative of, or determined according to, the communication characteristic to a control register of the bus interface. The value stored in the control register of the bus interface, in some examples, may control at least a portion of operation of the bus interface. For example, the bus interface may operate or communicate at a speed determined according to the value stored in the control register. In some examples, the communication characteristic by which the processor controls the bus interface to operate has a value different from a default programmed value of the bus interface. For example, for a particular combination of bus interface, conductor, and peripheral device, the bus interface may have a first value as a default programmed value (e.g., a maximum speed at which both the bus interface and the peripheral device are capable of communicating). In some examples, the first value may be specified by a standard, specification, or other set of rules by which the bus interface and/or the peripheral device communicate. The input may specify a second value for the communication characteristic that is different from the first value.
[0029] FIG. 4 is a flow diagram of a method 400 for bus interface control, in accordance with some examples. In at least some examples, the method 400 may be suitable for implementation on an electronic device, such as the electronic device 100 of FIG. 1. For example, in at least some implementations the method 400 may be at least partially implemented by firmware, such as the BIOS 155. Accordingly, the method 400 may be implemented at least in part as computer- executable instructions or code, stored on a computer-readable medium, such as the memory 157 of FIG. 1 , which, when executed by a processor, such as the processor 130 of FIG. 1 , may cause the processor 130 to execute the computer- executable instructions to perform operations. For example, the processor 130 may execute the computer-executable instructions to implement or execute control of a bus interface according to the BIOS 155.
[0030] At operation 402, user input may be received. In at least some examples, the user input may specify a communication characteristic of the bus interface. In some examples, the user input may specify a speed for operation of the bus interface. In other examples, the user input may specify a length of a conductor coupled to the bus interface, a class of a device coupled to the bus interface, or other information, such as an application environment of the bus interface, the peripheral device, and/or the conductor that coupled the peripheral device to the bus interface. In at least some examples, the user input may specify both a length of a conductor coupled to the bus interface and a class of a device coupled to the bus interface.
[0031] At operation 404, the processor may provide the communication characteristic to a control register of the bus interface. For example, the processor may write a value provided as the user input, the communication characteristic, or a value corresponding to, representative of, or determined according to, the communication characteristic to the control register of the bus interface. The value stored in the control register of the bus interface, in some examples, may control at least a portion of operation of the bus interface. For example, the bus interface may operate or communicate at a speed determined according to the value stored in the control register. In some examples, the value written to the control register may replace or override a value previously stored in the control register. In at least some examples, the firmware may prevent the value stored in the control register from being overridden or replaced if the value stored in the control register is based on user input and a peripheral device coupled to the bus interface corresponding to the control register has not been de-coupled from the bus interface. [0032] At operation 406, the processor may control the bus interface to operate according to the communication characteristic, based on the control register. In some examples, controlling the bus interface to operate according to the communication characteristic, based on the control register, may cause the bus interface to operate in a non-standard manner, as described above herein.
[0033] The above description is meant to be illustrative of the principles and various examples of the present disclosure. Numerous variations and modifications are contemplated. It is intended that the following claims be interpreted to embrace all such variations and modifications.

Claims

CLAIMS What is claimed is:
1. An electronic device, comprising: a processor to: receive first input instructing the electronic device to execute firmware settings selection executable code; receive second input specifying a communication characteristic of a bus interface coupled to the processor, the communication characteristic having a value different from a default programmed value of the bus interface; and control the bus interface to operate according to the communication characteristic.
2. The electronic device of claim 1 , wherein the communication characteristic is a speed of communication for the bus interface.
3. The electronic device of claim 2, wherein the speed of communication specified by the communication characteristic is less than a maximum speed capability of the bus interface and of a peripheral device coupled to the bus interface.
4. The electronic device of claim 1 , wherein the default programmed value of the bus interface is a speed of communication for the bus interface determined according to an auto-negotiation process.
5. The electronic device of claim 1 , wherein the processor is to receive the second input via a user interface, and wherein the processor is to present the user interface responsive to execution of the firmware settings selection executable code.
6. A method, comprising: receiving input via a firmware settings interface, the input specifying a communication characteristic of a bus interface coupled to a processor; and controlling the bus interface to operate according to the communication characteristic, the communication characteristic having a value different from a default programmed value of the bus interface.
7. The method of claim 6, comprising: writing a value corresponding to the input to a control register of the bus interface; and the bus interface operating according to the value written to the control register.
8. The method of claim 6, wherein the communication characteristic specifies a communication speed of the bus interface.
9. The method of claim 7, wherein the communication speed of the bus interface is less than a maximum communication speed capability of the bus interface.
10. The method of claim 9, wherein the bus interface is coupled to a peripheral device, and wherein the communication speed of the bus interface is less than a maximum communication speed capability of the peripheral device.
11. A computer-readable medium storing executable code, which, when executed by a processor of an electronic device, causes the processor to: receive user input specifying a communication characteristic of a bus interface coupled to the processor, the communication characteristic selected from a length of a conductor coupled to the bus interface or a class of a peripheral device coupled to the bus interface; provide a value corresponding to the communication characteristic to a control register of the bus interface; and control the bus interface to operate according to the communication characteristic based on the control register, the communication characteristic causing the bus interface to operate in a non-standard manner.
12. The computer-readable medium of claim 11 , wherein the executable code causes the processor to receive the user input via a firmware settings interface of the electronic device.
13. The computer-readable medium of claim 11 , wherein the executable code causes the processor to receive the user input via a settings interface of the electronic device, and wherein the executable code causes the processor to present the settings interface according to an operating system of the electronic device.
14. The computer-readable medium of claim 11 , wherein the executable code causes the processor to determine the value corresponding to the communication characteristic based on a value of the communication characteristic, and wherein the value corresponding to the communication characteristic specifies a communication speed of the bus interface.
15. The computer-readable medium of claim 14, wherein the bus interface is to be coupled to a peripheral device, and wherein the communication speed of the bus interface is less than a maximum communication speed capability of the bus interface and of the peripheral device.
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Citations (4)

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