WO2022202029A1 - 積層体、積層体の製造方法、及び半導体基板の製造方法 - Google Patents
積層体、積層体の製造方法、及び半導体基板の製造方法 Download PDFInfo
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- WO2022202029A1 WO2022202029A1 PCT/JP2022/006804 JP2022006804W WO2022202029A1 WO 2022202029 A1 WO2022202029 A1 WO 2022202029A1 JP 2022006804 W JP2022006804 W JP 2022006804W WO 2022202029 A1 WO2022202029 A1 WO 2022202029A1
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- POSYVRHKTFDJTR-UHFFFAOYSA-M tetrapropylazanium;fluoride Chemical compound [F-].CCC[N+](CCC)(CCC)CCC POSYVRHKTFDJTR-UHFFFAOYSA-M 0.000 description 1
Images
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
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- B—PERFORMING OPERATIONS; TRANSPORTING
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- B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
- B32B3/00—Layered products comprising a layer with external or internal discontinuities or unevennesses, or a layer of non-planar shape; Layered products comprising a layer having particular features of form
- B32B3/26—Layered products comprising a layer with external or internal discontinuities or unevennesses, or a layer of non-planar shape; Layered products comprising a layer having particular features of form characterised by a particular shape of the outline of the cross-section of a continuous layer; characterised by a layer with cavities or internal voids ; characterised by an apertured layer
- B32B3/30—Layered products comprising a layer with external or internal discontinuities or unevennesses, or a layer of non-planar shape; Layered products comprising a layer having particular features of form characterised by a particular shape of the outline of the cross-section of a continuous layer; characterised by a layer with cavities or internal voids ; characterised by an apertured layer characterised by a layer formed with recesses or projections, e.g. hollows, grooves, protuberances, ribs
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B32—LAYERED PRODUCTS
- B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
- B32B7/00—Layered products characterised by the relation between layers; Layered products characterised by the relative orientation of features between layers, or by the relative values of a measurable parameter between layers, i.e. products comprising layers having different physical, chemical or physicochemical properties; Layered products characterised by the interconnection of layers
- B32B7/04—Interconnection of layers
- B32B7/06—Interconnection of layers permitting easy separation
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B32—LAYERED PRODUCTS
- B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
- B32B7/00—Layered products characterised by the relation between layers; Layered products characterised by the relative orientation of features between layers, or by the relative values of a measurable parameter between layers, i.e. products comprising layers having different physical, chemical or physicochemical properties; Layered products characterised by the interconnection of layers
- B32B7/04—Interconnection of layers
- B32B7/12—Interconnection of layers using interposed adhesives or interposed materials with bonding properties
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- C—CHEMISTRY; METALLURGY
- C08—ORGANIC MACROMOLECULAR COMPOUNDS; THEIR PREPARATION OR CHEMICAL WORKING-UP; COMPOSITIONS BASED THEREON
- C08G—MACROMOLECULAR COMPOUNDS OBTAINED OTHERWISE THAN BY REACTIONS ONLY INVOLVING UNSATURATED CARBON-TO-CARBON BONDS
- C08G77/00—Macromolecular compounds obtained by reactions forming a linkage containing silicon with or without sulfur, nitrogen, oxygen or carbon in the main chain of the macromolecule
- C08G77/04—Polysiloxanes
- C08G77/12—Polysiloxanes containing silicon bound to hydrogen
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- C—CHEMISTRY; METALLURGY
- C08—ORGANIC MACROMOLECULAR COMPOUNDS; THEIR PREPARATION OR CHEMICAL WORKING-UP; COMPOSITIONS BASED THEREON
- C08G—MACROMOLECULAR COMPOUNDS OBTAINED OTHERWISE THAN BY REACTIONS ONLY INVOLVING UNSATURATED CARBON-TO-CARBON BONDS
- C08G77/00—Macromolecular compounds obtained by reactions forming a linkage containing silicon with or without sulfur, nitrogen, oxygen or carbon in the main chain of the macromolecule
- C08G77/04—Polysiloxanes
- C08G77/20—Polysiloxanes containing silicon bound to unsaturated aliphatic groups
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- C—CHEMISTRY; METALLURGY
- C08—ORGANIC MACROMOLECULAR COMPOUNDS; THEIR PREPARATION OR CHEMICAL WORKING-UP; COMPOSITIONS BASED THEREON
- C08L—COMPOSITIONS OF MACROMOLECULAR COMPOUNDS
- C08L83/00—Compositions of macromolecular compounds obtained by reactions forming in the main chain of the macromolecule a linkage containing silicon with or without sulfur, nitrogen, oxygen or carbon only; Compositions of derivatives of such polymers
- C08L83/04—Polysiloxanes
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- C—CHEMISTRY; METALLURGY
- C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
- C09D—COATING COMPOSITIONS, e.g. PAINTS, VARNISHES OR LACQUERS; FILLING PASTES; CHEMICAL PAINT OR INK REMOVERS; INKS; CORRECTING FLUIDS; WOODSTAINS; PASTES OR SOLIDS FOR COLOURING OR PRINTING; USE OF MATERIALS THEREFOR
- C09D183/00—Coating compositions based on macromolecular compounds obtained by reactions forming in the main chain of the macromolecule a linkage containing silicon, with or without sulfur, nitrogen, oxygen, or carbon only; Coating compositions based on derivatives of such polymers
- C09D183/04—Polysiloxanes
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- C—CHEMISTRY; METALLURGY
- C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
- C09J—ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
- C09J11/00—Features of adhesives not provided for in group C09J9/00, e.g. additives
- C09J11/08—Macromolecular additives
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- C—CHEMISTRY; METALLURGY
- C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
- C09J—ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
- C09J183/00—Adhesives based on macromolecular compounds obtained by reactions forming in the main chain of the macromolecule a linkage containing silicon, with or without sulfur, nitrogen, oxygen, or carbon only; Adhesives based on derivatives of such polymers
- C09J183/04—Polysiloxanes
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- C—CHEMISTRY; METALLURGY
- C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
- C09J—ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
- C09J183/00—Adhesives based on macromolecular compounds obtained by reactions forming in the main chain of the macromolecule a linkage containing silicon, with or without sulfur, nitrogen, oxygen, or carbon only; Adhesives based on derivatives of such polymers
- C09J183/04—Polysiloxanes
- C09J183/06—Polysiloxanes containing silicon bound to oxygen-containing groups
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/185—Joining of semiconductor bodies for junction formation
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- H01—ELECTRIC ELEMENTS
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07 e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
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- B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
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- B32B2457/14—Semiconductor wafers
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68318—Auxiliary support including means facilitating the separation of a device or wafer from the auxiliary support
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68327—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/6834—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used to protect an active side of a device or wafer
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68381—Details of chemical or physical process used for separating the auxiliary support from a device or wafer
- H01L2221/68386—Separation by peeling
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/1354—Coating
Definitions
- the present invention relates to a laminate, a laminate manufacturing method, and a semiconductor substrate manufacturing method.
- semiconductor wafers which have conventionally been integrated in a two-dimensional planar direction, are required to integrate (stack) a planar surface in a three-dimensional direction for the purpose of further integration (stacking).
- This three-dimensional lamination is a technique of integrating in multiple layers while connecting with a through silicon via (TSV).
- TSV through silicon via
- each wafer to be integrated is thinned by polishing the side opposite to the circuit surface (that is, the back surface), and the thinned semiconductor wafers are stacked.
- a semiconductor wafer before thinning (herein simply referred to as wafer) is adhered to a support for polishing in a polishing apparatus.
- the adhesion at that time is called temporary adhesion because it must be easily peeled off after polishing.
- This temporary adhesion must be easily removed from the support, and if a large force is applied to the removal, the thinned semiconductor wafer may be cut or deformed. easily removed.
- the back surface of the semiconductor wafer is removed or displaced due to polishing stress. Therefore, the performance required for the temporary adhesion is to withstand the stress during polishing and to be easily removed after polishing. For example, it is required to have high stress (strong adhesion) in the planar direction during polishing and low stress (weak adhesion) in the vertical direction during removal.
- Wafer support structures have been proposed that are larger than adhesive bonds between the wafer (1) and the separating layer (4) (see, for example, examples in US Pat.
- the semiconductor wafer is electrically connected to the semiconductor chip through bump balls made of, for example, a metal conductive material. is planned. Bump balls made of metals such as copper and tin may be damaged or deformed by external loads such as heat and pressure applied during the process of processing semiconductor substrates. There is a constant demand for techniques that can reduce or prevent deformation due to heating or pressure.
- the present invention has been made in view of the above-mentioned circumstances, and a laminate having an adhesive layer capable of easily separating a semiconductor substrate and a support substrate and suppressing deformation of bumps, and a laminate using the laminate It aims at providing the manufacturing method of a semiconductor substrate, and the manufacturing method of the said laminated body.
- the present inventors have completed the present invention having the following gist as a result of intensive studies.
- the present invention includes the following.
- a semiconductor substrate with bumps, a support substrate, a protective adhesive layer formed in contact with the semiconductor substrate with bumps, and a peeling adhesive formed between the protective adhesive layer and the support substrate A laminate comprising a layer
- the protective adhesive layer is formed from a protective adhesive composition, which contains a component (A) that cures through a hydrosilylation reaction and a release agent component (B) that does not undergo a curing reaction.
- the peel adhesive layer is formed from a peel adhesive composition, and the peel adhesive composition includes a component (A) that cures by a hydrosilylation reaction and a release agent component (B) that does not undergo a curing reaction.
- a laminate comprising: [2]
- the component (A) contained in the protective adhesive layer is a polyorganosiloxane (a1) having an alkenyl group having 2 to 40 carbon atoms bonded to a silicon atom, and a polyorganosiloxane having a Si—H group.
- the component (A) contained in the adhesive layer for peeling comprises a polyorganosiloxane (a1) having an alkenyl group having 2 to 40 carbon atoms bonded to a silicon atom and a polyorganosiloxane (a1) having an Si—H group ( a2) and a platinum group metal-based catalyst (A2),
- a method of manufacturing a semiconductor substrate comprising: [5] The method of manufacturing a semiconductor substrate according to [4], wherein the step of processing includes polishing the surface of the semiconductor substrate opposite to the surface on which the bumps are present to thin the semiconductor substrate. .
- a laminate having an adhesive layer capable of easily separating a semiconductor substrate and a supporting substrate and suppressing deformation of bumps, a method for manufacturing a semiconductor substrate using the laminate, and the laminate can provide a manufacturing method of
- FIG. 1 is a diagram (part 1) for explaining one aspect of manufacturing a laminated body and manufacturing a thin wafer
- FIG. 10 is a diagram (part 2) for explaining one aspect of manufacturing a laminated body and manufacturing a thinned wafer
- FIG. 3 is a diagram (part 3) for explaining one aspect of manufacturing a laminated body and manufacturing a thinned wafer
- FIG. 4 is a diagram (part 4) for explaining one aspect of manufacturing a laminated body and manufacturing a thinned wafer
- FIG. 5 is a diagram (No. 5) for explaining one aspect of manufacturing a laminated body and manufacturing a thinned wafer
- FIG. 6 is a diagram (No.
- FIG. 6 is a diagram (No. 7) for explaining one aspect of manufacturing a laminated body and manufacturing a thinned wafer
- FIG. 10 is a diagram (No. 8) for explaining one aspect of manufacturing a laminated body and manufacturing a thinned wafer
- the laminate of the present invention has a supporting substrate, a semiconductor substrate, a protective adhesive layer, and a peeling adhesive layer.
- the semiconductor substrate has bumps on the support substrate side.
- a protective adhesive layer is interposed between the support substrate and the semiconductor substrate.
- the protective adhesive layer contacts the semiconductor substrate.
- the peeling adhesive layer is interposed between the support substrate and the protective adhesive layer.
- the release adhesive layer preferably contacts the supporting substrate and the protective adhesive layer.
- the protective adhesive layer is formed in contact with the semiconductor substrate, so that deformation of the bumps can be suppressed when manufacturing the processed semiconductor substrate. It is believed that this is because the bumps, which are easily melted or deformed by heat and pressure during processing of the semiconductor substrate, are protected by the protective adhesive layer which is difficult to melt and deform, and as a result, the shape is maintained. Further, in the laminate, since the peeling adhesive layer is formed between the support substrate and the protective adhesive layer, when the support substrate and the semiconductor substrate are separated, the two substrates can be separated without applying an excessive load. good separation of two substrates.
- the adhesive layer for peeling contains a release agent component as described later, when the substrates are separated, the inside of the adhesive layer for peeling or the adhesive layer for peeling and the layer adjacent thereto or It is considered that the excessive load on the substrate can be avoided as a result of good separation at the interface with the substrate.
- the support substrate is not particularly limited as long as it is a member that can support the semiconductor substrate when the semiconductor substrate is processed. Examples thereof include a glass support substrate and a silicon support substrate.
- the shape of the support substrate is not particularly limited, but for example, a disk shape can be mentioned. It should be noted that the disk-shaped support substrate does not need to have a perfectly circular surface shape. For example, the periphery of the support substrate may have a linear portion called an orientation flat or a notch. It may have notches.
- the thickness of the disk-shaped support substrate may be appropriately determined according to the size of the semiconductor substrate, and is not particularly limited, but is, for example, 500 to 1,000 ⁇ m.
- the diameter of the disk-shaped support substrate may be appropriately determined according to the size of the semiconductor substrate, and is not particularly limited, but is, for example, 100 to 1,000 mm.
- the support substrate is a glass wafer or silicon wafer with a diameter of 300 mm and a thickness of about 700 ⁇ mm.
- the semiconductor substrate has bumps.
- a bump is a projecting terminal.
- the semiconductor substrate has bumps on the support substrate side.
- bumps are usually formed on the surface on which circuits are formed.
- the circuit may be a single layer or multiple layers.
- the shape of the circuit is not particularly limited.
- the surface opposite to the surface having the bumps (back surface) is a surface to be processed.
- the main material constituting the entire semiconductor substrate is not particularly limited as long as it can be used for this type of application, and examples thereof include silicon, silicon carbide, and compound semiconductors.
- the shape of the semiconductor substrate is not particularly limited, but is, for example, a disc shape. It should be noted that the disk-shaped semiconductor substrate does not need to have a perfect circular shape on its surface. It may have notches.
- the thickness of the disk-shaped semiconductor substrate may be appropriately determined according to the purpose of use of the semiconductor substrate, and is not particularly limited, but is, for example, 500 to 1,000 ⁇ m.
- the diameter of the disk-shaped semiconductor substrate may be appropriately determined according to the purpose of use of the semiconductor substrate, and is not particularly limited.
- An example of a semiconductor substrate is a silicon wafer with a diameter of 300 mm and a thickness of about 770 ⁇ m.
- the material, size, shape, structure, and density of the bumps on the semiconductor substrate are not particularly limited.
- bumps include ball bumps, printed bumps, stud bumps, and plated bumps.
- the bump height, diameter and pitch are appropriately determined from the conditions that the bump height is about 1 to 200 ⁇ m, the bump diameter is 1 to 200 ⁇ m, and the bump pitch is 1 to 500 ⁇ m.
- Materials for the bumps include, for example, low-melting solder, high-melting solder, tin, indium, gold, silver, and copper.
- the bumps may consist of only a single component, or may consist of multiple components.
- Sn-based alloy plating such as SnAg bumps, SnBi bumps, Sn bumps, and AuSn bumps can be used.
- the bump may have a laminated structure including a metal layer composed of at least one of these components.
- a protective adhesive layer is interposed between the support substrate and the semiconductor substrate.
- the protective adhesive layer contacts the semiconductor substrate.
- the protective adhesive layer is formed from a protective adhesive composition that includes a component (A) that cures by a hydrosilylation reaction and a release agent component (B) that does not undergo a curing reaction. Not included.
- a protective adhesive composition that includes a component (A) that cures by a hydrosilylation reaction and a release agent component (B) that does not undergo a curing reaction.
- the release agent component (B) that is specified not to be included in the protective adhesive composition is defined by comparison with the release agent component (B) that is specified to be included in the release adhesive composition. Details of the release agent component (B) will be described in the section ⁇ Release adhesive composition>> of ⁇ Release adhesive layer> below.
- the protective adhesive composition contains component (A) that cures by a hydrosilylation reaction.
- the protective adhesive composition used in the present invention contains polyorganosiloxane.
- the protective adhesive composition used in the present invention contains a curable component (A) which is the adhesive component.
- component (A) may be a component that cures by a hydrosilylation reaction or a polyorganosiloxane component (A') that cures by a hydrosilylation reaction.
- the component (A) comprises, for example, a polyorganosiloxane (a1) having an alkenyl group having 2 to 40 carbon atoms bonded to a silicon atom, as an example of the component (A'), and Si- It contains a polyorganosiloxane (a2) having an H group and a platinum group metal-based catalyst (A2).
- the alkenyl group having 2 to 40 carbon atoms may be substituted.
- substituents include halogen atoms, nitro groups, cyano groups, amino groups, hydroxy groups, carboxyl groups, aryl groups, heteroaryl groups and the like.
- the polyorganosiloxane component (A') that cures by a hydrosilylation reaction has siloxane units (Q units) represented by SiO 2 , represented by R 1 R 2 R 3 SiO 1/2 one selected from the group consisting of siloxane units (M units), siloxane units (D units) represented by R 4 R 5 SiO 2/2 and siloxane units (T units) represented by R 6 SiO 3/2
- a polysiloxane (A1) containing two or more units and a platinum group metal catalyst (A2) wherein the polysiloxane (A1) is a siloxane unit (Q' unit) represented by SiO 2 , R 1 A siloxane unit represented by 'R 2 'R 3 'SiO 1/2 (M' unit), a siloxane unit represented by R 4 'R 5 'SiO 2/2 (D' unit) and R 6 'SiO 3 / 2 containing one or more units selected from the group consisting of siloxane units
- R 1 to R 6 are groups or atoms bonded to a silicon atom and each independently represent an optionally substituted alkyl group, an optionally substituted alkenyl group or a hydrogen atom.
- substituents include halogen atoms, nitro groups, cyano groups, amino groups, hydroxy groups, carboxyl groups, aryl groups, heteroaryl groups and the like.
- R 1 ' to R 6 ' are groups bonded to a silicon atom and each independently represents an optionally substituted alkyl group or an optionally substituted alkenyl group, and R 1 ' to R 6 At least one of ' is an optionally substituted alkenyl group.
- substituents include halogen atoms, nitro groups, cyano groups, amino groups, hydroxy groups, carboxyl groups, aryl groups, heteroaryl groups and the like.
- R 1 ′′ to R 6 ′′ are groups or atoms bonded to a silicon atom and each independently represent an optionally substituted alkyl group or hydrogen atom, but at least one of R 1 ′′ to R 6 ′′ One is a hydrogen atom.
- substituents include halogen atoms, nitro groups, cyano groups, amino groups, hydroxy groups, carboxyl groups, aryl groups, heteroaryl groups and the like.
- the alkyl group may be linear, branched or cyclic, but is preferably a linear or branched alkyl group. Yes, preferably 30 or less, more preferably 20 or less, and even more preferably 10 or less.
- optionally substituted linear or branched alkyl groups include methyl, ethyl, n-propyl, i-propyl, n-butyl, i-butyl and s-butyl. group, tertiary butyl group, n-pentyl group, 1-methyl-n-butyl group, 2-methyl-n-butyl group, 3-methyl-n-butyl group, 1,1-dimethyl-n-propyl group, 1,2-dimethyl-n-propyl group, 2,2-dimethyl-n-propyl group, 1-ethyl-n-propyl group, n-hexyl group, 1-methyl-n-pentyl group, 2-methyl-n -pentyl group, 3-methyl-n-pentyl group, 4-methyl-n-pentyl group, 1,1-dimethyl-n-butyl group, 1,2-dimethyl-n-butyl group, 1,3-dimethyl- n-
- optionally substituted cyclic alkyl groups include a cyclopropyl group, a cyclobutyl group, a 1-methyl-cyclopropyl group, a 2-methyl-cyclopropyl group, a cyclopentyl group, a 1-methyl-cyclobutyl group, a 2- methyl-cyclobutyl group, 3-methyl-cyclobutyl group, 1,2-dimethyl-cyclopropyl group, 2,3-dimethyl-cyclopropyl group, 1-ethyl-cyclopropyl group, 2-ethyl-cyclopropyl group, cyclohexyl group , 1-methyl-cyclopentyl group, 2-methyl-cyclopentyl group, 3-methyl-cyclopentyl group, 1-ethyl-cyclobutyl group, 2-ethyl-cyclobutyl group, 3-ethyl-cyclobutyl group, 1,2-dimethyl-cyclobutyl group, 1,3-dimethyl-cycl
- the alkenyl group may be linear or branched, and the number of carbon atoms thereof is not particularly limited, but is usually 2 to 40, preferably 30 or less, more preferably 20 or less, and more preferably 20 or less. It is preferably 10 or less.
- optionally substituted linear or branched alkenyl groups include, but are not limited to, vinyl groups, allyl groups, butenyl groups, pentenyl groups, and the like. 2 to 14, preferably 2 to 10, more preferably 1 to 6. Among them, an ethenyl group and a 2-propenyl group are particularly preferred.
- Specific examples of the optionally substituted cyclic alkenyl group include, but are not limited to, cyclopentenyl, cyclohexenyl and the like, and the number of carbon atoms thereof is usually 4 to 14, preferably 5 to 10, More preferably 5-6.
- polysiloxane (A1) includes polyorganosiloxane (a1') and polyorganosiloxane (a2'), but the alkenyl group contained in polyorganosiloxane (a1') and polyorganosiloxane (a2' ) and the hydrogen atoms (Si—H groups) contained in ) form a crosslinked structure through a hydrosilylation reaction by the platinum group metal-based catalyst (A2) and are cured. As a result, a cured film is formed.
- Polyorganosiloxane (a1') contains one or more units selected from the group consisting of Q' units, M' units, D' units and T' units, and M' units, D' units and It contains at least one selected from the group consisting of T' units.
- the polyorganosiloxane (a1') two or more polyorganosiloxanes satisfying such conditions may be used in combination.
- Q' units, M' units, D' units and T' units include (Q' unit and M' unit), (D' unit and M' unit), (T' units and M' units), (Q' units and T' units and M' units), but are not limited to these.
- Polyorganosiloxane (a2′) contains one or more units selected from the group consisting of Q′′ units, M′′ units, D′′ units and T′′ units, and M′′ units, D′′ units and It contains at least one selected from the group consisting of T′′ units.
- the polyorganosiloxane (a2′) two or more polyorganosiloxanes satisfying these conditions may be used in combination.
- Preferred combinations of two or more selected from the group consisting of Q′′ units, M′′ units, D′′ units and T′′ units include (M′′ units and D′′ units), (Q′′ units and M′′ units), (Q" units and T" units and M” units).
- Polyorganosiloxane (a1') is composed of siloxane units in which alkyl groups and / or alkenyl groups are bonded to silicon atoms thereof.
- the proportion of alkenyl groups is preferably 0.1 to 50.0 mol%, more preferably 0.5 to 30.0 mol%, and the remaining R 1 ' to R 6 ' can be alkyl groups. .
- Polyorganosiloxane (a2') is composed of siloxane units in which alkyl groups and/or hydrogen atoms are bonded to silicon atoms thereof, and all substituents represented by R 1 ′′ to R 6 ′′ and The ratio of hydrogen atoms in the substituted atoms is preferably 0.1 to 50.0 mol%, more preferably 10.0 to 40.0 mol%, and the remaining R 1 ′′ to R 6 ′′ are alkyl groups and can do.
- component (A) contains (a1) and (a2)
- the alkenyl group contained in polyorganosiloxane (a1) and the Si—H bond contained in polyorganosiloxane (a2) is in the range of 1.0:0.5 to 1.0:0.66.
- the weight-average molecular weight of polysiloxanes such as polyorganosiloxane (a1) and polyorganosiloxane (a2) is not particularly limited, but each is usually 500 to 1,000,000, and the effects of the present invention are realized with good reproducibility. From the viewpoint of doing, it is preferably 5,000 to 50,000.
- the weight-average molecular weight, number-average molecular weight and degree of dispersion of the polyorganosiloxane are determined by, for example, a GPC apparatus (EcoSEC, HLC-8320GPC manufactured by Tosoh Corporation) and a GPC column (TSKgel SuperMultiporeHZ-N manufactured by Tosoh Corporation).
- the viscosities of the polyorganosiloxane (a1) and the polyorganosiloxane (a2) are not particularly limited, but each is usually 10 to 1,000,000 (mPa s), and from the viewpoint of achieving the effects of the present invention with good reproducibility, it is preferable. is 50 to 20000 (mPa ⁇ s).
- the viscosities of polyorganosiloxane (a1) and polyorganosiloxane (a2) are values measured at 25° C. with an E-type rotational viscometer.
- Polyorganosiloxane (a1) and polyorganosiloxane (a2) react with each other to form a film through a hydrosilylation reaction. Therefore, the curing mechanism differs from that via, for example, silanol groups, and therefore any siloxane need not contain silanol groups or functional groups that form silanol groups upon hydrolysis, such as alkyloxy groups. None.
- the adhesive composition contains a platinum group metal-based catalyst (A2) along with the polyorganosiloxane component (A').
- a platinum-based metal catalyst is a catalyst for promoting the hydrosilylation reaction between the alkenyl groups of the polyorganosiloxane (a1) and the Si—H groups of the polyorganosiloxane (a2).
- platinum-based metal catalysts include platinum black, platinum chloride, chloroplatinic acid, reactants of chloroplatinic acid and monohydric alcohols, complexes of chloroplatinic acid and olefins, platinum bisacetoacetate, and the like.
- platinum-based catalysts including, but not limited to: Examples of complexes of platinum and olefins include, but are not limited to, complexes of divinyltetramethyldisiloxane and platinum.
- the amount of platinum group metal-based catalyst (A2) is not particularly limited, but is usually in the range of 1.0 to 50.0 ppm with respect to the total amount of polyorganosiloxane (a1) and polyorganosiloxane (a2). .
- the polyorganosiloxane component (A') may contain a polymerization inhibitor (A3) for the purpose of suppressing the progress of the hydrosilylation reaction.
- the polymerization inhibitor is not particularly limited as long as it can suppress the progress of the hydrosilylation reaction, and specific examples thereof include 1-ethynyl-1-cyclohexanol and 1,1-diphenyl-2-propion-1-ol.
- the amount of the polymerization inhibitor is not particularly limited, it is usually 1000.0 ppm or more with respect to the total amount of the polyorganosiloxane (a1) and the polyorganosiloxane (a2) from the viewpoint of obtaining the effect, and the hydrosilylation reaction It is 10000.0 ppm or less from the viewpoint of preventing excessive suppression of.
- the protective adhesive composition used in the present invention may contain a solvent for the purpose of adjusting the viscosity, etc.
- a solvent for the purpose of adjusting the viscosity etc.
- Specific examples thereof include aliphatic hydrocarbons, aromatic hydrocarbons, ketones, and the like. , but not limited to.
- the solvent includes hexane, heptane, octane, nonane, decane, undecane, dodecane, isododecane, menthane, limonene, toluene, xylene, mesitylene, cumene, MIBK (methyl isobutyl ketone), butyl acetate, and diisobutyl.
- examples include, but are not limited to, ketones, 2-octanone, 2-nonanone, 5-nonanone, and the like. Such solvents can be used singly or in combination of two or more.
- the protective adhesive composition used in the present invention contains a solvent
- its content is appropriately determined in consideration of the viscosity of the desired composition, the coating method to be employed, the thickness of the film to be produced, and the like. is in the range of about 10 to 90% by mass with respect to the entire protective adhesive composition.
- the viscosity of the protective adhesive composition used in the present invention is not particularly limited, it is usually 500 to 20,000 mPa ⁇ s, preferably 1,000 to 6,000 mPa ⁇ s at 25°C.
- the viscosity of the protective adhesive composition used in the present invention can be adjusted by changing the type of solvent used, their ratio, the concentration of film constituents, etc., in consideration of various factors such as the coating method used and the desired film thickness. Adjustable.
- the film-constituting component means a component other than the solvent contained in the composition.
- An example of a protective adhesive composition for use in the present invention can be produced by mixing component (A) and, if used, a solvent.
- the composition may be appropriately heated as long as the components are not decomposed or deteriorated.
- the solvent, solution, etc. used may be filtered using a filter or the like during the production of the protective adhesive composition or after all components have been mixed.
- the thickness of the protective adhesive layer provided in the laminate of the present invention is not particularly limited, but from the viewpoint of obtaining a good bump deformation suppression effect with good reproducibility, it is preferably 10 to 100 ⁇ m. It is preferably 20 to 50 ⁇ m.
- the peeling adhesive layer is interposed between the support substrate and the protective adhesive layer. From the viewpoint of obtaining a good bump deformation suppressing effect with good reproducibility, the peeling adhesive layer is preferably in contact with the support substrate and the protective adhesive layer.
- the release adhesive layer is formed from a release adhesive composition, which comprises a component (A) that cures through a hydrosilylation reaction and a release agent component (B) that does not undergo a curing reaction.
- a release adhesive composition which comprises a component (A) that cures through a hydrosilylation reaction and a release agent component (B) that does not undergo a curing reaction.
- the release adhesive composition contains component (A) that cures by a hydrosilylation reaction.
- the release adhesive composition used in the present invention contains polyorganosiloxane.
- the release adhesive composition used in the present invention contains a curable component (A) that serves as an adhesive component and a release agent component (B) that does not undergo a curing reaction.
- the release agent component (B) that does not cause a curing reaction include polyorganosiloxane.
- "does not cause a curing reaction” does not mean that no curing reaction occurs, but rather means that the component (A) to be cured does not cause a curing reaction.
- component (A) may be a component that cures by a hydrosilylation reaction or a polyorganosiloxane component (A') that cures by a hydrosilylation reaction.
- the component (A) and the polyorganosiloxane component (A') are as described in the ⁇ Protective Adhesive Composition>> of ⁇ Protective Adhesive Layer> above.
- the component (A) or polyorganosiloxane component (A') contained in the protective adhesive composition and the component (A) or polyorganosiloxane component (A') contained in the peeling adhesive composition are the same. It may be one type of component or a different type of component.
- the release adhesive composition contains a release agent component (B) that does not cause a curing reaction, but the composition as a whole undergoes a cross-linking reaction due to hydrosilylation and is cured. It is preferable that the curing component (A) in the peeling adhesive composition does not contain a component containing an aromatic ring.
- an example of the release adhesive composition used in the present invention contains a release agent component (B) that does not cause a curing reaction together with a component (A) that cures.
- a release agent component (B) that does not cause a curing reaction together with a component (A) that cures.
- the release adhesive layer can be easily separated from the adjacent layer or substrate.
- a release agent component (B) is typically polyorganosiloxane.
- specific examples thereof include, but are not limited to, epoxy group-containing polyorganosiloxane, methyl group-containing polyorganosiloxane, phenyl group-containing polyorganosiloxane, and the like.
- the release agent component (B) includes polydimethylsiloxane, which may be modified.
- polydimethylsiloxane examples include, but are not limited to, epoxy group-containing polydimethylsiloxane, unmodified polydimethylsiloxane, and phenyl group-containing polydimethylsiloxane.
- polyorganosiloxane that is the release agent component (B) include, but are not limited to, epoxy group-containing polyorganosiloxane, methyl group-containing polyorganosiloxane, and phenyl group-containing polyorganosiloxane.
- the weight-average molecular weight of the polyorganosiloxane that is the release agent component (B) is not particularly limited, it is usually from 100,000 to 2,000,000. 200,000 to 1,200,000, more preferably 300,000 to 900,000. Further, the degree of dispersion is not particularly limited, but is usually 1.0 to 10.0, preferably 1.5 to 5.0, more preferably 2, from the viewpoint of realizing suitable peeling with good reproducibility. 0 to 3.0.
- the weight average molecular weight and the degree of dispersion can be measured by the methods described above for polysiloxane.
- the complex viscosity of polyorganosiloxane, which is the release agent component (B) can be measured at 25° C. using a rheometer (for example, rheometer MCR-302 manufactured by Anton Paar KK).
- epoxy group-containing polyorganosiloxanes examples include those containing siloxane units ( D10 units) represented by R 11 R 12 SiO 2/2 .
- R 11 is a group bonded to a silicon atom and represents an alkyl group
- R 12 is a group bonded to a silicon atom and represents an epoxy group or an organic group containing an epoxy group
- specific examples of the alkyl group are , the aforementioned examples can be mentioned.
- the epoxy group in the organic group containing an epoxy group may be an independent epoxy group without being condensed with other rings, and forms a condensed ring with other rings such as a 1,2-epoxycyclohexyl group. may be an epoxy group.
- Specific examples of organic groups containing epoxy groups include, but are not limited to, 3-glycidoxypropyl and 2-(3,4-epoxycyclohexyl)ethyl.
- a preferable example of the epoxy group-containing polyorganosiloxane is epoxy group-containing polydimethylsiloxane, but the present invention is not limited thereto.
- the epoxy group-containing polyorganosiloxane contains the aforementioned siloxane units ( D10 units), but may contain Q units, M units and/or T units in addition to the D10 units.
- specific examples of the epoxy group-containing polyorganosiloxane include a polyorganosiloxane consisting only of D10 units, a polyorganosiloxane containing D10 units and Q units, and a polyorganosiloxane containing D10 units and M units.
- Polyorganosiloxane containing D10 units and T units Polyorganosiloxane containing D10 units, Q units and M units Polyorganosiloxane containing D10 units, M units and T units , polyorganosiloxanes containing D 10 units, Q units, M units and T units.
- Epoxy group-containing polyorganosiloxane is preferably epoxy group-containing polydimethylsiloxane having an epoxy value of 0.1 to 5.
- the weight average molecular weight is not particularly limited, it is usually 1,500 to 500,000, and preferably 100,000 or less from the viewpoint of suppressing deposition in the adhesive.
- epoxy group-containing polyorganosiloxanes include those represented by formulas (E1) to (E3), but are not limited to these.
- methyl group-containing polyorganosiloxane for example, one containing a siloxane unit ( D200 unit) represented by R210R220SiO2 / 2 , preferably a siloxane unit represented by R21R21SiO2 /2 (D 20 units).
- R 210 and R 220 are groups bonded to a silicon atom, each independently representing an alkyl group, at least one of which is a methyl group, and specific examples of the alkyl group are the above-mentioned examples.
- R 21 is a group bonded to a silicon atom and represents an alkyl group, and specific examples of the alkyl group include those mentioned above. Among them, R 21 is preferably a methyl group.
- a preferred example of the methyl group-containing polyorganosiloxane is polydimethylsiloxane, but the present invention is not limited thereto.
- Methyl group-containing polyorganosiloxane contains the above-mentioned siloxane units (D 200 units or D 20 units), but in addition to D 200 units and D 20 units, it may contain Q units, M units and / or T units. .
- methyl group-containing polyorganosiloxane examples include a polyorganosiloxane consisting only of D 200 units, a polyorganosiloxane containing D 200 units and Q units, and a polyorganosiloxane containing D 200 units and M units.
- polyorganosiloxane containing D 200 units and T units polyorganosiloxane containing D 200 units, Q units and M units
- polyorganosiloxane containing D 200 units, M units and T units D 200 units, Q units, M units and T units.
- methyl group-containing polyorganosiloxane examples include a polyorganosiloxane consisting only of D20 units, a polyorganosiloxane containing D20 units and Q units, and a polyorganosiloxane containing D20 units and M units.
- polyorganosiloxane containing D20 units and T units polyorganosiloxane containing D20 units Q units and M units polyorganosiloxane containing D20 units M units T units , D 20 units, Q units, M units and T units.
- methyl group-containing polyorganosiloxane examples include, but are not limited to, those represented by the formula (M1).
- n4 indicates the number of repeating units and is a positive integer.
- phenyl group-containing polyorganosiloxanes examples include those containing siloxane units represented by R 31 R 32 SiO 2/2 (D 30 units).
- R 31 is a group bonded to a silicon atom and represents a phenyl group or an alkyl group
- R 32 is a group bonded to a silicon atom and represents a phenyl group; can be mentioned, but a methyl group is preferred.
- the phenyl group-containing polyorganosiloxane contains the aforementioned siloxane units ( D30 units), but may contain Q units, M units and/or T units in addition to the D30 units.
- phenyl group-containing polyorganosiloxane examples include a polyorganosiloxane consisting only of D30 units, a polyorganosiloxane containing D30 units and Q units, and a polyorganosiloxane containing D30 units and M units.
- polyorganosiloxane containing D 30 units and T units polyorganosiloxane containing D 30 units Q units and M units polyorganosiloxane containing D 30 units M units T units , D 30 units, Q units, M units and T units.
- methyl group-containing polyorganosiloxane examples include, but are not limited to, those represented by formula (P1) or (P2).
- Polyorganosiloxane which is the release agent component (B), may be a commercially available product or a synthesized product.
- Commercially available products of polyorganosiloxane include, for example, WACKERSILICONE FLUID AK series (AK50, AK 350, AK 1000, AK 10000, AK 1000000) manufactured by Wacker Chemi Co., Ltd., GENIOPLAST GUM, and dimethyl silicone manufactured by Shin-Etsu Chemical Co., Ltd.
- phenyl group-containing polyorganosiloxane (PMM-1043, PMM-1025, PDM-0421, PDM-0821), Shin-Etsu Chemical Co., Ltd.
- phenyl group-containing polyorganosiloxane Examples include siloxane (KF50-3000CS), phenyl group-containing polyorganosiloxane (TSF431, TSF433) manufactured by Momentive, but not limited thereto.
- the release adhesive composition used in the present invention contains a component (A) that cures and a release agent component (B) that does not cause a curing reaction. Contains siloxanes.
- An example of the release adhesive composition used in the present invention can contain component (A) and release agent component (B) in any ratio.
- the ratio of (A) to the release agent component (B) is the mass ratio [(A):(B)], preferably 99.995:0.005 to 30:70, more preferably 99.9:0. .1 to 75:25. That is, when a polyorganosiloxane component (A') that cures by a hydrosilylation reaction is included, the ratio of the component (A') and the release agent component (B) is the mass ratio [(A'):(B)] and preferably 99.995:0.005 to 30:70, more preferably 99.9:0.1 to 75:25.
- the peel adhesive composition used in the present invention may contain a solvent for the purpose of adjusting the viscosity, etc.
- a solvent for the purpose of adjusting the viscosity, etc.
- Specific examples thereof include aliphatic hydrocarbons, aromatic hydrocarbons, ketones, and the like. , but not limited to.
- the solvent includes hexane, heptane, octane, nonane, decane, undecane, dodecane, isododecane, menthane, limonene, toluene, xylene, mesitylene, cumene, MIBK (methyl isobutyl ketone), butyl acetate, and diisobutyl.
- examples include, but are not limited to, ketones, 2-octanone, 2-nonanone, 5-nonanone, and the like. Such solvents can be used singly or in combination of two or more.
- the content thereof is appropriately determined in consideration of the viscosity of the desired composition, the coating method to be employed, the thickness of the film to be produced, and the like. is in the range of about 10 to 90% by mass with respect to the entire peeling adhesive composition.
- the viscosity of the peeling adhesive composition used in the present invention is not particularly limited, it is usually 500 to 20,000 mPa ⁇ s, preferably 1,000 to 5,000 mPa ⁇ s at 25°C.
- the viscosity of the peeling adhesive composition used in the present invention can be adjusted by changing the type of solvent used, the ratio thereof, the concentration of film constituents, etc., in consideration of various factors such as the coating method used and the desired film thickness. Adjustable.
- An example of the peel adhesive composition used in the present invention can be produced by mixing component (A), release agent component (B), and, if used, a solvent.
- the mixing order is not particularly limited, but as an example of a method for easily and reproducibly producing a release adhesive composition, component (A) and release agent component (B) are mixed in a solvent. Examples include, but are not limited to, a method of dissolving, and a method of dissolving part of component (A) and release agent component (B) in a solvent, dissolving the remainder in a solvent, and mixing the resulting solutions.
- the solvent, solution, etc. used may be filtered using a filter or the like during the production of the peeling adhesive composition or after all components have been mixed.
- the thickness of the adhesive layer for peeling provided in the laminate of the present invention is not particularly limited, but from the viewpoint of obtaining a good peeling effect with good reproducibility, it is preferably 10 to 100 ⁇ m, more preferably 20 to 50 ⁇ m.
- FIG. 1 is a schematic cross-sectional view of an example of a laminate.
- the laminate of FIG. 1 has a semiconductor substrate 1 having bumps 1a, a protective adhesive layer 2, a peeling adhesive layer 3, and a support substrate 4 in this order.
- the bumps 1a of the semiconductor substrate 1 are arranged on the support substrate 4 side.
- a protective adhesive layer 2 is interposed between the semiconductor substrate 1 and the support substrate 4 .
- the protective adhesive layer 2 is in contact with the semiconductor substrate 1 .
- a protective adhesive layer 2 covers the bumps 1a.
- the peeling adhesive layer 3 is interposed between the protective adhesive layer 2 and the support substrate 4 .
- the peeling adhesive layer 3 is in contact with the protective adhesive layer 2 and the support substrate 4 .
- the laminate of the present invention is suitably produced, for example, by the following method for producing the laminate of the present invention.
- the method for producing a laminate of the present invention includes a protective adhesive coating layer forming step, a protective adhesive layer forming step, a peeling adhesive coating layer forming step, and a peeling adhesive layer forming step, and Other steps, such as a lamination step, are included depending on the requirements.
- the protective adhesive coating layer forming step is usually a step of forming a protective adhesive coating layer by applying a protective adhesive composition on the surface of the semiconductor substrate where the bumps are present.
- the protective adhesive is applied so as to follow the unevenness caused by the bumps without creating a gap between the protective adhesive coating layer and the substrate.
- the protective adhesive layer formed is thinner than the height of the bump, the upper part of the bump protrudes from the protective adhesive layer. Therefore, it is possible to suitably form a protective adhesive layer capable of achieving good bump protection without any defects. This point does not prevent the protective adhesive layer from being thicker than the bump height of the semiconductor substrate in the laminate according to the present invention.
- An adhesion layer can be formed suitably.
- a protective adhesive coating is formed on the bumped semiconductor substrate.
- the coating method is not particularly limited, it is usually a spin coating method.
- a method of separately forming a coating film by a spin coating method or the like and attaching the sheet-like coating film as a protective adhesive coating layer can be adopted.
- the thickness of the protective adhesive coating layer is appropriately determined in consideration of the desired thickness of the protective adhesive layer in the laminate, the bump height, and the like.
- the applied protective adhesive composition may be heated for the purpose of drying the coating film of the applied protective adhesive composition.
- the heating temperature of the applied protective adhesive composition depends on the type and amount of the adhesive component contained in the protective adhesive composition, whether or not a solvent is contained, the boiling point of the solvent used, and the desired thickness of the protective adhesive layer. Although it cannot be defined unconditionally because it varies depending on the temperature, etc., it is usually 80 to 150° C., and the heating time is usually 30 seconds to 5 minutes. Heating can be performed using a hot plate, an oven, or the like.
- the protective adhesive coating layer is heated to form a protective adhesive layer.
- the heating temperature and time are not particularly limited as long as the temperature and time are such that the protective adhesive coating layer is converted into the protective adhesive layer.
- the heating temperature is preferably 120° C. or higher, more preferably 150° C. or higher, from the viewpoint of achieving a sufficient curing speed, etc., and prevents deterioration of each layer (including the support substrate and the semiconductor substrate) constituting the laminate. From the viewpoint of prevention, etc., the temperature is preferably 250° C. or less. More preferably, it is 180 to 200°C.
- the heating time is preferably 1 minute or more, more preferably 5 minutes or more, from the viewpoint of realizing suitable bonding of each layer (including the support substrate and the semiconductor substrate) constituting the laminate. From the viewpoint of suppressing or avoiding adverse effects on each layer due to heating, the time is preferably 180 minutes or less, more preferably 120 minutes or less. More preferably, it is 1 to 20 minutes from the viewpoint of substrate processing efficiency. Heating can be performed using a hot plate, an oven, or the like.
- peeling adhesive coating layer forming step for example, a peeling adhesive composition is applied onto a support substrate, or a peeling adhesive composition is coated onto a protective adhesive layer to form a peeling adhesive. This is the step of forming a coating layer.
- the peeling adhesive coating layer forming step is not particularly limited as long as it is a step for forming a peeling adhesive coating layer.
- a release adhesive coating layer is formed on the protective adhesive layer on the semiconductor substrate or on the supporting substrate.
- the coating method is not particularly limited, it is usually a spin coating method.
- a method of separately forming a coating film by a spin coating method or the like and sticking the sheet-like coating film as a peeling adhesive coating layer can be adopted.
- the thickness of the release adhesive coating layer is appropriately determined in consideration of the desired thickness of the release adhesive layer in the laminate.
- the applied release adhesive composition may be heated for the purpose of drying the coating film of the applied release adhesive composition because the release adhesive composition contains a solvent or the like.
- the heating temperature of the applied peeling adhesive composition depends on the type and amount of the adhesive component contained in the peeling adhesive composition, whether or not a solvent is contained, the boiling point of the solvent used, and the desired thickness of the peeling adhesive layer. Although it cannot be defined unconditionally because it varies depending on the temperature, etc., it is usually 80 to 150° C., and the heating time is usually 30 seconds to 5 minutes. Heating can be performed using a hot plate, an oven, or the like.
- the peeling adhesive layer forming step is a step of heating the peeling adhesive coating layer to form the peeling adhesive layer.
- the peeling adhesive layer forming step is not particularly limited as long as the peeling adhesive coating layer is heated to form the peeling adhesive layer (post-heat treatment).
- the support substrate and the peeling adhesive Heat treatment may be performed after the coating layer is brought into contact and the release adhesive coating layer and protective adhesive layer are brought into contact with each other.
- the heating temperature and time are not particularly limited as long as the peeling adhesive coating layer is converted into the peeling adhesive layer at the temperature and time.
- the heating temperature is preferably 120° C. or higher, more preferably 150° C.
- the temperature is preferably 250° C. or less. More preferably, it is 180 to 200°C.
- the heating time is preferably 1 minute or more, more preferably 5 minutes or more, from the viewpoint of realizing suitable bonding of each layer (including the support substrate and the semiconductor substrate) constituting the laminate. From the viewpoint of suppressing or avoiding adverse effects on each layer due to heating, the time is preferably 180 minutes or less, more preferably 120 minutes or less. More preferably, it is 1 to 20 minutes from the viewpoint of substrate processing efficiency. Heating can be performed using a hot plate, an oven, or the like.
- a bonding step is preferably performed between the peeling adhesive coating layer forming step and the peeling adhesive layer forming step in order to ensure sufficient bonding between the semiconductor substrate and the support substrate.
- the bonding process is not particularly limited as long as the substrate and the layer can be bonded together and the substrate and the layer are not damaged. can be applied, and more preferably, a load can be applied in the thickness direction of the supporting substrate and the semiconductor substrate under reduced pressure.
- the load is not particularly limited as long as the substrate and layer can be bonded together and the substrate and layer are not damaged.
- the degree of reduced pressure is not particularly limited as long as the substrate and layer can be bonded together and the substrate and layer are not damaged.
- the laminate of the present invention is used for temporary bonding for processing a semiconductor substrate, and is used for applications in which a support substrate and a semiconductor substrate are separated after processing the semiconductor substrate in the laminate.
- the method for manufacturing a semiconductor substrate of the present invention includes at least a processing step of processing the semiconductor substrate and a peeling step of separating the support substrate from the processed semiconductor substrate. including the steps of
- the processing step is not particularly limited as long as it is a step for processing the semiconductor substrate in the laminate of the present invention, but includes, for example, polishing processing and through electrode forming processing.
- polishing processing for example, polishing processing and through electrode forming processing.
- the polishing process is not particularly limited as long as it is a process for thinning the semiconductor substrate by polishing the surface of the semiconductor substrate opposite to the surface on which the bumps are present. polishing and the like.
- the polishing process can be performed using a general polishing apparatus used for polishing semiconductor substrates.
- the polishing process reduces the thickness of the semiconductor substrate to obtain a thinned semiconductor substrate to a desired thickness.
- the thickness of the thinned semiconductor substrate is not particularly limited, but may be, for example, 10 to 300 ⁇ m or 30 to 100 ⁇ m.
- the polished semiconductor substrate is formed with a through electrode for achieving conduction between the thinned semiconductor substrates when a plurality of thinned semiconductor substrates are stacked. Therefore, the method for manufacturing a semiconductor substrate may include a through electrode forming process for forming through electrodes in the polished semiconductor substrate after the polishing process and before the peeling process.
- the method of forming the through electrode in the semiconductor substrate is not particularly limited, but examples include forming a through hole and filling the formed through hole with a conductive material. Formation of the through holes is performed, for example, by photolithography. Filling of the through-holes with a conductive material is performed by, for example, a plating technique.
- the peeling step is not particularly limited as long as it is a step in which the supporting substrate and the processed semiconductor substrate are separated after the processing step.
- a method of mechanically peeling with a device having a sharp portion so-called debonder.
- the semiconductor substrate and the support substrate are separated.
- delamination occurs either within the release adhesive layer, at the interface between the release adhesive layer and the protective adhesive layer, or at the interface between the release adhesive layer and the support substrate, or two or more of these in combination. Delamination is also common. It should be noted that the peeling occurring inside the peeling adhesive layer means that the peeling adhesive layer is cleaved.
- the removing step is not particularly limited as long as it is a step in which the protective adhesive layer on the semiconductor substrate and the peeling adhesive layer residue thereon are removed after the peeling step.
- a method of dissolving and removing these is mentioned.
- dissolution removal may be combined with removal using a removal tape or the like.
- a cleaning composition for example, a semiconductor substrate with a protective adhesive layer can be immersed in the cleaning composition or sprayed with the cleaning composition. Care should be taken not to damage the bumps when cleaning the semiconductor substrate with the cleaning composition.
- a suitable example of the cleaning composition used in the present invention is a cleaning composition containing a quaternary ammonium salt and a solvent.
- the quaternary ammonium salt is composed of a quaternary ammonium cation and an anion, and is not particularly limited as long as it can be used for this type of application.
- Such quaternary ammonium cations typically include tetra(hydrocarbon)ammonium cations.
- the anions that form a pair with it there are hydroxide ions ( OH ⁇ ) ; tetrafluoroborate ion (BF 4 ⁇ ); hexafluorophosphate ion (PF 6 ⁇ ), etc., but not limited to these.
- the quaternary ammonium salt is preferably a halogen-containing quaternary ammonium salt, more preferably a fluorine-containing quaternary ammonium salt.
- the halogen atom may be contained in the cation or the anion, preferably the anion.
- the fluorine-containing quaternary ammonium salt is tetra(hydrocarbon)ammonium fluoride.
- the hydrocarbon group in the tetra(hydrocarbon)ammonium fluoride include an alkyl group having 1 to 20 carbon atoms, an alkenyl group having 2 to 20 carbon atoms, an alkynyl group having 2 to 20 carbon atoms, and an alkynyl group having 6 to 20 carbon atoms. and the like.
- the tetra(hydrocarbon)ammonium fluoride comprises a tetraalkylammonium fluoride.
- tetraalkylammonium fluoride examples include tetramethylammonium fluoride, tetraethylammonium fluoride, tetrapropylammonium fluoride, tetrabutylammonium fluoride (also referred to as tetrabutylammonium fluoride) and the like. Not limited. Among them, tetrabutylammonium fluoride is preferred.
- FIGS. 2A to 2H are diagrams for explaining one aspect of manufacturing a laminate and manufacturing a thin wafer.
- a wafer 1 having bumps 1a is prepared (FIG. 2A).
- the surface of the wafer 1 on which the bumps 1a are present is coated with a protective adhesive composition by spin coating using a coating device 11 to form a protective adhesive coating layer 2a (FIG. 2B).
- a heating device (hot plate) 12 is placed on the surface of the wafer 1 opposite to the surface on which the bumps 1a are present, and the heating device 12 heats and hardens the protective adhesive coating layer 2a to perform protective bonding. Convert to layer 2 (Fig. 2C).
- a release adhesive composition is applied onto the protective adhesive layer 2 by spin coating using a coating device 13 to form a release adhesive coating layer 3a (FIG. 2D).
- a support substrate 4 is arranged on the peeling adhesive coating layer 3a (FIG. 2E).
- a heating device (hot plate) 14 is placed on the surface of the wafer 1 opposite to the surface on which the bumps 1a are present.
- the peeling adhesive coating layer 3a is heated by the heating device 14 to be cured and converted into the peeling adhesive layer 3 (FIG. 2F).
- a laminate is obtained by the steps shown in FIGS. 2A to 2F.
- a polishing apparatus (not shown) is used to polish the surface of the wafer 1 opposite to the surface on which the bumps 1a are present, thereby thinning the wafer 1 (FIG. 2G).
- through electrodes may be formed on the thinned wafer 1 .
- a peeling device (not shown) is used to separate the thinned wafer 1 from the support substrate 4 (FIG. 2H).
- a cleaning device (not shown), the thinned wafer 1 is cleaned by dissolving and removing the protective adhesive layer 2 and the like from the thinned wafer 1 with the cleaning composition. A thinned wafer 1 is thus obtained.
- the column temperature was set to 40 ° C., tetrahydrofuran was used as the eluent (elution solvent), the flow rate (flow rate) was set to 0.35 mL / min, and polystyrene (manufactured by Showa Denko Co., Ltd., Shodex) was used as a standard sample. .
- Preparation Example 3 105.26 g of a p-menthane solution (concentration: 80.6% by mass) of MQ resin (manufactured by Wacker Chemie) having a polysiloxane skeleton and a vinyl group as the component (a1) in a 600 mL stirring vessel dedicated to stirrer A, Polyorganosiloxane represented by formula (M1) as component (B) (complex viscosity of 6000 Pa ⁇ s, weight average molecular weight of 642,000 (dispersity of 2.6), trade name GENIOPLAST GUM manufactured by Wacker Chemie)35.
- MQ resin manufactured by Wacker Chemie
- the obtained mixture (I) was added with 16.97 g of SiH group-containing linear polydimethylsiloxane (manufactured by Wacker Chemi Co., Ltd.) having a viscosity of 100 mPa s as the component (a2) described above, and 16.97 g of a viscosity of 200 mPa s as the component (a1) described above. 24.80 g of vinyl group-containing linear polydimethylsiloxane (manufactured by Wacker Chemi Co., Ltd.) was added to obtain a mixture (II).
- Example 1-1 Evaluation of adhesion and peelability
- the protective adhesive composition 1 obtained in Preparation Example 1 was applied by spin coating to a 300 mm silicon wafer (thickness: 770 ⁇ m) as a wafer on the device side, and heated at 200° C. for 10 minutes to form a wafer.
- a protective adhesive layer having a thickness of about 32.5 ⁇ m was formed on the circuit surface.
- the peel adhesive composition 1 obtained in Preparation Example 2 was applied by spin coating and heated at 120 ° C. for 1.5 minutes (preheat treatment) to obtain a protective adhesive layer.
- a peeling adhesive coating layer was formed on the adhesive layer so that the peeling adhesive layer in the laminate had a thickness of about 32.5 ⁇ m.
- a silicon wafer having a protective adhesive layer and a peeling adhesive coating layer, and a 300 mm glass wafer (thickness: 700 ⁇ m) as a wafer (support) on the carrier side are bonded together.
- a laminated body was produced by laminating the adhesive layer and the peeling adhesive coating layer so as to sandwich them, and heating the device-side wafer down on a hot plate at 200° C. for 10 minutes (post-heating treatment). The bonding was performed at a temperature of 23° C., a pressure reduction of 1,000 Pa, and a load of 30 N.
- Example 1-2 The protective adhesive composition 1 obtained in Preparation Example 1 was applied by spin coating to a 300 mm silicon wafer (thickness: 770 ⁇ m) as a wafer on the device side, and heated at 200° C. for 10 minutes to form a wafer. A protective adhesive layer having a thickness of about 32.5 ⁇ m was formed on the circuit surface. Subsequently, on the protective adhesive layer, the peel adhesive composition 2 obtained in Preparation Example 3 was applied by spin coating and heated at 120 ° C. for 1.5 minutes (preheat treatment) to obtain a protective adhesive layer. A peeling adhesive coating layer was formed on the adhesive layer so that the peeling adhesive layer in the laminate had a thickness of about 32.5 ⁇ m.
- a silicon wafer having a protective adhesive layer and a peeling adhesive coating layer, and a 300 mm glass wafer (thickness: 700 ⁇ m) as a wafer (support) on the carrier side are bonded together.
- a laminated body was produced by laminating the adhesive layer and the peeling adhesive coating layer so as to sandwich them, and heating the device-side wafer down on a hot plate at 200° C. for 10 minutes (post-heating treatment). The bonding was performed at a temperature of 23° C., a pressure reduction of 1,000 Pa, and a load of 30 N.
- [Comparative Example 1-1] A 300 mm silicon wafer (thickness: 770 ⁇ m) was used as a wafer on the device side, and protective adhesive composition 1 obtained in Preparation Example 1 was applied by spin coating to the circuit surface of the wafer. A protective adhesive coating layer was formed so that the protective adhesive layer had a thickness of about 65 ⁇ m. After that, in a vacuum bonding apparatus Y, a silicon wafer having a protective adhesive coating layer and a 300 mm glass wafer (thickness: 700 ⁇ m) as a wafer (support) on the carrier side are separated from each other. A laminated body was produced by sticking them together so as to sandwich them and heating them at 200° C. for 10 minutes (post-heating treatment) on a hot plate with the device-side wafer facing down. The bonding was performed at a temperature of 23° C., a pressure reduction of 1,000 Pa, and a load of 30 N.
- Example 1-1 Using the laminates obtained in Example 1-1, Example 1-2, Comparative Example 1-1, Comparative Example 1-2, and Comparative Example 1-3, the adhesion of the adhesive layer in each laminate and The peelability was evaluated. Adhesion was evaluated by visually confirming the presence or absence of voids from the glass wafer (support) side of the laminate. If no voids were confirmed, it was judged as good, and if voids were confirmed, it was judged as poor. Voids here mean the condition of air bubbles between a substrate and a layer of a laminate, between two layers or in a layer, and in such conditions with undesired air bubbles there is sufficient protection of the semiconductor substrate.
- the peelability was evaluated by measuring the force required to separate the semiconductor substrate and the support substrate, and if the peeling apparatus X could peel off, it was judged as good, and if it could not be peeled, it was judged as bad. As a result, voids were not confirmed in any of the laminates.
- peelability in Examples 1-1 and 1-2, the semiconductor substrate and the supporting substrate could be separated satisfactorily with a force of 15N. Moreover, it was found that the peeling apparatus X could not peel the comparative example 1-1. In Comparative Examples 1-2 and 1-3, peeling was possible with a force of 15N. As described above, it was found that even in the presence of the non-peelable protective adhesive composition 1, the laminate of the present invention exhibits good releasability due to the presence of the releasable adhesive layer.
- Example 2-1 As a substrate on the device side, a PI TEG 4 ⁇ 4 cm chip (thickness: 770 ⁇ m, bump diameter: 0.03 mm, bump height: 0.04 mm, bump pitch: 0.06 ⁇ 0.1 mm) was used. A protective adhesive layer having a thickness of about 32.5 ⁇ m was formed on the circuit surface of the chip by applying the protective adhesive composition 1 obtained in 1. above by spin coating and heating at 200° C. for 10 minutes. Subsequently, the release adhesive composition 1 obtained in Preparation Example 2 was applied onto the protective adhesive layer by spin coating and heated at 120° C. for 1.5 minutes (preheating treatment) to form a laminate.
- a release adhesive coating layer was formed so that the inner release adhesive layer had a thickness of about 32.5 ⁇ m.
- a chip having a protective adhesive layer and a peeling adhesive coating layer and a 100 mm glass wafer (thickness: 770 ⁇ m) as a wafer (support) on the carrier side are bonded together.
- a laminated body was produced by laminating the adhesive layer and the peeling adhesive coating layer so as to sandwich them, and heating the device-side wafer down on a hot plate at 200° C. for 10 minutes (post-heating treatment). The bonding was performed at a temperature of 23° C., a pressure reduction of 1,000 Pa, and a load of 30 N.
- Example 2-1 As shown in Table 1 below, except that the type of each adhesive composition and the film thickness of each layer were changed, the same method as in Example 2-1 was performed. Laminates of ⁇ 2-8 were obtained.
- a PI TEG 4 ⁇ 4 cm chip As a substrate on the device side, a PI TEG 4 ⁇ 4 cm chip (thickness: 770 ⁇ m, bump diameter: 0.03 mm, bump height: 0.04 mm, bump pitch: 0.06 ⁇ 0.1 mm) was used.
- the obtained peel adhesive composition 1 was applied by spin coating and heated at 120° C. for 1.5 minutes (preheating treatment), so that the thickness of the peel adhesive layer in the laminate was reduced on the chip.
- a peeling adhesive coating layer was formed so as to have a thickness of about 65 ⁇ m.
- a chip having a peeling adhesive coating layer and a 100 mm glass wafer (thickness: 770 ⁇ m) as a wafer (support) on the carrier side are separated from each other.
- a laminated body was produced by sticking them together so as to sandwich them and heating them at 200° C. for 10 minutes (post-heating treatment) on a hot plate with the device-side wafer facing down. The bonding was performed at a temperature of 23° C., a pressure reduction of 1,000 Pa, and a load of 30 N.
- a chip having a peeling adhesive coating layer and a 100 mm glass wafer (thickness: 770 ⁇ m) as a wafer (support) on the carrier side are separated from each other.
- a laminated body was produced by sticking them together so as to sandwich them and heating them at 200° C. for 10 minutes (post-heating treatment) on a hot plate with the device-side wafer facing down. The bonding was performed at a temperature of 23° C., a pressure reduction of 1,000 Pa, and a load of 30 N.
- a PI TEG 4 ⁇ 4 cm chip As a substrate on the device side, a PI TEG 4 ⁇ 4 cm chip (thickness: 770 ⁇ m, bump diameter: 0.03 mm, bump height: 0.04 mm, bump pitch: 0.06 ⁇ 0.1 mm) was used.
- the resulting protective adhesive composition 1 was applied by spin coating to form a protective adhesive coating layer on the chip such that the protective adhesive layer in the laminate had a thickness of about 65 ⁇ m. .
- a vacuum bonding apparatus X a chip having this adhesive layer and a 100 mm glass wafer (thickness: 770 ⁇ m) as a wafer (support) on the carrier side are bonded so as to sandwich the adhesive layer, followed by hot bonding.
- a laminate was produced by heating (post-heat treatment) on a plate at 200° C. for 10 minutes with the device side wafer facing down.
- the bonding was performed at a temperature of 23° C., a pressure reduction of 1,000 Pa, and a load of 30 N.
- a PI TEG 4 ⁇ 4 cm chip As a substrate on the device side, a PI TEG 4 ⁇ 4 cm chip (thickness: 770 ⁇ m, bump diameter: 0.03 mm, bump height: 0.04 mm, bump pitch: 0.06 ⁇ 0.1 mm) was used.
- the obtained peeling adhesive composition 1 was applied by spin coating, heated at 120° C. for 1.5 minutes (preheat treatment) to remove the residual solvent on the chip, and further heated at 200° C. for 10 minutes. By doing so, a peeling adhesive coating layer was formed on the chip so that the peeling adhesive layer in the laminate had a thickness of about 32.5 ⁇ m.
- the protective adhesive composition 1 obtained in Preparation Example 1 was applied onto the peeling adhesive coating layer by spin coating, and the protective adhesive composition in the laminate was coated on the peeling adhesive coating layer.
- a protective adhesive coating was formed such that the layer had a thickness of about 32.5 microns.
- the high-temperature treatment was performed on each laminate on the day of production (before preparation) and 10 days after the production date (after preparation).
- the high temperature treatment was performed in the following procedure.
- the glass wafer (supporting substrate) of the laminate was placed face down on a hot plate set at 270° C. and heated for 5 minutes.
- the state of the silicon wafer which is the semiconductor substrate of each laminated body after the treatment, was observed through the glass wafer, which was the support substrate, using an optical microscope, and the presence or absence of bump deformation was visually confirmed.
- There are 5044 bumps in one laminate and when the number of deformed bumps is 0 or more and less than 50, ⁇ , 50 or more and less than 100, ⁇ , 100 or more x.
- the results are shown in Table 1 below. In Table 1, the numbers in parentheses indicate the film thickness of each layer.
- the laminates obtained in Examples 2-1 to 2-8 had good bump protection performance. In particular, it had a good bump protection performance even after preparation.
- the laminates of Comparative Examples 2-1, 2-2 and 2-4 a large number of bump deformations were confirmed after prefabrication. From the results of the examples, it was found that the laminate of the present invention is a laminate that can easily separate the semiconductor substrate and the supporting substrate and has excellent bump protection performance that can suppress deformation of the bumps.
- the present invention it is possible to easily separate the semiconductor substrate and the support substrate, and to provide a laminated body capable of suppressing deformation of the bumps, which is useful for manufacturing processed semiconductor substrates.
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Abstract
Description
薄化前の半導体ウエハー(ここでは単にウエハーとも呼ぶ)を、研磨装置で研磨するために支持体に接着される。
その際の接着は研磨後に容易に剥離されなければならないため、仮接着と呼ばれる。この仮接着は支持体から容易に取り外されなければならず、取り外しに大きな力を加えると薄化された半導体ウエハーは、切断されたり変形することがあり、そのようなことが生じないように、容易に取り外される。しかし、半導体ウエハーの裏面研磨時に研磨応力によって外れたりずれたりすることは好ましくない。従って、仮接着に求められる性能は研磨時の応力に耐え、研磨後に容易に取り外されることである。
例えば研磨時の平面方向に対して高い応力(強い接着力)を持ち、取り外し時の縦方向に対して低い応力(弱い接着力)を有する性能が求められる。
また、半導体ウエハーは、例えば金属の導電性材料からなるバンプボールを介して半導体チップと電気的に接続しており、このようなバンプボールを備えるチップを用いることで、半導体パッケージングの小型化が図られている。
銅やスズといった金属からなるバンプボールは、半導体基板を加工する過程等において加わる加熱、圧力等の外部からの負荷によって損傷又は変形しまうことがあり、昨今の半導体分野の進展に伴い、このような加熱や圧力による変形を軽減又は防止できる技術は常に求められている。
[1]バンプ付き半導体基板と、支持基板と、前記バンプ付き半導体基板に接するように形成された保護用接着層と、前記保護用接着層と前記支持基板との間に形成された剥離用接着層とを備える積層体であって、
前記保護用接着層は、保護用接着剤組成物から形成され、前記保護用接着剤組成物は、ヒドロシリル化反応によって硬化する成分(A)を含み、硬化反応を起こさない剥離剤成分(B)を含まず、
前記剥離用接着層は、剥離用接着剤組成物から形成され、前記剥離用接着剤組成物は、ヒドロシリル化反応によって硬化する成分(A)と、硬化反応を起こさない剥離剤成分(B)とを含む、積層体。
[2]前記保護用接着層中に含有される前記成分(A)が、ケイ素原子に結合した炭素数2~40のアルケニル基を有するポリオルガノシロキサン(a1)と、Si-H基を有するポリオルガノシロキサン(a2)と、白金族金属系触媒(A2)とを含有し、
前記剥離用接着層中に含有される前記成分(A)が、ケイ素原子に結合した炭素数2~40のアルケニル基を有するポリオルガノシロキサン(a1)と、Si-H基を有するポリオルガノシロキサン(a2)と、白金族金属系触媒(A2)とを含有する、
[1]に記載の積層体。
[3]前記剥離用接着層中に含有される前記剥離剤成分(B)が、変性されていてもよいポリジメチルシロキサンである[1]又は[2]に記載の積層体。
[4][1]~[3]のいずれかに記載の積層体における前記半導体基板が加工される工程と、
前記保護用接着層と前記剥離用接着層とが離されることによって、前記支持基板と加工された前記半導体基板とが離される工程と、
を含む、半導体基板の製造方法。
[5]前記加工される工程が、前記半導体基板の前記バンプが存在する面と反対側の面を研磨し、前記半導体基板を薄くする処理を含む、[4]に記載の半導体基板の製造方法。
[6][1]~[3]のいずれかに記載の積層体を製造する、積層体の製造方法であって、
前記半導体基板の前記バンプが存在する面上に、前記保護用接着剤組成物を塗布することにより、保護用接着剤塗布層を形成する保護用接着剤塗布層形成工程と、
前記保護用接着剤塗布層を加熱し、前記保護用接着層を形成する保護用接着層形成工程と、
前記支持基板上に前記剥離用接着剤組成物を塗布するか、又は前記保護用接着層上に前記剥離用接着剤組成物を塗布することにより、剥離用接着剤塗布層を形成する剥離用接着剤塗布層形成工程と、
前記剥離用接着剤塗布層と前記保護用接着層が接し、かつ前記剥離用接着剤塗布層と前記支持基板が接した状態で、前記剥離用接着剤塗布層を加熱し、前記剥離用接着層を形成する剥離用接着層形成工程と、
を含む、積層体の製造方法。
本発明の積層体は、支持基板と、半導体基板と、保護用接着層と、剥離用接着層とを有する。
半導体基板は、支持基板側にバンプを有する。
保護用接着層は、支持基板と半導体基板との間に介在する。
保護用接着層は、半導体基板と接する。
剥離用接着層は、支持基板と保護用接着層との間に介在する。
剥離用接着層は、好ましくは支持基板及び保護用接着層に接する。
積層体は、積層体における半導体基板の加工後に支持基板と半導体基板とが離される用途に用いられる。
また、積層体において、剥離用接着層が支持基板と保護用接着層との間に形成されているので、支持基板と半導体基板とを離す際に、基板に過度の負荷をかけることなく、2つの基板を良好に分離できる。これは、後述の通りに剥離用接着層が剥離剤成分を含んでいることから、基板同士を分離する際に、選択的に、剥離用接着層内部又は剥離用接着層とそれと隣接する層若しくは基板との界面での剥離を良好に実現できる結果、基板への過度の負荷を回避できるためと考えられる。
支持基板としては、半導体基板が加工される際に、半導体基板を支持できる部材であれば、特に限定されないが、例えば、ガラス製支持基板、シリコン製支持基板などが挙げられる。
円盤状の支持基板の厚さは、半導体基板の大きさなどに応じて適宜定めればよく、特に限定されないが、例えば、500~1,000μmである。
円盤状の支持基板の直径は、半導体基板の大きさなどに応じて適宜定めればよく、特に限定されないが、例えば、100~1,000mmである。
半導体基板は、バンプを有する。バンプとは、突起状の端子である。
積層体において、半導体基板は、支持基板側にバンプを有する。
半導体基板において、バンプは、通常、回路が形成された面上に形成されている。回路は、単層であってもよし、多層であってもよい。回路の形状としては特に制限されない。
半導体基板において、バンプを有する面と反対側の面(裏面)は、加工に供される面である。
半導体基板の形状は、特に限定されないが、例えば、円盤状である。なお、円盤状の半導体基板は、その面の形状が完全な円形である必要はなく、例えば、半導体基板の外周は、オリエンテーション・フラットと呼ばれる直線部を有していてもよいし、ノッチと呼ばれる切込みを有していてもよい。
円盤状の半導体基板の厚さは、半導体基板の使用目的などに応じて適宜定めればよく、特に限定されないが、例えば、500~1,000μmである。
円盤状の半導体基板の直径としては、半導体基板の使用目的などに応じて適宜定めればよく、特に限定されないが、例えば、100~1,000mmが挙げられる。
バンプとしては、例えば、ボールバンプ、印刷バンプ、スタッドバンプ、めっきバンプなどが挙げられる。
通常、バンプ高さ1~200μm程度、バンプ直径1~200μm、バンプピッチ1~500μmという条件からバンプの高さ、直径及びピッチは適宜決定される。
バンプの材質としては、例えば、低融点はんだ、高融点はんだ、スズ、インジウム、金、銀、銅などが挙げられる。バンプは、単一の成分のみで構成されていてもよいし、複数の成分から構成されていてもよい。より具体的には、SnAgバンプ、SnBiバンプ、Snバンプ、AuSnバンプ等のSnを主体とした合金めっき等が挙げられる。
また、バンプは、これらの成分の少なくともいずれかからなる金属層を含む積層構造を有してもよい。
保護用接着層は、支持基板と半導体基板との間に介在する。
保護用接着層は、半導体基板と接する。
なお、保護用接着剤組成物において含まないと規定されている剥離剤成分(B)は、剥離用接着剤組成物において含まれると規定されている剥離剤成分(B)との対比により規定されたものであり、剥離剤成分(B)の詳しい内容については、下記<剥離用接着層>の<<剥離用接着剤組成物>>の箇所で記載する。
保護用接着剤組成物は、ヒドロシリル化反応によって硬化する成分(A)を含む。
好ましい態様においては、本発明で用いる保護用接着剤組成物は、ポリオルガノシロキサンを含有する。
他の好ましい態様においては、本発明で用いる保護用接着剤組成物は、接着剤成分となる硬化する成分(A)を含有する。
他の好ましい態様においては、成分(A)は、ヒドロシリル化反応によって硬化する成分であってもよいし、ヒドロシリル化反応によって硬化するポリオルガノシロキサン成分(A’)であってもよい。
他の好ましい態様においては、成分(A)は、例えば、成分(A’)の一例としての、ケイ素原子に結合した炭素数2~40のアルケニル基を有するポリオルガノシロキサン(a1)と、Si-H基を有するポリオルガノシロキサン(a2)と、白金族金属系触媒(A2)と、を含有する。ここで、炭素数2~40のアルケニル基は置換されていてもよい。置換基としては、例えば、ハロゲン原子、ニトロ基、シアノ基、アミノ基、ヒドロキシ基、カルボキシル基、アリール基、ヘテロアリール基等が挙げられる。
他の好ましい態様においては、ヒドロシリル化反応によって硬化するポリオルガノシロキサン成分(A’)は、SiO2で表されるシロキサン単位(Q単位)、R1R2R3SiO1/2で表されるシロキサン単位(M単位)、R4R5SiO2/2で表されるシロキサン単位(D単位)及びR6SiO3/2で表されるシロキサン単位(T単位)からなる群より選ばれる1種又は2種以上の単位を含むポリシロキサン(A1)と、白金族金属系触媒(A2)とを含み、ポリシロキサン(A1)は、SiO2で表されるシロキサン単位(Q’単位)、R1’R2’R3’SiO1/2で表されるシロキサン単位(M’単位)、R4’R5’SiO2/2で表されるシロキサン単位(D’単位)及びR6’SiO3/2で表されるシロキサン単位(T’単位)からなる群より選ばれる1種又は2種以上の単位を含むとともに、M’単位、D’単位及びT’単位からなる群より選ばれる少なくとも1種を含むポリオルガノシロキサン(a1’)と、SiO2で表されるシロキサン単位(Q”単位)、R1”R2”R3”SiO1/2で表されるシロキサン単位(M”単位)、R4”R5”SiO2/2で表されるシロキサン単位(D”単位)及びR6”SiO3/2で表されるシロキサン単位(T”単位)からなる群より選ばれる1種又は2種以上の単位を含むとともに、M”単位、D”単位及びT”単位からなる群より選ばれる少なくとも1種を含むポリオルガノシロキサン(a2’)とを含む。
なお、(a1’)は、(a1)の一例であり、(a2’)は、(a2)の一例である。
置換されていてもよい環状アルケニル基の具体例としては、シクロペンテニル、シクロヘキセニル等が挙げられるが、これらに限定されず、その炭素数は、通常4~14であり、好ましくは5~10、より好ましくは5~6である。
なお、本発明において、ポリオルガノシロキサンの重量平均分子量及び数平均分子量並びに分散度は、例えば、GPC装置(東ソー(株)製EcoSEC,HLC-8320GPC)及びGPCカラム(東ソー(株)TSKgel SuperMultiporeHZ-N, TSKgel SuperMultiporeHZ-H)を用い、カラム温度を40℃とし、溶離液(溶出溶媒)としてテトラヒドロフランを用い、流量(流速)を0.35mL/分とし、標準試料としてポリスチレン(昭和電工(株)製、Shodex)を用いて、測定することができる。
このような白金系の金属触媒は、ポリオルガノシロキサン(a1)のアルケニル基とポリオルガノシロキサン(a2)のSi-H基とのヒドロシリル化反応を促進するための触媒である。
白金とオレフィン類との錯体としては、例えばジビニルテトラメチルジシロキサンと白金との錯体が挙げられるが、これに限定されない。
白金族金属系触媒(A2)の量は、特に限定されないが、通常、ポリオルガノシロキサン(a1)及びポリオルガノシロキサン(a2)の合計量に対して、1.0~50.0ppmの範囲である。
重合抑制剤は、ヒドロシリル化反応の進行を抑制できる限り特に限定されるものではなく、その具体例としては、1-エチニル-1-シクロヘキサノール、1,1-ジフェニル-2-プロピオン-1-オール等のアルキニルアルコール等が挙げられる。
重合抑制剤の量は、特に限定されないが、ポリオルガノシロキサン(a1)及びポリオルガノシロキサン(a2)の合計量に対して、通常、その効果を得る観点から1000.0ppm以上であり、ヒドロシリル化反応の過度な抑制を防止する観点から10000.0ppm以下である。
本発明において、膜構成成分とは、組成物に含まれる溶媒以外の成分を意味する。
なお、保護用接着剤組成物を調製する際、成分が分解したり変質したりしない範囲で、適宜加熱してもよい。
本発明においては、異物を除去する目的で、保護用接着剤組成物を製造する途中で又は全ての成分を混合した後に、用いる溶媒や溶液等をフィルター等を用いてろ過してもよい。
剥離用接着層は、支持基板と保護用接着層との間に介在する。
剥離用接着層は、良好なバンプ変形抑制効果を再現性よく得るための観点から、好ましくは支持基板及び保護用接着層に接する。
剥離用接着剤組成物は、ヒドロシリル化反応によって硬化する成分(A)を含む。
好ましい態様においては、本発明で用いる剥離用接着剤組成物は、ポリオルガノシロキサンを含有する。
他の好ましい態様においては、本発明で用いる剥離用接着剤組成物は、接着剤成分となる硬化する成分(A)と、硬化反応を起こさない剥離剤成分(B)とを含有する。硬化反応を起こさない剥離剤成分(B)としては、例えば、ポリオルガノシロキサンが挙げられる。なお、本発明において「硬化反応を起こさない」とは、あらゆる硬化反応を起こさないことを意味するのではなく、硬化する成分(A)に生じる硬化反応を起こさないことを意味する。
他の好ましい態様においては、成分(A)は、ヒドロシリル化反応によって硬化する成分であってもよいし、ヒドロシリル化反応によって硬化するポリオルガノシロキサン成分(A’)であってもよい。
成分(A)やポリオルガノシロキサン成分(A’)の説明としては、前述の<保護用接着層>の<<保護用接着剤組成物>>の箇所で記載したとおりである。
保護用接着剤組成物が含有する成分(A)やポリオルガノシロキサン成分(A’)と、剥離用接着剤組成物が含有する成分(A)やポリオルガノシロキサン成分(A’)とは、同じ種類の成分であっても、異なる種類の成分であっても構わない。
剥離用接着剤組成物は、硬化反応を起こさない剥離剤成分(B)を含有するが、組成物全体としてはヒドロシリル化による架橋反応を起こし、硬化する。
剥離用接着剤組成物中の硬化する成分(A)には、芳香環を含む成分が含有されていないことが好ましい。
このような剥離剤成分(B)として、典型的には、ポリオルガノシロキサンが挙げられる。ある好ましい態様においては、その具体例としては、エポキシ基含有ポリオルガノシロキサン、メチル基含有ポリオルガノシロキサン、フェニル基含有ポリオルガノシロキサン等が挙げられるが、これらに限定されない。
また、その他の好ましい態様においては、剥離剤成分(B)としては、ポリジメチルシロキサンが挙げられ、当該ポリジメチルシロキサンは変性されていてもよい。変性されていてもよいポリジメチルシロキサンとしては、例えば、エポキシ基含有ポリジメチルシロキサン、無変性のポリジメチルシロキサン、フェニル基含有ポリジメチルシロキサン等が挙げられるが、これらに限定されない。
剥離剤成分(B)であるポリオルガノシロキサンの複素粘度は、25℃でレオメータ(例えば、アントンパール(株)製 レオメータMCR-302)を用いて測定することができる。
エポキシ基を含む有機基におけるエポキシ基は、その他の環と縮合せずに、独立したエポキシ基であってもよく、1,2-エポキシシクロヘキシル基のように、その他の環と縮合環を形成しているエポキシ基であってもよい。
エポキシ基を含む有機基の具体例としては、3-グリシドキシプロピル、2-(3,4-エポキシシクロヘキシル)エチルが挙げられるが、これらに限定されない。
本発明において、エポキシ基含有ポリオルガノシロキサンの好ましい一例としては、エポキシ基含有ポリジメチルシロキサンを挙げることができるが、これに限定されない。
本発明の好ましい態様においては、エポキシ基含有ポリオルガノシロキサンの具体例としては、D10単位のみからなるポリオルガノシロキサン、D10単位とQ単位とを含むポリオルガノシロキサン、D10単位とM単位とを含むポリオルガノシロキサン、D10単位とT単位とを含むポリオルガノシロキサン、D10単位とQ単位とM単位とを含むポリオルガノシロキサン、D10単位とM単位とT単位とを含むポリオルガノシロキサン、D10単位とQ単位とM単位とT単位とを含むポリオルガノシロキサン等が挙げられる。
R21は、ケイ素原子に結合する基であり、アルキル基を表し、アルキル基の具体例としては、前述の例示を挙げることができる。中でも、R21としては、メチル基が好ましい。
本発明において、メチル基含有ポリオルガノシロキサンの好ましい一例としては、ポリジメチルシロキサンを挙げることができるが、これに限定されない。
ポリオルガノシロキサンの市販品としては、例えば、ワッカーケミ社製の製品であるWACKERSILICONE FLUID AK シリーズ(AK50、AK 350、AK 1000、AK 10000、AK 1000000)やGENIOPLAST GUM、信越化学工業(株)製 ジメチルシリコーンオイル(KF-96L、KF-96A、KF-96、KF-96H、KF-69、KF-965、KF-968)、環状ジメチルシリコーンオイル(KF-995);ゲレスト社製 エポキシ基含有ポリオルガノシロキサン(商品名CMS-227、ECMS-327)、信越化学工業(株)製 エポキシ基含有ポリオルガノシロキサン(KF-101、KF-1001、KF-1005、X-22-343)、ダウコーニング社製 エポキシ基含有ポリオルガノシロキサン(BY16-839);ゲレスト社製 フェニル基含有ポリオルガノシロキサン(PMM-1043、PMM-1025、PDM-0421、PDM-0821)、信越化学工業(株)製 フェニル基含有ポリオルガノシロキサン(KF50-3000CS)、MOMENTIVE社製 フェニル基含有ポリオルガノシロキサン(TSF431、TSF433)等が挙げられるが、これらに限定されない。
すなわち、ヒドロシリル化反応によって硬化するポリオルガノシロキサン成分(A’)が含まれる場合、成分(A’)と剥離剤成分(B)との比率は、質量比〔(A’):(B)〕で、好ましくは99.995:0.005~30:70、より好ましくは99.9:0.1~75:25である。
その混合順序は特に限定されるものではないが、容易にかつ再現性よく剥離用接着剤組成物を製造できる方法の一例としては、例えば、成分(A)と剥離剤成分(B)を溶媒に溶解させる方法や、成分(A)と剥離剤成分(B)の一部を溶媒に溶解させ、残りを溶媒に溶解させ、得られた溶液を混合する方法が挙げられるが、これらに限定されない。なお、剥離用接着剤組成物を調製する際、成分が分解したり変質したりしない範囲で、適宜加熱してもよい。
本発明においては、異物を除去する目的で、剥離用接着剤組成物を製造する途中で又は全ての成分を混合した後に、用いる溶媒や溶液等をフィルター等を用いてろ過してもよい。
図1は積層体の一例の概略断面図である。
図1の積層体は、バンプ1aを有する半導体基板1と、保護用接着層2と、剥離用接着層3と、支持基板4とをこの順で有する。
半導体基板1が有するバンプ1aは、支持基板4側に配されている。
保護用接着層2は、半導体基板1と支持基板4との間に介在する。保護用接着層2は、半導体基板1に接する。そして、保護用接着層2は、バンプ1aを覆っている。
剥離用接着層3は、保護用接着層2と支持基板4との間に介在する。剥離用接着層3は、保護用接着層2及び支持基板4に接している。
本発明の積層体の製造方法は、保護用接着剤塗布層形成工程と、保護用接着層形成工程と、剥離用接着剤塗布層形成工程と、剥離用接着層形成工程とを含み、更に必要に応じて、貼り合せ工程などのその他の工程を含む。
保護用接着剤塗布層形成工程は、通常、半導体基板のバンプが存在する面上に、保護用接着剤組成物を塗布することにより、保護用接着剤塗布層を形成する工程である。保護用接着剤組成物をバンプ付き半導体基板に塗布することで、保護用接着剤塗布層と基板との間に隙間を生じることなく、バンプに起因する凹凸を追従するように保護用接着剤塗布層を形成することが可能となり、その結果、形成される保護用接着層の厚さがバンプ高さよりも薄い場合であってもバンプ上部が保護用接着層からはみ出てしまう等の事態を引き起こすことなく、良好なバンプ保護を実現できる保護用接着層を好適に形成できる。なお、この点は、本発明に係る積層体において、保護用接着層が、半導体基板のバンプ高さよりも厚いことを妨げるものではなく、そのような場合でも、良好なバンプ保護を実現できる保護用接着層を好適に形成できる。
このようにして、保護用接着剤塗布層が、バンプ付き半導体基板上に形成される。
保護用接着剤塗布層の厚さは、積層体中の保護用接着層の所望の厚さ、バンプ高さ等を考慮して、適宜決定される。
保護用接着剤組成物が溶媒を含む等の理由により、塗布した保護用接着剤組成物の塗膜を乾燥させる目的で、塗布した保護用接着剤組成物を加熱してもよい。
塗布した保護用接着剤組成物の加熱温度は、保護用接着剤組成物が含む接着剤成分の種類や量、溶媒が含まれるか否か、用いる溶媒の沸点、所望の保護用接着層の厚さ等に応じて異なるため一概に規定できないが、通常80~150℃、その加熱時間は、通常30秒~5分である。
加熱は、ホットプレート、オーブン等を用いて行うことができる。
保護用接着層形成工程では、保護用接着剤塗布層を加熱し、保護用接着層を形成する。
加熱の温度及び時間としては、保護用接着剤塗布層が保護用接着層に転化される温度及び時間であれば、特に限定されない。
加熱の温度としては、十分な硬化速度を実現する観点等から、好ましくは120℃以上、より好ましくは150℃以上であり、積層体を構成する各層(支持基板及び半導体基板を含む)の変質を防ぐ観点等から、好ましくは250℃以下である。さらに好ましくは、180~200℃である。
加熱の時間としては、積層体を構成する各層(支持基板及び半導体基板を含む)の好適な接合を実現する観点から、好ましくは1分以上であり、より好ましくは5分以上であり、過度の加熱による各層への悪影響等を抑制又は回避する観点から、好ましくは180分以下であり、より好ましくは120分以下である。さらに好ましくは、基板処理効率の観点から1~20分である。
加熱は、ホットプレート、オーブン等を用いて行うことができる。
剥離用接着剤塗布層形成工程は、例えば、支持基板上に剥離用接着剤組成物を塗布するか、又は保護用接着層上に剥離用接着剤組成物を塗布することにより、剥離用接着剤塗布層を形成する工程である。
剥離用接着剤塗布層形成工程としては、剥離用接着剤塗布層が形成される工程であれば特に制限されず、例えば、保護用接着層上又は支持基板上に、剥離用接着剤組成物を塗布した後に、加熱(前加熱処理)して、未硬化又は未完全硬化の剥離用接着層である剥離用接着剤塗布層が形成される方法を含む工程が挙げられる。このようにして、剥離用接着剤塗布層が、半導体基板上の保護用接着層上に、又は支持基板上に、形成される。
剥離用接着剤塗布層の厚さは、積層体中の剥離用接着層の所望の厚さ等を考慮して、適宜決定される。
剥離用接着剤組成物が溶媒を含む等の理由により、塗布した剥離用接着剤組成物の塗膜を乾燥させる目的で、塗布した剥離用接着剤組成物を加熱してもよい。
塗布した剥離用接着剤組成物の加熱温度は、剥離用接着剤組成物が含む接着剤成分の種類や量、溶媒が含まれるか否か、用いる溶媒の沸点、所望の剥離用接着層の厚さ等に応じて異なるため一概に規定できないが、通常80~150℃、その加熱時間は、通常30秒~5分である。
加熱は、ホットプレート、オーブン等を用いて行うことができる。
剥離用接着層形成工程では、剥離用接着剤塗布層を加熱し、剥離用接着層を形成する工程である。
剥離用接着層形成工程としては、剥離用接着剤塗布層が加熱され、剥離用接着層が形成される工程であれば、特に限定されない(後加熱処理)。例えば、保護用接着層及び剥離用接着剤塗布層が形成された半導体基板と支持基板とを用いて、又は保護用接着層が形成された半導体基板と、剥離用接着剤塗布層が形成された支持基板とを用いて、2つの層(保護用接着層及び剥離用接着剤塗布層)を挟み込むように2つの基板(半導体基板及び支持基板)を配することによって、支持基板と剥離用接着剤塗布層が接するようにし、かつ剥離用接着剤塗布層と保護用接着層が接するようにした後、加熱処理を施せばよい。
加熱の温度及び時間としては、剥離用接着剤塗布層が剥離用接着層に転化される温度及び時間であれば、特に限定されない。
加熱の温度としては、十分な硬化速度を実現する観点等から、好ましくは120℃以上、より好ましくは150℃以上であり、積層体を構成する各層(支持基板及び半導体基板を含む)の変質を防ぐ観点等から、好ましくは250℃以下である。さらに好ましくは、180~200℃である。
加熱の時間としては、積層体を構成する各層(支持基板及び半導体基板を含む)の好適な接合を実現する観点から、好ましくは1分以上であり、より好ましくは5分以上であり、過度の加熱による各層への悪影響等を抑制又は回避する観点から、好ましくは180分以下であり、より好ましくは120分以下である。さらに好ましくは、基板処理効率の観点から1~20分である。
加熱は、ホットプレート、オーブン等を用いて行うことができる。
剥離用接着剤塗布層形成工程と剥離用接着層形成工程との間には、半導体基板と支持基板との貼り合せを十分なものとするために、貼り合せ工程を行うことが好ましい。
貼り合せ工程としては、基板と層の貼り合わせができ、かつ基板や層に損傷を与えない限り特に限定されるものではないが、典型的には、支持基板及び半導体基板の厚さ方向に荷重が掛け得られる工程であり、より好ましくは、減圧下で支持基板及び半導体基板の厚さ方向に荷重が掛け得られる工程である。
荷重は、基板と層の貼り合わせができ、かつ基板や層に損傷を与えない限り特に限定されるものではないが、例えば、10~1,000Nである。
減圧度は、基板と層の貼り合わせができ、かつ基板や層に損傷を与えない限り特に限定されるものではないが、例えば、10~10,000Paである。
本発明の積層体は、半導体基板を加工するため仮接着するために使用され、積層体における半導体基板の加工後に支持基板と半導体基板とが離される用途に使用される。
本発明の半導体基板の製造方法は、半導体基板が加工される加工工程と、支持基板と加工された半導体基板とが離される剥離工程とを少なくとも含み、更に必要に応じて、除去工程等のその他の工程を含む。
加工工程としては、本発明の積層体における半導体基板が加工される工程であれば、特に限定されないが、例えば、研磨処理、貫通電極形成処理などを含む。
例えば、各種加工工程において、高温高圧下で加工処理される場合があるが、本発明の積層体は、高温(例えば250~350℃)や高圧下で処理されても、半導体基板のバンプ変形を有効に防止することができる。
研磨処理としては、例えば、半導体基板のバンプが存在する面と反対側の面を研磨し、半導体基板を薄くする処理であれば、特に限定されないが、例えば、研磨剤や砥石を用いた物理的研磨などが挙げられる。
研磨処理は、半導体基板の研磨に使用されている一般的な研磨装置を用いて行うことができる。
研磨処理によって、半導体基板の厚さが減り、所望の厚さに薄化した半導体基板が得られる。薄化した半導体基板の厚みとしては、特に限定されないが、例えば、10~300μmであってもよいし、30~100μmであってもよい。
研磨された半導体基板には、複数の薄化された半導体基板を積層した際に薄化された半導体基板間の導通を実現するための貫通電極が形成される場合がある。
そのため、半導体基板の製造方法は、研磨処理の後であって剥離工程の前に、研磨された半導体基板に貫通電極が形成される貫通電極形成処理を含んでいてもよい。
半導体基板に貫通電極を形成する方法としては、特に限定されないが、例えば、貫通孔を形成し、形成された貫通孔に導電性材料を充填することなどが挙げられる。
貫通孔の形成は、例えば、フォトリソグラフィーによって行われる。
貫通孔への導電性材料の充填は、例えば、めっき技術によって行われる。
剥離工程は、加工工程の後に、支持基板と加工された半導体基板とが離される工程である限り特に限定されない。
例えば、鋭部を有する機材(いわゆるディボンダー)で機械的に剥離する方法が挙げられる。具体的には、例えば、半導体基板と支持基板との間に鋭部を挿入した後、半導体基板と支持基板とを分離する。通常、剥離は、剥離用接着層内部、剥離用接着層と保護用接着層との界面及び剥離用接着層と支持基板との界面にいずれかで生じ、これらのうちの2つ以上が組み合わさって剥離が生じることもよくある。なお、剥離用接着層内部で剥離が生じるとは、剥離用接着層が開裂することを意味する。
除去工程としては、剥離工程の後に、半導体基板上の保護用接着層やその上の剥離用接着層残渣が除去される工程であれば、特に限定されないが、例えば、洗浄剤組成物を用いてこれらを溶解除去する方法が挙げられる。また、溶解除去に除去テープ等を用いた除去を組み合わせてもよい。
洗浄剤組成物を用いる場合、例えば、保護用接着層付き半導体基板を洗浄剤組成物に浸漬したり、洗浄剤組成物を吹き付けたりすることができる。
洗浄剤組成物を用いて半導体基板を洗浄する場合、バンプが損傷されないように注意する。
第四級アンモニウム塩は、第四級アンモニウムカチオンと、アニオンとから構成されるものであって、この種の用途に用いられるものであれば特に限定されるものではない。
このような第四級アンモニウムカチオンとしては、典型的には、テトラ(炭化水素)アンモニウムカチオンが挙げられる。一方、それと対を成すアニオンとしては、水酸化物イオン(OH-);フッ素イオン(F-)、塩素イオン(Cl-)、臭素イオン(Br-)、ヨウ素イオン(I-)等のハロゲンイオン;テトラフルオロホウ酸イオン(BF4 -);ヘキサフルオロリン酸イオン(PF6 -)等が挙げられるが、これらに限定されない。
第四級アンモニウム塩中、ハロゲン原子は、カチオンに含まれていても、アニオンに含まれていてもよいが、好ましくはアニオンに含まれる。
フッ化テトラ(炭化水素)アンモニウムにおける炭化水素基の具体例としては、炭素数1~20のアルキル基、炭素数2~20のアルケニル基、炭素数2~20のアルキニル基、炭素数6~20のアリール基等が挙げられる。
より好ましい一態様においては、フッ化テトラ(炭化水素)アンモニウムは、フッ化テトラアルキルアンモニウムを含む。
フッ化テトラアルキルアンモニウムの具体例としては、フッ化テトラメチルアンモニウム、フッ化テトラエチルアンモニウム、フッ化テトラプロピルアンモニウム、フッ化テトラブチルアンモニウム(テトラブチルアンモニウムフルオリドともいう)等が挙げられるが、これらに限定されない。中でも、フッ化テトラブチルアンモニウムが好ましい。
図2A~図2Hは、積層体の製造及び薄化ウエハーの製造を行う一態様を説明するための図である。
まず、バンプ1aを有するウエハー1を用意する(図2A)。
次に、ウエハー1のバンプ1aが存在する面上に、塗布装置11を用いたスピンコーティングによって保護用接着剤組成物を塗布し、保護用接着剤塗布層2aを形成する(図2B)。
次に、ウエハー1のバンプ1aが存在する面と反対側の面に、加熱装置(ホットプレート)12を配し、加熱装置12によって保護用接着剤塗布層2aを加熱して硬化させ保護用接着層2に転化する(図2C)。
次に、保護用接着層2上に、塗布装置13を用いたスピンコーティングによって剥離用接着剤組成物を塗布し、剥離用接着剤塗布層3aを形成する(図2D)。
次に、剥離用接着剤塗布層3a上に、支持基板4を配する(図2E)。
次に、減圧下でウエハー1と支持基板4との厚さ方向に荷重を掛けた後、ウエハー1のバンプ1aが存在する面と反対側の面に、加熱装置(ホットプレート)14を配し、加熱装置14によって剥離用接着剤塗布層3aを加熱して硬化させ剥離用接着層3に転化する(図2F)。
図2A~図2Fで示した工程によって、積層体が得られる。
次に、薄化ウエハーの製造の一例を説明する。
次に、研磨装置(不図示)を用いてウエハー1のバンプ1aが存在する面と反対側の面を研磨し、ウエハー1を薄化する(図2G)。なお、薄化されたウエハー1に対して貫通電極の形成などが施されてもよい。
次に、剥離装置(不図示)を用いて、薄化したウエハー1と支持基板4とを剥離する(図2H)。
次に、洗浄装置(不図示)を用いて、洗浄剤組成物によって薄化したウエハー1上から保護用接着層2等を溶解除去することによって、薄化したウエハー1を洗浄する。
以上によって薄化したウエハー1が得られる。
(2)複素粘度の測定:アントンパール(株)製 レオメータMCR-302
(3)真空貼り合わせ装置X:ズースマイクロテック(株)製、マニュアルボンダー
(4)真空貼り合わせ装置Y:ズースマイクロテック(株)製、オートボンダー
(5)剥離装置X:ズースマイクロテック(株)製、マニュアルデボンダー
ポリジメチルシロキサンの重量平均分子量及び数平均分子量並びに分散度は、GPC装置(東ソー(株)製EcoSEC HLC―8320GPC)及びGPCカラム(東ソー(株)TSKgel SuperMultiporeHZ-N、TSKgel SuperMultiporeHZ-H)を用い、カラム温度を40℃とし、溶離液(溶出溶媒)としてテトラヒドロフランを用い、流量(流速)を0.35mL/分とし、標準試料としてポリスチレン(昭和電工(株)製、Shodex)を用いて、測定した。
[調製例1]
撹拌機A600mL撹拌容器に、前述の成分(a1)として、式(V)で表される粘度200mPa・sのビニル基含有直鎖状ポリジメチルシロキサン62.10gとビニル基含有のMQ樹脂からなるベースポリマー(ワッカーケミ社製)82.25g、前述の成分(a2)として粘度100mPa・sのSiH基含有直鎖状ポリジメチルシロキサン(ワッカーケミ社製)15.23g、及び前述の成分(A3)として1-エチニル-1-シクロヘキサノール(ワッカーケミ社製)0.42gを入れ、撹拌機Aで5分間撹拌し、混合物(I)を得た。
スクリュー管50mLに前述の成分(A2)として白金触媒(ワッカーケミ(株)製)0.24gと、前述の成分(a1)として式(W)で表される粘度1000mPa・sのビニル基含有直鎖状ポリジメチルシロキサン(ワッカーケミ社製)10.07gを撹拌機Aで5分間撹拌し、混合物(II)を得た。
得られた混合物(II)のうち7.14gを混合物(I)に加え、撹拌機Aで5分間撹拌し、混合物(III)を得た。
最後に得られた混合物(III)をナイロンフィルター300メッシュでろ過し、保護用接着剤組成物1を得た。なお、回転粘度計を用いて測定した保護用接着剤組成物1の粘度は、9900mPa・sであった。
[調製例2]
撹拌機A専用の600mL撹拌容器に、前述の成分(a1)としてポリシロキサン骨格とビニル基とを有するMQ樹脂(ワッカーケミ社製)のp-メンタン溶液(濃度80.6質量%)104.14g、前述の成分(B)として式(M1)で表されるポリオルガノシロキサン(複素粘度800Pa・s、重量平均分子量171,899(分散度2.18)、ワッカーケミ社製)58.11g、溶媒としてp-メンタン(日本テルペン化学(株)製)34.94g及びn-デカン(三協化学(株)製)6.20gを加え、撹拌機Aで5分間撹拌し混合物(I)を得た。
得られた混合物(I)に、前述の成分(a2)として粘度100mPa・sのSiH基含有直鎖状ポリジメチルシロキサン(ワッカーケミ社製)16.79g、及び前述の成分(a1)として式(V)で表される粘度200mPa・sのビニル基含有直鎖状ポリジメチルシロキサン(ワッカーケミ社製)24.54gを加え、混合物(II)を得た。
前述の成分(A3)として1,1-ジフェニル-2-プロピン-1-オール(東京化成工業(株)製)1.61g及び1-エチニル-1-シクロヘキサノール(ワッカーケミ社製)1.61g、並びに溶媒としてp-メンタン(日本テルペン化学(株)製)3.23gを撹拌機Aで60分間撹拌して混合物(III)を得た。
得られた混合物(III)のうち1.29gを混合物(II)に加え、撹拌機Aで5分間撹拌し、混合物(IV)を得た。
前述の成分(A2)として白金触媒(ワッカーケミ社製)0.65g、及び前述の成分(a1)として式(W)で表される粘度1000mPa・sのビニル基含有直鎖状ポリジメチルシロキサン(ワッカーケミ社製)19.37gを撹拌機Aで5分間撹拌し、混合物(V)を得た。
得られた混合物(V)のうち4.00gを混合物(IV)に加え、撹拌機Aで5分間撹拌し、混合物(VI)を得た。
最後に、得られた混合物(VI)をナイロンフィルター300メッシュでろ過し、剥離用接着剤組成物1を得た。なお、得られた剥離用接着剤組成物1の粘度は、3000mPa・sであった。
撹拌機A専用の600mL撹拌容器に、前述の成分(a1)としてポリシロキサン骨格とビニル基とを有するMQ樹脂(ワッカーケミ社製)のp-メンタン溶液(濃度80.6質量%)105.26g、前述の成分(B)として式(M1)で表されるポリオルガノシロキサン(複素粘度6000Pa・s、重量平均分子量642,000(分散度2.6)、ワッカーケミ社製、商品名GENIOPLAST GUM)35.24g、p-メンタン(日本テルペン化学(株)製)54.11g及びn-デカン(三協化学(株)製)8.35gを加え、撹拌機Aによる5分間の撹拌を、途中に小休止を挟み合計8回繰り返し、混合物(I)を得た。
得られた混合物(I)に、前述の成分(a2)として粘度100mPa・sのSiH基含有直鎖状ポリジメチルシロキサン(ワッカーケミ社製)16.97g、及び前述の成分(a1)として粘度200mPa・sのビニル基含有直鎖状ポリジメチルシロキサン(ワッカーケミ社製)24.80gを加え、混合物(II)を得た。
前述の成分(A3)として1,1-ジフェニル-2-プロピン-1-オール(東京化成工業(株)製)1.63g、(A3)として1-エチニル-1-シクロヘキサノール(ワッカーケミ社製)1.63g、及びp-メンタン(日本テルペン化学(株)製)3.26gを撹拌機Aで5分間撹拌して、混合物(III)を得た。
得られた混合物(III)のうち1.31gを混合物(II)に加え、撹拌機Aで5分間撹拌し、混合物(IV)を得た。
前述の成分(A2)として白金触媒(ワッカーケミ社製)0.26g、前述の成分(a1)として粘度1000mPa・sのビニル基含有直鎖状ポリジメチルシロキサン(ワッカーケミ社製)19.58gを撹拌機Aで5分間撹拌し、混合物(V)を得た。
得られた混合物(V)のうち3.97gを混合物(IV)に加え、撹拌機Aで5分間撹拌し、混合物(VI)を得た。
最後に、得られた混合物(VI)をナイロンフィルター300メッシュでろ過し、剥離用接着剤組成物2を得た。なお、得られた剥離用接着剤組成物2の粘度は、3900mPa・sであった。
[実施例1-1]
デバイス側のウエハーとして300mmのシリコンウエハー(厚さ:770μm)に、調製例1で得られた保護用接着剤組成物1をスピンコートで塗布し、200℃で10分間加熱することにより、ウエハーの回路面に厚さが約32.5μmの保護用接着層を形成した。
続いて、保護用接着層上に、調製例2で得られた剥離用接着剤組成物1をスピンコートで塗布し、120℃で1.5分間加熱(前加熱処理)することにより、保護用接着層上に、積層体中の剥離用接着層の厚さが約32.5μmとなるように剥離用接着剤塗布層を形成した。
その後、真空貼り合わせ装置Y内で、保護用接着層及び剥離用接着剤塗布層を有するシリコンウエハーと、キャリア側のウエハー(支持体)として300mmガラスウエハー(厚さ:700μm)とを、保護用接着層及び剥離用接着剤塗布層を挟むように貼り合わせ、ホットプレート上でデバイス側ウエハーを下にして200℃で10分間加熱(後加熱処理)することにより積層体を作製した。なお、貼り合せは、温度23℃、減圧度1,000Paで、30Nの荷重をかけて行った。
デバイス側のウエハーとして300mmのシリコンウエハー(厚さ:770μm)に、調製例1で得られた保護用接着剤組成物1をスピンコートで塗布し、200℃で10分間加熱することにより、ウエハーの回路面に厚さが約32.5μmの保護用接着層を形成した。
続いて、保護用接着層上に、調製例3で得られた剥離用接着剤組成物2をスピンコートで塗布し、120℃で1.5分間加熱(前加熱処理)することにより、保護用接着層上に、積層体中の剥離用接着層の厚さが約32.5μmとなるように剥離用接着剤塗布層を形成した。
その後、真空貼り合わせ装置内Yで、保護用接着層及び剥離用接着剤塗布層を有するシリコンウエハーと、キャリア側のウエハー(支持体)として300mmガラスウエハー(厚さ:700μm)とを、保護用接着層及び剥離用接着剤塗布層を挟むように貼り合わせ、ホットプレート上でデバイス側ウエハーを下にして200℃で10分間加熱(後加熱処理)することにより積層体を作製した。なお、貼り合せは、温度23℃、減圧度1,000Paで、30Nの荷重をかけて行った。
デバイス側のウエハーとして300mmのシリコンウエハー(厚さ:770μm)に、調製例1で得られた保護用接着剤組成物1をスピンコートで塗布することにより、ウエハーの回路面に、積層体中の保護用接着層の厚さが約65μmとなるように保護用接着剤塗布層を形成した。
その後、真空貼り合わせ装置内Yで、保護用接着剤塗布層を有するシリコンウエハーと、キャリア側のウエハー(支持体)として300mmガラスウエハー(厚さ:700μm)とを、保護用接着剤塗布層を挟むように貼り合わせ、ホットプレート上でデバイス側ウエハーを下にして200℃で10分間加熱(後加熱処理)することにより積層体を作製した。なお、貼り合せは、温度23℃、減圧度1,000Paで、30Nの荷重をかけて行った。
デバイス側のウエハーとして300mmのシリコンウエハー(厚さ:770μm)に、調製例2で得られた剥離用接着剤組成物1をスピンコートで塗布し、120℃で1.5分間加熱(前加熱処理)することにより、ウエハーの回路面に、積層体中の剥離用接着層の厚さが約65μmとなるように剥離用接着剤塗布層を形成した。
その後、真空貼り合わせ装置内Yで、剥離用接着剤塗布層を有するシリコンウエハーと、キャリア側のウエハー(支持体)として300mmガラスウエハー(厚さ:700μm)とを、剥離用接着剤塗布層を挟むように貼り合わせ、ホットプレート上でデバイス側ウエハーを下にして200℃で10分間加熱(後加熱処理)することにより積層体を作製した。なお、貼り合せは、温度23℃、減圧度1,000Paで、30Nの荷重をかけて行った。
デバイス側のウエハーとして300mmのシリコンウエハー(厚さ:770μm)に、調製例3で得られた剥離用接着剤組成物2をスピンコートで塗布し、120℃で1.5分間加熱(前加熱処理)することにより、ウエハーの回路面に、積層体中の剥離用接着層の厚さが約65μmの剥離用接着剤塗布層を形成した。
その後、真空貼り合わせ装置内Yで、剥離用接着剤塗布層を有するシリコンウエハーと、キャリア側のウエハー(支持体)として300mmガラスウエハー(厚さ:700μm)とを、接着層を挟むように貼り合わせ、ホットプレート上でデバイス側ウエハーを下にして200℃で10分間加熱(後加熱処理)することにより積層体を作製した。なお、貼り合せは、温度23℃、減圧度1,000Paで、30Nの荷重をかけて行った。
接着性の評価は、ボイドの有無を積層体のガラスウエハー(支持体)側から目視で確認することにより行い、ボイドが確認されない場合は良好とし、ボイドが確認された場合は不良とした。ここで、ボイドとは、積層体の基板と層の間、2つの層の間又は層中に気泡がある状態を意味し、望ましくない気泡があるこのような状態では、半導体基板の十分な保護を期待することができない。
剥離性の評価は、半導体基板と支持基板とを剥離する際に要する力を測定し、剥離装置Xで剥離ができた場合は良好とし、剥離ができなかった場合は不良とした。
その結果、全ての積層体において、ボイドは確認されなかった。剥離性について、実施例1-1および実施例1-2においては、15Nの力で、半導体基板と支持基板を良好に剥離することができた。また、比較例1-1は剥離装置Xでは剥離できないことが分かった。なお、比較例1-2および比較例1-3は、15Nの力で剥離することが可能であった。
このように、本発明の積層体は剥離不可能な保護用接着剤組成物1の存在下でも、剥離用接着層を有することで良好な剥離性を発現することが分かった。
[実施例2-1]
デバイス側の基板としてとしてPI TEG 4×4cmのチップ(厚さ:770μm、バンプ直径:0.03mm、バンプ高さ:0.04mm、バンプピッチ:0.06×0.1mm)に、調製例1で得られた保護用接着剤組成物1をスピンコートで塗布し、200℃で10分間加熱することにより、チップの回路面に厚さが約32.5μmの保護用接着層を形成した。
続いて、保護用接着層上に、調製例2で得られた剥離用接着剤組成物1をスピンコートで塗布し、120℃で1.5分間加熱(前加熱処理)することにより、積層体中の剥離用接着層の厚さが約32.5μmとなるように剥離用接着剤塗布層を形成した。
その後、真空貼り合わせ装置X内で、保護用接着層及び剥離用接着剤塗布層を有するチップと、キャリア側のウエハー(支持体)として100mmのガラスウエハー(厚さ:770μm)とを、保護用接着層及び剥離用接着剤塗布層を挟むように貼り合わせ、ホットプレート上でデバイス側ウエハーを下にして200℃で10分間加熱(後加熱処理)することにより積層体を作製した。なお、貼り合せは、温度23℃、減圧度1,000Paで、30Nの荷重をかけて行った。
実施例2-1において、下記表1に示すように、各接着剤組成物の種類と、各層の膜厚を変更した以外は、実施例2-1と同様な方法により、実施例2-2~2-8の積層体を得た。
デバイス側の基板としてPI TEG 4×4cmのチップ(厚さ:770μm、バンプ直径:0.03mm、バンプ高さ:0.04mm、バンプピッチ:0.06×0.1mm)に、調製例2で得られた剥離用接着剤組成物1をスピンコートで塗布し、120℃で1.5分間加熱(前加熱処理)することにより、チップ上に、積層体中の剥離用接着層の厚さが約65μmとなるように剥離用接着剤塗布層を形成した。
その後、真空貼り合わせ装置X内で、剥離用接着剤塗布層を有するチップと、キャリア側のウエハー(支持体)として100mmのガラスウエハー(厚さ:770μm)とを、剥離用接着剤塗布層を挟むように貼り合わせ、ホットプレート上でデバイス側ウエハーを下にして200℃で10分間加熱(後加熱処理)することにより積層体を作製した。なお、貼り合せは、温度23℃、減圧度1,000Paで、30Nの荷重をかけて行った。
デバイス側の基板としてとしてPI TEG 4×4cmのチップ(厚さ:770μm、バンプ直径:0.03mm、バンプ高さ:0.04mm、バンプピッチ:0.06×0.1mm)に、調製例3で得られた剥離用接着剤組成物2をスピンコートで塗布し、120℃で1.5分間加熱(前加熱処理)することにより、チップ上に、積層体中の剥離用接着層の厚さが約65μmとなるように剥離用接着剤塗布層を形成した。
その後、真空貼り合わせ装置X内で、剥離用接着剤塗布層を有するチップと、キャリア側のウエハー(支持体)として100mmのガラスウエハー(厚さ:770μm)とを、剥離用接着剤塗布層を挟むように貼り合わせ、ホットプレート上でデバイス側ウエハーを下にして200℃で10分間加熱(後加熱処理)することにより積層体を作製した。なお、貼り合せは、温度23℃、減圧度1,000Paで、30Nの荷重をかけて行った。
デバイス側の基板としてPI TEG 4×4cmのチップ(厚さ:770μm、バンプ直径:0.03mm、バンプ高さ:0.04mm、バンプピッチ:0.06×0.1mm)に、調製例1で得られた保護用接着剤組成物1をスピンコートで塗布することにより、チップ上に、積層体中の保護用接着層の厚さが約65μmとなるように保護用接着剤塗布層を形成した。
その後、真空貼り合わせ装置X内で、この接着層を有するチップと、キャリア側のウエハー(支持体)として100mmのガラスウエハー(厚さ:770μm)とを、接着層を挟むように貼り合わせ、ホットプレート上でデバイス側ウエハーを下にして200℃で10分間加熱(後加熱処理)することにより積層体を作製した。なお、貼り合せは、温度23℃、減圧度1,000Paで、30Nの荷重をかけて行った。
デバイス側の基板としてPI TEG 4×4cmのチップ(厚さ:770μm、バンプ直径:0.03mm、バンプ高さ:0.04mm、バンプピッチ:0.06×0.1mm)に、調製例2で得られた剥離用接着剤組成物1をスピンコートで塗布し、120℃で1.5分間加熱(前加熱処理)することにより、チップ上の残留溶媒を除去し、さらに200℃で10分間加熱することにより、チップ上に、積層体中の剥離用接着層の厚さが約32.5μmとなるように剥離用接着剤塗布層を形成した。
続いて、剥離用接着剤塗布層上に、調製例1で得られた保護用接着剤組成物1をスピンコートで塗布し、剥離用接着剤塗布層の上に、積層体中の保護用接着層の厚さが約32.5μmとなるように保護用接着剤塗布層を形成した。
その後、真空貼り合わせ装置X内で、剥離用接着剤塗布層及び保護用接着剤塗布層を有するチップと、キャリア側のウエハー(支持体)として100mmのガラスウエハー(厚さ:770μm)とを、剥離用接着剤塗布層及び保護用接着剤塗布層を挟むように貼り合わせ、ホットプレート上でデバイス側ウエハーを下にして200℃で10分間加熱(後加熱処理)することにより積層体を作製した。なお、貼り合せは、温度23℃、減圧度1,000Paで、30Nの荷重をかけて行った。
ホットプレートを用いて、実施例2-1、実施例2-2、実施例2-3、実施例2-4、実施例2-5、実施例2-6、実施例2-7、実施例2-8、比較例2-1、比較例2-2、比較例2-3、及び比較例2-4で得られた各積層体に高温処理を施した。高温処理は、各積層体について、作製日当日(作り置き前)と作製日から10日後(作り置き後)に行った。高温処理は次の手順で行った。
270℃に設定したホットプレート上に積層体のガラスウエハー(支持基板)を下にして置き、5分間加熱した。
処理後の各積層体の半導体基板であるシリコンウエハーの状況を支持基板であるガラスウエハー越しに光学顕微鏡を用いて観察し、バンプ変形の有無を目視で確認した。
1つの積層体中のバンプは5044個存在しており、変形したバンプの数が0個以上で50個未満の場合を○、50個以上で100個未満の場合を△、100個以上の場合×とした。
結果を下記表1に示す。表1中、括弧内の数字は各層の膜厚を示す。
一方、比較例2-1、比較例2-2および比較例2-4の積層体においては、作り置き後に多数のバンプ変形が確認された。
実施例の結果から、本発明の積層体は、半導体基板と支持基板とを容易に剥離でき、かつバンプの変形を抑制できるバンプ保護性能に優れている積層体であることが分かった。
1a バンプ
2 保護用接着層
2a 保護用接着剤塗布層
3 剥離用接着層
3a 剥離用接着剤塗布層
4 支持基板
11 塗布装置
12 加熱装置
13 塗布装置
14 加熱装置
Claims (6)
- バンプ付き半導体基板と、支持基板と、前記バンプ付き半導体基板に接するように形成された保護用接着層と、前記保護用接着層と前記支持基板との間に形成された剥離用接着層とを備える積層体であって、
前記保護用接着層は、保護用接着剤組成物から形成され、前記保護用接着剤組成物は、ヒドロシリル化反応によって硬化する成分(A)を含み、硬化反応を起こさない剥離剤成分(B)を含まず、
前記剥離用接着層は、剥離用接着剤組成物から形成され、前記剥離用接着剤組成物は、ヒドロシリル化反応によって硬化する成分(A)と、硬化反応を起こさない剥離剤成分(B)とを含む、積層体。 - 前記保護用接着層中に含有される前記成分(A)が、ケイ素原子に結合した炭素数2~40のアルケニル基を有するポリオルガノシロキサン(a1)と、Si-H基を有するポリオルガノシロキサン(a2)と、白金族金属系触媒(A2)とを含有し、
前記剥離用接着層中に含有される前記成分(A)が、ケイ素原子に結合した炭素数2~40のアルケニル基を有するポリオルガノシロキサン(a1)と、Si-H基を有するポリオルガノシロキサン(a2)と、白金族金属系触媒(A2)とを含有する、
請求項1に記載の積層体。 - 前記剥離用接着層中に含有される前記剥離剤成分(B)が、変性されていてもよいポリジメチルシロキサンである請求項1又は2に記載の積層体。
- 請求項1~3のいずれか一項に記載の積層体における前記半導体基板が加工される工程と、
前記保護用接着層と前記剥離用接着層とが離されることによって、前記支持基板と加工された前記半導体基板とが離される工程と、
を含む、半導体基板の製造方法。 - 前記加工される工程が、前記半導体基板の前記バンプが存在する面と反対側の面を研磨し、前記半導体基板を薄くする処理を含む、請求項4に記載の半導体基板の製造方法。
- 請求項1~3のいずれか一項に記載の積層体を製造する、積層体の製造方法であって、
前記半導体基板の前記バンプが存在する面上に、前記保護用接着剤組成物を塗布することにより、保護用接着剤塗布層を形成する保護用接着剤塗布層形成工程と、
前記保護用接着剤塗布層を加熱し、前記保護用接着層を形成する保護用接着層形成工程と、
前記支持基板上に前記剥離用接着剤組成物を塗布するか、又は前記保護用接着層上に前記剥離用接着剤組成物を塗布することにより、剥離用接着剤塗布層を形成する剥離用接着剤塗布層形成工程と、
前記剥離用接着剤塗布層と前記保護用接着層が接し、かつ前記剥離用接着剤塗布層と前記支持基板が接した状態で、前記剥離用接着剤塗布層を加熱し、前記剥離用接着層を形成する剥離用接着層形成工程と、
を含む、積層体の製造方法。
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GB2530388A (en) * | 2014-07-25 | 2016-03-23 | Dow Corning | Fluoro-silicone compositions as temporary bonding adhesives field of the invention |
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2022
- 2022-02-21 EP EP22774829.0A patent/EP4306315A4/en active Pending
- 2022-02-21 JP JP2023508805A patent/JPWO2022202029A1/ja active Pending
- 2022-02-21 CN CN202280024275.1A patent/CN117083694A/zh active Pending
- 2022-02-21 US US18/283,987 patent/US20240222180A1/en active Pending
- 2022-02-21 KR KR1020237033272A patent/KR20230162939A/ko active Pending
- 2022-02-21 WO PCT/JP2022/006804 patent/WO2022202029A1/ja active Application Filing
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JP5335443B2 (ja) | 2006-03-01 | 2013-11-06 | シン マテリアルズ アクチェンゲゼルシャフト | ウエハ支持構造体及び該ウエハ支持構造体の製造に用いられる層システム |
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WO2020138240A1 (ja) * | 2018-12-27 | 2020-07-02 | 日産化学株式会社 | 光照射剥離用接着剤組成物及び積層体並びに積層体の製造方法及び剥離方法 |
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Also Published As
Publication number | Publication date |
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EP4306315A4 (en) | 2025-03-26 |
KR20230162939A (ko) | 2023-11-29 |
CN117083694A (zh) | 2023-11-17 |
EP4306315A1 (en) | 2024-01-17 |
TW202238709A (zh) | 2022-10-01 |
JPWO2022202029A1 (ja) | 2022-09-29 |
US20240222180A1 (en) | 2024-07-04 |
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