WO2022153614A1 - Multi-level inverter - Google Patents
Multi-level inverter Download PDFInfo
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- WO2022153614A1 WO2022153614A1 PCT/JP2021/035706 JP2021035706W WO2022153614A1 WO 2022153614 A1 WO2022153614 A1 WO 2022153614A1 JP 2021035706 W JP2021035706 W JP 2021035706W WO 2022153614 A1 WO2022153614 A1 WO 2022153614A1
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- wiring
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- charging
- diode
- side intermediate
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of AC power input into DC power output; Conversion of DC power input into AC power output
- H02M7/42—Conversion of DC power input into AC power output without possibility of reversal
- H02M7/44—Conversion of DC power input into AC power output without possibility of reversal by static converters
- H02M7/48—Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of AC power input into DC power output; Conversion of DC power input into AC power output
- H02M7/42—Conversion of DC power input into AC power output without possibility of reversal
- H02M7/44—Conversion of DC power input into AC power output without possibility of reversal by static converters
- H02M7/48—Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/483—Converters with outputs that each can have more than two voltages levels
- H02M7/487—Neutral point clamped inverters
Definitions
- the techniques disclosed herein relate to multi-level inverters.
- a multi-level inverter is disclosed in Japanese Patent Publication No. 2011-109801.
- the multi-level inverter converts the DC power input from the battery into AC power.
- the multi-level inverter can control the voltage of each output wiring in multiple levels. According to the multi-level inverter, the output current can be controlled more accurately.
- the battery may be charged by applying a voltage to the battery with an external charger.
- a boost converter circuit is provided in the multi-level inverter, and the supply voltage of the charger is boosted by the boost converter circuit.
- This specification proposes a technique for boosting the supply voltage of a charger by using an inverter circuit inside a multi-level inverter.
- the multi-level inverter disclosed in the present specification includes a battery, a high potential input wiring connected to the positive side of the battery, a low potential input wiring connected to the negative side of the battery, a midpoint wiring, and the midpoint.
- the first capacitor connected between the wiring and the low potential input wiring, the second capacitor connected between the high potential input wiring and the midpoint wiring, the first output wiring, and the second output wiring. It has a third output wiring, a first switching circuit, a second switching circuit, a third switching circuit, a charging circuit, and a control circuit.
- the first switching circuit is connected to the high potential input wiring, the midpoint wiring, the low potential input wiring, and the first output wiring.
- the second switching circuit is connected to the high potential input wiring, the midpoint wiring, the low potential input wiring, and the second output wiring.
- the third switching circuit is connected to the high potential input wiring, the midpoint wiring, the low potential input wiring, and the third output wiring.
- the first switching circuit is connected between the first upper arm switching element connected between the high potential input wiring and the first output wiring, and the first output wiring and the low potential input wiring. 1
- the lower arm switching element, the first midpoint side intermediate diode whose anode is connected to the midpoint wiring, the cathode is connected to the cathode of the first midpoint side intermediate diode, and the anode is the first.
- the first middle point side intermediate switching element connected in parallel with the first middle point side intermediate diode, and the first output side intermediate diode.
- the second switching circuit is connected to a second upper arm switching element connected between the high potential input wiring and the second output wiring, and a second upper arm switching element connected between the second output wiring and the low potential input wiring. 2
- the second middle point side intermediate switching element connected in parallel with the second middle point side intermediate diode, and the second output side intermediate diode.
- the charging circuit connects the DC charging port, the positive electrode of the DC charging port, and the cathode of the first midpoint side intermediate diode, and the negative electrode of the DC charging port and the middle of the second midpoint side. It has a charging negative electrode wiring, which connects the diode to the anode.
- the control circuit turns on the first midpoint side intermediate switching element and charges the first capacitor with the electric power of the charger.
- the boost control is executed by turning on the second middle point side intermediate switching element and alternately repeating the second operation of charging the second capacitor by the electric power of the charger.
- an inverter circuit that converts DC power into AC power is configured by a first switching circuit, a second switching circuit, a third switching circuit, and the like.
- the positive electrode of the DC charging port is connected to the midpoint wiring by turning on the first midpoint side intermediate switching element. Therefore, in the first operation, the first capacitor can be charged by connecting the negative electrode of the DC charging port to the low potential input wiring.
- the negative electrode of the DC charging port is connected to the midpoint wiring by turning on the second midpoint side intermediate switching element. Therefore, the second capacitor can be charged by connecting the positive electrode of the DC charging port to the high potential input wiring. In this way, the first capacitor is charged in the first operation, and the second capacitor is charged in the second operation.
- the control circuit alternately repeats the first operation and the second operation in the boost control. Therefore, the first capacitor and the second capacitor are charged.
- the potential of the midpoint wiring with respect to the low potential input wiring rises to a potential close to the supply voltage of the charger.
- the second capacitor is charged, the potential of the high-potential input wiring with respect to the midpoint wiring rises to a potential close to the supply voltage of the charger. Therefore, the potential of the high-potential input wiring with respect to the low-potential input wiring rises to a potential higher than the supply voltage of the charger. Therefore, a voltage higher than the supply voltage of the charger is applied to the battery to charge the battery.
- the supply voltage of the charger can be boosted to a higher voltage by using the inverter circuit, and the boosted voltage can be applied to the battery. Therefore, the battery can be charged without providing a dedicated boost converter circuit.
- the circuit diagram of the multi-level inverter of Example 1 The graph which shows the low voltage charge control of Example 1.
- FIG. The circuit diagram of the multi-level inverter of Example 1.
- the circuit diagram of the multi-level inverter of Example 1. The circuit diagram of the multi-level inverter of the modification of Example 1.
- the circuit diagram of the multi-level inverter of Example 3. The graph which shows the low voltage charge control of Example 3.
- the circuit diagram of the multi-level inverter of Example 3. The circuit diagram of the multi-level inverter of Example 3.
- the circuit diagram of the multi-level inverter of the modification 1. The circuit diagram of the multi-level inverter of the modification 2.
- the wiring is interposed in the specific charging wiring. It may further have the provided inductor.
- a positive electrode side diode in which the anode is connected to the charging positive electrode wiring and the cathode is connected to the high potential input wiring, and the anode is connected to the low potential input wiring.
- the cathode may further have a negative electrode side diode connected to the charging negative electrode wiring.
- the specific charging wiring may be the charging positive electrode wiring, and the anode of the positive electrode side diode may be connected to the charging positive electrode wiring on the side closer to the first midpoint side intermediate diode than the inductor.
- the specific charging wiring may be the charging negative electrode wiring, and the cathode of the negative electrode side diode may be connected to the charging negative electrode wiring on the side closer to the second midpoint side intermediate diode than the inductor.
- the negative electrode of the charging port is connected to the low potential input wiring via the diode on the negative electrode side, so that the first capacitor can be charged appropriately.
- the positive electrode of the charging port is connected to the high potential input wiring via the diode on the positive electrode side, so that the second capacitor can be appropriately charged.
- the first output side intermediate switching element, the second midpoint side intermediate switching element, and the second output side intermediate switching element are turned off. You may. Further, in the second operation, the first midpoint side intermediate switching element, the first output side intermediate switching element, and the second output side intermediate switching element may be turned off.
- the first upper arm switching element, the first lower arm switching element, the second upper arm switching element, and the second lower arm The switching element may be turned off.
- the first upper arm switching element, the first lower arm switching element, the second upper arm switching element, and the second lower arm switching element may be turned off.
- the control circuit may repeat the first operation, the second operation, and the pause operation.
- the first midpoint side intermediate switching element, the first output side intermediate switching element, the second midpoint side intermediate switching element, and the second output side intermediate switching element may be turned off. ..
- the current flowing through the inductor during the hibernation operation (that is, the current for charging the first capacitor and the second capacitor) can be reduced. Therefore, a voltage lower than the supply voltage of the external charger can be applied to the first capacitor and the second capacitor. As a result, the voltage applied to the battery can be controlled to be lower than twice the supply voltage of the external charger.
- the control circuit in the boost control, may repeat the first operation, the second operation, and the current increasing operation.
- the first midpoint side intermediate switching element and the second midpoint side intermediate switching element may be turned on.
- a current flows from the positive electrode of the charging port to the negative electrode of the charging port via the first midpoint side intermediate switching element and the second midpoint side intermediate switching element. This current passes through the inductor.
- the current flowing through the inductor in this way increases the current flowing through the inductor.
- the second output side intermediate switching element may be turned on in the first operation.
- the first output side intermediate switching element may be turned on.
- the negative electrode of the charging port is connected to the low potential input wiring via the second output side intermediate switching element, so that the first capacitor can be charged.
- the positive electrode of the charging port is connected to the positive electrode of the battery via the first output side intermediate switching element, so that the second capacitor can be charged.
- the control circuit in the boost control, may repeat the first operation, the second operation, and the current increasing operation.
- the first midpoint side intermediate switching element and the second midpoint side intermediate switching element may be turned on.
- a current flows from the positive electrode of the charging port to the negative electrode of the charging port via the first midpoint side intermediate switching element and the second midpoint side intermediate switching element. This current passes through the inductor.
- the current flowing through the inductor in this way increases the current flowing through the inductor.
- the example multi-level inverter disclosed in the present specification may further have a switch connected to the specific charging wiring in series with the inductor.
- the multi-level inverter or external charger may be provided with an input capacitor that connects the positive and negative electrodes of the charging port.
- an inverter operation that is, an operation of outputting AC power to the output wiring
- the first switching circuit and the second switching circuit are connected to the input capacitor
- a part of the current is transferred to the input capacitor. It flows and the waveform of AC power collapses.
- the AC power waveform can be prevented from collapsing by keeping the switch off during the operation of the inverter.
- the semiconductor switching is such that the switch is in the forward direction with respect to the semiconductor switching element interposed in the specific charging wiring and the current flowing through the specific charging wiring.
- a diode may be provided in series with the element in the specific charging wiring.
- the switch can be miniaturized.
- An example multi-level inverter disclosed herein further includes an input capacitor that connects the non-specific charging wiring to the inductor and the specific charging wiring on the side closer to the DC charging port than the switch. May be good.
- the AC power waveform can be prevented from collapsing by turning off the switch while the inverter is operating.
- the example multi-level inverter disclosed herein may further have a relay that turns the charging negative electrode wiring on and off.
- the charging port can be electrically separated from each switching circuit when the charging port is not in use.
- the specific charging wiring may be the charging positive electrode wiring.
- the multi-level inverter may further have a charging diode in which the anode is connected to the charging positive electrode wiring between the inductor and the relay and the cathode is connected to the positive electrode of the battery.
- two levels of voltage can be received at the charging port as the supply voltage.
- the battery When a low voltage is supplied as the supply voltage, the battery can be charged by boost control. Further, when a high voltage is supplied as the supply voltage, the high voltage can be applied to the positive electrode of the battery via the charging diode. This allows the battery to be charged.
- the specific charging wiring may be the charging negative electrode wiring.
- the multi-level inverter may further have a charging diode in which the cathode is connected to the charging negative electrode wiring between the inductor and the relay and the anode is connected to the negative electrode of the battery.
- two levels of voltage can be received at the charging port as the supply voltage.
- the battery When a low voltage is supplied as the supply voltage, the battery can be charged by boost control. Further, when a high voltage is supplied as the supply voltage, the high voltage can be applied to the negative electrode of the battery via the charging diode. This allows the battery to be charged.
- FIG. 1 shows a circuit diagram of the multi-level inverter 10a of the first embodiment.
- the multi-level inverter 10a is mounted on the vehicle. Further, the vehicle is equipped with a traveling motor 60.
- the traveling motor 60 is a three-phase motor.
- the multi-level inverter 10a includes a battery 18.
- the multi-level inverter 10a converts the DC power output by the battery 18 into three-phase AC power, and supplies the three-phase AC power to the traveling motor 60. As a result, the traveling motor 60 is driven and the vehicle travels.
- the multi-level inverter 10a has an inverter circuit 30 and a charging circuit 70.
- the inverter circuit 30 converts the DC power applied by the battery 18 into three-phase AC power.
- the charging circuit 70 charges the battery 18.
- the inverter circuit 30 has a high potential input wiring 12, a midpoint wiring 14, a low potential input wiring 16, a first capacitor 31, and a second capacitor 32.
- the high potential input wiring 12 is connected to the positive electrode of the battery 18.
- the low potential input wiring 16 is connected to the negative electrode of the battery 18.
- the output voltage Vb (that is, DC voltage) of the battery 18 is applied between the high-potential input wiring 12 and the low-potential input wiring 16.
- the potential VH of the high-potential input wiring 12 is higher than the potential VL of the low-potential input wiring 16.
- the first capacitor 31 is connected between the midpoint wiring 14 and the low potential input wiring 16.
- the second capacitor 32 is connected between the high potential input wiring 12 and the midpoint wiring 14.
- the potential VM of the midpoint wiring 14 is higher than the potential VL of the low potential input wiring 16 and lower than the potential VH of the high potential input wiring 12.
- the voltage VHL between the high potential input wiring 12 and the low potential input wiring 16 (that is, the difference between the potential VH and the potential VL) is the output of the battery 18.
- the potential VM of the midpoint wiring 14 is about 1/2 of the potential VH.
- a voltage higher than the output voltage Vb of the battery 18 is applied as the voltage VHL.
- the inverter circuit 30 has three output wirings 50u, 50v, and 50w.
- the output wirings 50u, 50v, 50w are connected to the traveling motor 60.
- the inverter circuit 30 includes a U-phase switching circuit 41, a V-phase switching circuit 42, and a W-phase switching circuit 43.
- the U-phase switching circuit 41 is connected to the high-potential input wiring 12, the low-potential input wiring 16, the midpoint wiring 14, and the output wiring 50u.
- the V-phase switching circuit 42 is connected to the high-potential input wiring 12, the low-potential input wiring 16, the midpoint wiring 14, and the output wiring 50v.
- the W-phase switching circuit 43 is connected to the high-potential input wiring 12, the low-potential input wiring 16, the midpoint wiring 14, and the output wiring 50w.
- the U-phase switching circuit 41 has switching elements 41US, 41MMS, 41OMS, and 41LS.
- the switching elements 41US, 41MMS, 41OMS, and 41LS are composed of MOSFETs (metal oxide semiconductor field effect transistors).
- the U-phase switching circuit 41 has diodes 41UD, 41MMD, 41OMD, and 41LD.
- the cathode of the diode 41UD is connected to the high potential input wiring 12.
- the anode of the diode 41UD is connected to the output wiring 50u.
- the switching element 41US is connected in parallel with the diode 41UD.
- the drain of the switching element 41US is connected to the high potential input wiring 12.
- the source of the switching element 41US is connected to the output wiring 50u.
- the cathode of the diode 41LD is connected to the output wiring 50u.
- the anode of the diode 41LD is connected to the low potential input wiring 16.
- the switching element 41LS is connected in parallel to the diode 41LD.
- the drain of the switching element 41LS is connected to the output wiring 50u.
- the source of the switching element 41LS is connected to the low potential input wiring 16.
- the anode of the diode 41MMD is connected to the midpoint wiring 14.
- the cathode of the diode 41MMD is connected to the cathode of the diode 41OMD.
- the anode of the diode 41OMD is connected to the output wiring 50u.
- the switching element 41MMS is connected in parallel to the diode 41MMD.
- the source of the switching element 41MMS is connected to the anode of the diode 41MMD.
- the drain of the switching element 41MMS is connected to the cathode of the diode 41MMD.
- the switching element 41OMS is connected in parallel to the diode 41OMD.
- the drain of the switching element 41OMS is connected to the cathode of the diode 41OMD.
- the source of the switching element 41OMS is connected to the anode of the diode 41OMD.
- the gates of the switching elements 41US, 41MMS, 41OMS, and 41LS are connected to the control circuit 90. Therefore, the switching elements 41US, 41MMS, 41OMS, and 41LS are controlled by the control circuit 90.
- the switching element 41US When the switching element 41US is turned on, the high potential input wiring 12 is electrically connected to the output wiring 50u, and the potential VH of the high potential input wiring 12 is applied to the output wiring 50u.
- the switching element 41MMS and the switching element 41OMS are turned on, the midpoint wiring 14 is electrically connected to the output wiring 50u, and the potential VM of the midpoint wiring 14 is applied to the output wiring 50u.
- the switching element 41LS When the switching element 41LS is turned on, the low potential input wiring 16 is electrically connected to the output wiring 50u, and the potential VL of the low potential input wiring 16 is applied to the output wiring 50u. In this way, the U-phase switching circuit 41 changes the potential of the output wiring 50u between the potential VH, the potential VM, and the potential VL.
- the V-phase switching circuit 42 has switching elements 42US, 42MMS, 42OMS, and 42LS.
- the switching elements 42US, 42MMS, 42OMS, and 42LS are composed of MOSFETs.
- the V-phase switching circuit 42 has diodes 42UD, 42MMD, 42OMD, and 42LD.
- the cathode of the diode 42UD is connected to the high potential input wiring 12.
- the anode of the diode 42UD is connected to the output wiring 50v.
- the switching element 42US is connected in parallel to the diode 42UD.
- the drain of the switching element 42US is connected to the high potential input wiring 12.
- the source of the switching element 42US is connected to the output wiring 50v.
- the cathode of the diode 42LD is connected to the output wiring 50v.
- the anode of the diode 42LD is connected to the low potential input wiring 16.
- the switching element 42LS is connected in parallel to the diode 42LD.
- the drain of the switching element 42LS is connected to the output wiring 50v.
- the source of the switching element 42LS is connected to the low potential input wiring 16.
- the cathode of the diode 42MMD is connected to the midpoint wiring 14.
- the anode of the diode 42MMD is connected to the anode of the diode 42OMD.
- the cathode of the diode 42OMD is connected to the output wiring 50v.
- the switching element 42MMS is connected in parallel to the diode 42MMD.
- the source of the switching element 42MMS is connected to the anode of the diode 42MMD.
- the drain of the switching element 42MMS is connected to the cathode of the diode 42MMD.
- the switching element 42OMS is connected in parallel to the diode 42OMD.
- the drain of the switching element 42OMS is connected to the cathode of the diode 42OMD.
- the source of the switching element 42OMS is connected to the anode of the diode 42OMD.
- the gates of the switching elements 42US, 42MMS, 42OMS, and 42LS are connected to the control circuit 90. Therefore, the switching elements 42US, 42MMS, 42OMS, and 42LS are controlled by the control circuit 90.
- the switching element 42US When the switching element 42US is turned on, the high potential input wiring 12 is electrically connected to the output wiring 50v, and the potential VH of the high potential input wiring 12 is applied to the output wiring 50v.
- the switching element 42MMS and the switching element 42OMS are turned on, the midpoint wiring 14 is electrically connected to the output wiring 50v, and the potential VM of the midpoint wiring 14 is applied to the output wiring 50v.
- the V-phase switching circuit 42 changes the potential of the output wiring 50v between the potential VH, the potential VM, and the potential VL.
- the W-phase switching circuit 43 has switching elements 43US, 43MMS, 43OMS, and 43LS.
- the switching elements 43US, 43MMS, 43OMS, and 43LS are composed of MOSFETs.
- the W-phase switching circuit 43 has diodes 43UD, 43MMD, 43OMD, and 43LD.
- the cathode of the diode 43UD is connected to the high potential input wiring 12.
- the anode of the diode 43UD is connected to the output wiring 50w.
- the switching element 43US is connected in parallel to the diode 43UD.
- the drain of the switching element 43US is connected to the high potential input wiring 12.
- the source of the switching element 43US is connected to the output wiring 50w.
- the cathode of the diode 43LD is connected to the output wiring 50w.
- the anode of the diode 43LD is connected to the low potential input wiring 16.
- the switching element 43LS is connected in parallel to the diode 43LD.
- the drain of the switching element 43LS is connected to the output wiring 50w.
- the source of the switching element 43LS is connected to the low potential input wiring 16.
- the cathode of the diode 43MMD is connected to the midpoint wiring 14.
- the anode of the diode 43MMD is connected to the anode of the diode 43OMD.
- the cathode of the diode 43OMD is connected to the output wiring 50w.
- the switching element 43MMS is connected in parallel to the diode 43MMD.
- the source of the switching element 43MMS is connected to the anode of the diode 43MMD.
- the drain of the switching element 43MMS is connected to the cathode of the diode 43MMD.
- the switching element 43OMS is connected in parallel to the diode 43OMD.
- the drain of the switching element 43OMS is connected to the cathode of the diode 43OMD.
- the source of the switching element 43OMS is connected to the anode of the diode 43OMD.
- the gates of the switching elements 43US, 43MMS, 43OMS, and 43LS are connected to the control circuit 90. Therefore, the switching elements 43US, 43MMS, 43OMS, and 43LS are controlled by the control circuit 90.
- the switching element 43US When the switching element 43US is turned on, the high potential input wiring 12 is electrically connected to the output wiring 50w, and the potential VH of the high potential input wiring 12 is applied to the output wiring 50w.
- the switching element 43MMS and the switching element 43OMS are turned on, the midpoint wiring 14 is electrically connected to the output wiring 50w, and the potential VM of the midpoint wiring 14 is applied to the output wiring 50w.
- the switching element 43LS is turned on, the low potential input wiring 16 is electrically connected to the output wiring 50w. Therefore, the potential VL of the low potential input wiring 16 is applied to the output wiring 50w. In this way, the W-phase switching circuit 43 changes the potential of the output wiring 50w between the potential VH, the potential VM, and the potential VL.
- the diode 41UD is 41LD, 41MMD, 41OMD, 42UD, 42LD, 42MMD, 42OMD, 43UD, 43LD, 43MMD, 43OMD are parasiticly formed inside the body diode (that is, MOSFET) of the MOSFET connected in parallel. It may be a diode).
- switching elements 41US, 41MMS, 41OMS, 41LS, 42US, 42MMS, 42OMS, 42LS, 43US, 43MMS, 43OMS, and 43LS are composed of elements other than MOSFETs (for example, IGBT (insulated gate bipolar transistor)). good.
- MOSFET insulated gate bipolar transistor
- the emitter of the IGBT can be connected to the anode of the diode connected in parallel, and the collector of the IGBT can be connected to the cathode of the diode connected in parallel.
- the U-phase switching circuit 41, the V-phase switching circuit 42, and the W-phase switching circuit 43 change the potentials of the output wirings 50u, 50v, and 50w between the potential VL, the potential VM, and the potential VL.
- three-phase AC power is generated between the output wirings 50u, 50v, and 50w, and the three-phase AC power is supplied to the traveling motor 60.
- the charging circuit 70 includes a charging positive electrode wiring 22, a charging negative electrode wiring 24, a charging port 72, a relay module 74, an input capacitor 76, an inductor 77, an input switching element 78, and an input diode 79.
- An external charger 92 is connected to the charging port 72.
- the charging port 72 has a positive electrode 72a and a negative electrode 72b.
- a voltage Vs (hereinafter referred to as a supply voltage Vs) is applied between the positive electrode 72a and the negative electrode 72b so that the positive electrode 72a has a higher potential than the negative electrode 72b by the charger 92. Will be done.
- a low-voltage charger 92a and a high-voltage charger 92b can be connected to the charging port 72.
- the low voltage charger 92a supplies a low voltage VsL (for example, 400V) as a supply voltage Vs.
- the high voltage charger 92b supplies a high voltage VsH (for example, 800V) as a supply voltage Vs.
- VsH for example, 800V
- the low voltage VsL is lower than the output voltage Vb of the battery 18, and the high voltage VsH is higher than the output voltage Vb of the battery 18.
- One end of the charging positive electrode wiring 22 is connected to the positive electrode 72a of the charging port 72.
- the other end of the charging positive electrode wiring 22 is connected to the cathode of the diode 41MMD, the cathode of the diode 41OMD, the drain of the switching element 41MMS, and the drain of the switching element 41OMS.
- One end of the charging negative electrode wiring 24 is connected to the negative electrode 72b of the charging port 72.
- the other end of the charging negative electrode wiring 24 is connected to the anode of the diode 42MMD, the anode of the diode 42OMD, the source of the switching element 42MMS, and the source of the switching element 42OMS.
- the input capacitor 76 is connected between the charging positive electrode wiring 22 and the charging negative electrode wiring 24.
- the input capacitor 76 smoothes the voltage applied between the charging positive electrode wiring 22 and the charging negative electrode wiring 24.
- the relay module 74 is arranged between the input capacitor 76 and the charging port 72.
- the relay module 74 has a relay 74a and a relay 74b.
- the relay 74a is interposed in the charging positive electrode wiring 22 on the side closer to the charging port 72 than the input capacitor 76.
- the relay 74b is interposed in the charging negative electrode wiring 24 on the side closer to the charging port 72 than the input capacitor 76.
- the inductor 77 is interposed in the charging positive electrode wiring 22 on the side closer to the inverter circuit 30 than the input capacitor 76.
- the input switching element 78 is interposed in the charging positive electrode wiring 22 on the side closer to the inverter circuit 30 than the inductor 77.
- the input switching element 78 is an IGBT.
- the collector of the input switching element 78 is connected to the inductor 77.
- the input switching element 78 is controlled by the control circuit 90.
- the input diode 79 is interposed in the charging positive electrode wiring 22 on the side closer to the inverter circuit 30 than the input switching element 78.
- the anode of the input diode 79 is connected to the emitter of the input switching element 78.
- the cathode of the input diode 79 is connected to the cathode of the diode 41MMD.
- the multi-level inverter 10a further has a positive electrode side diode 82 and a negative electrode side diode 84.
- the anode of the positive electrode side diode 82 is connected to the charging positive electrode wiring 22 between the inductor 77 and the input switching element 78.
- the cathode of the positive electrode side diode 82 is connected to the high potential input wiring 12.
- the anode of the negative electrode side diode 84 is connected to the low potential input wiring 16.
- the cathode of the negative electrode side diode 84 is connected to the charging negative electrode wiring 24.
- the multi-level inverter 10a can carry out charge control.
- the charge control is performed when the inverter operation is not performed.
- the relays 74a and 74b are off, and the input switching element 78 is off.
- the control circuit 90 detects the supply voltage Vs by a voltmeter (not shown).
- the control circuit 90 executes low voltage charge control when the supply voltage Vs is low voltage VsL, and executes high voltage charge control when the supply voltage Vs is high voltage VsH.
- the control circuit 90 When the control circuit 90 detects that the supply voltage Vs is the low voltage VsL, the control circuit 90 controls the relays 74a and 74b to turn on, and controls the input switching element 78 to turn on. As a result, the supply voltage Vs (that is, low voltage VsL) is applied between the charging positive electrode wiring 22 and the charging negative electrode wiring 24.
- the control circuit 90 keeps the switching elements 41US, 41OMS, 41LS, 42US, 42OMS, 42LS, 43US, 43MMS, 43OMS, 43LS in the off state. Further, as shown in FIG. 2, the control circuit 90 alternately turns on the switching element 41 MMS and the switching element 42 MMS. More specifically, the control circuit 90 includes an on-period Ton1 in which the switching element 41MMS is on and the switching element 42MMS is off, an off-period Toff1 in which both the switching elements 41MMS and 42MMS are off, and the switching element 42MMS.
- the switching elements 41MMS and 42MMS are controlled so that the on-period Ton2 in which the switching element 41MMS is on and the switching element 41MMS is off and the off-period Toff2 in which both the switching elements 41MMS and 42MMS are off repeat in this order.
- the on period Ton1 when the switching element 41MMS is turned on, a current flows as shown by the arrow 100 in FIG. That is, the current flows from the positive electrode 72a to the negative electrode 72b via the inductor 77, the input switching element 78, the input diode 79, the switching element 41MMS, the first capacitor 31, and the negative electrode side diode 84.
- the current flowing in this way charges the first capacitor 31.
- the current IL indicates the current flowing through the inductor 77.
- the induced electromotive force of the inductor 77 is generated in the direction opposite to the direction in which the current IL flows (that is, the arrow 100).
- the induced electromotive force gradually decreases over time. Therefore, as shown in FIG. 2, the current IL gradually increases during the on-period Ton1.
- both the switching element 41MMS and the switching element 42MMS are off, so a current flows as shown by the arrow 102 in FIG. That is, in the off period Toff1, the induced electromotive force of the inductor 77 is generated in the same direction as the direction in which the current IL flows (that is, the arrow 102). Therefore, the potential of the anode of the positive electrode side diode 82 becomes higher than the potential of the cathode of the positive electrode side diode 82 (that is, the potential of the high potential input wiring 12).
- a current flows from the positive electrode 72a to the negative electrode 72b via the inductor 77, the positive electrode side diode 82, the battery 18, and the negative electrode side diode 84.
- the induced electromotive force of the inductor 77 decreases with the passage of time. Therefore, as shown in FIG. 2, the current IL decreases during the off period Toff1.
- the switching element 42MMS when the switching element 42MMS is turned on, a current flows as shown by the arrow 104 in FIG. That is, the current flows from the positive electrode 72a to the negative electrode 72b via the inductor 77, the positive electrode side diode 82, the second capacitor 32, and the switching element 42MMS.
- the second capacitor 32 is charged by the current flowing in this way.
- the induced electromotive force of the inductor 77 is generated in the direction opposite to the direction in which the current IL flows (that is, the arrow 104).
- the induced electromotive force gradually decreases over time. Therefore, as shown in FIG. 2, the current IL gradually increases during the on-period Ton2.
- both the switching element 41MMS and the switching element 42MMS are off, so that a current flows as shown by the arrow 102 in FIG. 3 as in the off period Toff1. Therefore, as shown in FIG. 2, the current IL decreases during the off period Toff2.
- the first capacitor 31 and the second capacitor 32 are alternately charged by alternately repeating the on-period Ton1 and the on-period Ton2.
- the voltage VHL between the high-potential input wiring 12 and the low-potential input wiring 16 is the sum of the voltage VC1 between both ends of the first capacitor 31 and the voltage VC2 between both ends of the second capacitor 32.
- the voltage VHL between the high potential input wiring 12 and the low potential input wiring 16 rises to twice the value of the low voltage VsL.
- the voltage VHL between the high potential input wiring 12 and the low potential input wiring 16 can be raised to a voltage higher than the low voltage VsL supplied by the charger 92. Therefore, even if the low voltage VsL is lower than the output voltage Vb of the battery 18, the voltage VHL can be raised to a voltage higher than the output voltage Vb of the battery 18. Therefore, the battery 18 can be charged.
- the low voltage VsL can be boosted by using the inverter circuit 30, and the battery 18 can be charged by the boosted voltage.
- the battery 18 can be charged using the low voltage VsL without providing a dedicated boost converter circuit. Therefore, the multi-level inverter 10a can be miniaturized.
- the current IL increases in the on period Ton1 and Ton2, and decreases in the off period Toff1 and Toff2.
- the magnitude of the current IL can be controlled.
- the voltage VC1 of the first capacitor 31 and the voltage VC2 of the second capacitor 32 can be controlled.
- the voltage VC1 of the first capacitor 31 can be raised to a low voltage VsL, and the voltage of the second capacitor 32 can be increased.
- the VC2 can be raised to a low voltage VsL. Further, if the ratio of the off periods Toff1 and Toff2 is increased as compared with FIG. 2, the current IL becomes smaller, and the voltages VC1 and VC2 can be controlled to smaller values.
- the voltage VC1 can be controlled to be 0.8 times the low voltage VsL
- the voltage VC2 can be controlled to be 0.8 times the low voltage VsL.
- the voltage VHL is 1.6 times the low voltage VsL. Even in this case, a voltage higher than the low voltage VsL can be applied as the voltage VHL, and the battery 18 can be charged.
- Example 1 either or both of the off periods Toff1 and Toff2 may not exist. In this case, the current IL tends to be high.
- the control circuit 90 keeps the switching elements 41OMS, 42MMS, 42OMS, 43MMS, and 43OMS off during the on periods Ton1 and Ton2 of the low voltage charge control. Therefore, it is possible to prevent the potential of the charging positive electrode wiring 22 and the potential of the charging negative electrode wiring 24 from being applied to the output wirings 50u, 50v, and 50w. Further, during the on periods Ton1 and Ton2 of the low voltage charge control, the control circuit 90 keeps the switching elements 41US, 41LS, 42US, 42LS, 43US, and 43LS off.
- the switching element 41MMS is turned off when the on period Ton1 is switched to the off period Toff1.
- the switching element 42MMS is turned off.
- a high surge voltage is applied to the switching elements 41MMS and 42MMS by the induced electromotive force of the inductor 77 when the switching elements 41MMS and 42MMS are turned off, a high load is applied to the switching elements 41MMS and 42MMS.
- the positive electrode side diode 82 and the negative electrode side diode 84 form a bypass path that bypasses the switching elements 41 MMS and 42 MMS.
- the surge voltage applied to the switching elements 41MMS and 42MMS is suppressed. That is, when the switching elements 41MMS and 42MMS are turned off, the positive electrode side diode 82 and the negative electrode side diode 84 are turned on during the off periods Toff1 and Toff2 as described above. As a result, as shown by the arrow 102 in FIG. 3, the current flows around the switching elements 41 MMS and 42 MMS. Therefore, the surge voltage applied to the switching elements 41MMS and 42MMS is suppressed. Further, during the low voltage charge control, at least one of the switching element 41MMS, the switching element 42MMS, and the input switching element 78 may be momentarily interrupted due to some abnormality.
- the surge voltage generated in the charger 92 may be applied between the positive electrode 72a and the negative electrode 72b.
- a high load is applied to the switching element.
- the inductor 77 suppresses an increase in the current IL. As a result, the inrush current is suppressed. Therefore, the inrush current is suppressed from flowing through the switching element in the multi-level inverter 10a.
- the control circuit 90 When the control circuit 90 detects that the supply voltage Vs is the high voltage VsH, the control circuit 90 executes the high voltage charge control. In the high voltage charge control, the control circuit 90 controls the relays 74a and 74b to be on and the input switching element 78 to be off. Further, the control circuit 90 controls off the switching elements 41US, 41LS, 41MMS, 41OMS, 42US, 42LS, 42MMS, 42OMS, 43US, 43LS, 43MMS, 43OMS. When each part is controlled in this way, the high voltage VsH is higher than the output voltage Vb of the battery 18, so that a current flows as shown by the arrow 102 in FIG.
- a current flows from the positive electrode 72a to the negative electrode 72b via the inductor 77, the positive electrode side diode 82, the battery 18, and the negative electrode side diode 84.
- the current always flows as shown by the arrow 102.
- the battery 18 is charged.
- the multi-level inverter 10a can select and execute low-voltage charge control and high-voltage charge control. According to this configuration, the supply of the low voltage VsL and the supply of the high voltage VsH can be received by the common charging port 72. Since it is not necessary to separately provide a charging port for the low voltage VsL and the high voltage VsH, the multi-level inverter 10a can be miniaturized. Further, if the relay module 74 is turned off, the charging port 72 can be cut off from both the high-voltage charging circuit and the low-voltage charging circuit. Since it is not necessary to separately provide relay modules for the high-voltage charging circuit and the low-voltage charging circuit, the multi-level inverter 10a can be miniaturized.
- the multi-level inverter 10a supplies three-phase AC power to the traveling motor 60 by the inverter operation.
- a current flows between the U-phase switching circuit 41 and the V-phase switching circuit 42 via the input capacitor 76 in the inverter operation as shown by the arrow 106 in FIG.
- the waveform of the alternating current flowing in the output wirings 50u, 50v, and 50w is disrupted, and the drive efficiency of the traveling motor 60 is lowered.
- the input switching element 78 and the input diode 79 are interposed in the charging positive electrode wiring 22 between the input capacitor 76 and the U-phase switching circuit 41.
- the control circuit 90 keeps the input switching element 78 off during the operation of the inverter. Therefore, the current as shown by the arrow 106 in FIG. 5 does not flow during the operation of the inverter. Therefore, in the multi-level inverter 10a, it is possible to prevent the waveform of the alternating current flowing through the output wirings 50u, 50v, and 50w from collapsing.
- the charging circuit 70 has the input capacitor 76 in the first embodiment, the charging circuit 70 does not have to have the input capacitor 76 as shown in FIG. Even in this case, when the charger 92 has an input capacitor 94 connected between the positive electrode 72a and the negative electrode 72b as shown in FIG. 6, a current flows through the input capacitor 94 during the inverter operation. , The AC current waveform may be corrupted. When there is such a possibility, by keeping the input switching element 78 off during the operation of the inverter, it is possible to prevent the waveform of the alternating current from collapsing.
- the inductor 77 is interposed in the charging positive electrode wiring 22, but the inductor 77 may be interposed in the charging negative electrode wiring 24.
- the low voltage charge control can be executed in substantially the same manner as in the first embodiment described above by utilizing the induced electromotive force of the inductor 77.
- the inductor 77 can be interposed in the charging negative electrode wiring 24.
- the inductor 77 is interposed in the charging negative electrode wiring 24 on the side closer to the inverter circuit 30 than the input capacitor 76.
- the cathode of the negative electrode side diode 84 is connected to the charging negative electrode wiring 24 on the side closer to the inverter circuit 30 than the inductor 77.
- the input switching element 78 and the input diode 79 are interposed in the charging positive electrode wiring 22, but these may be interposed in the charging negative electrode wiring 24. Even in this configuration, by keeping the input switching element 78 off during the operation of the inverter, it is possible to prevent the waveform of the alternating current from collapsing.
- the input switching element 78 and the input diode 79 are installed along the direction in which the current of the charging negative electrode wiring 24 flows. For example, as shown in FIG. 7, when the inductor 77 is interposed in the charging negative electrode wiring 24, the input switching element 78 and the input diode 79 may also be interposed in the charging negative electrode wiring 24. In FIG. 7, the input switching element 78 and the input diode 79 are interposed in the charging negative electrode wiring 24 on the side closer to the inverter circuit 30 than the connection point between the charging negative electrode wiring 24 and the negative electrode side diode 84.
- the control method of the switching elements 41MMS and 42MMS in the low voltage charge control is different from that of the first embodiment.
- Other configurations of the multi-level inverter of the second embodiment are the same as those of the first embodiment.
- the control circuit 90 keeps the switching elements 41US, 41OMS, 41LS, 42US, 42OMS, 42LS, 43US, 43MMS, 43OMS, 43LS in the off state. Further, as shown in FIG. 8, the control circuit 90 alternately turns on the switching element 41 MMS and the switching element 42 MMS. More specifically, the control circuit 90 has an on-period Ton1 in which the switching element 41MMS is on and the switching element 42MMS is off, a current increase period Tac1 in which the switching elements 41MMS and 42MMS are both on, and a switching element 42MMS.
- the switching elements 41MMS and 42MMS are controlled so that the on-period Ton2 in which the switching element 41MMS is on and the switching element 41MMS is off and the current increase period Tac2 in which both the switching elements 41MMS and 42MMS are on repeat in this order. ..
- the current increase period Tac2 when both the switching elements 41MMS and 42MMS are turned on, a current flows as shown by the arrow 110 in FIG. That is, it flows from the positive electrode 72a to the negative electrode 72b via the inductor 77, the input switching element 78, the input diode 79, the switching element 41 MMS, and the switching element 42 MMS. In this way, the current does not pass through the load other than the inductor 77. Therefore, in the current increase period Tac2, the induced electromotive force of the inductor 77 is generated in the direction opposite to the direction in which the current IL flows. Further, in the current increase period Tac2, the induced electromotive force of the inductor 77 decreases with the passage of time. Therefore, as shown in FIG. 8, the current IL increases during the current increase period Tac2.
- the switching element 42MMS turns off when the current increase period Tac2 is switched to the on period Ton1. Therefore, in the on period Ton1, the switching element 41MMS is on and the switching element 42MMS is off. Therefore, as shown by the arrow 100 in FIG. 1, a current flows and the first capacitor 31 is charged. In the on period Ton1, an induced electromotive force is generated in the inductor 77 in the same direction as the current IL flows. Therefore, a voltage obtained by adding the induced electromotive force of the inductor 77 to the low voltage VsL is applied to the first capacitor 31. Therefore, in the on period Ton1, the first capacitor 31 can be charged so that the voltage VC1 of the first capacitor 31 becomes a voltage higher than the low voltage VsL. During the on-period Ton1, the induced electromotive force gradually decreases over time. Therefore, as shown in FIG. 8, the current IL gradually decreases during the on-period Ton1.
- the switching element 41MMS turns off when the current increase period Tac1 is switched to the on period Ton2. Therefore, in the on period Ton2, the switching element 42MMS is on and the switching element 41MMS is off. Therefore, as shown by the arrow 104 in FIG. 4, a current flows and the second capacitor 32 is charged.
- an induced electromotive force is generated in the inductor 77 in the same direction as the current IL flows. Therefore, a voltage obtained by adding the induced electromotive force of the inductor 77 to the low voltage VsL is applied to the second capacitor 32. Therefore, in the on-period Ton2, the second capacitor 32 can be charged so that the voltage VC2 of the second capacitor 32 becomes a voltage higher than the low voltage VsL.
- the induced electromotive force gradually decreases over time. Therefore, as shown in FIG. 8, the current IL gradually decreases during the on-period Ton2.
- the first capacitor 31 is charged so that the voltage VC1 becomes higher than the low voltage VsL in the on period Ton1, and the voltage VC2 becomes the low voltage VsL in the on period Ton2.
- the second capacitor 32 is charged so that the voltage becomes higher than that. Therefore, the voltage VHL between the high-potential input wiring 12 and the low-potential input wiring 16 rises to a voltage higher than twice the low voltage VsL. Therefore, the battery 18 can be charged efficiently.
- the battery 18 can be charged by using the low voltage VsL without providing a dedicated boost converter circuit.
- the current IL decreases in the on period Ton1 and Ton2, and increases in the current increase period Tac1 and Tac2. Therefore, the magnitude of the current IL can be controlled by controlling the ratio of the on period Ton1 and Ton2 and the current increase period Tac1 and Tac2. By controlling the magnitude of the current IL in this way, the voltage VC1 of the first capacitor 31 and the voltage VC2 of the second capacitor 32 can be controlled to the intended voltage.
- the multi-level inverter 10b of Example 3 shown in FIG. 10 does not have a positive electrode side diode 82 and a negative electrode side diode 84.
- Other configurations of the multi-level inverter 10b of the third embodiment are the same as those of the first embodiment. Further, the multi-level inverter 10b of the third embodiment executes low voltage charge control and does not execute high voltage charge control. In the third embodiment, the control method of each switching element in the low voltage charge control is different from that of the first embodiment.
- the control circuit 90 keeps the input switching element 78 on.
- the control circuit 90 also keeps the switching elements 43MMS and 43OMS off.
- the control circuit 90 controls the switching elements 41MMS, 42OMS, 42MMS, and 41OMS as shown in FIG. More specifically, the control circuit 90 controls the switching elements 41MMS, 42OMS, 42MMS, and 41OMS so that the on-period Ton1, the current increase period Tac1, the on-period Ton2, and the current increase period Tac2 repeat in this order. In the on period Ton1, the switching elements 41MMS and 42OMS are on and the switching elements 42MMS and 41OMS are off.
- the current increase period Tac2 when all of the switching elements 41MMS, 42OMS, 42MMS, and 41OMS are turned on, a current flows as shown by the arrow 120 in FIG. That is, a current flows from the positive electrode 72a to the negative electrode 72b via the inductor 77, the input switching element 78, the input diode 79, the switching element 41 MMS, and the switching element 42 MMS. In this way, the current does not pass through the load other than the inductor 77. Therefore, in the current increase period Tac2, the induced electromotive force of the inductor 77 is generated in the direction opposite to the direction in which the current IL flows. Further, in the current increase period Tac2, the induced electromotive force of the inductor 77 decreases with the passage of time. Therefore, as shown in FIG. 11, the current IL increases during the current increase period Tac2.
- the on period Ton1 an induced electromotive force is generated in the inductor 77 in the same direction as the current IL flows. Therefore, a voltage obtained by adding the induced electromotive force of the inductor 77 to the low voltage VsL is applied to the first capacitor 31. Therefore, in the on period Ton1, the first capacitor 31 can be charged so that the voltage VC1 of the first capacitor 31 becomes a voltage higher than the low voltage VsL.
- the induced electromotive force gradually decreases over time. Therefore, as shown in FIG. 11, the current IL gradually decreases during the on-period Ton1.
- the switching elements 41MMS and 42OMS are turned off. Therefore, in the on period Ton2, the switching elements 42MMS and 41OMS are on, and the switching elements 41MMS and 42OMS are off. Therefore, a current flows as shown by arrow 124 in FIG. That is, a current flows from the positive electrode 72a to the negative electrode 72b via the inductor 77, the input switching element 78, the input diode 79, the switching element 41OMS, the diode 41UD, the second capacitor 32, and the switching element 42MMS. The flow of the current in this way charges the second capacitor 32.
- the on-period Ton2 an induced electromotive force is generated in the inductor 77 in the same direction as the current IL flows. Therefore, a voltage obtained by adding the induced electromotive force of the inductor 77 to the low voltage VsL is applied to the second capacitor 32. Therefore, in the on-period Ton2, the second capacitor 32 can be charged so that the voltage VC2 of the second capacitor 32 becomes a voltage higher than the low voltage VsL.
- the induced electromotive force gradually decreases over time. Therefore, as shown in FIG. 11, the current IL gradually decreases during the on-period Ton2.
- the first capacitor 31 is charged so that the voltage VC1 becomes higher than the low voltage VsL in the on period Ton1, and the voltage VC2 becomes the low voltage VsL in the on period Ton2.
- the second capacitor 32 is charged so that the voltage becomes higher than that. Therefore, the voltage VHL between the high-potential input wiring 12 and the low-potential input wiring 16 rises to a voltage higher than twice the low voltage VsL. Therefore, the battery 18 can be charged efficiently.
- the battery 18 can be charged by using the low voltage VsL without providing a dedicated boost converter circuit.
- the current IL decreases in the on period Ton1 and Ton2, and increases in the current increase period Tac1 and Tac2. Therefore, the magnitude of the current IL can be controlled by controlling the ratio of the on period Ton1 and Ton2 and the current increase period Tac1 and Tac2. By controlling the magnitude of the current IL in this way, the voltage VC1 of the first capacitor 31 and the voltage VC2 of the second capacitor 32 can be controlled to the intended voltage.
- the switching element 42LS is turned on during a part of the on period Ton1.
- the current flowing through the diode 42LD branches into the diode 42LD and the switching element 42LS and flows.
- the dead time DT1 that is, the switching elements 42LS and 42MMS are both off
- the period when the switching element 42LS is turned on and the period when the switching element 42MMS is turned on that is, the current increase periods Tac1 and Tac2). Period
- the dead time DT1 prevents both the switching elements 42LS and 42MMS from being turned on and short-circuiting the midpoint wiring 14 and the low potential input wiring 16.
- the switching elements 41LS and 43LS may be controlled in the same manner as the switching element 42LS, or the switching elements 41LS and 43LS may be kept off. Even if the switching elements 41LS and 43LS are turned on as in the switching element 42LS, no current flows through the switching elements 41LS and 43LS, so that the low voltage charge control is not affected. Further, if the diode 42LD does not cause such a high loss, the switching element 42LS may be kept off in the low voltage charge control of the third embodiment.
- the switching element 41US is turned on during a part of the on period Ton2.
- the current flowing through the diode 41UD branches into the diode 41UD and the switching element 41US and flows.
- the dead time DT2 that is, the switching elements 41US and 41MMS are both off
- the period when the switching element 41US is turned on and the period when the switching element 41MMS is turned on that is, the current increasing periods Tac1 and Tac2). Period
- the dead time DT2 prevents both the switching elements 41US and 41MMS from being turned on and short-circuiting the midpoint wiring 14 and the high potential input wiring 12.
- the switching elements 42US and 43US may be controlled in the same manner as the switching element 41US, or the switching elements 42US and 43US may be kept off. Even if the switching elements 42US and 43US are turned on as in the switching element 41US, no current flows through the switching elements 42US and 43US, so that the low voltage charge control is not affected. Further, if the diode 41UD does not cause such a high loss, the switching element 41US may be kept off in the low voltage charge control of the third embodiment.
- the inductor 77 suppresses the inrush current from flowing to the switching element in the multi-level inverter 10b. Further, also in the third embodiment, the input switching element 78 is kept off during the operation of the inverter, and the waveform of the alternating current flowing through the output wirings 50u, 50v, and 50w is prevented from collapsing. Further, also in the third embodiment, as shown in FIG. 6, the charging circuit 70 does not have to have the input capacitor 76. Further, also in the third embodiment, as shown in FIG. 7, the inductor 77 may be interposed in the charging negative electrode wiring 24. Further, also in the third embodiment, as shown in FIG. 7, the input switching element 78 and the input diode 79 may be interposed in the charging negative electrode wiring 24.
- the off periods Toff1 and Toff2 in which all of the switching elements 41MMS, 42OMS, 42MMS, and 41OMS are turned off may be provided instead of the current increase periods Tac1 and Tac2.
- a bypass path for passing a current from the positive electrode 72a to the negative electrode 72b is provided by bypassing the switching elements 41MMS, 42OMS, 42MMS, and 41OMS during the off periods Toff1 and Toff2
- the current is applied to the switching elements 41MMS, 42OMS, 42MMS, and 41OMS.
- the surge voltage can be suppressed.
- the multi-level inverters of the modified examples 1 to 3 obtained by modifying the multi-level inverter 10b of the third embodiment will be described.
- the multi-level inverters of the first to third modifications are the ones obtained by modifying the multi-level inverter 10b of the third embodiment so that the high voltage charge control can be performed.
- the multi-level inverter 10c of the first modification shown in FIG. 14 has a charging diode 86.
- Other configurations of the multi-level inverter 10c of the first modification are the same as those of the multi-level inverter 10b of the third embodiment.
- the anode of the charging diode 86 is connected to the charging positive electrode wiring 22 at a position between the inductor 77 and the relay 74a.
- the cathode of the charging diode 86 is connected to the high potential input wiring 12.
- the control circuit 90 controls the relays 74a and 74b on, the input switching element 78 off, and the switching element 42OMS on when a high voltage VsH is applied as the supply voltage Vs. Further, the control circuit 90 controls the switching elements 41US, 41LS, 41MMS, 41OMS, 42US, 42LS, 42MMS, 43US, 43LS, 43MMS, and 43OMS off. The control circuit 90 maintains this control state during high voltage charge control. When each part is controlled in this way, the high voltage VsH is higher than the output voltage Vb of the battery 18, so that a current flows as shown by the arrow 130 in FIG. That is, a current flows from the positive electrode 72a to the negative electrode 72b via the charging diode 86, the battery 18, the diode 42LD, and the switching element 42OMS. The battery 18 is charged by the current flowing in this way.
- the multi-level inverter 10d of the second modification shown in FIG. 15 an inductor 77, an input switching element 78, and an input diode 79 are interposed in the charging negative electrode wiring 24 as in FIG. 7. Further, the multi-level inverter 10d of the second modification has a charging diode 88. The cathode of the charging diode 88 is connected to the charging negative electrode wiring 24 at a position between the inductor 77 and the relay 74b. The anode of the charging diode 88 is connected to the low potential input wiring 16.
- Other configurations of the multi-level inverter 10d of the fifth embodiment are the same as those of the multi-level inverter 10b of the third embodiment.
- the control circuit 90 controls the relays 74a and 74b on, the input switching element 78 off, and the switching element 41OMS on when a high voltage VsH is applied as the supply voltage Vs. Further, the control circuit 90 controls the switching elements 41US, 41LS, 41MMS, 42US, 42LS, 42MMS, 42OMS, 43US, 43LS, 43MMS, and 43OMS off. The control circuit 90 maintains this control state during high voltage charge control. When each part is controlled in this way, the high voltage VsH is higher than the output voltage Vb of the battery 18, so that a current flows as shown by the arrow 132 in FIG. That is, a current flows from the positive electrode 72a to the negative electrode 72b via the switching element 41OMS, the diode 41UD, the battery 18, and the charging diode 88. The battery 18 is charged by the current flowing in this way.
- the multi-level inverter 10e of the modification 3 shown in FIG. 16 has charging diodes 86 and 88.
- Other configurations of the multi-level inverter 10e of the third modification are the same as those of the multi-level inverter 10b of the third embodiment.
- the anode of the charging diode 86 is connected to the charging positive electrode wiring 22 at a position between the inductor 77 and the relay 74a.
- the cathode of the charging diode 86 is connected to the high potential input wiring 12.
- the cathode of the charging diode 88 is connected to the charging negative electrode wiring 24 at a position between the relay 74b and the V-phase switching circuit 42.
- the anode of the charging diode 88 is connected to the low potential input wiring 16.
- the control circuit 90 controls the relays 74a and 74b to be turned on and the input switching element 78 to be turned off when a high voltage VsH is applied as the supply voltage Vs. Further, the control circuit 90 controls off the switching elements 41US, 41LS, 41MMS, 41OMS, 42US, 42LS, 42MMS, 42OMS, 43US, 43LS, 43MMS, 43OMS. The control circuit 90 maintains this control state during high voltage charge control. When each part is controlled in this way, the high voltage VsH is higher than the output voltage Vb of the battery 18, so that a current flows as shown by the arrow 134 in FIG. That is, a current flows from the positive electrode 72a to the negative electrode 72b via the charging diode 86, the battery 18, and the charging diode 88. The battery 18 is charged by the current flowing in this way.
- the control circuit 90 When a low voltage VsL is applied as the supply voltage Vs, the control circuit 90 performs charge control in the same manner as in the fourth embodiment. Therefore, the battery 18 can be charged.
- the control circuit 90 controls the relays 74a and 74b to be turned on and the input switching element 78 to be turned off when a high voltage VsH is applied as the supply voltage Vs. Further, the control circuit 90 controls off the switching elements 41US, 41LS, 41MMS, 41OMS, 42US, 42LS, 42MMS, 42OMS, 43US, 43LS, 43MMS, 43OMS.
- the high voltage VsH is higher than the output voltage Vb of the battery 18, so that a current flows as shown by the arrow 134 in FIG. That is, a current flows from the positive electrode 72a to the negative electrode 72b via the charging diode 86, the battery 18, and the charging diode 88.
- the battery 18 is charged by the current flowing in this way.
- the multi-level inverters 10c to 10e of the modified examples 1 to 3 high voltage charge control can be executed. Further, according to the multi-level inverters 10c to 10e of the modifications 1 to 3, low voltage charge control can be executed as in the multi-level inverter 10b of the third embodiment.
- the low voltage VsL and the high voltage VsH can be supplied by the common charging port 72, so that the multi-level inverter 10c can be miniaturized. Further, according to the configurations of the modified examples 1 to 3, the charging port 72 can be cut off from both the high-voltage charging circuit and the low-voltage charging circuit by one relay module 74. Therefore, the multi-level inverter 10a can be miniaturized.
- At least one of the charging diodes 86 and 88 described in the modified examples 1 to 3 may be provided in the multi-level inverter of the first or second embodiment. Even in this case, charging with a high voltage can be performed via at least one of the charging diodes 86 and 88.
- a contact type switch such as a relay may be provided instead of the input switching element 78 and the input diode 79. Even with this configuration, it is possible to prevent the waveform of the alternating current from collapsing by turning off the contact switch when the inverter is operating.
- the output wiring 50u is an example of the first output wiring.
- the output wiring 50v is an example of the second output wiring.
- the output wiring 50w is an example of the third output wiring.
- the U-phase switching circuit 41 is an example of the first switching circuit.
- the V-phase switching circuit 42 is an example of a second switching circuit.
- the W-phase switching circuit 43 is an example of a third switching circuit.
- the switching element 41US is an example of the first upper arm switching element.
- the switching element 41LS is an example of the first lower arm switching element.
- the diode 41MMD is an example of a first midpoint side intermediate diode.
- the diode 41OMD is an example of the first output side intermediate diode.
- the switching element 41MMS is an example of the first midpoint side intermediate switching element.
- the switching element 41OMS is an example of the first output side intermediate switching element.
- the switching element 42US is an example of the second upper arm switching element.
- the switching element 42LS is an example of a second lower arm switching element.
- the diode 42MMD is an example of a second midpoint side intermediate diode.
- the diode 42OMD is an example of a second output side intermediate diode.
- the switching element 42MMS is an example of a second midpoint side intermediate switching element.
- the switching element 42OMS is an example of the second output side intermediate switching element.
- Low voltage charge control is an example of boost control.
- the operation of the multi-level inverter in the on-period Ton1 is an example of the first operation.
- the operation of the multi-level inverter in the on-period Ton2 is an example of the second operation.
- the operation of the multi-level inverter during the off periods Toff1 and Toff2 is an example of a hibernation operation.
- the operation of the multi-level inverter in the current increase periods Tac1 and Tac2 is an example of the current increase operation.
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Abstract
This multi-level inverter includes a battery, a first capacitor connected between a midpoint wire and a low potential input wire, a second capacitor connected between a high potential input wire and the midpoint wire, a charging circuit, and a control circuit. The charging circuit includes a direct current charging port, a charging positive electrode wire connecting the positive electrode of the direct current charging port and a cathode of a first midpoint-side intermediate diode, and a charging negative electrode wire connecting the negative electrode of the direct current charging port and an anode of a second midpoint-side intermediate diode. When a charger is connected to the direct current charging port, the control circuit executes boost control by repeatedly alternating a first operation of turning a first midpoint-side intermediate switching element on to charge the first capacitor by means of electric power from the charger, and a second operation of turning a second midpoint-side intermediate switching element on to charge the second capacitor by means of electric power from the charger.
Description
(関連出願の相互参照)
本出願は、2021年1月14日に出願された日本特許出願特願2021-004091の関連出願であり、この日本特許出願に基づく優先権を主張するものであり、この日本特許出願に記載された全ての内容を、本明細書を構成するものとして援用する。 (Cross-reference of related applications)
This application is a related application of Japanese Patent Application Japanese Patent Application No. 2021-004091 filed on January 14, 2021, and claims priority based on this Japanese patent application, and is described in this Japanese patent application. All the contents are incorporated herein by reference.
本出願は、2021年1月14日に出願された日本特許出願特願2021-004091の関連出願であり、この日本特許出願に基づく優先権を主張するものであり、この日本特許出願に記載された全ての内容を、本明細書を構成するものとして援用する。 (Cross-reference of related applications)
This application is a related application of Japanese Patent Application Japanese Patent Application No. 2021-004091 filed on January 14, 2021, and claims priority based on this Japanese patent application, and is described in this Japanese patent application. All the contents are incorporated herein by reference.
本明細書に開示の技術は、マルチレベルインバータに関する。
The techniques disclosed herein relate to multi-level inverters.
日本特許公開2011-109801号公報に、マルチレベルインバータが開示されている。マルチレベルインバータは、バッテリから入力される直流電力を、交流電力に変換する。マルチレベルインバータは、各出力配線の電圧をマルチレベルに制御することができる。マルチレベルインバータによれば、出力電流をより正確に制御することができる。
A multi-level inverter is disclosed in Japanese Patent Publication No. 2011-109801. The multi-level inverter converts the DC power input from the battery into AC power. The multi-level inverter can control the voltage of each output wiring in multiple levels. According to the multi-level inverter, the output current can be controlled more accurately.
外部の充電器によってバッテリに電圧を印加して、バッテリを充電する場合がある。このとき、充電器の供給電圧がバッテリの出力電圧よりも低いと、充電器の供給電圧を昇圧し、昇圧した電圧をバッテリに印加する必要がある。このような場合、従来は、マルチレベルインバータ内に昇圧コンバータ回路を設け、昇圧コンバータ回路によって充電器の供給電圧を昇圧していた。この構成では、マルチレベルインバータ全体が大型化するという問題があった。本明細書では、充電器の供給電圧をマルチレベルインバータの内部のインバータ回路を利用して昇圧する技術を提案する。
The battery may be charged by applying a voltage to the battery with an external charger. At this time, if the supply voltage of the charger is lower than the output voltage of the battery, it is necessary to boost the supply voltage of the charger and apply the boosted voltage to the battery. In such a case, conventionally, a boost converter circuit is provided in the multi-level inverter, and the supply voltage of the charger is boosted by the boost converter circuit. In this configuration, there is a problem that the entire multi-level inverter becomes large. This specification proposes a technique for boosting the supply voltage of a charger by using an inverter circuit inside a multi-level inverter.
本明細書が開示するマルチレベルインバータは、バッテリと、前記バッテリの正極に接続された高電位入力配線と、前記バッテリの負極に接続された低電位入力配線と、中点配線と、前記中点配線と前記低電位入力配線の間に接続された第1コンデンサと、前記高電位入力配線と前記中点配線の間に接続された第2コンデンサと、第1出力配線と、第2出力配線と、第3出力配線と、第1スイッチング回路と、第2スイッチング回路と、第3スイッチング回路と、充電回路と、制御回路を有する。前記第1スイッチング回路は、前記高電位入力配線、前記中点配線、前記低電位入力配線、及び、前記第1出力配線に接続されている。前記第2スイッチング回路は、前記高電位入力配線、前記中点配線、前記低電位入力配線、及び、前記第2出力配線に接続されている。前記第3スイッチング回路は、前記高電位入力配線、前記中点配線、前記低電位入力配線、及び、前記第3出力配線に接続されている。前記第1スイッチング回路が、前記高電位入力配線と前記第1出力配線の間に接続された第1上アームスイッチング素子と、前記第1出力配線と前記低電位入力配線の間に接続された第1下アームスイッチング素子と、アノードが前記中点配線に接続されている第1中点側中間ダイオードと、カソードが前記第1中点側中間ダイオードのカソードに接続されているとともにアノードが前記第1出力配線に接続されている第1出力側中間ダイオードと、前記第1中点側中間ダイオードに対して並列に接続されている第1中点側中間スイッチング素子と、前記第1出力側中間ダイオードに対して並列に接続されている第1出力側中間スイッチング素子、を有する。前記第2スイッチング回路が、前記高電位入力配線と前記第2出力配線の間に接続された第2上アームスイッチング素子と、前記第2出力配線と前記低電位入力配線の間に接続された第2下アームスイッチング素子と、カソードが前記中点配線に接続されている第2中点側中間ダイオードと、アノードが前記第2中点側中間ダイオードのアノードに接続されているとともにカソードが前記第2出力配線に接続されている第2出力側中間ダイオードと、前記第2中点側中間ダイオードに対して並列に接続されている第2中点側中間スイッチング素子と、前記第2出力側中間ダイオードに対して並列に接続されている第2出力側中間スイッチング素子、を有する。前記充電回路が、直流充電ポートと、前記直流充電ポートの正極と前記第1中点側中間ダイオードのカソードとを接続する充電正極配線と、前記直流充電ポートの負極と前記第2中点側中間ダイオードの前記アノードとを接続する充電負極配線、を有する。前記制御回路が、前記直流充電ポートに充電器が接続されたときに、前記第1中点側中間スイッチング素子をオンして前記充電器の電力によって前記第1コンデンサを充電する第1動作と、前記第2中点側中間スイッチング素子をオンして前記充電器の電力によって前記第2コンデンサを充電する第2動作とを交互に繰り返す昇圧制御を実行する。
The multi-level inverter disclosed in the present specification includes a battery, a high potential input wiring connected to the positive side of the battery, a low potential input wiring connected to the negative side of the battery, a midpoint wiring, and the midpoint. The first capacitor connected between the wiring and the low potential input wiring, the second capacitor connected between the high potential input wiring and the midpoint wiring, the first output wiring, and the second output wiring. It has a third output wiring, a first switching circuit, a second switching circuit, a third switching circuit, a charging circuit, and a control circuit. The first switching circuit is connected to the high potential input wiring, the midpoint wiring, the low potential input wiring, and the first output wiring. The second switching circuit is connected to the high potential input wiring, the midpoint wiring, the low potential input wiring, and the second output wiring. The third switching circuit is connected to the high potential input wiring, the midpoint wiring, the low potential input wiring, and the third output wiring. The first switching circuit is connected between the first upper arm switching element connected between the high potential input wiring and the first output wiring, and the first output wiring and the low potential input wiring. 1 The lower arm switching element, the first midpoint side intermediate diode whose anode is connected to the midpoint wiring, the cathode is connected to the cathode of the first midpoint side intermediate diode, and the anode is the first. To the first output side intermediate diode connected to the output wiring, the first middle point side intermediate switching element connected in parallel with the first middle point side intermediate diode, and the first output side intermediate diode. On the other hand, it has a first output side intermediate switching element, which is connected in parallel. The second switching circuit is connected to a second upper arm switching element connected between the high potential input wiring and the second output wiring, and a second upper arm switching element connected between the second output wiring and the low potential input wiring. 2 The lower arm switching element, the second midpoint side intermediate diode whose cathode is connected to the midpoint wiring, the anode is connected to the anode of the second midpoint side intermediate diode, and the cathode is the second. To the second output side intermediate diode connected to the output wiring, the second middle point side intermediate switching element connected in parallel with the second middle point side intermediate diode, and the second output side intermediate diode. On the other hand, it has a second output side intermediate switching element, which is connected in parallel. The charging circuit connects the DC charging port, the positive electrode of the DC charging port, and the cathode of the first midpoint side intermediate diode, and the negative electrode of the DC charging port and the middle of the second midpoint side. It has a charging negative electrode wiring, which connects the diode to the anode. When the charger is connected to the DC charging port, the control circuit turns on the first midpoint side intermediate switching element and charges the first capacitor with the electric power of the charger. The boost control is executed by turning on the second middle point side intermediate switching element and alternately repeating the second operation of charging the second capacitor by the electric power of the charger.
このマルチレベルインバータでは、第1スイッチング回路、第2スイッチング回路、第3スイッチング回路等によって直流電力を交流電力に変換するインバータ回路が構成されている。第1動作では、第1中点側中間スイッチング素子がオンすることで、直流充電ポートの正極が中点配線に接続される。したがって、第1動作において、直流充電ポートの負極を低電位入力配線に接続することで、第1コンデンサを充電することができる。第2動作では、第2中点側中間スイッチング素子がオンすることで、直流充電ポートの負極が中点配線に接続される。したがって、直流充電ポートの正極を高電位入力配線に接続することで、第2コンデンサを充電することができる。このように、第1動作では第1コンデンサが充電され、第2動作では第2コンデンサが充電される。制御回路は、昇圧制御において、第1動作と第2動作を交互に繰り返す。このため、第1コンデンサと第2コンデンサが充電される。第1コンデンサが充電されると、中点配線の低電位入力配線に対する電位が充電器の供給電圧に近い電位まで上昇する。第2コンデンサが充電されると、高電位入力配線の中点配線に対する電位が充電器の供給電圧に近い電位まで上昇する。したがって、高電位入力配線の低電位入力配線に対する電位は、充電器の供給電圧よりも高い電位まで上昇する。したがって、バッテリに、充電器の供給電圧よりも高い電圧が印加され、バッテリが充電される。このように、このマルチレベルインバータでは、インバータ回路を利用して、充電器の供給電圧をそれよりも高い電圧に昇圧し、昇圧した電圧をバッテリに印加することができる。したがって、専用の昇圧コンバータ回路を設けることなく、バッテリを充電することができる。
In this multi-level inverter, an inverter circuit that converts DC power into AC power is configured by a first switching circuit, a second switching circuit, a third switching circuit, and the like. In the first operation, the positive electrode of the DC charging port is connected to the midpoint wiring by turning on the first midpoint side intermediate switching element. Therefore, in the first operation, the first capacitor can be charged by connecting the negative electrode of the DC charging port to the low potential input wiring. In the second operation, the negative electrode of the DC charging port is connected to the midpoint wiring by turning on the second midpoint side intermediate switching element. Therefore, the second capacitor can be charged by connecting the positive electrode of the DC charging port to the high potential input wiring. In this way, the first capacitor is charged in the first operation, and the second capacitor is charged in the second operation. The control circuit alternately repeats the first operation and the second operation in the boost control. Therefore, the first capacitor and the second capacitor are charged. When the first capacitor is charged, the potential of the midpoint wiring with respect to the low potential input wiring rises to a potential close to the supply voltage of the charger. When the second capacitor is charged, the potential of the high-potential input wiring with respect to the midpoint wiring rises to a potential close to the supply voltage of the charger. Therefore, the potential of the high-potential input wiring with respect to the low-potential input wiring rises to a potential higher than the supply voltage of the charger. Therefore, a voltage higher than the supply voltage of the charger is applied to the battery to charge the battery. As described above, in this multi-level inverter, the supply voltage of the charger can be boosted to a higher voltage by using the inverter circuit, and the boosted voltage can be applied to the battery. Therefore, the battery can be charged without providing a dedicated boost converter circuit.
本明細書が開示する一例のマルチレベルインバータでは、前記充電正極配線と前記充電負極配線のいずれか一方を特定充電配線とし、他方を非特定充電配線としたときに、前記特定充電配線に介装されたインダクタをさらに有していてもよい。
In the example multi-level inverter disclosed in the present specification, when either one of the charging positive wiring and the charging negative negative wiring is a specific charging wiring and the other is a non-specific charging wiring, the wiring is interposed in the specific charging wiring. It may further have the provided inductor.
この構成によれば、充電ポートから第1スイッチング回路及び第2スイッチング回路にサージが入力されることを防止できる。
According to this configuration, it is possible to prevent a surge from being input from the charging port to the first switching circuit and the second switching circuit.
本明細書が開示する一例のマルチレベルインバータでは、アノードが前記充電正極配線に接続されているとともにカソードが前記高電位入力配線に接続された正極側ダイオードと、アノードが前記低電位入力配線に接続されているとともにカソードが前記充電負極配線に接続された負極側ダイオード、をさらに有していてもよい。前記特定充電配線が前記充電正極配線であるとともに前記正極側ダイオードの前記アノードが前記インダクタよりも前記第1中点側中間ダイオードに近い側で前記充電正極配線に接続されていてもよい、または、前記特定充電配線が前記充電負極配線であるとともに前記負極側ダイオードのカソードが前記インダクタよりも前記第2中点側中間ダイオードに近い側で前記充電負極配線に接続されていてもよい。
In an example multi-level inverter disclosed herein, a positive electrode side diode in which the anode is connected to the charging positive electrode wiring and the cathode is connected to the high potential input wiring, and the anode is connected to the low potential input wiring. In addition, the cathode may further have a negative electrode side diode connected to the charging negative electrode wiring. The specific charging wiring may be the charging positive electrode wiring, and the anode of the positive electrode side diode may be connected to the charging positive electrode wiring on the side closer to the first midpoint side intermediate diode than the inductor. The specific charging wiring may be the charging negative electrode wiring, and the cathode of the negative electrode side diode may be connected to the charging negative electrode wiring on the side closer to the second midpoint side intermediate diode than the inductor.
この構成では、第1動作において、充電ポートの負極が負極側ダイオードを介して低電位入力配線に接続されるので、第1コンデンサを適切に充電することができる。また、この構成では、第2動作において、充電ポートの正極が正極側ダイオードを介して高電位入力配線に接続されるので、第2コンデンサを適切に充電することができる。
In this configuration, in the first operation, the negative electrode of the charging port is connected to the low potential input wiring via the diode on the negative electrode side, so that the first capacitor can be charged appropriately. Further, in this configuration, in the second operation, the positive electrode of the charging port is connected to the high potential input wiring via the diode on the positive electrode side, so that the second capacitor can be appropriately charged.
本明細書が開示する一例のマルチレベルインバータでは、前記第1動作では、前記第1出力側中間スイッチング素子、前記第2中点側中間スイッチング素子、及び、前記第2出力側中間スイッチング素子をオフしてもよい。また、前記第2動作では、前記第1中点側中間スイッチング素子、前記第1出力側中間スイッチング素子、及び、前記第2出力側中間スイッチング素子をオフしてもよい。
In the example multi-level inverter disclosed in the present specification, in the first operation, the first output side intermediate switching element, the second midpoint side intermediate switching element, and the second output side intermediate switching element are turned off. You may. Further, in the second operation, the first midpoint side intermediate switching element, the first output side intermediate switching element, and the second output side intermediate switching element may be turned off.
この構成によれば、外部の充電器から充電ポートに印加される供給電圧が第1出力配線と第2出力配線に印加されることを防止できる。これによって、各出力配線に接続された機器の誤動作を防止できる。
According to this configuration, it is possible to prevent the supply voltage applied from the external charger to the charging port from being applied to the first output wiring and the second output wiring. As a result, it is possible to prevent malfunction of the device connected to each output wiring.
本明細書が開示する一例のマルチレベルインバータでは、前記第1動作では、前記第1上アームスイッチング素子、前記第1下アームスイッチング素子、前記第2上アームスイッチング素子、及び、前記第2下アームスイッチング素子をオフしてもよい。前記第2動作では、前記第1上アームスイッチング素子、前記第1下アームスイッチング素子、前記第2上アームスイッチング素子、及び、前記第2下アームスイッチング素子をオフしてもよい。
In the example multi-level inverter disclosed in the present specification, in the first operation, the first upper arm switching element, the first lower arm switching element, the second upper arm switching element, and the second lower arm The switching element may be turned off. In the second operation, the first upper arm switching element, the first lower arm switching element, the second upper arm switching element, and the second lower arm switching element may be turned off.
この構成によれば、各出力配線に接続された機器の誤動作をより確実に防止できる。
According to this configuration, it is possible to more reliably prevent malfunction of the equipment connected to each output wiring.
本明細書が開示する一例のマルチレベルインバータでは、前記昇圧制御において、前記制御回路が、前記第1動作と、前記第2動作と、休止動作を繰り返してもよい。前記休止動作では、前記第1中点側中間スイッチング素子、前記第1出力側中間スイッチング素子、前記第2中点側中間スイッチング素子、及び、前記第2出力側中間スイッチング素子をオフしてもよい。
In the example of the multi-level inverter disclosed in the present specification, in the boost control, the control circuit may repeat the first operation, the second operation, and the pause operation. In the pause operation, the first midpoint side intermediate switching element, the first output side intermediate switching element, the second midpoint side intermediate switching element, and the second output side intermediate switching element may be turned off. ..
このように、休止動作を実行することで、休止動作中にインダクタに流れる電流(すなわち、第1コンデンサと第2コンデンサを充電する電流)を低下させることができる。したがって、第1コンデンサと第2コンデンサに、外部の充電器の供給電圧よりも低い電圧を印加できる。これによって、バッテリに印加する電圧を、外部の充電器の供給電圧の2倍よりも低い電圧に制御することができる。
By executing the hibernation operation in this way, the current flowing through the inductor during the hibernation operation (that is, the current for charging the first capacitor and the second capacitor) can be reduced. Therefore, a voltage lower than the supply voltage of the external charger can be applied to the first capacitor and the second capacitor. As a result, the voltage applied to the battery can be controlled to be lower than twice the supply voltage of the external charger.
本明細書が開示する一例のマルチレベルインバータでは、前記昇圧制御において、前記制御回路が、前記第1動作と、前記第2動作と、電流増加動作を繰り返してもよい。前記電流増加動作では、前記第1中点側中間スイッチング素子と前記第2中点側中間スイッチング素子をオンしてもよい。
In the example multi-level inverter disclosed in the present specification, in the boost control, the control circuit may repeat the first operation, the second operation, and the current increasing operation. In the current increasing operation, the first midpoint side intermediate switching element and the second midpoint side intermediate switching element may be turned on.
電流増加動作では、充電ポートの正極から第1中点側中間スイッチング素子と第2中点側中間スイッチング素子を介して充電ポートの負極へ電流が流れる。この電流は、インダクタを通過する。このようにインダクタに電流が流れることで、インダクタに流れる電流が増加する。その後、第1動作と第2動作を行うと、インダクタで生じる誘導起電力によって、第1コンデンサと第2コンデンサに、外部の充電器の供給電圧よりも高い電圧を印加できる。これによって、バッテリに印加する電圧を、外部の充電器の供給電圧の2倍よりも高い電圧に制御できる。
In the current increasing operation, a current flows from the positive electrode of the charging port to the negative electrode of the charging port via the first midpoint side intermediate switching element and the second midpoint side intermediate switching element. This current passes through the inductor. The current flowing through the inductor in this way increases the current flowing through the inductor. After that, when the first operation and the second operation are performed, a voltage higher than the supply voltage of the external charger can be applied to the first capacitor and the second capacitor by the induced electromotive force generated by the inductor. As a result, the voltage applied to the battery can be controlled to a voltage higher than twice the supply voltage of the external charger.
本明細書が開示する一例のマルチレベルインバータでは、前記第1動作では、前記第2出力側中間スイッチング素子をオンしてもよい。前記第2動作では、前記第1出力側中間スイッチング素子をオンしてもよい。
In the example multi-level inverter disclosed in the present specification, the second output side intermediate switching element may be turned on in the first operation. In the second operation, the first output side intermediate switching element may be turned on.
この構成では、第1動作において、充電ポートの負極が第2出力側中間スイッチング素子を介して低電位入力配線に接続されるので、第1コンデンサを充電することができる。また、この構成では、第2動作において、充電ポートの正極が第1出力側中間スイッチング素子を介してバッテリの正極に接続されるので、第2コンデンサを充電することができる。
In this configuration, in the first operation, the negative electrode of the charging port is connected to the low potential input wiring via the second output side intermediate switching element, so that the first capacitor can be charged. Further, in this configuration, in the second operation, the positive electrode of the charging port is connected to the positive electrode of the battery via the first output side intermediate switching element, so that the second capacitor can be charged.
本明細書が開示する一例のマルチレベルインバータでは、前記昇圧制御において、前記制御回路が、前記第1動作と、前記第2動作と、電流増加動作を繰り返してもよい。前記電流増加動作では、前記第1中点側中間スイッチング素子と前記第2中点側中間スイッチング素子をオンしてもよい。
In the example multi-level inverter disclosed in the present specification, in the boost control, the control circuit may repeat the first operation, the second operation, and the current increasing operation. In the current increasing operation, the first midpoint side intermediate switching element and the second midpoint side intermediate switching element may be turned on.
電流増加動作では、充電ポートの正極から第1中点側中間スイッチング素子と第2中点側中間スイッチング素子を介して充電ポートの負極へ電流が流れる。この電流は、インダクタを通過する。このようにインダクタに電流が流れることで、インダクタに流れる電流が増加する。その後、第1動作と第2動作を行うと、インダクタで生じる誘導起電力によって、第1コンデンサと第2コンデンサに、外部の充電器の供給電圧よりも高い電圧を印加できる。これによって、バッテリに印加する電圧を、外部の充電器の供給電圧の2倍よりも高い電圧に制御できる。
In the current increasing operation, a current flows from the positive electrode of the charging port to the negative electrode of the charging port via the first midpoint side intermediate switching element and the second midpoint side intermediate switching element. This current passes through the inductor. The current flowing through the inductor in this way increases the current flowing through the inductor. After that, when the first operation and the second operation are performed, a voltage higher than the supply voltage of the external charger can be applied to the first capacitor and the second capacitor by the induced electromotive force generated by the inductor. As a result, the voltage applied to the battery can be controlled to a voltage higher than twice the supply voltage of the external charger.
本明細書が開示する一例のマルチレベルインバータでは、前記インダクタに対して直列に前記特定充電配線に接続されたスイッチをさらに有していてもよい。
The example multi-level inverter disclosed in the present specification may further have a switch connected to the specific charging wiring in series with the inductor.
マルチレベルインバータや外部の充電器に、充電ポートの正極と負極を接続する入力コンデンサが設けられる場合がある。第1スイッチング回路及び第2スイッチング回路が入力コンデンサに接続されている状態でマルチレベルインバータがインバータ動作(すなわち、出力配線に交流電力を出力する動作)を実行すると、電流の一部が入力コンデンサに流れて交流電力の波形が崩れる。これに対し、上記のように特定充電配線にスイッチを設けると、インバータ動作中はスイッチをオフにしておくことで、交流電力の波形の崩れを防止できる。
The multi-level inverter or external charger may be provided with an input capacitor that connects the positive and negative electrodes of the charging port. When the multi-level inverter performs an inverter operation (that is, an operation of outputting AC power to the output wiring) while the first switching circuit and the second switching circuit are connected to the input capacitor, a part of the current is transferred to the input capacitor. It flows and the waveform of AC power collapses. On the other hand, if a switch is provided in the specific charging wiring as described above, the AC power waveform can be prevented from collapsing by keeping the switch off during the operation of the inverter.
本明細書が開示する一例のマルチレベルインバータでは、前記スイッチが、前記特定充電配線に介装された半導体スイッチング素子と、前記特定充電配線に流れる電流に対して順方向となるように前記半導体スイッチング素子に対して直列に前記特定充電配線に介装されたダイオード、を有していてもよい。
In the example multi-level inverter disclosed in the present specification, the semiconductor switching is such that the switch is in the forward direction with respect to the semiconductor switching element interposed in the specific charging wiring and the current flowing through the specific charging wiring. A diode may be provided in series with the element in the specific charging wiring.
この構成によれば、スイッチを小型化できる。
According to this configuration, the switch can be miniaturized.
本明細書が開示する一例のマルチレベルインバータでは、前記非特定充電配線と前記インダクタ及び前記スイッチよりも前記直流充電ポートに近い側の前記特定充電配線とを接続する入力コンデンサをさらに有していてもよい。
An example multi-level inverter disclosed herein further includes an input capacitor that connects the non-specific charging wiring to the inductor and the specific charging wiring on the side closer to the DC charging port than the switch. May be good.
この構成によれば、インバータ動作中はスイッチをオフにしておくことで、交流電力の波形の崩れを防止できる。
According to this configuration, the AC power waveform can be prevented from collapsing by turning off the switch while the inverter is operating.
本明細書が開示する一例のマルチレベルインバータでは、充電負極配線をオン-オフするリレーをさらに有していてもよい。
The example multi-level inverter disclosed herein may further have a relay that turns the charging negative electrode wiring on and off.
この構成によれば、充電ポートを使用していないときに、充電ポートを各スイッチング回路から電気的に分離することができる。
According to this configuration, the charging port can be electrically separated from each switching circuit when the charging port is not in use.
本明細書が開示する一例のマルチレベルインバータでは、前記特定充電配線が前記充電正極配線であってもよい。この場合、マルチレベルインバータは、アノードが前記インダクタと前記リレーの間で前記充電正極配線に接続されているとともにカソードが前記バッテリの正極に接続された充電ダイオードをさらに有していてもよい。
In the example multi-level inverter disclosed in the present specification, the specific charging wiring may be the charging positive electrode wiring. In this case, the multi-level inverter may further have a charging diode in which the anode is connected to the charging positive electrode wiring between the inductor and the relay and the cathode is connected to the positive electrode of the battery.
この構成によれば、供給電圧として2レベルの電圧を充電ポートで受けることができる。供給電圧として低電圧が供給された場合には、昇圧制御によってバッテリを充電できる。また、供給電圧として高電圧が供給された場合には、その高電圧を、充電ダイオードを介してバッテリの正極に印加することができる。これによって、バッテリを充電することができる。
According to this configuration, two levels of voltage can be received at the charging port as the supply voltage. When a low voltage is supplied as the supply voltage, the battery can be charged by boost control. Further, when a high voltage is supplied as the supply voltage, the high voltage can be applied to the positive electrode of the battery via the charging diode. This allows the battery to be charged.
本明細書が開示する一例のマルチレベルインバータでは、前記特定充電配線が前記充電負極配線であってもよい。この場合、マルチレベルインバータは、カソードが前記インダクタと前記リレーの間で前記充電負極配線に接続されているとともにアノードが前記バッテリの負極に接続された充電ダイオードをさらに有していてもよい。
In the example multi-level inverter disclosed in the present specification, the specific charging wiring may be the charging negative electrode wiring. In this case, the multi-level inverter may further have a charging diode in which the cathode is connected to the charging negative electrode wiring between the inductor and the relay and the anode is connected to the negative electrode of the battery.
この構成によれば、供給電圧として2レベルの電圧を充電ポートで受けることができる。供給電圧として低電圧が供給された場合には、昇圧制御によってバッテリを充電できる。また、供給電圧として高電圧が供給された場合には、その高電圧を、充電ダイオードを介してバッテリの負極に印加することができる。これによって、バッテリを充電することができる。
According to this configuration, two levels of voltage can be received at the charging port as the supply voltage. When a low voltage is supplied as the supply voltage, the battery can be charged by boost control. Further, when a high voltage is supplied as the supply voltage, the high voltage can be applied to the negative electrode of the battery via the charging diode. This allows the battery to be charged.
図1は、実施例1のマルチレベルインバータ10aの回路図を示している。マルチレベルインバータ10aは、車両に搭載されている。また、車両には、走行用モータ60が搭載されている。走行用モータ60は、三相モータである。マルチレベルインバータ10aは、バッテリ18を備えている。マルチレベルインバータ10aは、バッテリ18が出力する直流電力を三相交流電力に変換し、三相交流電力を走行用モータ60に供給する。これによって、走行用モータ60が駆動し、車両が走行する。
FIG. 1 shows a circuit diagram of the multi-level inverter 10a of the first embodiment. The multi-level inverter 10a is mounted on the vehicle. Further, the vehicle is equipped with a traveling motor 60. The traveling motor 60 is a three-phase motor. The multi-level inverter 10a includes a battery 18. The multi-level inverter 10a converts the DC power output by the battery 18 into three-phase AC power, and supplies the three-phase AC power to the traveling motor 60. As a result, the traveling motor 60 is driven and the vehicle travels.
マルチレベルインバータ10aは、インバータ回路30と充電回路70を有している。インバータ回路30は、バッテリ18が印加する直流電力を三相交流電力に変換する。充電回路70は、バッテリ18を充電する。
The multi-level inverter 10a has an inverter circuit 30 and a charging circuit 70. The inverter circuit 30 converts the DC power applied by the battery 18 into three-phase AC power. The charging circuit 70 charges the battery 18.
インバータ回路30は、高電位入力配線12、中点配線14、低電位入力配線16、第1コンデンサ31、及び、第2コンデンサ32を有している。高電位入力配線12は、バッテリ18の正極に接続されている。低電位入力配線16は、バッテリ18の負極に接続されている。高電位入力配線12と低電位入力配線16の間に、バッテリ18の出力電圧Vb(すなわち、直流電圧)が印加される。高電位入力配線12の電位VHは、低電位入力配線16の電位VLよりも高い。第1コンデンサ31は、中点配線14と低電位入力配線16の間に接続されている。第2コンデンサ32は、高電位入力配線12と中点配線14の間に接続されている。このため、中点配線14の電位VMは、低電位入力配線16の電位VLよりも高く、高電位入力配線12の電位VHよりも低い。走行用モータ60に三相交流電力を供給するインバータ動作においては、高電位入力配線12と低電位入力配線16の間の電圧VHL(すなわち、電位VHと電位VLの差)は、バッテリ18の出力電圧Vbと等しい。また、インバータ動作においては、中点配線14の電位VMは電位VHの約1/2である。バッテリ18を充電する充電動作においては、電圧VHLとしてバッテリ18の出力電圧Vbよりも高い電圧が印加される。
The inverter circuit 30 has a high potential input wiring 12, a midpoint wiring 14, a low potential input wiring 16, a first capacitor 31, and a second capacitor 32. The high potential input wiring 12 is connected to the positive electrode of the battery 18. The low potential input wiring 16 is connected to the negative electrode of the battery 18. The output voltage Vb (that is, DC voltage) of the battery 18 is applied between the high-potential input wiring 12 and the low-potential input wiring 16. The potential VH of the high-potential input wiring 12 is higher than the potential VL of the low-potential input wiring 16. The first capacitor 31 is connected between the midpoint wiring 14 and the low potential input wiring 16. The second capacitor 32 is connected between the high potential input wiring 12 and the midpoint wiring 14. Therefore, the potential VM of the midpoint wiring 14 is higher than the potential VL of the low potential input wiring 16 and lower than the potential VH of the high potential input wiring 12. In the inverter operation for supplying three-phase AC power to the traveling motor 60, the voltage VHL between the high potential input wiring 12 and the low potential input wiring 16 (that is, the difference between the potential VH and the potential VL) is the output of the battery 18. Equal to voltage Vb. Further, in the inverter operation, the potential VM of the midpoint wiring 14 is about 1/2 of the potential VH. In the charging operation for charging the battery 18, a voltage higher than the output voltage Vb of the battery 18 is applied as the voltage VHL.
インバータ回路30は、3つの出力配線50u、50v、50wを有している。出力配線50u、50v、50wは、走行用モータ60に接続されている。また、インバータ回路30は、U相スイッチング回路41、V相スイッチング回路42、及び、W相スイッチング回路43を有している。U相スイッチング回路41は、高電位入力配線12、低電位入力配線16、中点配線14、及び、出力配線50uに接続されている。V相スイッチング回路42は、高電位入力配線12、低電位入力配線16、中点配線14、及び、出力配線50vに接続されている。W相スイッチング回路43は、高電位入力配線12、低電位入力配線16、中点配線14、及び、出力配線50wに接続されている。
The inverter circuit 30 has three output wirings 50u, 50v, and 50w. The output wirings 50u, 50v, 50w are connected to the traveling motor 60. Further, the inverter circuit 30 includes a U-phase switching circuit 41, a V-phase switching circuit 42, and a W-phase switching circuit 43. The U-phase switching circuit 41 is connected to the high-potential input wiring 12, the low-potential input wiring 16, the midpoint wiring 14, and the output wiring 50u. The V-phase switching circuit 42 is connected to the high-potential input wiring 12, the low-potential input wiring 16, the midpoint wiring 14, and the output wiring 50v. The W-phase switching circuit 43 is connected to the high-potential input wiring 12, the low-potential input wiring 16, the midpoint wiring 14, and the output wiring 50w.
U相スイッチング回路41は、スイッチング素子41US、41MMS、41OMS、41LSを有している。スイッチング素子41US、41MMS、41OMS、41LSは、MOSFET(metal oxide semiconductor field effect transistor)により構成されている。さらに、U相スイッチング回路41は、ダイオード41UD、41MMD、41OMD、41LDを有している。ダイオード41UDのカソードは、高電位入力配線12に接続されている。ダイオード41UDのアノードは、出力配線50uに接続されている。スイッチング素子41USは、ダイオード41UDに対して並列に接続されている。スイッチング素子41USのドレインは、高電位入力配線12に接続されている。スイッチング素子41USのソースは、出力配線50uに接続されている。ダイオード41LDのカソードは、出力配線50uに接続されている。ダイオード41LDのアノードは、低電位入力配線16に接続されている。スイッチング素子41LSは、ダイオード41LDに対して並列に接続されている。スイッチング素子41LSのドレインは、出力配線50uに接続されている。スイッチング素子41LSのソースは、低電位入力配線16に接続されている。ダイオード41MMDのアノードは、中点配線14に接続されている。ダイオード41MMDのカソードは、ダイオード41OMDのカソードに接続されている。ダイオード41OMDのアノードは、出力配線50uに接続されている。スイッチング素子41MMSは、ダイオード41MMDに対して並列に接続されている。スイッチング素子41MMSのソースは、ダイオード41MMDのアノードに接続されている。スイッチング素子41MMSのドレインは、ダイオード41MMDのカソードに接続されている。スイッチング素子41OMSは、ダイオード41OMDに対して並列に接続されている。スイッチング素子41OMSのドレインは、ダイオード41OMDのカソードに接続されている。スイッチング素子41OMSのソースは、ダイオード41OMDのアノードに接続されている。
The U-phase switching circuit 41 has switching elements 41US, 41MMS, 41OMS, and 41LS. The switching elements 41US, 41MMS, 41OMS, and 41LS are composed of MOSFETs (metal oxide semiconductor field effect transistors). Further, the U-phase switching circuit 41 has diodes 41UD, 41MMD, 41OMD, and 41LD. The cathode of the diode 41UD is connected to the high potential input wiring 12. The anode of the diode 41UD is connected to the output wiring 50u. The switching element 41US is connected in parallel with the diode 41UD. The drain of the switching element 41US is connected to the high potential input wiring 12. The source of the switching element 41US is connected to the output wiring 50u. The cathode of the diode 41LD is connected to the output wiring 50u. The anode of the diode 41LD is connected to the low potential input wiring 16. The switching element 41LS is connected in parallel to the diode 41LD. The drain of the switching element 41LS is connected to the output wiring 50u. The source of the switching element 41LS is connected to the low potential input wiring 16. The anode of the diode 41MMD is connected to the midpoint wiring 14. The cathode of the diode 41MMD is connected to the cathode of the diode 41OMD. The anode of the diode 41OMD is connected to the output wiring 50u. The switching element 41MMS is connected in parallel to the diode 41MMD. The source of the switching element 41MMS is connected to the anode of the diode 41MMD. The drain of the switching element 41MMS is connected to the cathode of the diode 41MMD. The switching element 41OMS is connected in parallel to the diode 41OMD. The drain of the switching element 41OMS is connected to the cathode of the diode 41OMD. The source of the switching element 41OMS is connected to the anode of the diode 41OMD.
スイッチング素子41US、41MMS、41OMS、41LSのゲートは、制御回路90に接続されている。したがって、スイッチング素子41US、41MMS、41OMS、41LSは、制御回路90によって制御される。スイッチング素子41USがオンすると、高電位入力配線12が出力配線50uに電気的に接続され、出力配線50uに高電位入力配線12の電位VHが印加される。スイッチング素子41MMSとスイッチング素子41OMSがオンすると、中点配線14が出力配線50uに電気的に接続され、出力配線50uに中点配線14の電位VMが印加される。スイッチング素子41LSがオンすると、低電位入力配線16が出力配線50uに電気的に接続され、出力配線50uに低電位入力配線16の電位VLが印加される。このように、U相スイッチング回路41は、出力配線50uの電位を、電位VH、電位VM、及び、電位VLの間で変化させる。
The gates of the switching elements 41US, 41MMS, 41OMS, and 41LS are connected to the control circuit 90. Therefore, the switching elements 41US, 41MMS, 41OMS, and 41LS are controlled by the control circuit 90. When the switching element 41US is turned on, the high potential input wiring 12 is electrically connected to the output wiring 50u, and the potential VH of the high potential input wiring 12 is applied to the output wiring 50u. When the switching element 41MMS and the switching element 41OMS are turned on, the midpoint wiring 14 is electrically connected to the output wiring 50u, and the potential VM of the midpoint wiring 14 is applied to the output wiring 50u. When the switching element 41LS is turned on, the low potential input wiring 16 is electrically connected to the output wiring 50u, and the potential VL of the low potential input wiring 16 is applied to the output wiring 50u. In this way, the U-phase switching circuit 41 changes the potential of the output wiring 50u between the potential VH, the potential VM, and the potential VL.
V相スイッチング回路42は、スイッチング素子42US、42MMS、42OMS、42LSを有している。スイッチング素子42US、42MMS、42OMS、42LSは、MOSFETにより構成されている。さらに、V相スイッチング回路42は、ダイオード42UD、42MMD、42OMD、42LDを有している。ダイオード42UDのカソードは、高電位入力配線12に接続されている。ダイオード42UDのアノードは、出力配線50vに接続されている。スイッチング素子42USは、ダイオード42UDに対して並列に接続されている。スイッチング素子42USのドレインは、高電位入力配線12に接続されている。スイッチング素子42USのソースは、出力配線50vに接続されている。ダイオード42LDのカソードは、出力配線50vに接続されている。ダイオード42LDのアノードは、低電位入力配線16に接続されている。スイッチング素子42LSは、ダイオード42LDに対して並列に接続されている。スイッチング素子42LSのドレインは、出力配線50vに接続されている。スイッチング素子42LSのソースは、低電位入力配線16に接続されている。ダイオード42MMDのカソードは、中点配線14に接続されている。ダイオード42MMDのアノードは、ダイオード42OMDのアノードに接続されている。ダイオード42OMDのカソードは、出力配線50vに接続されている。スイッチング素子42MMSは、ダイオード42MMDに対して並列に接続されている。スイッチング素子42MMSのソースは、ダイオード42MMDのアノードに接続されている。スイッチング素子42MMSのドレインは、ダイオード42MMDのカソードに接続されている。スイッチング素子42OMSは、ダイオード42OMDに対して並列に接続されている。スイッチング素子42OMSのドレインは、ダイオード42OMDのカソードに接続されている。スイッチング素子42OMSのソースは、ダイオード42OMDのアノードに接続されている。
The V-phase switching circuit 42 has switching elements 42US, 42MMS, 42OMS, and 42LS. The switching elements 42US, 42MMS, 42OMS, and 42LS are composed of MOSFETs. Further, the V-phase switching circuit 42 has diodes 42UD, 42MMD, 42OMD, and 42LD. The cathode of the diode 42UD is connected to the high potential input wiring 12. The anode of the diode 42UD is connected to the output wiring 50v. The switching element 42US is connected in parallel to the diode 42UD. The drain of the switching element 42US is connected to the high potential input wiring 12. The source of the switching element 42US is connected to the output wiring 50v. The cathode of the diode 42LD is connected to the output wiring 50v. The anode of the diode 42LD is connected to the low potential input wiring 16. The switching element 42LS is connected in parallel to the diode 42LD. The drain of the switching element 42LS is connected to the output wiring 50v. The source of the switching element 42LS is connected to the low potential input wiring 16. The cathode of the diode 42MMD is connected to the midpoint wiring 14. The anode of the diode 42MMD is connected to the anode of the diode 42OMD. The cathode of the diode 42OMD is connected to the output wiring 50v. The switching element 42MMS is connected in parallel to the diode 42MMD. The source of the switching element 42MMS is connected to the anode of the diode 42MMD. The drain of the switching element 42MMS is connected to the cathode of the diode 42MMD. The switching element 42OMS is connected in parallel to the diode 42OMD. The drain of the switching element 42OMS is connected to the cathode of the diode 42OMD. The source of the switching element 42OMS is connected to the anode of the diode 42OMD.
スイッチング素子42US、42MMS、42OMS、42LSのゲートは、制御回路90に接続されている。したがって、スイッチング素子42US、42MMS、42OMS、42LSは、制御回路90によって制御される。スイッチング素子42USがオンすると、高電位入力配線12が出力配線50vに電気的に接続され、出力配線50vに高電位入力配線12の電位VHが印加される。スイッチング素子42MMSとスイッチング素子42OMSがオンすると、中点配線14が出力配線50vに電気的に接続され、出力配線50vに中点配線14の電位VMが印加される。スイッチング素子42LSがオンすると、低電位入力配線16が出力配線50vに電気的に接続され、出力配線50vに低電位入力配線16の電位VLが印加される。このように、V相スイッチング回路42は、出力配線50vの電位を、電位VH、電位VM、及び、電位VLの間で変化させる。
The gates of the switching elements 42US, 42MMS, 42OMS, and 42LS are connected to the control circuit 90. Therefore, the switching elements 42US, 42MMS, 42OMS, and 42LS are controlled by the control circuit 90. When the switching element 42US is turned on, the high potential input wiring 12 is electrically connected to the output wiring 50v, and the potential VH of the high potential input wiring 12 is applied to the output wiring 50v. When the switching element 42MMS and the switching element 42OMS are turned on, the midpoint wiring 14 is electrically connected to the output wiring 50v, and the potential VM of the midpoint wiring 14 is applied to the output wiring 50v. When the switching element 42LS is turned on, the low potential input wiring 16 is electrically connected to the output wiring 50v, and the potential VL of the low potential input wiring 16 is applied to the output wiring 50v. In this way, the V-phase switching circuit 42 changes the potential of the output wiring 50v between the potential VH, the potential VM, and the potential VL.
W相スイッチング回路43は、スイッチング素子43US、43MMS、43OMS、43LSを有している。スイッチング素子43US、43MMS、43OMS、43LSは、MOSFETにより構成されている。さらに、W相スイッチング回路43は、ダイオード43UD、43MMD、43OMD、43LDを有している。ダイオード43UDのカソードは、高電位入力配線12に接続されている。ダイオード43UDのアノードは、出力配線50wに接続されている。スイッチング素子43USは、ダイオード43UDに対して並列に接続されている。スイッチング素子43USのドレインは、高電位入力配線12に接続されている。スイッチング素子43USのソースは、出力配線50wに接続されている。ダイオード43LDのカソードは、出力配線50wに接続されている。ダイオード43LDのアノードは、低電位入力配線16に接続されている。スイッチング素子43LSは、ダイオード43LDに対して並列に接続されている。スイッチング素子43LSのドレインは、出力配線50wに接続されている。スイッチング素子43LSのソースは、低電位入力配線16に接続されている。ダイオード43MMDのカソードは、中点配線14に接続されている。ダイオード43MMDのアノードは、ダイオード43OMDのアノードに接続されている。ダイオード43OMDのカソードは、出力配線50wに接続されている。スイッチング素子43MMSは、ダイオード43MMDに対して並列に接続されている。スイッチング素子43MMSのソースは、ダイオード43MMDのアノードに接続されている。スイッチング素子43MMSのドレインは、ダイオード43MMDのカソードに接続されている。スイッチング素子43OMSは、ダイオード43OMDに対して並列に接続されている。スイッチング素子43OMSのドレインは、ダイオード43OMDのカソードに接続されている。スイッチング素子43OMSのソースは、ダイオード43OMDのアノードに接続されている。
The W-phase switching circuit 43 has switching elements 43US, 43MMS, 43OMS, and 43LS. The switching elements 43US, 43MMS, 43OMS, and 43LS are composed of MOSFETs. Further, the W-phase switching circuit 43 has diodes 43UD, 43MMD, 43OMD, and 43LD. The cathode of the diode 43UD is connected to the high potential input wiring 12. The anode of the diode 43UD is connected to the output wiring 50w. The switching element 43US is connected in parallel to the diode 43UD. The drain of the switching element 43US is connected to the high potential input wiring 12. The source of the switching element 43US is connected to the output wiring 50w. The cathode of the diode 43LD is connected to the output wiring 50w. The anode of the diode 43LD is connected to the low potential input wiring 16. The switching element 43LS is connected in parallel to the diode 43LD. The drain of the switching element 43LS is connected to the output wiring 50w. The source of the switching element 43LS is connected to the low potential input wiring 16. The cathode of the diode 43MMD is connected to the midpoint wiring 14. The anode of the diode 43MMD is connected to the anode of the diode 43OMD. The cathode of the diode 43OMD is connected to the output wiring 50w. The switching element 43MMS is connected in parallel to the diode 43MMD. The source of the switching element 43MMS is connected to the anode of the diode 43MMD. The drain of the switching element 43MMS is connected to the cathode of the diode 43MMD. The switching element 43OMS is connected in parallel to the diode 43OMD. The drain of the switching element 43OMS is connected to the cathode of the diode 43OMD. The source of the switching element 43OMS is connected to the anode of the diode 43OMD.
スイッチング素子43US、43MMS、43OMS、43LSのゲートは、制御回路90に接続されている。したがって、スイッチング素子43US、43MMS、43OMS、43LSは、制御回路90によって制御される。スイッチング素子43USがオンすると、高電位入力配線12が出力配線50wに電気的に接続され、出力配線50wに高電位入力配線12の電位VHが印加される。スイッチング素子43MMSとスイッチング素子43OMSがオンすると、中点配線14が出力配線50wに電気的に接続され、出力配線50wに中点配線14の電位VMが印加される。スイッチング素子43LSがオンすると、低電位入力配線16が出力配線50wに電気的に接続される。したがって、出力配線50wに低電位入力配線16の電位VLが印加される。このように、W相スイッチング回路43は、出力配線50wの電位を、電位VH、電位VM、及び、電位VLの間で変化させる。
The gates of the switching elements 43US, 43MMS, 43OMS, and 43LS are connected to the control circuit 90. Therefore, the switching elements 43US, 43MMS, 43OMS, and 43LS are controlled by the control circuit 90. When the switching element 43US is turned on, the high potential input wiring 12 is electrically connected to the output wiring 50w, and the potential VH of the high potential input wiring 12 is applied to the output wiring 50w. When the switching element 43MMS and the switching element 43OMS are turned on, the midpoint wiring 14 is electrically connected to the output wiring 50w, and the potential VM of the midpoint wiring 14 is applied to the output wiring 50w. When the switching element 43LS is turned on, the low potential input wiring 16 is electrically connected to the output wiring 50w. Therefore, the potential VL of the low potential input wiring 16 is applied to the output wiring 50w. In this way, the W-phase switching circuit 43 changes the potential of the output wiring 50w between the potential VH, the potential VM, and the potential VL.
なお、ダイオード41UDは、41LD、41MMD、41OMD、42UD、42LD、42MMD、42OMD、43UD、43LD、43MMD、43OMDは、並列に接続されたMOSFETのボディダイオード(すなわち、MOSFETの内部に寄生的に形成されるダイオード)であってもよい。
The diode 41UD is 41LD, 41MMD, 41OMD, 42UD, 42LD, 42MMD, 42OMD, 43UD, 43LD, 43MMD, 43OMD are parasiticly formed inside the body diode (that is, MOSFET) of the MOSFET connected in parallel. It may be a diode).
また、スイッチング素子41US、41MMS、41OMS、41LS、42US、42MMS、42OMS、42LS、43US、43MMS、43OMS、43LSは、MOSFET以外の素子(例えば、IGBT(insulated gate bipolar transistor))により構成されていてもよい。その場合、IGBTのエミッタを並列に接続されたダイオードのアノードに接続し、IGBTのコレクタを並列に接続されたダイオードのカソードに接続することができる。
Further, even if the switching elements 41US, 41MMS, 41OMS, 41LS, 42US, 42MMS, 42OMS, 42LS, 43US, 43MMS, 43OMS, and 43LS are composed of elements other than MOSFETs (for example, IGBT (insulated gate bipolar transistor)). good. In that case, the emitter of the IGBT can be connected to the anode of the diode connected in parallel, and the collector of the IGBT can be connected to the cathode of the diode connected in parallel.
インバータ動作では、U相スイッチング回路41、V相スイッチング回路42、及び、W相スイッチング回路43が出力配線50u、50v、50wの電位を電位VL、電位VM、及び、電位VLの間で変化させる。これによって、出力配線50u、50v、50wの間に三相交流電力が生成され、走行用モータ60に三相交流電力が供給される。
In the inverter operation, the U-phase switching circuit 41, the V-phase switching circuit 42, and the W-phase switching circuit 43 change the potentials of the output wirings 50u, 50v, and 50w between the potential VL, the potential VM, and the potential VL. As a result, three-phase AC power is generated between the output wirings 50u, 50v, and 50w, and the three-phase AC power is supplied to the traveling motor 60.
充電回路70は、充電正極配線22、充電負極配線24、充電ポート72、リレーモジュール74、入力コンデンサ76、インダクタ77、入力スイッチング素子78、及び、入力ダイオード79を有している。
The charging circuit 70 includes a charging positive electrode wiring 22, a charging negative electrode wiring 24, a charging port 72, a relay module 74, an input capacitor 76, an inductor 77, an input switching element 78, and an input diode 79.
充電ポート72には、外部の充電器92が接続される。充電ポート72は、正極72aと負極72bを有している。充電器92が充電ポート72に接続されると、充電器92によって正極72aが負極72bよりも高電位となるように正極72aと負極72bの間に電圧Vs(以下、供給電圧Vsという)が印加される。充電ポート72には、低電圧充電器92aと高電圧充電器92bを接続することができる。低電圧充電器92aは、供給電圧Vsとして低電圧VsL(例えば、400V)を供給する。高電圧充電器92bは、供給電圧Vsとして高電圧VsH(例えば、800V)を供給する。低電圧VsLはバッテリ18の出力電圧Vbよりも低く、高電圧VsHはバッテリ18の出力電圧Vbよりも高い。
An external charger 92 is connected to the charging port 72. The charging port 72 has a positive electrode 72a and a negative electrode 72b. When the charger 92 is connected to the charging port 72, a voltage Vs (hereinafter referred to as a supply voltage Vs) is applied between the positive electrode 72a and the negative electrode 72b so that the positive electrode 72a has a higher potential than the negative electrode 72b by the charger 92. Will be done. A low-voltage charger 92a and a high-voltage charger 92b can be connected to the charging port 72. The low voltage charger 92a supplies a low voltage VsL (for example, 400V) as a supply voltage Vs. The high voltage charger 92b supplies a high voltage VsH (for example, 800V) as a supply voltage Vs. The low voltage VsL is lower than the output voltage Vb of the battery 18, and the high voltage VsH is higher than the output voltage Vb of the battery 18.
充電正極配線22の一端は、充電ポート72の正極72aに接続されている。充電正極配線22の他端は、ダイオード41MMDのカソード、ダイオード41OMDのカソード、スイッチング素子41MMSのドレイン、及び、スイッチング素子41OMSのドレインに接続されている。充電負極配線24の一端は、充電ポート72の負極72bに接続されている。充電負極配線24の他端は、ダイオード42MMDのアノード、ダイオード42OMDのアノード、スイッチング素子42MMSのソース、及び、スイッチング素子42OMSのソースに接続されている。
One end of the charging positive electrode wiring 22 is connected to the positive electrode 72a of the charging port 72. The other end of the charging positive electrode wiring 22 is connected to the cathode of the diode 41MMD, the cathode of the diode 41OMD, the drain of the switching element 41MMS, and the drain of the switching element 41OMS. One end of the charging negative electrode wiring 24 is connected to the negative electrode 72b of the charging port 72. The other end of the charging negative electrode wiring 24 is connected to the anode of the diode 42MMD, the anode of the diode 42OMD, the source of the switching element 42MMS, and the source of the switching element 42OMS.
入力コンデンサ76は、充電正極配線22と充電負極配線24の間に接続されている。入力コンデンサ76は、充電正極配線22と充電負極配線24の間に印加される電圧を平滑化する。
The input capacitor 76 is connected between the charging positive electrode wiring 22 and the charging negative electrode wiring 24. The input capacitor 76 smoothes the voltage applied between the charging positive electrode wiring 22 and the charging negative electrode wiring 24.
リレーモジュール74は、入力コンデンサ76と充電ポート72の間に配置されている。リレーモジュール74は、リレー74aとリレー74bを有している。リレー74aは、入力コンデンサ76よりも充電ポート72に近い側で充電正極配線22に介装されている。リレー74bは、入力コンデンサ76よりも充電ポート72に近い側で充電負極配線24に介装されている。リレー74a、74bがオフすると、充電ポート72が入力コンデンサ76、インバータ回路30等から電気的に遮断される。リレー74a、74bは、制御回路90によって制御される。
The relay module 74 is arranged between the input capacitor 76 and the charging port 72. The relay module 74 has a relay 74a and a relay 74b. The relay 74a is interposed in the charging positive electrode wiring 22 on the side closer to the charging port 72 than the input capacitor 76. The relay 74b is interposed in the charging negative electrode wiring 24 on the side closer to the charging port 72 than the input capacitor 76. When the relays 74a and 74b are turned off, the charging port 72 is electrically cut off from the input capacitor 76, the inverter circuit 30, and the like. The relays 74a and 74b are controlled by the control circuit 90.
インダクタ77は、入力コンデンサ76よりもインバータ回路30に近い側で充電正極配線22に介装されている。
The inductor 77 is interposed in the charging positive electrode wiring 22 on the side closer to the inverter circuit 30 than the input capacitor 76.
入力スイッチング素子78は、インダクタ77よりもインバータ回路30に近い側で充電正極配線22に介装されている。入力スイッチング素子78は、IGBTである。入力スイッチング素子78のコレクタはインダクタ77に接続されている。入力スイッチング素子78は、制御回路90によって制御される。入力ダイオード79は、入力スイッチング素子78よりもインバータ回路30に近い側で充電正極配線22に介装されている。入力ダイオード79のアノードは、入力スイッチング素子78のエミッタに接続されている。入力ダイオード79のカソードは、ダイオード41MMDのカソードに接続されている。
The input switching element 78 is interposed in the charging positive electrode wiring 22 on the side closer to the inverter circuit 30 than the inductor 77. The input switching element 78 is an IGBT. The collector of the input switching element 78 is connected to the inductor 77. The input switching element 78 is controlled by the control circuit 90. The input diode 79 is interposed in the charging positive electrode wiring 22 on the side closer to the inverter circuit 30 than the input switching element 78. The anode of the input diode 79 is connected to the emitter of the input switching element 78. The cathode of the input diode 79 is connected to the cathode of the diode 41MMD.
マルチレベルインバータ10aは、正極側ダイオード82と負極側ダイオード84をさらに有している。正極側ダイオード82のアノードは、インダクタ77と入力スイッチング素子78の間で充電正極配線22に接続されている。正極側ダイオード82のカソードは、高電位入力配線12に接続されている。負極側ダイオード84のアノードは、低電位入力配線16に接続されている。負極側ダイオード84のカソードは、充電負極配線24に接続されている。
The multi-level inverter 10a further has a positive electrode side diode 82 and a negative electrode side diode 84. The anode of the positive electrode side diode 82 is connected to the charging positive electrode wiring 22 between the inductor 77 and the input switching element 78. The cathode of the positive electrode side diode 82 is connected to the high potential input wiring 12. The anode of the negative electrode side diode 84 is connected to the low potential input wiring 16. The cathode of the negative electrode side diode 84 is connected to the charging negative electrode wiring 24.
マルチレベルインバータ10aは、充電制御を実施できる。充電制御は、インバータ動作を実施していないときに実施される。車両の停止状態では、リレー74a、74bがオフしており、入力スイッチング素子78がオフしている。車両の停止状態において充電ポート72に外部の充電器92が接続されると、制御回路90は、図示しない電圧計によって供給電圧Vsを検出する。制御回路90は、供給電圧Vsが低電圧VsLであるときは低電圧充電制御を実施し、供給電圧Vsが高電圧VsHであるときは高電圧充電制御を実行する。
The multi-level inverter 10a can carry out charge control. The charge control is performed when the inverter operation is not performed. When the vehicle is stopped, the relays 74a and 74b are off, and the input switching element 78 is off. When an external charger 92 is connected to the charging port 72 in the stopped state of the vehicle, the control circuit 90 detects the supply voltage Vs by a voltmeter (not shown). The control circuit 90 executes low voltage charge control when the supply voltage Vs is low voltage VsL, and executes high voltage charge control when the supply voltage Vs is high voltage VsH.
(低電圧充電制御)
制御回路90は、供給電圧Vsが低電圧VsLであることを検出すると、リレー74a、74bをオンに制御し、入力スイッチング素子78をオンに制御する。これによって、充電正極配線22と充電負極配線24の間に供給電圧Vs(すなわち、低電圧VsL)が印加される。 (Low voltage charge control)
When thecontrol circuit 90 detects that the supply voltage Vs is the low voltage VsL, the control circuit 90 controls the relays 74a and 74b to turn on, and controls the input switching element 78 to turn on. As a result, the supply voltage Vs (that is, low voltage VsL) is applied between the charging positive electrode wiring 22 and the charging negative electrode wiring 24.
制御回路90は、供給電圧Vsが低電圧VsLであることを検出すると、リレー74a、74bをオンに制御し、入力スイッチング素子78をオンに制御する。これによって、充電正極配線22と充電負極配線24の間に供給電圧Vs(すなわち、低電圧VsL)が印加される。 (Low voltage charge control)
When the
低電圧充電制御では、制御回路90は、スイッチング素子41US、41OMS、41LS、42US、42OMS、42LS、43US、43MMS、43OMS、43LSをオフ状態に維持する。さらに、制御回路90は、図2のように、スイッチング素子41MMSとスイッチング素子42MMSを交互にオンさせる。より詳細には、制御回路90は、スイッチング素子41MMSがオンしているとともにスイッチング素子42MMSがオフしているオン期間Ton1、スイッチング素子41MMS及び42MMSが共にオフしているオフ期間Toff1、スイッチング素子42MMSがオンしているとともにスイッチング素子41MMSがオフしているオン期間Ton2、及び、スイッチング素子41MMS及び42MMSが共にオフしているオフ期間Toff2がこの順序で繰り返すようにスイッチング素子41MMS及び42MMSを制御する。
In the low voltage charge control, the control circuit 90 keeps the switching elements 41US, 41OMS, 41LS, 42US, 42OMS, 42LS, 43US, 43MMS, 43OMS, 43LS in the off state. Further, as shown in FIG. 2, the control circuit 90 alternately turns on the switching element 41 MMS and the switching element 42 MMS. More specifically, the control circuit 90 includes an on-period Ton1 in which the switching element 41MMS is on and the switching element 42MMS is off, an off-period Toff1 in which both the switching elements 41MMS and 42MMS are off, and the switching element 42MMS. The switching elements 41MMS and 42MMS are controlled so that the on-period Ton2 in which the switching element 41MMS is on and the switching element 41MMS is off and the off-period Toff2 in which both the switching elements 41MMS and 42MMS are off repeat in this order.
オン期間Ton1では、スイッチング素子41MMSがオンすることで、図1の矢印100に示すように電流が流れる。すなわち、電流は、正極72aから、インダクタ77、入力スイッチング素子78、入力ダイオード79、スイッチング素子41MMS、第1コンデンサ31、及び、負極側ダイオード84を介して負極72bへ流れる。このように流れる電流によって、第1コンデンサ31が充電される。電流ILは、インダクタ77に流れる電流を示している。オン期間Ton1においては、インダクタ77の誘導起電力が、電流ILの流れる方向(すなわち、矢印100)と逆方向に生じる。誘導起電力は時間の経過とともに徐々に減少する。したがって、図2に示すように、オン期間Ton1の間に電流ILは徐々に増加する。
In the on period Ton1, when the switching element 41MMS is turned on, a current flows as shown by the arrow 100 in FIG. That is, the current flows from the positive electrode 72a to the negative electrode 72b via the inductor 77, the input switching element 78, the input diode 79, the switching element 41MMS, the first capacitor 31, and the negative electrode side diode 84. The current flowing in this way charges the first capacitor 31. The current IL indicates the current flowing through the inductor 77. In the on period Ton1, the induced electromotive force of the inductor 77 is generated in the direction opposite to the direction in which the current IL flows (that is, the arrow 100). The induced electromotive force gradually decreases over time. Therefore, as shown in FIG. 2, the current IL gradually increases during the on-period Ton1.
オフ期間Toff1では、スイッチング素子41MMSとスイッチング素子42MMSが共にオフしているので、図3の矢印102に示すように電流が流れる。すなわち、オフ期間Toff1では、インダクタ77の誘導起電力が電流ILの流れる方向(すなわち、矢印102)と同じ方向に生じる。このため、正極側ダイオード82のアノードの電位が、正極側ダイオード82のカソードの電位(すなわち、高電位入力配線12の電位)よりも高くなる。このため、矢印102に示すように、電流が、正極72aから、インダクタ77、正極側ダイオード82、バッテリ18、及び、負極側ダイオード84を介して負極72bへ流れる。オフ期間Toff1において、インダクタ77の誘導起電力は時間の経過とともに減少する。したがって、図2に示すように、オフ期間Toff1の間に電流ILは減少する。
In the off period Toff1, both the switching element 41MMS and the switching element 42MMS are off, so a current flows as shown by the arrow 102 in FIG. That is, in the off period Toff1, the induced electromotive force of the inductor 77 is generated in the same direction as the direction in which the current IL flows (that is, the arrow 102). Therefore, the potential of the anode of the positive electrode side diode 82 becomes higher than the potential of the cathode of the positive electrode side diode 82 (that is, the potential of the high potential input wiring 12). Therefore, as shown by the arrow 102, a current flows from the positive electrode 72a to the negative electrode 72b via the inductor 77, the positive electrode side diode 82, the battery 18, and the negative electrode side diode 84. In the off period Toff1, the induced electromotive force of the inductor 77 decreases with the passage of time. Therefore, as shown in FIG. 2, the current IL decreases during the off period Toff1.
オン期間Ton2では、スイッチング素子42MMSがオンすることで、図4の矢印104に示すように電流が流れる。すなわち、電流は、正極72aから、インダクタ77、正極側ダイオード82、第2コンデンサ32、及び、スイッチング素子42MMSを介して負極72bへ流れる。このように流れる電流によって、第2コンデンサ32が充電される。オン期間Ton2においては、インダクタ77の誘導起電力が、電流ILの流れる方向(すなわち、矢印104)と逆方向に生じる。誘導起電力は時間の経過とともに徐々に減少する。したがって、図2に示すように、オン期間Ton2の間に電流ILは徐々に増加する。
In the on period Ton2, when the switching element 42MMS is turned on, a current flows as shown by the arrow 104 in FIG. That is, the current flows from the positive electrode 72a to the negative electrode 72b via the inductor 77, the positive electrode side diode 82, the second capacitor 32, and the switching element 42MMS. The second capacitor 32 is charged by the current flowing in this way. In the on-period Ton2, the induced electromotive force of the inductor 77 is generated in the direction opposite to the direction in which the current IL flows (that is, the arrow 104). The induced electromotive force gradually decreases over time. Therefore, as shown in FIG. 2, the current IL gradually increases during the on-period Ton2.
オフ期間Toff2では、スイッチング素子41MMSとスイッチング素子42MMSが共にオフしているので、オフ期間Toff1と同様に図3の矢印102に示すように電流が流れる。したがって、図2に示すように、オフ期間Toff2の間に電流ILは減少する。
In the off period Toff2, both the switching element 41MMS and the switching element 42MMS are off, so that a current flows as shown by the arrow 102 in FIG. 3 as in the off period Toff1. Therefore, as shown in FIG. 2, the current IL decreases during the off period Toff2.
このように、低電圧充電制御では、オン期間Ton1とオン期間Ton2が交互に繰り返されることで、第1コンデンサ31と第2コンデンサ32が交互に充電される。高電位入力配線12と低電位入力配線16の間の電圧VHLは、第1コンデンサ31の両端間の電圧VC1と第2コンデンサ32の両端間の電圧VC2を加算した電圧である。第1コンデンサ31の充電によって、第1コンデンサ31の両端間の電圧VC1は最大で低電圧VsLまで上昇する。第2コンデンサ32の充電によって、第2コンデンサ32の両端間の電圧VC2は最大で低電圧VsLまで上昇する。電圧VC1が低電圧VsLまで上昇し、電圧VC2が低電圧VsLまで上昇すれば、高電位入力配線12と低電位入力配線16の間の電圧VHLは低電圧VsLの2倍の値まで上昇する。このように、低電圧充電制御によれば、高電位入力配線12と低電位入力配線16の間の電圧VHLを充電器92が供給する低電圧VsLよりも高い電圧まで上昇させることができる。したがって、低電圧VsLがバッテリ18の出力電圧Vbよりも低くても、電圧VHLをバッテリ18の出力電圧Vbよりも高い電圧まで上昇させることができる。したがって、バッテリ18を充電することができる。このように、実施例1のマルチレベルインバータ10aによれば、インバータ回路30を利用して、低電圧VsLを昇圧し、昇圧した電圧によってバッテリ18を充電することができる。このように、専用の昇圧コンバータ回路を設けることなく低電圧VsLを利用してバッテリ18を充電することができる。したがって、マルチレベルインバータ10aを小型化することができる。
As described above, in the low voltage charge control, the first capacitor 31 and the second capacitor 32 are alternately charged by alternately repeating the on-period Ton1 and the on-period Ton2. The voltage VHL between the high-potential input wiring 12 and the low-potential input wiring 16 is the sum of the voltage VC1 between both ends of the first capacitor 31 and the voltage VC2 between both ends of the second capacitor 32. By charging the first capacitor 31, the voltage VC1 between both ends of the first capacitor 31 rises to a maximum low voltage VsL. By charging the second capacitor 32, the voltage VC2 between both ends of the second capacitor 32 rises to a maximum low voltage VsL. If the voltage VC1 rises to the low voltage VsL and the voltage VC2 rises to the low voltage VsL, the voltage VHL between the high potential input wiring 12 and the low potential input wiring 16 rises to twice the value of the low voltage VsL. As described above, according to the low voltage charge control, the voltage VHL between the high potential input wiring 12 and the low potential input wiring 16 can be raised to a voltage higher than the low voltage VsL supplied by the charger 92. Therefore, even if the low voltage VsL is lower than the output voltage Vb of the battery 18, the voltage VHL can be raised to a voltage higher than the output voltage Vb of the battery 18. Therefore, the battery 18 can be charged. As described above, according to the multi-level inverter 10a of the first embodiment, the low voltage VsL can be boosted by using the inverter circuit 30, and the battery 18 can be charged by the boosted voltage. In this way, the battery 18 can be charged using the low voltage VsL without providing a dedicated boost converter circuit. Therefore, the multi-level inverter 10a can be miniaturized.
また、図2に示すように、電流ILは、オン期間Ton1、Ton2において増加し、オフ期間Toff1、Toff2において減少する。オン期間Ton1、Ton2とオフ期間Toff1、Toff2の比率を制御することで、電流ILの大きさを制御することができる。これによって、第1コンデンサ31の電圧VC1及び第2コンデンサ32の電圧VC2を制御することができる。例えば、図2のようにオン期間Ton1、Ton2をオフ期間Toff1、Toff2よりも十分に長くすれば、第1コンデンサ31の電圧VC1を低電圧VsLまで上昇させることができ、第2コンデンサ32の電圧VC2を低電圧VsLまで上昇させることができる。また、図2よりもオフ期間Toff1、Toff2の比率を大きくすれば、電流ILがより小さくなり、電圧VC1、VC2をより小さい値に制御することができる。例えば、電圧VC1を低電圧VsLの0.8倍に制御し、電圧VC2を低電圧VsLの0.8倍とすることができる。この場合、電圧VHLは低電圧VsLの1.6倍となる。この場合でも、低電圧VsLよりも高い電圧を電圧VHLとして印加することができ、バッテリ18を充電することができる。
Further, as shown in FIG. 2, the current IL increases in the on period Ton1 and Ton2, and decreases in the off period Toff1 and Toff2. By controlling the ratio of the on-period Ton1 and Ton2 to the off-period Toff1 and Toff2, the magnitude of the current IL can be controlled. Thereby, the voltage VC1 of the first capacitor 31 and the voltage VC2 of the second capacitor 32 can be controlled. For example, if the on-periods Ton1 and Ton2 are made sufficiently longer than the off-periods Toff1 and Toff2 as shown in FIG. 2, the voltage VC1 of the first capacitor 31 can be raised to a low voltage VsL, and the voltage of the second capacitor 32 can be increased. VC2 can be raised to a low voltage VsL. Further, if the ratio of the off periods Toff1 and Toff2 is increased as compared with FIG. 2, the current IL becomes smaller, and the voltages VC1 and VC2 can be controlled to smaller values. For example, the voltage VC1 can be controlled to be 0.8 times the low voltage VsL, and the voltage VC2 can be controlled to be 0.8 times the low voltage VsL. In this case, the voltage VHL is 1.6 times the low voltage VsL. Even in this case, a voltage higher than the low voltage VsL can be applied as the voltage VHL, and the battery 18 can be charged.
なお、実施例1において、オフ期間Toff1、Toff2のいずれか、または、両方が存在しなくてもよい。この場合、電流ILが高くなり易い。
In Example 1, either or both of the off periods Toff1 and Toff2 may not exist. In this case, the current IL tends to be high.
また、実施例1のマルチレベルインバータ10aでは、低電圧充電制御のオン期間Ton1、Ton2において、制御回路90が、スイッチング素子41OMS、42MMS、42OMS、43MMS、43OMSをオフに維持する。したがって、充電正極配線22の電位及び充電負極配線24の電位が出力配線50u、50v、50wに印加されることを防止できる。また、低電圧充電制御のオン期間Ton1、Ton2において、制御回路90が、スイッチング素子41US、41LS、42US、42LS、43US、43LSをオフに維持する。したがって、高電位入力配線12の電位及び低電位入力配線16の電位が出力配線50u、50v、50wに印加されることを防止できる。したがって、低電圧充電制御中に走行用モータ60での振動等の発生を防止できる。
Further, in the multi-level inverter 10a of the first embodiment, the control circuit 90 keeps the switching elements 41OMS, 42MMS, 42OMS, 43MMS, and 43OMS off during the on periods Ton1 and Ton2 of the low voltage charge control. Therefore, it is possible to prevent the potential of the charging positive electrode wiring 22 and the potential of the charging negative electrode wiring 24 from being applied to the output wirings 50u, 50v, and 50w. Further, during the on periods Ton1 and Ton2 of the low voltage charge control, the control circuit 90 keeps the switching elements 41US, 41LS, 42US, 42LS, 43US, and 43LS off. Therefore, it is possible to prevent the potential of the high-potential input wiring 12 and the potential of the low-potential input wiring 16 from being applied to the output wirings 50u, 50v, and 50w. Therefore, it is possible to prevent the traveling motor 60 from generating vibration or the like during the low voltage charge control.
また、上述したように、オン期間Ton1からオフ期間Toff1に切り替わるときに、スイッチング素子41MMSがオフする。同様に、オン期間Ton2からオフ期間Toff2に切り替わるときに、スイッチング素子42MMSがオフする。スイッチング素子41MMS、42MMSがオフするときにインダクタ77の誘導起電力によってスイッチング素子41MMS、42MMSに高いサージ電圧が印加されると、スイッチング素子41MMS、42MMSに高い負荷が加わる。しかしながら、実施例1のマルチレベルインバータ10aでは、正極側ダイオード82及び負極側ダイオード84によってスイッチング素子41MMS、42MMSをバイパスするパイパス経路が構成されている。このバイパス経路によって、スイッチング素子41MMS、42MMSに印加されるサージ電圧が抑制される。すなわち、スイッチング素子41MMS、42MMSがオフすると、上述したように、オフ期間Toff1、Toff2において正極側ダイオード82及び負極側ダイオード84がオンする。その結果、図3の矢印102に示すように、電流がスイッチング素子41MMS、42MMSを迂回して流れる。このため、スイッチング素子41MMS、42MMSに印加されるサージ電圧が抑制される。また、低電圧充電制御中に、何らかの異常によって、スイッチング素子41MMS、スイッチング素子42MMS、及び、入力スイッチング素子78の少なくとも1つが瞬断するおそれがある。このようにスイッチング素子の瞬断が生じた場合でも、図3の矢印102に示すように、電流がスイッチング素子41MMS、スイッチング素子42MMS、及び、入力スイッチング素子78を迂回して流れる。これによって、スイッチング素子41MMS、スイッチング素子42MMS、及び、入力スイッチング素子78に印加されるサージ電圧が抑制される。
Further, as described above, the switching element 41MMS is turned off when the on period Ton1 is switched to the off period Toff1. Similarly, when switching from the on period Ton2 to the off period Toff2, the switching element 42MMS is turned off. When a high surge voltage is applied to the switching elements 41MMS and 42MMS by the induced electromotive force of the inductor 77 when the switching elements 41MMS and 42MMS are turned off, a high load is applied to the switching elements 41MMS and 42MMS. However, in the multi-level inverter 10a of the first embodiment, the positive electrode side diode 82 and the negative electrode side diode 84 form a bypass path that bypasses the switching elements 41 MMS and 42 MMS. By this bypass path, the surge voltage applied to the switching elements 41MMS and 42MMS is suppressed. That is, when the switching elements 41MMS and 42MMS are turned off, the positive electrode side diode 82 and the negative electrode side diode 84 are turned on during the off periods Toff1 and Toff2 as described above. As a result, as shown by the arrow 102 in FIG. 3, the current flows around the switching elements 41 MMS and 42 MMS. Therefore, the surge voltage applied to the switching elements 41MMS and 42MMS is suppressed. Further, during the low voltage charge control, at least one of the switching element 41MMS, the switching element 42MMS, and the input switching element 78 may be momentarily interrupted due to some abnormality. Even when the switching element is momentarily interrupted in this way, as shown by the arrow 102 in FIG. 3, the current flows around the switching element 41 MMS, the switching element 42 MMS, and the input switching element 78. As a result, the surge voltage applied to the switching element 41MMS, the switching element 42MMS, and the input switching element 78 is suppressed.
また、低電圧充電制御中に、充電器92内で発生したサージ電圧が正極72aと負極72bの間に印加される場合がある。このようなサージ電圧によって突入電流が何れかのスイッチング素子に流れると、そのスイッチング素子に高い負荷が加わる。しかしながら、実施例1のマルチレベルインバータ10aでは、正極72aと負極72bの間にサージ電圧が印加されると、インダクタ77が電流ILの上昇を抑制する。これによって、突入電流が抑制される。したがって、マルチレベルインバータ10a内のスイッチング素子に突入電流が流れることが抑制される。
Further, during the low voltage charge control, the surge voltage generated in the charger 92 may be applied between the positive electrode 72a and the negative electrode 72b. When an inrush current flows through any of the switching elements due to such a surge voltage, a high load is applied to the switching element. However, in the multi-level inverter 10a of the first embodiment, when a surge voltage is applied between the positive electrode 72a and the negative electrode 72b, the inductor 77 suppresses an increase in the current IL. As a result, the inrush current is suppressed. Therefore, the inrush current is suppressed from flowing through the switching element in the multi-level inverter 10a.
(高電圧充電制御)
制御回路90は、供給電圧Vsが高電圧VsHであることを検出すると、高電圧充電制御を実施する。高電圧充電制御では、制御回路90は、リレー74a、74bをオン、入力スイッチング素子78をオフに制御する。また、制御回路90は、スイッチング素子41US、41LS、41MMS、41OMS、42US、42LS、42MMS、42OMS、43US、43LS、43MMS、43OMSをオフに制御する。このように各部が制御されると、高電圧VsHがバッテリ18の出力電圧Vbよりも高いので、図3の矢印102に示すように電流が流れる。すなわち、正極72aから、インダクタ77、正極側ダイオード82、バッテリ18、負極側ダイオード84を介して負極72bへ電流が流れる。高電圧充電制御中は、常時、矢印102のよう電流が流れる。これによって、バッテリ18が充電される。 (High voltage charge control)
When thecontrol circuit 90 detects that the supply voltage Vs is the high voltage VsH, the control circuit 90 executes the high voltage charge control. In the high voltage charge control, the control circuit 90 controls the relays 74a and 74b to be on and the input switching element 78 to be off. Further, the control circuit 90 controls off the switching elements 41US, 41LS, 41MMS, 41OMS, 42US, 42LS, 42MMS, 42OMS, 43US, 43LS, 43MMS, 43OMS. When each part is controlled in this way, the high voltage VsH is higher than the output voltage Vb of the battery 18, so that a current flows as shown by the arrow 102 in FIG. That is, a current flows from the positive electrode 72a to the negative electrode 72b via the inductor 77, the positive electrode side diode 82, the battery 18, and the negative electrode side diode 84. During the high voltage charge control, the current always flows as shown by the arrow 102. As a result, the battery 18 is charged.
制御回路90は、供給電圧Vsが高電圧VsHであることを検出すると、高電圧充電制御を実施する。高電圧充電制御では、制御回路90は、リレー74a、74bをオン、入力スイッチング素子78をオフに制御する。また、制御回路90は、スイッチング素子41US、41LS、41MMS、41OMS、42US、42LS、42MMS、42OMS、43US、43LS、43MMS、43OMSをオフに制御する。このように各部が制御されると、高電圧VsHがバッテリ18の出力電圧Vbよりも高いので、図3の矢印102に示すように電流が流れる。すなわち、正極72aから、インダクタ77、正極側ダイオード82、バッテリ18、負極側ダイオード84を介して負極72bへ電流が流れる。高電圧充電制御中は、常時、矢印102のよう電流が流れる。これによって、バッテリ18が充電される。 (High voltage charge control)
When the
このように、マルチレベルインバータ10aは、低電圧充電制御と高電圧充電制御を選択して実行することができる。この構成によれば、低電圧VsLの供給と高電圧VsHの供給を共通の充電ポート72によって受けることができる。低電圧VsLと高電圧VsHとで充電ポートを別個に設ける必要が無いので、マルチレベルインバータ10aを小型化することができる。また、リレーモジュール74をオフすれば、充電ポート72を高電圧充電用の回路と低電圧充電用の回路のいずれからも遮断することができる。高電圧充電用の回路と低電圧充電用の回路に個別にリレーモジュールを設ける必要がないので、マルチレベルインバータ10aを小型化することができる。
In this way, the multi-level inverter 10a can select and execute low-voltage charge control and high-voltage charge control. According to this configuration, the supply of the low voltage VsL and the supply of the high voltage VsH can be received by the common charging port 72. Since it is not necessary to separately provide a charging port for the low voltage VsL and the high voltage VsH, the multi-level inverter 10a can be miniaturized. Further, if the relay module 74 is turned off, the charging port 72 can be cut off from both the high-voltage charging circuit and the low-voltage charging circuit. Since it is not necessary to separately provide relay modules for the high-voltage charging circuit and the low-voltage charging circuit, the multi-level inverter 10a can be miniaturized.
次に、入力スイッチング素子78と入力ダイオード79の機能について説明する。上述したように、マルチレベルインバータ10aは、インバータ動作によって走行用モータ60に三相交流電力を供給する。入力スイッチング素子78と入力ダイオード79が存在しないと、図5の矢印106に示すようにインバータ動作において入力コンデンサ76を介してU相スイッチング回路41とV相スイッチング回路42の間で電流が流れる。このように電流が流れると、出力配線50u、50v、50wに流れる交流電流の波形が崩れ、走行用モータ60の駆動効率が低下する。これに対し、実施例1のマルチレベルインバータ10aでは、入力コンデンサ76とU相スイッチング回路41の間の充電正極配線22に入力スイッチング素子78と入力ダイオード79が介装されている。制御回路90は、インバータ動作中に、入力スイッチング素子78をオフに維持する。したがって、インバータ動作中に、図5の矢印106に示すような電流が流れない。したがって、マルチレベルインバータ10aでは、出力配線50u、50v、50wに流れる交流電流の波形の崩れを防止できる。
Next, the functions of the input switching element 78 and the input diode 79 will be described. As described above, the multi-level inverter 10a supplies three-phase AC power to the traveling motor 60 by the inverter operation. In the absence of the input switching element 78 and the input diode 79, a current flows between the U-phase switching circuit 41 and the V-phase switching circuit 42 via the input capacitor 76 in the inverter operation as shown by the arrow 106 in FIG. When the current flows in this way, the waveform of the alternating current flowing in the output wirings 50u, 50v, and 50w is disrupted, and the drive efficiency of the traveling motor 60 is lowered. On the other hand, in the multi-level inverter 10a of the first embodiment, the input switching element 78 and the input diode 79 are interposed in the charging positive electrode wiring 22 between the input capacitor 76 and the U-phase switching circuit 41. The control circuit 90 keeps the input switching element 78 off during the operation of the inverter. Therefore, the current as shown by the arrow 106 in FIG. 5 does not flow during the operation of the inverter. Therefore, in the multi-level inverter 10a, it is possible to prevent the waveform of the alternating current flowing through the output wirings 50u, 50v, and 50w from collapsing.
なお、実施例1では、充電回路70が入力コンデンサ76を有しているが、図6に示すように充電回路70が入力コンデンサ76を有していなくてもよい。この場合でも、図6に示すように充電器92が正極72aと負極72bの間に接続される入力コンデンサ94を有している場合には、インバータ動作中に入力コンデンサ94を介して電流が流れ、交流電流の波形が崩れるおそれがある。このようなおそれがある場合には、インバータ動作中に入力スイッチング素子78をオフに維持することで、交流電流の波形の崩れを防止できる。
Although the charging circuit 70 has the input capacitor 76 in the first embodiment, the charging circuit 70 does not have to have the input capacitor 76 as shown in FIG. Even in this case, when the charger 92 has an input capacitor 94 connected between the positive electrode 72a and the negative electrode 72b as shown in FIG. 6, a current flows through the input capacitor 94 during the inverter operation. , The AC current waveform may be corrupted. When there is such a possibility, by keeping the input switching element 78 off during the operation of the inverter, it is possible to prevent the waveform of the alternating current from collapsing.
また、上述した実施例1では、インダクタ77が充電正極配線22に介装されていたが、インダクタ77が充電負極配線24に介装されていてもよい。この構成でも、インダクタ77の誘導起電力を利用して上述した実施例1とほぼ同様に低電圧充電制御を実行することができる。例えば、図7に示すようにインダクタ77を充電負極配線24に介装することができる。図7では、インダクタ77が、入力コンデンサ76よりもインバータ回路30に近い側の充電負極配線24に介装されている。また、負極側ダイオード84のカソードが、インダクタ77よりもインバータ回路30に近い側の充電負極配線24に接続されている。
Further, in the above-described first embodiment, the inductor 77 is interposed in the charging positive electrode wiring 22, but the inductor 77 may be interposed in the charging negative electrode wiring 24. Also in this configuration, the low voltage charge control can be executed in substantially the same manner as in the first embodiment described above by utilizing the induced electromotive force of the inductor 77. For example, as shown in FIG. 7, the inductor 77 can be interposed in the charging negative electrode wiring 24. In FIG. 7, the inductor 77 is interposed in the charging negative electrode wiring 24 on the side closer to the inverter circuit 30 than the input capacitor 76. Further, the cathode of the negative electrode side diode 84 is connected to the charging negative electrode wiring 24 on the side closer to the inverter circuit 30 than the inductor 77.
また、上述した実施例1では、入力スイッチング素子78と入力ダイオード79が充電正極配線22に介装されていたが、これらが充電負極配線24に介装されていてもよい。この構成でも、インバータ動作中に入力スイッチング素子78をオフに維持することで、交流電流の波形の崩れを防止できる。この場合、入力スイッチング素子78と入力ダイオード79を充電負極配線24の電流が流れる向きに沿って設置する。例えば、図7に示すように、インダクタ77が充電負極配線24に介装されている場合に、入力スイッチング素子78と入力ダイオード79も充電負極配線24に介装されていてもよい。図7では、入力スイッチング素子78と入力ダイオード79が、充電負極配線24と負極側ダイオード84との接続点よりもインバータ回路30に近い側の充電負極配線24に介装されている。
Further, in the above-described first embodiment, the input switching element 78 and the input diode 79 are interposed in the charging positive electrode wiring 22, but these may be interposed in the charging negative electrode wiring 24. Even in this configuration, by keeping the input switching element 78 off during the operation of the inverter, it is possible to prevent the waveform of the alternating current from collapsing. In this case, the input switching element 78 and the input diode 79 are installed along the direction in which the current of the charging negative electrode wiring 24 flows. For example, as shown in FIG. 7, when the inductor 77 is interposed in the charging negative electrode wiring 24, the input switching element 78 and the input diode 79 may also be interposed in the charging negative electrode wiring 24. In FIG. 7, the input switching element 78 and the input diode 79 are interposed in the charging negative electrode wiring 24 on the side closer to the inverter circuit 30 than the connection point between the charging negative electrode wiring 24 and the negative electrode side diode 84.
実施例2のマルチレベルインバータでは、低電圧充電制御におけるスイッチング素子41MMS、42MMSの制御方法が実施例1とは異なる。実施例2のマルチレベルインバータのその他の構成は、実施例1と等しい。
In the multi-level inverter of the second embodiment, the control method of the switching elements 41MMS and 42MMS in the low voltage charge control is different from that of the first embodiment. Other configurations of the multi-level inverter of the second embodiment are the same as those of the first embodiment.
実施例2のマルチレベルインバータでの低電圧充電制御では、制御回路90は、スイッチング素子41US、41OMS、41LS、42US、42OMS、42LS、43US、43MMS、43OMS、43LSをオフ状態に維持する。さらに、制御回路90は、図8のように、スイッチング素子41MMSとスイッチング素子42MMSを交互にオンさせる。より詳細には、制御回路90は、スイッチング素子41MMSがオンしているとともにスイッチング素子42MMSがオフしているオン期間Ton1、スイッチング素子41MMS、42MMSが共にオンしている電流増加期間Tac1、スイッチング素子42MMSがオンしているとともにスイッチング素子41MMSがオフしているオン期間Ton2、及び、スイッチング素子41MMS、42MMSが共にオンしている電流増加期間Tac2がこの順序で繰り返すようにスイッチング素子41MMS、42MMSを制御する。
In the low voltage charge control with the multi-level inverter of the second embodiment, the control circuit 90 keeps the switching elements 41US, 41OMS, 41LS, 42US, 42OMS, 42LS, 43US, 43MMS, 43OMS, 43LS in the off state. Further, as shown in FIG. 8, the control circuit 90 alternately turns on the switching element 41 MMS and the switching element 42 MMS. More specifically, the control circuit 90 has an on-period Ton1 in which the switching element 41MMS is on and the switching element 42MMS is off, a current increase period Tac1 in which the switching elements 41MMS and 42MMS are both on, and a switching element 42MMS. The switching elements 41MMS and 42MMS are controlled so that the on-period Ton2 in which the switching element 41MMS is on and the switching element 41MMS is off and the current increase period Tac2 in which both the switching elements 41MMS and 42MMS are on repeat in this order. ..
電流増加期間Tac2では、スイッチング素子41MMS及び42MMSが共にオンすることで、図9の矢印110に示すように電流が流れる。すなわち、正極72aから、インダクタ77、入力スイッチング素子78、入力ダイオード79、スイッチング素子41MMS、及び、スイッチング素子42MMSを介して負極72bへ流れる。このように、電流は、インダクタ77以外に負荷を通らない。したがって、電流増加期間Tac2では、インダクタ77の誘導起電力が電流ILの流れる方向と逆方向に生じる。また、電流増加期間Tac2では、インダクタ77の誘導起電力が時間の経過とともに減少する。したがって、図8に示すように、電流増加期間Tac2の間に電流ILが増加する。
In the current increase period Tac2, when both the switching elements 41MMS and 42MMS are turned on, a current flows as shown by the arrow 110 in FIG. That is, it flows from the positive electrode 72a to the negative electrode 72b via the inductor 77, the input switching element 78, the input diode 79, the switching element 41 MMS, and the switching element 42 MMS. In this way, the current does not pass through the load other than the inductor 77. Therefore, in the current increase period Tac2, the induced electromotive force of the inductor 77 is generated in the direction opposite to the direction in which the current IL flows. Further, in the current increase period Tac2, the induced electromotive force of the inductor 77 decreases with the passage of time. Therefore, as shown in FIG. 8, the current IL increases during the current increase period Tac2.
電流増加期間Tac2からオン期間Ton1に切り替わるときに、スイッチング素子42MMSがオフする。したがって、オン期間Ton1では、スイッチング素子41MMSがオンしており、スイッチング素子42MMSがオフしている。このため、図1の矢印100に示すように電流が流れ、第1コンデンサ31が充電される。オン期間Ton1では、インダクタ77において電流ILの流れる方向と同じに誘導起電力が生じる。したがって、第1コンデンサ31に、低電圧VsLにインダクタ77の誘導起電力を加算した電圧が印加される。したがって、オン期間Ton1において、第1コンデンサ31の電圧VC1が低電圧VsLよりも高い電圧となるように第1コンデンサ31を充電することができる。オン期間Ton1の間に、誘導起電力は時間の経過とともに徐々に減少する。したがって、図8に示すように、オン期間Ton1の間に電流ILは徐々に減少する。
The switching element 42MMS turns off when the current increase period Tac2 is switched to the on period Ton1. Therefore, in the on period Ton1, the switching element 41MMS is on and the switching element 42MMS is off. Therefore, as shown by the arrow 100 in FIG. 1, a current flows and the first capacitor 31 is charged. In the on period Ton1, an induced electromotive force is generated in the inductor 77 in the same direction as the current IL flows. Therefore, a voltage obtained by adding the induced electromotive force of the inductor 77 to the low voltage VsL is applied to the first capacitor 31. Therefore, in the on period Ton1, the first capacitor 31 can be charged so that the voltage VC1 of the first capacitor 31 becomes a voltage higher than the low voltage VsL. During the on-period Ton1, the induced electromotive force gradually decreases over time. Therefore, as shown in FIG. 8, the current IL gradually decreases during the on-period Ton1.
オン期間Ton1から電流増加期間Tac1に切り替わるときに、スイッチング素子42MMSがオンする。したがって、電流増加期間Tac1では、スイッチング素子41MMS、42MMSが共にオンしている。このため、電流増加期間Tac1では、電流増加期間Tac2と同様に、図9の矢印110に示すように電流が流れ、電流ILが増加する。
When switching from the on period Ton1 to the current increase period Tac1, the switching element 42MMS turns on. Therefore, in the current increase period Tac1, both the switching elements 41 MMS and 42 MMS are turned on. Therefore, in the current increase period Tac1, the current flows and the current IL increases as shown by the arrow 110 in FIG. 9, similarly to the current increase period Tac2.
電流増加期間Tac1からオン期間Ton2に切り替わるときに、スイッチング素子41MMSがオフする。したがって、オン期間Ton2では、スイッチング素子42MMSがオンしており、スイッチング素子41MMSがオフしている。このため、図4の矢印104に示すように電流が流れ、第2コンデンサ32が充電される。オン期間Ton2では、インダクタ77において電流ILの流れる方向と同じに誘導起電力が生じる。したがって、第2コンデンサ32に、低電圧VsLにインダクタ77の誘導起電力を加算した電圧が印加される。したがって、オン期間Ton2において、第2コンデンサ32の電圧VC2が低電圧VsLよりも高い電圧となるように第2コンデンサ32を充電することができる。オン期間Ton2の間に、誘導起電力は時間の経過とともに徐々に減少する。したがって、図8に示すように、オン期間Ton2の間に電流ILは徐々に減少する。
The switching element 41MMS turns off when the current increase period Tac1 is switched to the on period Ton2. Therefore, in the on period Ton2, the switching element 42MMS is on and the switching element 41MMS is off. Therefore, as shown by the arrow 104 in FIG. 4, a current flows and the second capacitor 32 is charged. In the on-period Ton2, an induced electromotive force is generated in the inductor 77 in the same direction as the current IL flows. Therefore, a voltage obtained by adding the induced electromotive force of the inductor 77 to the low voltage VsL is applied to the second capacitor 32. Therefore, in the on-period Ton2, the second capacitor 32 can be charged so that the voltage VC2 of the second capacitor 32 becomes a voltage higher than the low voltage VsL. During the on-period Ton2, the induced electromotive force gradually decreases over time. Therefore, as shown in FIG. 8, the current IL gradually decreases during the on-period Ton2.
このように、実施例2の低電圧充電制御では、オン期間Ton1において電圧VC1が低電圧VsLよりも高い電圧となるように第1コンデンサ31が充電され、オン期間Ton2において電圧VC2が低電圧VsLよりも高い電圧となるように第2コンデンサ32が充電される。このため、高電位入力配線12と低電位入力配線16の間の電圧VHLが低電圧VsLの2倍よりも高い電圧まで上昇する。したがって、バッテリ18を効率的に充電することができる。このように、実施例2のマルチレベルインバータでも、専用の昇圧コンバータ回路を設けることなく低電圧VsLを利用してバッテリ18を充電することができる。
As described above, in the low voltage charge control of the second embodiment, the first capacitor 31 is charged so that the voltage VC1 becomes higher than the low voltage VsL in the on period Ton1, and the voltage VC2 becomes the low voltage VsL in the on period Ton2. The second capacitor 32 is charged so that the voltage becomes higher than that. Therefore, the voltage VHL between the high-potential input wiring 12 and the low-potential input wiring 16 rises to a voltage higher than twice the low voltage VsL. Therefore, the battery 18 can be charged efficiently. As described above, even in the multi-level inverter of the second embodiment, the battery 18 can be charged by using the low voltage VsL without providing a dedicated boost converter circuit.
また、図8に示すように、電流ILは、オン期間Ton1、Ton2において減少し、電流増加期間Tac1、Tac2において増加する。このため、オン期間Ton1、Ton2と電流増加期間Tac1、Tac2の比率を制御することで、電流ILの大きさを制御することができる。このように電流ILの大きさを制御することで、第1コンデンサ31の電圧VC1及び第2コンデンサ32の電圧VC2を意図した電圧に制御することができる。
Further, as shown in FIG. 8, the current IL decreases in the on period Ton1 and Ton2, and increases in the current increase period Tac1 and Tac2. Therefore, the magnitude of the current IL can be controlled by controlling the ratio of the on period Ton1 and Ton2 and the current increase period Tac1 and Tac2. By controlling the magnitude of the current IL in this way, the voltage VC1 of the first capacitor 31 and the voltage VC2 of the second capacitor 32 can be controlled to the intended voltage.
図10に示す実施例3のマルチレベルインバータ10bは、正極側ダイオード82と負極側ダイオード84を有さない。実施例3のマルチレベルインバータ10bのその他の構成は、実施例1と等しい。また、実施例3のマルチレベルインバータ10bは、低電圧充電制御を実行し、高電圧充電制御を実行しない。実施例3では、低電圧充電制御における各スイッチング素子の制御方法が実施例1とは異なる。
The multi-level inverter 10b of Example 3 shown in FIG. 10 does not have a positive electrode side diode 82 and a negative electrode side diode 84. Other configurations of the multi-level inverter 10b of the third embodiment are the same as those of the first embodiment. Further, the multi-level inverter 10b of the third embodiment executes low voltage charge control and does not execute high voltage charge control. In the third embodiment, the control method of each switching element in the low voltage charge control is different from that of the first embodiment.
実施例3の低電圧充電制御では、制御回路90は、入力スイッチング素子78をオンに維持する。また、制御回路90は、スイッチング素子43MMS及び43OMSをオフに維持する。また、制御回路90は、スイッチング素子41MMS、42OMS、42MMS、41OMSを図11のように制御する。より詳細には、制御回路90は、オン期間Ton1、電流増加期間Tac1、オン期間Ton2、電流増加期間Tac2がこの順序で繰り返すようにスイッチング素子41MMS、42OMS、42MMS、41OMSを制御する。オン期間Ton1では、スイッチング素子41MMS、42OMSがオンしているとともにスイッチング素子42MMS、41OMSがオフしている。電流増加期間Tac1では、スイッチング素子41MMS、42OMS、42MMS、41OMSの全てがオンしている。オン期間Ton2では、スイッチング素子42MMS、41OMSがオンしているとともにスイッチング素子41MMS、42OMSがオフしている。電流増加期間Tac2では、スイッチング素子41MMS、42OMS、42MMS、41OMSの全てがオンしている。
In the low voltage charge control of the third embodiment, the control circuit 90 keeps the input switching element 78 on. The control circuit 90 also keeps the switching elements 43MMS and 43OMS off. Further, the control circuit 90 controls the switching elements 41MMS, 42OMS, 42MMS, and 41OMS as shown in FIG. More specifically, the control circuit 90 controls the switching elements 41MMS, 42OMS, 42MMS, and 41OMS so that the on-period Ton1, the current increase period Tac1, the on-period Ton2, and the current increase period Tac2 repeat in this order. In the on period Ton1, the switching elements 41MMS and 42OMS are on and the switching elements 42MMS and 41OMS are off. In the current increase period Tac1, all of the switching elements 41MMS, 42OMS, 42MMS, and 41OMS are turned on. In the on period Ton2, the switching elements 42MMS and 41OMS are on and the switching elements 41MMS and 42OMS are off. In the current increase period Tac2, all of the switching elements 41MMS, 42OMS, 42MMS, and 41OMS are turned on.
電流増加期間Tac2では、スイッチング素子41MMS、42OMS、42MMS、41OMSの全てがオンすることで、図10の矢印120に示すように電流が流れる。すなわち、電流が、正極72aから、インダクタ77、入力スイッチング素子78、入力ダイオード79、スイッチング素子41MMS、及び、スイッチング素子42MMSを介して負極72bへ流れる。このように、電流は、インダクタ77以外に負荷を通らない。したがって、電流増加期間Tac2では、インダクタ77の誘導起電力が電流ILの流れる方向と逆方向に生じる。また、電流増加期間Tac2では、インダクタ77の誘導起電力が時間の経過とともに減少する。したがって、図11に示すように、電流増加期間Tac2の間に電流ILが増加する。
In the current increase period Tac2, when all of the switching elements 41MMS, 42OMS, 42MMS, and 41OMS are turned on, a current flows as shown by the arrow 120 in FIG. That is, a current flows from the positive electrode 72a to the negative electrode 72b via the inductor 77, the input switching element 78, the input diode 79, the switching element 41 MMS, and the switching element 42 MMS. In this way, the current does not pass through the load other than the inductor 77. Therefore, in the current increase period Tac2, the induced electromotive force of the inductor 77 is generated in the direction opposite to the direction in which the current IL flows. Further, in the current increase period Tac2, the induced electromotive force of the inductor 77 decreases with the passage of time. Therefore, as shown in FIG. 11, the current IL increases during the current increase period Tac2.
電流増加期間Tac2からオン期間Ton1に切り替わるときに、スイッチング素子42MMS、41OMSがオフする。したがって、オン期間Ton1では、スイッチング素子41MMS、42OMSがオンしており、スイッチング素子42MMS、41OMSがオフしている。このため、図12の矢印122に示すように電流が流れる。すなわち、電流が、正極72aから、インダクタ77、入力スイッチング素子78、入力ダイオード79、スイッチング素子41MMS、第1コンデンサ31、ダイオード42LD、及び、スイッチング素子42OMSを介して負極72bへ流れる。このように電流が流れることで、第1コンデンサ31が充電される。オン期間Ton1では、インダクタ77において電流ILの流れる方向と同じに誘導起電力が生じる。したがって、第1コンデンサ31に、低電圧VsLにインダクタ77の誘導起電力を加算した電圧が印加される。したがって、オン期間Ton1において、第1コンデンサ31の電圧VC1が低電圧VsLよりも高い電圧となるように第1コンデンサ31を充電することができる。オン期間Ton1の間に、誘導起電力は時間の経過とともに徐々に減少する。したがって、図11に示すように、オン期間Ton1の間に電流ILは徐々に減少する。
When the current increase period Tac2 is switched to the on period Ton1, the switching elements 42MMS and 41OMS are turned off. Therefore, in the on period Ton1, the switching elements 41MMS and 42OMS are on, and the switching elements 42MMS and 41OMS are off. Therefore, a current flows as shown by the arrow 122 in FIG. That is, a current flows from the positive electrode 72a to the negative electrode 72b via the inductor 77, the input switching element 78, the input diode 79, the switching element 41MMS, the first capacitor 31, the diode 42LD, and the switching element 42OMS. The flow of the current in this way charges the first capacitor 31. In the on period Ton1, an induced electromotive force is generated in the inductor 77 in the same direction as the current IL flows. Therefore, a voltage obtained by adding the induced electromotive force of the inductor 77 to the low voltage VsL is applied to the first capacitor 31. Therefore, in the on period Ton1, the first capacitor 31 can be charged so that the voltage VC1 of the first capacitor 31 becomes a voltage higher than the low voltage VsL. During the on-period Ton1, the induced electromotive force gradually decreases over time. Therefore, as shown in FIG. 11, the current IL gradually decreases during the on-period Ton1.
オン期間Ton1から電流増加期間Tac1に切り替わるときに、スイッチング素子42MMS、41OMSがオンする。したがって、電流増加期間Tac1では、スイッチング素子41MMS、42OMS、42MMS、及び、41OMSの全てがオンしている。このため、電流増加期間Tac1では、電流増加期間Tac2と同様に、図10の矢印120に示すように電流が流れ、電流ILが増加する。
When switching from the on period Ton1 to the current increase period Tac1, the switching elements 42MMS and 41OMS are turned on. Therefore, in the current increase period Tac1, all of the switching elements 41MMS, 42OMS, 42MMS, and 41OMS are turned on. Therefore, in the current increase period Tac1, the current flows and the current IL increases as shown by the arrow 120 in FIG. 10, similarly to the current increase period Tac2.
電流増加期間Tac1からオン期間Ton2に切り替わるときに、スイッチング素子41MMS、42OMSがオフする。したがって、オン期間Ton2では、スイッチング素子42MMS、41OMSがオンしており、スイッチング素子41MMS、42OMSがオフしている。このため、図13の矢印124に示すように電流が流れる。すなわち、電流が、正極72aから、インダクタ77、入力スイッチング素子78、入力ダイオード79、スイッチング素子41OMS、ダイオード41UD、第2コンデンサ32、及び、スイッチング素子42MMSを介して負極72bへ流れる。このように電流が流れることで、第2コンデンサ32が充電される。オン期間Ton2では、インダクタ77において電流ILの流れる方向と同じに誘導起電力が生じる。したがって、第2コンデンサ32に、低電圧VsLにインダクタ77の誘導起電力を加算した電圧が印加される。したがって、オン期間Ton2において、第2コンデンサ32の電圧VC2が低電圧VsLよりも高い電圧となるように第2コンデンサ32を充電することができる。オン期間Ton2の間に、誘導起電力は時間の経過とともに徐々に減少する。したがって、図11に示すように、オン期間Ton2の間に電流ILは徐々に減少する。
When the current increase period Tac1 is switched to the on period Ton2, the switching elements 41MMS and 42OMS are turned off. Therefore, in the on period Ton2, the switching elements 42MMS and 41OMS are on, and the switching elements 41MMS and 42OMS are off. Therefore, a current flows as shown by arrow 124 in FIG. That is, a current flows from the positive electrode 72a to the negative electrode 72b via the inductor 77, the input switching element 78, the input diode 79, the switching element 41OMS, the diode 41UD, the second capacitor 32, and the switching element 42MMS. The flow of the current in this way charges the second capacitor 32. In the on-period Ton2, an induced electromotive force is generated in the inductor 77 in the same direction as the current IL flows. Therefore, a voltage obtained by adding the induced electromotive force of the inductor 77 to the low voltage VsL is applied to the second capacitor 32. Therefore, in the on-period Ton2, the second capacitor 32 can be charged so that the voltage VC2 of the second capacitor 32 becomes a voltage higher than the low voltage VsL. During the on-period Ton2, the induced electromotive force gradually decreases over time. Therefore, as shown in FIG. 11, the current IL gradually decreases during the on-period Ton2.
このように、実施例3の低電圧充電制御では、オン期間Ton1において電圧VC1が低電圧VsLよりも高い電圧となるように第1コンデンサ31が充電され、オン期間Ton2において電圧VC2が低電圧VsLよりも高い電圧となるように第2コンデンサ32が充電される。このため、高電位入力配線12と低電位入力配線16の間の電圧VHLが低電圧VsLの2倍よりも高い電圧まで上昇する。したがって、バッテリ18を効率的に充電することができる。このように、実施例3のマルチレベルインバータ10bでも、専用の昇圧コンバータ回路を設けることなく低電圧VsLを利用してバッテリ18を充電することができる。
As described above, in the low voltage charge control of the third embodiment, the first capacitor 31 is charged so that the voltage VC1 becomes higher than the low voltage VsL in the on period Ton1, and the voltage VC2 becomes the low voltage VsL in the on period Ton2. The second capacitor 32 is charged so that the voltage becomes higher than that. Therefore, the voltage VHL between the high-potential input wiring 12 and the low-potential input wiring 16 rises to a voltage higher than twice the low voltage VsL. Therefore, the battery 18 can be charged efficiently. As described above, even in the multi-level inverter 10b of the third embodiment, the battery 18 can be charged by using the low voltage VsL without providing a dedicated boost converter circuit.
また、図11に示すように、電流ILは、オン期間Ton1、Ton2において減少し、電流増加期間Tac1、Tac2において増加する。このため、オン期間Ton1、Ton2と電流増加期間Tac1、Tac2の比率を制御することで、電流ILの大きさを制御することができる。このように電流ILの大きさを制御することで、第1コンデンサ31の電圧VC1及び第2コンデンサ32の電圧VC2を意図した電圧に制御することができる。
Further, as shown in FIG. 11, the current IL decreases in the on period Ton1 and Ton2, and increases in the current increase period Tac1 and Tac2. Therefore, the magnitude of the current IL can be controlled by controlling the ratio of the on period Ton1 and Ton2 and the current increase period Tac1 and Tac2. By controlling the magnitude of the current IL in this way, the voltage VC1 of the first capacitor 31 and the voltage VC2 of the second capacitor 32 can be controlled to the intended voltage.
なお、図11に示すように、実施例3の低電圧充電制御では、オン期間Ton1の一部の期間において、スイッチング素子42LSがオンする。スイッチング素子42LSがオンすると、ダイオード42LDに流れる電流(図12参照)がダイオード42LDとスイッチング素子42LSに分岐して流れるようになる。これによって、ダイオード42LDで生じる損失が抑制される。図11に示すように、スイッチング素子42LSがオンする期間とスイッチング素子42MMSがオンする期間(すなわち、電流増加期間Tac1、Tac2)の間にはデッドタイムDT1(すなわち、スイッチング素子42LS、42MMSが共にオフとなる期間)が設けられている。デッドタイムDT1によって、スイッチング素子42LS、42MMSの両方がオンとなって中点配線14と低電位入力配線16が短絡することが防止される。なお、実施例3の低電圧充電制御では、スイッチング素子42LSと同様にスイッチング素子41LS、43LSを制御してもよいし、スイッチング素子41LS、43LSをオフに維持してもよい。スイッチング素子42LSと同様にスイッチング素子41LS、43LSをオンしても、スイッチング素子41LS、43LSには電流が流れないので、低電圧充電制御に影響はない。また、ダイオード42LDでそれほど高い損失が生じない場合には、実施例3の低電圧充電制御においてスイッチング素子42LSをオフに維持してもよい。
As shown in FIG. 11, in the low voltage charge control of the third embodiment, the switching element 42LS is turned on during a part of the on period Ton1. When the switching element 42LS is turned on, the current flowing through the diode 42LD (see FIG. 12) branches into the diode 42LD and the switching element 42LS and flows. As a result, the loss caused by the diode 42LD is suppressed. As shown in FIG. 11, the dead time DT1 (that is, the switching elements 42LS and 42MMS are both off) between the period when the switching element 42LS is turned on and the period when the switching element 42MMS is turned on (that is, the current increase periods Tac1 and Tac2). Period) is provided. The dead time DT1 prevents both the switching elements 42LS and 42MMS from being turned on and short-circuiting the midpoint wiring 14 and the low potential input wiring 16. In the low voltage charge control of the third embodiment, the switching elements 41LS and 43LS may be controlled in the same manner as the switching element 42LS, or the switching elements 41LS and 43LS may be kept off. Even if the switching elements 41LS and 43LS are turned on as in the switching element 42LS, no current flows through the switching elements 41LS and 43LS, so that the low voltage charge control is not affected. Further, if the diode 42LD does not cause such a high loss, the switching element 42LS may be kept off in the low voltage charge control of the third embodiment.
また、図11に示すように、実施例3の低電圧充電制御では、オン期間Ton2の一部の期間において、スイッチング素子41USがオンする。スイッチング素子41USがオンすると、ダイオード41UDに流れる電流(図13参照)がダイオード41UDとスイッチング素子41USに分岐して流れるようになる。これによって、ダイオード41UDで生じる損失が抑制される。図11に示すように、スイッチング素子41USがオンする期間とスイッチング素子41MMSがオンする期間(すなわち、電流増加期間Tac1、Tac2)の間にはデッドタイムDT2(すなわち、スイッチング素子41US、41MMSが共にオフとなる期間)が設けられている。デッドタイムDT2によって、スイッチング素子41US、41MMSの両方がオンとなって中点配線14と高電位入力配線12が短絡することが防止される。なお、実施例3の低電圧充電制御では、スイッチング素子41USと同様にスイッチング素子42US、43USを制御してもよいし、スイッチング素子42US、43USをオフに維持してもよい。スイッチング素子41USと同様にスイッチング素子42US、43USをオンしても、スイッチング素子42US、43USには電流が流れないので、低電圧充電制御に影響はない。また、ダイオード41UDでそれほど高い損失が生じない場合には、実施例3の低電圧充電制御においてスイッチング素子41USをオフに維持してもよい。
Further, as shown in FIG. 11, in the low voltage charge control of the third embodiment, the switching element 41US is turned on during a part of the on period Ton2. When the switching element 41US is turned on, the current flowing through the diode 41UD (see FIG. 13) branches into the diode 41UD and the switching element 41US and flows. As a result, the loss caused by the diode 41UD is suppressed. As shown in FIG. 11, the dead time DT2 (that is, the switching elements 41US and 41MMS are both off) between the period when the switching element 41US is turned on and the period when the switching element 41MMS is turned on (that is, the current increasing periods Tac1 and Tac2). Period) is provided. The dead time DT2 prevents both the switching elements 41US and 41MMS from being turned on and short-circuiting the midpoint wiring 14 and the high potential input wiring 12. In the low voltage charge control of the third embodiment, the switching elements 42US and 43US may be controlled in the same manner as the switching element 41US, or the switching elements 42US and 43US may be kept off. Even if the switching elements 42US and 43US are turned on as in the switching element 41US, no current flows through the switching elements 42US and 43US, so that the low voltage charge control is not affected. Further, if the diode 41UD does not cause such a high loss, the switching element 41US may be kept off in the low voltage charge control of the third embodiment.
また、実施例3でも、インダクタ77によってマルチレベルインバータ10b内のスイッチング素子に突入電流が流れることが抑制される。また、実施例3でも、インバータ動作中に入力スイッチング素子78がオフに維持され、出力配線50u、50v、50wに流れる交流電流の波形の崩れが防止される。また、実施例3でも、図6のように、充電回路70が入力コンデンサ76を有さなくてもよい。また、実施例3でも、図7のように、インダクタ77が充電負極配線24に介装されていてもよい。また、実施例3でも、図7のように、充電負極配線24に入力スイッチング素子78と入力ダイオード79を介装されていてもよい。
Further, also in the third embodiment, the inductor 77 suppresses the inrush current from flowing to the switching element in the multi-level inverter 10b. Further, also in the third embodiment, the input switching element 78 is kept off during the operation of the inverter, and the waveform of the alternating current flowing through the output wirings 50u, 50v, and 50w is prevented from collapsing. Further, also in the third embodiment, as shown in FIG. 6, the charging circuit 70 does not have to have the input capacitor 76. Further, also in the third embodiment, as shown in FIG. 7, the inductor 77 may be interposed in the charging negative electrode wiring 24. Further, also in the third embodiment, as shown in FIG. 7, the input switching element 78 and the input diode 79 may be interposed in the charging negative electrode wiring 24.
なお、実施例3の低電圧充電制御において、電流増加期間Tac1、Tac2の少なくとも一方が存在しなくてもよい。また、実施例3の低電圧充電制御において、電流増加期間Tac1、Tac2の代わりに、スイッチング素子41MMS、42OMS、42MMS、41OMSのすべてがオフするオフ期間Toff1、Toff2が設けられていてもよい。この場合、オフ期間Toff1、Toff2においてスイッチング素子41MMS、42OMS、42MMS、41OMSを迂回して正極72aから負極72bへ電流を流すバイパス経路を設けると、スイッチング素子41MMS、42OMS、42MMS、41OMSに印加されるサージ電圧を抑制することができる。
In the low voltage charge control of the third embodiment, at least one of the current increase periods Tac1 and Tac2 does not have to exist. Further, in the low voltage charge control of the third embodiment, the off periods Toff1 and Toff2 in which all of the switching elements 41MMS, 42OMS, 42MMS, and 41OMS are turned off may be provided instead of the current increase periods Tac1 and Tac2. In this case, if a bypass path for passing a current from the positive electrode 72a to the negative electrode 72b is provided by bypassing the switching elements 41MMS, 42OMS, 42MMS, and 41OMS during the off periods Toff1 and Toff2, the current is applied to the switching elements 41MMS, 42OMS, 42MMS, and 41OMS. The surge voltage can be suppressed.
次に、実施例3のマルチレベルインバータ10bを変形した変形例1~3のマルチレベルインバータについて説明する。変形例1~3のマルチレベルインバータは、高電圧充電制御が実施可能となるように実施例3のマルチレベルインバータ10bを変形したものである。
Next, the multi-level inverters of the modified examples 1 to 3 obtained by modifying the multi-level inverter 10b of the third embodiment will be described. The multi-level inverters of the first to third modifications are the ones obtained by modifying the multi-level inverter 10b of the third embodiment so that the high voltage charge control can be performed.
図14に示す変形例1のマルチレベルインバータ10cは、充電ダイオード86を有している。変形例1のマルチレベルインバータ10cのその他の構成は、実施例3のマルチレベルインバータ10bと等しい。
The multi-level inverter 10c of the first modification shown in FIG. 14 has a charging diode 86. Other configurations of the multi-level inverter 10c of the first modification are the same as those of the multi-level inverter 10b of the third embodiment.
充電ダイオード86のアノードは、インダクタ77とリレー74aの間の位置で充電正極配線22に接続されている。充電ダイオード86のカソードは、高電位入力配線12に接続されている。
The anode of the charging diode 86 is connected to the charging positive electrode wiring 22 at a position between the inductor 77 and the relay 74a. The cathode of the charging diode 86 is connected to the high potential input wiring 12.
制御回路90は、供給電圧Vsとして高電圧VsHが印加されたときには、リレー74a、74bをオン、入力スイッチング素子78をオフ、スイッチング素子42OMSをオンに制御する。また、制御回路90は、スイッチング素子41US、41LS、41MMS、41OMS、42US、42LS、42MMS、43US、43LS、43MMS、43OMSをオフに制御する。制御回路90は、高電圧充電制御中にこの制御状態を維持する。このように各部が制御されると、高電圧VsHがバッテリ18の出力電圧Vbよりも高いので、図14の矢印130に示すように電流が流れる。すなわち、正極72aから、充電ダイオード86、バッテリ18、ダイオード42LD、スイッチング素子42OMSを介して負極72bへ電流が流れる。このように電流が流れることで、バッテリ18が充電される。
The control circuit 90 controls the relays 74a and 74b on, the input switching element 78 off, and the switching element 42OMS on when a high voltage VsH is applied as the supply voltage Vs. Further, the control circuit 90 controls the switching elements 41US, 41LS, 41MMS, 41OMS, 42US, 42LS, 42MMS, 43US, 43LS, 43MMS, and 43OMS off. The control circuit 90 maintains this control state during high voltage charge control. When each part is controlled in this way, the high voltage VsH is higher than the output voltage Vb of the battery 18, so that a current flows as shown by the arrow 130 in FIG. That is, a current flows from the positive electrode 72a to the negative electrode 72b via the charging diode 86, the battery 18, the diode 42LD, and the switching element 42OMS. The battery 18 is charged by the current flowing in this way.
図15に示す変形例2のマルチレベルインバータ10dは、インダクタ77、入力スイッチング素子78、入力ダイオード79が図7と同様に充電負極配線24に介装されている。また、変形例2のマルチレベルインバータ10dは、充電ダイオード88を有している。充電ダイオード88のカソードは、インダクタ77とリレー74bの間の位置で充電負極配線24に接続されている。充電ダイオード88のアノードは、低電位入力配線16に接続されている。実施例5のマルチレベルインバータ10dのその他の構成は、実施例3のマルチレベルインバータ10bと等しい。
In the multi-level inverter 10d of the second modification shown in FIG. 15, an inductor 77, an input switching element 78, and an input diode 79 are interposed in the charging negative electrode wiring 24 as in FIG. 7. Further, the multi-level inverter 10d of the second modification has a charging diode 88. The cathode of the charging diode 88 is connected to the charging negative electrode wiring 24 at a position between the inductor 77 and the relay 74b. The anode of the charging diode 88 is connected to the low potential input wiring 16. Other configurations of the multi-level inverter 10d of the fifth embodiment are the same as those of the multi-level inverter 10b of the third embodiment.
制御回路90は、供給電圧Vsとして高電圧VsHが印加されたときには、リレー74a、74bをオン、入力スイッチング素子78をオフ、スイッチング素子41OMSをオンに制御する。また、制御回路90は、スイッチング素子41US、41LS、41MMS、42US、42LS、42MMS、42OMS、43US、43LS、43MMS、43OMSをオフに制御する。制御回路90は、高電圧充電制御中にこの制御状態を維持する。このように各部が制御されると、高電圧VsHがバッテリ18の出力電圧Vbよりも高いので、図15の矢印132に示すように電流が流れる。すなわち、正極72aから、スイッチング素子41OMS、ダイオード41UD、バッテリ18、充電ダイオード88を介して負極72bへ電流が流れる。このように電流が流れることで、バッテリ18が充電される。
The control circuit 90 controls the relays 74a and 74b on, the input switching element 78 off, and the switching element 41OMS on when a high voltage VsH is applied as the supply voltage Vs. Further, the control circuit 90 controls the switching elements 41US, 41LS, 41MMS, 42US, 42LS, 42MMS, 42OMS, 43US, 43LS, 43MMS, and 43OMS off. The control circuit 90 maintains this control state during high voltage charge control. When each part is controlled in this way, the high voltage VsH is higher than the output voltage Vb of the battery 18, so that a current flows as shown by the arrow 132 in FIG. That is, a current flows from the positive electrode 72a to the negative electrode 72b via the switching element 41OMS, the diode 41UD, the battery 18, and the charging diode 88. The battery 18 is charged by the current flowing in this way.
図16に示す変形例3のマルチレベルインバータ10eは、充電ダイオード86、88を有している。変形例3のマルチレベルインバータ10eのその他の構成は、実施例3のマルチレベルインバータ10bと等しい。充電ダイオード86のアノードは、インダクタ77とリレー74aの間の位置で充電正極配線22に接続されている。充電ダイオード86のカソードは、高電位入力配線12に接続されている。充電ダイオード88のカソードは、リレー74bとV相スイッチング回路42の間の位置で充電負極配線24に接続されている。充電ダイオード88のアノードは、低電位入力配線16に接続されている。
The multi-level inverter 10e of the modification 3 shown in FIG. 16 has charging diodes 86 and 88. Other configurations of the multi-level inverter 10e of the third modification are the same as those of the multi-level inverter 10b of the third embodiment. The anode of the charging diode 86 is connected to the charging positive electrode wiring 22 at a position between the inductor 77 and the relay 74a. The cathode of the charging diode 86 is connected to the high potential input wiring 12. The cathode of the charging diode 88 is connected to the charging negative electrode wiring 24 at a position between the relay 74b and the V-phase switching circuit 42. The anode of the charging diode 88 is connected to the low potential input wiring 16.
制御回路90は、供給電圧Vsとして高電圧VsHが印加されたときには、リレー74a、74bをオン、入力スイッチング素子78をオフに制御する。また、制御回路90は、スイッチング素子41US、41LS、41MMS、41OMS、42US、42LS、42MMS、42OMS、43US、43LS、43MMS、43OMSをオフに制御する。制御回路90は、高電圧充電制御中にこの制御状態を維持する。このように各部が制御されると、高電圧VsHがバッテリ18の出力電圧Vbよりも高いので、図16の矢印134に示すように電流が流れる。すなわち、正極72aから、充電ダイオード86、バッテリ18、充電ダイオード88を介して負極72bへ電流が流れる。このように電流が流れることで、バッテリ18が充電される。
The control circuit 90 controls the relays 74a and 74b to be turned on and the input switching element 78 to be turned off when a high voltage VsH is applied as the supply voltage Vs. Further, the control circuit 90 controls off the switching elements 41US, 41LS, 41MMS, 41OMS, 42US, 42LS, 42MMS, 42OMS, 43US, 43LS, 43MMS, 43OMS. The control circuit 90 maintains this control state during high voltage charge control. When each part is controlled in this way, the high voltage VsH is higher than the output voltage Vb of the battery 18, so that a current flows as shown by the arrow 134 in FIG. That is, a current flows from the positive electrode 72a to the negative electrode 72b via the charging diode 86, the battery 18, and the charging diode 88. The battery 18 is charged by the current flowing in this way.
制御回路90は、供給電圧Vsとして低電圧VsLが印加されたときには、実施例4と同様に充電制御を実施する。したがって、バッテリ18を充電することができる。
When a low voltage VsL is applied as the supply voltage Vs, the control circuit 90 performs charge control in the same manner as in the fourth embodiment. Therefore, the battery 18 can be charged.
制御回路90は、供給電圧Vsとして高電圧VsHが印加されたときには、リレー74a、74bをオン、入力スイッチング素子78をオフに制御する。また、制御回路90は、スイッチング素子41US、41LS、41MMS、41OMS、42US、42LS、42MMS、42OMS、43US、43LS、43MMS、43OMSをオフに制御する。このように各部が制御されると、高電圧VsHがバッテリ18の出力電圧Vbよりも高いので、図16の矢印134に示すように電流が流れる。すなわち、正極72aから、充電ダイオード86、バッテリ18、充電ダイオード88を介して負極72bへ電流が流れる。このように電流が流れることで、バッテリ18が充電される。
The control circuit 90 controls the relays 74a and 74b to be turned on and the input switching element 78 to be turned off when a high voltage VsH is applied as the supply voltage Vs. Further, the control circuit 90 controls off the switching elements 41US, 41LS, 41MMS, 41OMS, 42US, 42LS, 42MMS, 42OMS, 43US, 43LS, 43MMS, 43OMS. When each part is controlled in this way, the high voltage VsH is higher than the output voltage Vb of the battery 18, so that a current flows as shown by the arrow 134 in FIG. That is, a current flows from the positive electrode 72a to the negative electrode 72b via the charging diode 86, the battery 18, and the charging diode 88. The battery 18 is charged by the current flowing in this way.
以上に説明したように、変形例1~3のマルチレベルインバータ10c~10eによれば、高電圧充電制御を実行することができる。また、変形例1~3のマルチレベルインバータ10c~10eによれば、実施例3のマルチレベルインバータ10bと同様に、低電圧充電制御を実行することができる。変形例1~3の構成によれば、低電圧VsLと高電圧VsHの供給を共通の充電ポート72によって受けることができるので、マルチレベルインバータ10cを小型化することができる。また、変形例1~3の構成によれば、1つのリレーモジュール74によって充電ポート72を高電圧充電用の回路と低電圧充電用の回路のいずれからも遮断することができる。したがって、マルチレベルインバータ10aを小型化することができる。
As described above, according to the multi-level inverters 10c to 10e of the modified examples 1 to 3, high voltage charge control can be executed. Further, according to the multi-level inverters 10c to 10e of the modifications 1 to 3, low voltage charge control can be executed as in the multi-level inverter 10b of the third embodiment. According to the configurations of the first to third modifications, the low voltage VsL and the high voltage VsH can be supplied by the common charging port 72, so that the multi-level inverter 10c can be miniaturized. Further, according to the configurations of the modified examples 1 to 3, the charging port 72 can be cut off from both the high-voltage charging circuit and the low-voltage charging circuit by one relay module 74. Therefore, the multi-level inverter 10a can be miniaturized.
なお、変形例1~3で説明した充電ダイオード86、88の少なくとも一方を、実施例1または2のマルチレベルインバータに設けてもよい。この場合でも、充電ダイオード86、88の少なくとも一方を介して高電圧による充電を行うことができる。
Note that at least one of the charging diodes 86 and 88 described in the modified examples 1 to 3 may be provided in the multi-level inverter of the first or second embodiment. Even in this case, charging with a high voltage can be performed via at least one of the charging diodes 86 and 88.
なお、上述した実施例において、入力スイッチング素子78及び入力ダイオード79の代わりに、リレー等の接点式スイッチを設けてもよい。この構成でも、インバータ動作時に接点式スイッチをオフすることで、交流電流の波形の崩れを防止できる。
In the above-described embodiment, a contact type switch such as a relay may be provided instead of the input switching element 78 and the input diode 79. Even with this configuration, it is possible to prevent the waveform of the alternating current from collapsing by turning off the contact switch when the inverter is operating.
上述した実施例の各構成要素について説明する。出力配線50uは、第1出力配線の一例である。出力配線50vは、第2出力配線の一例である。出力配線50wは、第3出力配線の一例である。U相スイッチング回路41は、第1スイッチング回路の一例である。
V相スイッチング回路42は、第2スイッチング回路の一例である。W相スイッチング回路43は、第3スイッチング回路の一例である。スイッチング素子41USは、第1上アームスイッチング素子の一例である。スイッチング素子41LSは、第1下アームスイッチング素子の一例である。ダイオード41MMDは、第1中点側中間ダイオードの一例である。ダイオード41OMDは、第1出力側中間ダイオードの一例である。スイッチング素子41MMSは、第1中点側中間スイッチング素子の一例である。スイッチング素子41OMSは、第1出力側中間スイッチング素子の一例である。スイッチング素子42USは、第2上アームスイッチング素子の一例である。スイッチング素子42LSは、第2下アームスイッチング素子の一例である。ダイオード42MMDは、第2中点側中間ダイオードの一例である。ダイオード42OMDは、第2出力側中間ダイオードの一例である。スイッチング素子42MMSは、第2中点側中間スイッチング素子の一例である。スイッチング素子42OMSは、第2出力側中間スイッチング素子の一例である。低電圧充電制御は、昇圧制御の一例である。オン期間Ton1におけるマルチレベルインバータの動作は、第1動作の一例である。オン期間Ton2におけるマルチレベルインバータの動作は、第2動作の一例である。オフ期間Toff1、Toff2におけるマルチレベルインバータの動作は、休止動作の一例である。電流増加期間Tac1、Tac2におけるマルチレベルインバータの動作は、電流増加動作の一例である。 Each component of the above-described embodiment will be described. Theoutput wiring 50u is an example of the first output wiring. The output wiring 50v is an example of the second output wiring. The output wiring 50w is an example of the third output wiring. The U-phase switching circuit 41 is an example of the first switching circuit.
The V-phase switching circuit 42 is an example of a second switching circuit. The W-phase switching circuit 43 is an example of a third switching circuit. The switching element 41US is an example of the first upper arm switching element. The switching element 41LS is an example of the first lower arm switching element. The diode 41MMD is an example of a first midpoint side intermediate diode. The diode 41OMD is an example of the first output side intermediate diode. The switching element 41MMS is an example of the first midpoint side intermediate switching element. The switching element 41OMS is an example of the first output side intermediate switching element. The switching element 42US is an example of the second upper arm switching element. The switching element 42LS is an example of a second lower arm switching element. The diode 42MMD is an example of a second midpoint side intermediate diode. The diode 42OMD is an example of a second output side intermediate diode. The switching element 42MMS is an example of a second midpoint side intermediate switching element. The switching element 42OMS is an example of the second output side intermediate switching element. Low voltage charge control is an example of boost control. The operation of the multi-level inverter in the on-period Ton1 is an example of the first operation. The operation of the multi-level inverter in the on-period Ton2 is an example of the second operation. The operation of the multi-level inverter during the off periods Toff1 and Toff2 is an example of a hibernation operation. The operation of the multi-level inverter in the current increase periods Tac1 and Tac2 is an example of the current increase operation.
V相スイッチング回路42は、第2スイッチング回路の一例である。W相スイッチング回路43は、第3スイッチング回路の一例である。スイッチング素子41USは、第1上アームスイッチング素子の一例である。スイッチング素子41LSは、第1下アームスイッチング素子の一例である。ダイオード41MMDは、第1中点側中間ダイオードの一例である。ダイオード41OMDは、第1出力側中間ダイオードの一例である。スイッチング素子41MMSは、第1中点側中間スイッチング素子の一例である。スイッチング素子41OMSは、第1出力側中間スイッチング素子の一例である。スイッチング素子42USは、第2上アームスイッチング素子の一例である。スイッチング素子42LSは、第2下アームスイッチング素子の一例である。ダイオード42MMDは、第2中点側中間ダイオードの一例である。ダイオード42OMDは、第2出力側中間ダイオードの一例である。スイッチング素子42MMSは、第2中点側中間スイッチング素子の一例である。スイッチング素子42OMSは、第2出力側中間スイッチング素子の一例である。低電圧充電制御は、昇圧制御の一例である。オン期間Ton1におけるマルチレベルインバータの動作は、第1動作の一例である。オン期間Ton2におけるマルチレベルインバータの動作は、第2動作の一例である。オフ期間Toff1、Toff2におけるマルチレベルインバータの動作は、休止動作の一例である。電流増加期間Tac1、Tac2におけるマルチレベルインバータの動作は、電流増加動作の一例である。 Each component of the above-described embodiment will be described. The
The V-
以上、実施形態について詳細に説明したが、これらは例示にすぎず、請求の範囲を限定するものではない。請求の範囲に記載の技術には、以上に例示した具体例をさまざまに変形、変更したものが含まれる。本明細書または図面に説明した技術要素は、単独あるいは各種の組み合わせによって技術有用性を発揮するものであり、出願時請求項記載の組み合わせに限定されるものではない。また、本明細書または図面に例示した技術は複数目的を同時に達成するものであり、そのうちの1つの目的を達成すること自体で技術有用性を持つものである。
Although the embodiments have been described in detail above, these are merely examples and do not limit the scope of claims. The techniques described in the claims include various modifications and modifications of the specific examples illustrated above. The technical elements described in the present specification or the drawings exhibit technical usefulness alone or in various combinations, and are not limited to the combinations described in the claims at the time of filing. In addition, the techniques illustrated in this specification or drawings achieve a plurality of purposes at the same time, and achieving one of the purposes itself has technical usefulness.
Claims (15)
- マルチレベルインバータであって、
バッテリ(18)と、
前記バッテリの正極に接続された高電位入力配線(12)と、
前記バッテリの負極に接続された低電位入力配線(16)と、
中点配線(14)と、
前記中点配線と前記低電位入力配線の間に接続された第1コンデンサ(31)と、
前記高電位入力配線と前記中点配線の間に接続された第2コンデンサ(32)と、
第1出力配線(50u)と、
第2出力配線(50v)と、
第3出力配線(50w)と、
前記高電位入力配線、前記中点配線、前記低電位入力配線、及び、前記第1出力配線に接続された第1スイッチング回路(41)と、
前記高電位入力配線、前記中点配線、前記低電位入力配線、及び、前記第2出力配線に接続された第2スイッチング回路(42)と、
前記高電位入力配線、前記中点配線、前記低電位入力配線、及び、前記第3出力配線に接続された第3スイッチング回路(43)と、
充電回路(70)と、
制御回路(90)、
を有し、
前記第1スイッチング回路が、
前記高電位入力配線と前記第1出力配線の間に接続された第1上アームスイッチング素子(41US)と、
前記第1出力配線と前記低電位入力配線の間に接続された第1下アームスイッチング素子と(41LS)、
アノードが前記中点配線に接続されている第1中点側中間ダイオード(41MMD)と、
カソードが前記第1中点側中間ダイオードのカソードに接続されており、アノードが前記第1出力配線に接続されている第1出力側中間ダイオード(41OMD)と、
前記第1中点側中間ダイオードに対して並列に接続されている第1中点側中間スイッチング素子(41MMS)と、
前記第1出力側中間ダイオードに対して並列に接続されている第1出力側中間スイッチング素子(41OMS)、
を有し、
前記第2スイッチング回路が、
前記高電位入力配線と前記第2出力配線の間に接続された第2上アームスイッチング素子(42US)と、
前記第2出力配線と前記低電位入力配線の間に接続された第2下アームスイッチング素子(42LS)と、
カソードが前記中点配線に接続されている第2中点側中間ダイオード(42MMD)と、
アノードが前記第2中点側中間ダイオードのアノードに接続されており、カソードが前記第2出力配線に接続されている第2出力側中間ダイオード(42OMD)と、
前記第2中点側中間ダイオードに対して並列に接続されている第2中点側中間スイッチング素子(42MMS)と、
前記第2出力側中間ダイオードに対して並列に接続されている第2出力側中間スイッチング素子(42OMS)、
を有し、
前記充電回路が、
直流充電ポート(72)と、
前記直流充電ポートの正極と前記第1中点側中間ダイオードのカソードとを接続する充電正極配線(22)と、
前記直流充電ポートの負極と前記第2中点側中間ダイオードの前記アノードとを接続する充電負極配線(24)、
を有し、
前記制御回路が、前記直流充電ポートに充電器が接続されたときに、前記第1中点側中間スイッチング素子をオンして前記充電器の電力によって前記第1コンデンサを充電する第1動作と、前記第2中点側中間スイッチング素子をオンして前記充電器の電力によって前記第2コンデンサを充電する第2動作とを交互に繰り返す昇圧制御を実行する、
マルチレベルインバータ。 It is a multi-level inverter
Battery (18) and
The high potential input wiring (12) connected to the positive electrode of the battery and
The low potential input wiring (16) connected to the negative electrode of the battery and
Midpoint wiring (14) and
A first capacitor (31) connected between the midpoint wiring and the low potential input wiring,
A second capacitor (32) connected between the high potential input wiring and the midpoint wiring,
1st output wiring (50u) and
2nd output wiring (50v) and
3rd output wiring (50w) and
The high-potential input wiring, the mid-point wiring, the low-potential input wiring, and the first switching circuit (41) connected to the first output wiring.
The high-potential input wiring, the mid-point wiring, the low-potential input wiring, and the second switching circuit (42) connected to the second output wiring.
The high potential input wiring, the midpoint wiring, the low potential input wiring, and the third switching circuit (43) connected to the third output wiring.
Charging circuit (70) and
Control circuit (90),
Have,
The first switching circuit
A first upper arm switching element (41US) connected between the high potential input wiring and the first output wiring, and
The first lower arm switching element connected between the first output wiring and the low potential input wiring (41LS),
The first midpoint side intermediate diode (41MMD) whose anode is connected to the midpoint wiring, and
A first output side intermediate diode (41OMD) in which the cathode is connected to the cathode of the first midpoint side intermediate diode and the anode is connected to the first output wiring,
The first midpoint side intermediate switching element (41MMS) connected in parallel to the first midpoint side intermediate diode, and
A first output side intermediate switching element (41OMS) connected in parallel to the first output side intermediate diode,
Have,
The second switching circuit
A second upper arm switching element (42US) connected between the high potential input wiring and the second output wiring, and
A second lower arm switching element (42LS) connected between the second output wiring and the low potential input wiring, and
A second midpoint side intermediate diode (42MMD) whose cathode is connected to the midpoint wiring, and
A second output side intermediate diode (42OMD) in which the anode is connected to the anode of the second midpoint side intermediate diode and the cathode is connected to the second output wiring,
The second midpoint side intermediate switching element (42MMS) connected in parallel to the second midpoint side intermediate diode, and
A second output side intermediate switching element (42OMS) connected in parallel to the second output side intermediate diode,
Have,
The charging circuit
DC charging port (72) and
The charging positive electrode wiring (22) connecting the positive electrode of the DC charging port and the cathode of the first midpoint side intermediate diode, and
Charging negative electrode wiring (24) connecting the negative electrode of the DC charging port and the anode of the second midpoint side intermediate diode,
Have,
When the charger is connected to the DC charging port, the control circuit turns on the first midpoint side intermediate switching element and charges the first capacitor with the electric power of the charger. A boost control is executed in which the second middle point side intermediate switching element is turned on and the second operation of charging the second capacitor by the electric power of the charger is alternately repeated.
Multi-level inverter. - 前記充電正極配線と前記充電負極配線のいずれか一方を特定充電配線とし、他方を非特定充電配線としたときに、前記特定充電配線に介装されたインダクタ(77)をさらに有する、請求項1に記載のマルチレベルインバータ。 1 The multi-level inverter described in.
- アノードが前記充電正極配線に接続されており、カソードが前記高電位入力配線に接続された正極側ダイオード(82)と、
アノードが前記低電位入力配線に接続されており、カソードが前記充電負極配線に接続された負極側ダイオード(84)、
をさらに有し、
前記特定充電配線が前記充電正極配線であるとともに前記正極側ダイオードの前記アノードが前記インダクタよりも前記第1中点側中間ダイオードに近い側で前記充電正極配線に接続されている、または、前記特定充電配線が前記充電負極配線であるとともに前記負極側ダイオードのカソードが前記インダクタよりも前記第2中点側中間ダイオードに近い側で前記充電負極配線に接続されている、
請求項2に記載のマルチレベルインバータ。 A positive electrode side diode (82) in which the anode is connected to the charging positive electrode wiring and the cathode is connected to the high potential input wiring,
A negative electrode side diode (84), in which the anode is connected to the low potential input wiring and the cathode is connected to the charging negative electrode wiring.
Have more
The specific charging wiring is the charging positive electrode wiring, and the anode of the positive electrode side diode is connected to the charging positive electrode wiring on the side closer to the first midpoint side intermediate diode than the inductor, or the specific charging wiring is connected to the charging positive electrode wiring. The charging wiring is the charging negative electrode wiring, and the cathode of the negative electrode side diode is connected to the charging negative electrode wiring on the side closer to the second midpoint side intermediate diode than the inductor.
The multi-level inverter according to claim 2. - 前記第1動作では、前記第1出力側中間スイッチング素子、前記第2中点側中間スイッチング素子、及び、前記第2出力側中間スイッチング素子をオフし、
前記第2動作では、前記第1中点側中間スイッチング素子、前記第1出力側中間スイッチング素子、及び、前記第2出力側中間スイッチング素子をオフする、
請求項3に記載のマルチレベルインバータ。 In the first operation, the first output side intermediate switching element, the second midpoint side intermediate switching element, and the second output side intermediate switching element are turned off.
In the second operation, the first midpoint side intermediate switching element, the first output side intermediate switching element, and the second output side intermediate switching element are turned off.
The multi-level inverter according to claim 3. - 前記第1動作では、前記第1上アームスイッチング素子、前記第1下アームスイッチング素子、前記第2上アームスイッチング素子、及び、前記第2下アームスイッチング素子をオフし、
前記第2動作では、前記第1上アームスイッチング素子、前記第1下アームスイッチング素子、前記第2上アームスイッチング素子、及び、前記第2下アームスイッチング素子をオフする、
請求項4に記載のマルチレベルインバータ。 In the first operation, the first upper arm switching element, the first lower arm switching element, the second upper arm switching element, and the second lower arm switching element are turned off.
In the second operation, the first upper arm switching element, the first lower arm switching element, the second upper arm switching element, and the second lower arm switching element are turned off.
The multi-level inverter according to claim 4. - 前記昇圧制御において、前記制御回路が、前記第1動作と、前記第2動作と、休止動作を繰り返し、
前記休止動作では、前記第1中点側中間スイッチング素子、前記第1出力側中間スイッチング素子、前記第2中点側中間スイッチング素子、及び、前記第2出力側中間スイッチング素子をオフする、
請求項3~5のいずれか一項に記載のマルチレベルインバータ。 In the boost control, the control circuit repeats the first operation, the second operation, and the pause operation.
In the pause operation, the first midpoint side intermediate switching element, the first output side intermediate switching element, the second midpoint side intermediate switching element, and the second output side intermediate switching element are turned off.
The multi-level inverter according to any one of claims 3 to 5. - 前記昇圧制御において、前記制御回路が、前記第1動作と、前記第2動作と、電流増加動作を繰り返し、
前記電流増加動作では、前記第1中点側中間スイッチング素子と前記第2中点側中間スイッチング素子をオンする、
請求項3~5のいずれか一項に記載のマルチレベルインバータ。 In the boost control, the control circuit repeats the first operation, the second operation, and the current increasing operation.
In the current increasing operation, the first midpoint side intermediate switching element and the second midpoint side intermediate switching element are turned on.
The multi-level inverter according to any one of claims 3 to 5. - 前記第1動作では、前記第2出力側中間スイッチング素子をオンし、
前記第2動作では、前記第1出力側中間スイッチング素子をオンする、
請求項2に記載のマルチレベルインバータ。 In the first operation, the second output side intermediate switching element is turned on, and the second output side intermediate switching element is turned on.
In the second operation, the first output side intermediate switching element is turned on.
The multi-level inverter according to claim 2. - 前記昇圧制御において、前記制御回路が、前記第1動作と、前記第2動作と、電流増加動作を繰り返し、
前記電流増加動作では、前記第1中点側中間スイッチング素子と前記第2中点側中間スイッチング素子をオンする、
請求項8に記載のマルチレベルインバータ。 In the boost control, the control circuit repeats the first operation, the second operation, and the current increasing operation.
In the current increasing operation, the first midpoint side intermediate switching element and the second midpoint side intermediate switching element are turned on.
The multi-level inverter according to claim 8. - 前記インダクタに対して直列に前記特定充電配線に接続されたスイッチ(78、79)をさらに有する請求項2~9のいずれか一項に記載のマルチレベルインバータ。 The multi-level inverter according to any one of claims 2 to 9, further comprising a switch (78, 79) connected to the specific charging wiring in series with the inductor.
- 前記スイッチが、
前記特定充電配線に介装された半導体スイッチング素子(78)と、
前記特定充電配線に流れる電流に対して順方向となるように前記半導体スイッチング素子に対して直列に前記特定充電配線に介装されたダイオード(79)、
を有する請求項10に記載のマルチレベルインバータ。 The switch
A semiconductor switching element (78) interposed in the specific charging wiring and
A diode (79) interposed in the specific charging wiring in series with the semiconductor switching element so as to be in the forward direction with respect to the current flowing through the specific charging wiring.
The multi-level inverter according to claim 10. - 前記非特定充電配線と前記インダクタ及び前記スイッチよりも前記直流充電ポートに近い側の前記特定充電配線とを接続する入力コンデンサ(76)をさらに有する請求項10または11に記載のマルチレベルインバータ。 The multi-level inverter according to claim 10 or 11, further comprising an input capacitor (76) for connecting the non-specific charging wiring to the inductor and the specific charging wiring closer to the DC charging port than the switch.
- 前記入力コンデンサよりも前記直流充電ポートに近い側で前記充電正極配線及び前記充電負極配線をオン-オフするリレー(74)をさらに有する請求項12に記載のマルチレベルインバータ。 The multi-level inverter according to claim 12, further comprising a relay (74) for turning on / off the charging positive electrode wiring and the charging negative electrode wiring on the side closer to the DC charging port than the input capacitor.
- 前記特定充電配線が前記充電正極配線であり、
アノードが前記インダクタと前記リレーの間で前記充電正極配線に接続されており、カソードが前記バッテリの正極に接続された充電ダイオード(82)をさらに有する請求項13に記載のマルチレベルインバータ。 The specific charging wiring is the charging positive electrode wiring,
The multi-level inverter according to claim 13, wherein the anode is connected to the charging positive electrode wiring between the inductor and the relay, and the cathode further has a charging diode (82) connected to the positive electrode of the battery. - 前記特定充電配線が前記充電負極配線であり、
カソードが前記インダクタと前記リレーの間で前記充電負極配線に接続されており、アノードが前記バッテリの負極に接続された充電ダイオード(84)をさらに有する請求項13に記載のマルチレベルインバータ。
The specific charging wiring is the charging negative electrode wiring,
The multi-level inverter according to claim 13, wherein the cathode is connected to the charging negative electrode wiring between the inductor and the relay, and the anode further comprises a charging diode (84) connected to the negative electrode of the battery.
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