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WO2022087903A1 - 发光基板及其制备方法和发光装置 - Google Patents

发光基板及其制备方法和发光装置 Download PDF

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Publication number
WO2022087903A1
WO2022087903A1 PCT/CN2020/124472 CN2020124472W WO2022087903A1 WO 2022087903 A1 WO2022087903 A1 WO 2022087903A1 CN 2020124472 W CN2020124472 W CN 2020124472W WO 2022087903 A1 WO2022087903 A1 WO 2022087903A1
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WIPO (PCT)
Prior art keywords
layer
material layer
light
emitting
opening
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PCT/CN2020/124472
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English (en)
French (fr)
Inventor
卢志高
张宜驰
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京东方科技集团股份有限公司
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Application filed by 京东方科技集团股份有限公司 filed Critical 京东方科技集团股份有限公司
Priority to US17/611,930 priority Critical patent/US12101952B2/en
Priority to PCT/CN2020/124472 priority patent/WO2022087903A1/zh
Priority to CN202080002523.3A priority patent/CN114698402A/zh
Priority to EP20959066.0A priority patent/EP4145552A4/en
Publication of WO2022087903A1 publication Critical patent/WO2022087903A1/zh
Priority to US18/800,299 priority patent/US20240407186A1/en

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/20—Changing the shape of the active layer in the devices, e.g. patterning
    • H10K71/231—Changing the shape of the active layer in the devices, e.g. patterning by etching of existing layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/10—OLEDs or polymer light-emitting diodes [PLED]
    • H10K50/11—OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/10—OLEDs or polymer light-emitting diodes [PLED]
    • H10K50/11—OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers
    • H10K50/115—OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers comprising active inorganic nanostructures, e.g. luminescent quantum dots
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/122—Pixel-defining structures or layers, e.g. banks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K2101/00—Properties of the organic materials covered by group H10K85/00
    • H10K2101/30—Highest occupied molecular orbital [HOMO], lowest unoccupied molecular orbital [LUMO] or Fermi energy values
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K2101/00—Properties of the organic materials covered by group H10K85/00
    • H10K2101/40—Interrelation of parameters between multiple constituent active layers or sublayers, e.g. HOMO values in adjacent layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K2102/00—Constructional details relating to the organic devices covered by this subclass
    • H10K2102/301—Details of OLEDs
    • H10K2102/321—Inverted OLED, i.e. having cathode between substrate and anode
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K2102/00—Constructional details relating to the organic devices covered by this subclass
    • H10K2102/301—Details of OLEDs
    • H10K2102/351—Thickness
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/1201—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/30—Devices specially adapted for multicolour light emission
    • H10K59/35—Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels

Definitions

  • the present disclosure relates to the technical field of lighting and display, and in particular, to a light-emitting substrate, a preparation method thereof, and a light-emitting device.
  • QLED Quantum Dot Light Emitting Diodes, quantum dot light-emitting diode
  • a light-emitting substrate comprising: a substrate; a first material layer and a second material layer disposed on the substrate, the first material layer being close to the substrate relative to the second material layer Bottom, the material of the first material layer includes conductive material or carrier transport material, the second material layer is a patterned material layer, including a plurality of patterns, each pattern and the first material layer between both have overlapping regions; an etch stop layer located between the first material layer and the second material layer, the etch stop layer at least includes a portion located in each overlap region, the etch stop layer The portion of the layer at each overlapping region is in contact with the first material layer and the second material layer at the corresponding position, and the material of the etch stop layer includes at least one of a metal material, a metal oxide, and a metal fluoride ; the energy level of the portion of the etch stop layer located in each overlapping region matches the energy level of the first material layer and the energy level of the second material layer located at the corresponding location.
  • it further includes: a pixel definition layer disposed on the substrate, the pixel definition layer defines a plurality of openings, each pattern is located in one opening, and the etch stop layer at least comprises a plurality of openings located in each opening. part of an opening.
  • the etch stop layer further includes a portion located outside each opening, and the thickness of the portion of the etch stop layer located in each opening is less than or equal to the thickness of the etch stop layer located in each opening The thickness of the portion outside the opening.
  • the portion of the etching barrier layer located in each opening is a single-layer structure or a double-layer structure; in the case where the portion of the etching barrier layer located in each opening is a single-layer structure,
  • the material of the part of the etching stopper layer located in each opening is the same as the material of the part of the etching stopper layer located outside each opening, including aluminum oxide, silver oxide, molybdenum oxide and lithium fluoride.
  • the portion of the etching barrier layer located in each opening includes metal sequentially arranged in a direction away from the substrate layer and metal oxide layer; the material of the metal layer includes metal aluminum and/or metal silver, and the material of the metal oxide layer includes the corresponding oxides of metal aluminum and/or metal silver; the etching barrier layer is located at The material of the portion other than each opening is the same as the material of the metal layer.
  • the difference between the thickness of the portion of the etch stop layer located outside each opening and the thickness of the portion of the etch stop layer located within each opening is less than 5 nm.
  • the thickness of the portion of the etch stop layer outside each opening is 0.5-50 nm.
  • the first material layer is an electron transport layer
  • the second material layer is a quantum dot light-emitting layer
  • the first material layer is a cathode layer
  • the second material layer is an electron transport layer layer
  • the etch barrier layer is located at The absolute value of the difference between the LUMO energy level of the portion in each opening and the Fermi level of the first material layer at the corresponding position, and the portion of the etch barrier layer in each opening The absolute value of the energy level difference between the LUMO energy level of and the LUMO energy level of the second material layer located at the corresponding position is all less than 0.15 eV.
  • the first material layer is a cathode layer
  • the second material layer is an electron transport layer
  • the etching barrier layer is a double-layer structure, the portion of the etching barrier layer located in each opening Including a first surface close to the first material layer and a second surface close to the second material layer, the LUMO energy level of the first surface and the Fermi energy of the first material layer located at the corresponding position
  • the absolute value of the difference between the energy levels of the second surface and the LUMO energy level of the second material layer at the corresponding position is less than 0.15 eV.
  • the first material layer is an electron transport layer
  • the second material layer is a quantum dot light-emitting layer
  • the etching barrier layer is a single-layer structure
  • the etching barrier The absolute value of the difference between the LUMO energy level of the portion of the layer located in each opening and the energy level of the LUMO energy level of the first material layer located at the corresponding position, and the etch barrier layer located in each opening.
  • the absolute value of the energy level difference between the partial LUMO energy level and the LUMO energy level of the second material layer at the corresponding position is less than 0.15 eV.
  • the etch barrier layer is a double-layer structure
  • the etch barrier layer is located in each opening
  • the part includes a first surface close to the first material layer and a second surface close to the second material layer, and the LUMO energy level of the first surface is related to the fee of the first material layer located at the corresponding position.
  • the absolute value of the difference between the energy levels of the meter level, and the absolute value of the difference between the LUMO energy levels of the second surface and the second material layer at the corresponding position is less than 0.15 eV.
  • the light-emitting layer includes i different light-emitting patterns, where i is an integer greater than or equal to 2.
  • the plurality of openings include i opening groups, and each opening group corresponds to a light-emitting pattern; the thickness of the portion of the etch barrier layer located in the jth opening group is the same as the thickness of the etch barrier layer. The thickness of the part of the layer located in the kth opening group is the same; j and k are respectively any one of 1 to i, and the values of j and k are different.
  • the light-emitting substrate when the first material layer is a cathode layer, the light-emitting substrate further includes: an anode layer located on the side of the first material layer away from the substrate, located on the anode layer and the anode layer. A quantum dot light-emitting layer between the second material layers, and a hole transport layer between the quantum dot light-emitting layer and the anode layer.
  • the first material layer is an electron transport layer
  • the light-emitting substrate further includes: an anode layer located on the side of the first material layer away from the substrate, and an anode layer located on the anode layer and the second material hole transport layer between layers.
  • a light-emitting substrate comprising: a substrate; a first material layer and a second material layer disposed on the substrate, the first material layer being close to the second material layer relative to the second material layer
  • the material of the first material layer includes a conductive material or a carrier transport material
  • the second material layer is a patterned material layer, including a plurality of patterns, each pattern and the first material layer Each has an overlapping area
  • a third material layer is located between the first material layer and the second material layer, the third material layer at least includes a part located in each overlapping area, the third material layer The part of the material layer located in each overlapping area is in contact with the first material layer and the second material layer located at the corresponding position
  • the third material layer is a double-layer structure, including a metal layer and a metal oxide layer, the metal layer
  • the material of the layer includes metallic aluminum and/or metallic silver
  • the material of the metal oxide layer includes the corresponding oxide of the metallic aluminum and/or metallic silver
  • the third material layer is located in
  • a light-emitting device comprising: the above-mentioned light-emitting substrate.
  • a method for preparing a light-emitting substrate comprising:
  • a first material layer, an etch barrier layer and a second material layer are sequentially formed on the substrate, the material of the first material layer includes a conductive material or a carrier transport material, and the second material layer is a patterned material layer, including a plurality of patterns, each pattern and the first material layer have an overlapping area; the etching barrier layer at least includes a portion located in each overlapping area, the etching barrier layer is located in each Parts of the overlapping regions are in contact with the first material layer and the second material layer at the corresponding positions, and the material of the etch stop layer includes at least one of a metal material, a metal oxide, and a metal fluoride; the The energy level of the portion of the etch stop layer at each overlapping region matches the energy level of the first material layer and the energy level of the second material layer at the corresponding location.
  • the second material layer includes one or i patterns, where i is an integer greater than or equal to 2; the first material layer, the etching barrier layer and the second material are sequentially formed on the substrate layers, including:
  • a first material layer and a first thin film are sequentially formed on the substrate, and the material of the first thin film includes at least one of metallic aluminum and metallic silver, or the material of the first thin film includes aluminum oxide, silver oxide, at least one of molybdenum oxide and lithium fluoride; sequentially forming the jth sacrificial layer and the jth photoresist layer on the substrate formed with the first material layer and the first thin film; forming the jth sacrificial layer and the jth photoresist layer by exposing and developing A photoresist pattern layer to expose the part of the jth sacrificial layer located in the jth region; use plasma to bombard the part of the jth sacrificial layer located in the jth region to remove the jth sacrificial layer located in the jth region part; forming a second thin film on the substrate from which the part of the jth sacrificial layer located in the jth region is removed, the second thin film comprising the part located in
  • the method when the first material layer is a cathode layer, the method further includes: before forming the first thin film, forming a pixel definition layer; when the first material layer is an electron transport layer The method further includes: before forming the first material layer, forming the pixel defining layer; the pixel defining layer defines a plurality of openings; the plurality of openings include i opening groups; the jth region is The area where the jth opening group is located in the i opening groups.
  • the working gas used in the plasma is an oxygen-containing gas, so as to remove the jth sacrificial After the portion of the layer located in the jth region, a corresponding oxide layer of the metal aluminum and/or metal silver is formed on the surface of the first thin film located in the jth region.
  • the working gas used in the plasma includes at least one of oxygen and argon.
  • the forming the first thin film on the substrate includes: forming the first thin film on the substrate through an evaporation process.
  • FIG. 1 is a cross-sectional structural view of a light-emitting substrate according to some embodiments
  • FIG. 2 is a cross-sectional structural view of a light-emitting substrate according to other embodiments.
  • FIG. 3 is a cross-sectional structural view of a light-emitting substrate according to other embodiments.
  • FIG. 4 is a cross-sectional structural view of a light-emitting substrate according to other embodiments.
  • FIG. 5 is a cross-sectional structural view of a light-emitting substrate according to other embodiments.
  • FIG. 6 is a cross-sectional structural view of a light-emitting substrate according to other embodiments.
  • FIG. 7 is a top view and a cross-sectional view in the direction of A-A' of a light-emitting substrate according to some embodiments;
  • FIG. 8 is a cross-sectional structural view of a light-emitting substrate according to further embodiments.
  • FIG. 9 is a flow diagram of forming the patterned electron transport layer shown in FIG. 3 in accordance with some embodiments.
  • FIG. 10 is a flow diagram of forming the patterned light-emitting layer shown in FIG. 3 in accordance with some embodiments;
  • FIG. 11 is a flow diagram of forming a patterned electron transport layer as shown in FIG. 5 in accordance with some embodiments;
  • FIG. 12 is a flowchart of forming the patterned light-emitting layer shown in FIG. 7 in accordance with some embodiments.
  • FIG. 13 is a graph showing the evaluation of surface roughness using the arithmetic mean deviation Ra of the profile as a parameter, according to some embodiments.
  • first and second are only used for descriptive purposes, and should not be construed as indicating or implying relative importance or implicitly indicating the number of indicated technical features. Thus, a feature defined as “first” or “second” may expressly or implicitly include one or more of that feature.
  • plural means two or more.
  • At least one of A, B, and C has the same meaning as “at least one of A, B, or C”, and both include the following combinations of A, B, and C: A only, B only, C only, A and B , A and C, B and C, and A, B, and C.
  • a and/or B includes the following three combinations: A only, B only, and a combination of A and B.
  • Exemplary embodiments are described herein with reference to cross-sectional and/or plan views that are idealized exemplary drawings.
  • the thickness of layers and regions are exaggerated for clarity. Accordingly, variations from the shapes of the drawings due to, for example, manufacturing techniques and/or tolerances, are contemplated.
  • example embodiments should not be construed as limited to the shapes of the regions shown herein, but to include deviations in shapes due, for example, to manufacturing. For example, an etched area shown as a rectangle will typically have curved features.
  • the regions illustrated in the figures are schematic in nature and their shapes are not intended to illustrate the actual shape of a region of a device and are not intended to limit the scope of example embodiments.
  • a light-emitting device which includes a light-emitting substrate, and may of course include other components, such as a circuit for providing an electrical signal to the light-emitting substrate to drive the light-emitting substrate to emit light, and the circuit may called the control circuit.
  • the circuit may include a circuit board and/or an IC (Integrate Circuit) electrically connected to the light-emitting substrate.
  • the light-emitting device may be a lighting device, and in this case, the light-emitting device is used as a light source to realize a lighting function.
  • the light-emitting device may be a backlight module in a liquid crystal display device, a lamp for internal or external lighting, or various signal lights, and the like.
  • the light-emitting device may be a display device for displaying images (ie, pictures).
  • the light emitting device may include a display or a product including a display.
  • the display may be a flat panel display (Flat Panel Display, FPD), a microdisplay, and the like. Displays can be transparent or opaque depending on whether the user can see the scene behind the display. Depending on whether the display can be bent or rolled, the display may be a flexible display or a normal display (which may be called a rigid display).
  • products incorporating displays may include: computer monitors, televisions, billboards, laser printers with display capabilities, telephones, cell phones, Personal Digital Assistants (PDAs), laptop computers, digital cameras, camcorders Recorders, viewfinders, vehicles, large walls, theater screens or stadium signage, etc.
  • PDAs Personal Digital Assistants
  • laptop computers digital cameras
  • camcorders Recorders viewfinders
  • vehicles large walls, theater screens or stadium signage, etc.
  • the light-emitting substrate 1 includes a substrate 11 , a first material layer 12 and a second material layer 13 disposed on the substrate 11 ,
  • the first material layer 12 is closer to the substrate 11 with respect to the second material layer 13 .
  • the material of the first material layer 12 includes conductive material or carrier transport material, and the second material layer 13 is a patterned material layer including a plurality of patterns 131 . There is an overlapping area J between each of the patterns 131 and the first material layer 12 .
  • the light-emitting substrate 1 includes a plurality of light-emitting devices 100, and each light-emitting device 100 includes a first electrode 101, a second electrode 102, a light-emitting layer 103 disposed between the first electrode 101 and the second electrode 102, and a light-emitting layer 103 disposed between the first electrode 101 and the second electrode 102.
  • the carrier transport layer 104 between the light-emitting layer 103 and the first electrode 101 and the second electrode 102 it can be known that in the first case (the case where the first material layer 12 includes a conductive material), as shown in FIG. 1,
  • the first material layer 12 can be an electrode layer
  • the second material layer 13 can be a patterned carrier transport layer.
  • the first material layer 12 can be a cathode layer, and the second material layer 13 can be a pattern.
  • Electron transport layer (Electronic Transport Layer, ETL), each electron transport layer ETL is a pattern.
  • the substrate 11 may be a substrate on which a pixel driving circuit is formed, and the first material layer 12 includes a plurality of spaced cathodes, each electron transport layer ETL and one cathode having an overlap region J between them.
  • the first material layer 12 may be an electron transport layer ETL
  • the second material layer 13 may be a pattern in this case
  • the luminescent layer includes a plurality of luminescent patterns.
  • the substrate 11 may be a substrate on which a pixel driving circuit, a cathode layer and a pixel defining layer 14 are formed, and the pixel defining layer 14 defines a plurality of openings K.
  • the first material layer 12 may The entire layer is covered, or, as shown in FIG. 3 , the first material layer 12 only includes a portion located in each opening K, each light-emitting pattern is located in one opening K, and the first material layer 12 located in the opening K is located in the opening K. An overlapping region J is formed therebetween.
  • the light-emitting substrate 1 further includes an etching barrier layer 15 located between the first material layer 12 and the second material layer 13 , and the etching barrier layer 15 at least includes The parts of the etch barrier layer 15 in each overlap region J are in contact with the first material layer 12 and the second material layer 13 located at the corresponding positions, and the material of the etch barrier layer 15 includes metal At least one of a material, a metal oxide and a metal fluoride; the energy level of the portion of the etch stop layer 15 located in each overlapping region J and the energy level of the first material layer 12 and the second material located at the corresponding positions The energy levels of layer 13 are matched.
  • the light-emitting substrate 1 may further include a pixel defining layer 14 disposed on the substrate 11 .
  • the pixel defining layer 14 defines a plurality of openings K, and each pattern 131 is located in one Opening K.
  • the etch stop layer 15 includes at least a portion located in each of the openings K.
  • the first material layer 12 may be a cathode layer
  • the second material layer 13 may be an electron transport layer
  • the first material layer 12 may be an electron transport layer
  • the second material layer 13 may be a light-emitting layer, such as an organic light-emitting layer. layer or quantum dot light-emitting layer, etc.
  • a sacrificial layer 20 and a photoresist layer 30 can be formed on the substrate 11 on which the pixel defining layer 14 is formed first, and then part of the photoresist is removed by exposure and development to expose part of the sacrificial layer 20, as shown in FIG. 9 ( b) The structure shown in b), and then the exposed sacrificial layer 20 is removed by a dry etching process. After removing the exposed sacrificial layer 20, the structure shown in (c) in FIG. The thin film 40 with electron transport function is obtained as shown in (d) in FIG.
  • a sacrificial layer 20 and a photoresist layer 30 are formed on the substrate 11 with the pixel defining layer 14, and then part of the photoresist is removed by exposure and development to expose part of the sacrificial layer 20, and the structure shown in FIG. 10(b) is obtained, Then, the exposed sacrificial layer 20 is removed by a dry etching process. After removing the exposed sacrificial layer 20, the structure shown in (c) of FIG. 10 is obtained, and a thin film 50 with a light-emitting function is formed on the substrate 11 by spin coating. The structure shown in (d) of FIG.
  • each light-emitting pattern is located in an opening K.
  • high-energy plasma is usually used to bombard the sacrificial layer 20 located at the position of each opening K.
  • the etching stopper layer 15 By setting the etching stopper layer 15 such that the etching stopper layer 15 includes at least a portion located in each opening K, in the case of bombarding the sacrificial layer 20 with high-energy plasma, due to the presence of the etching stopper layer 15 , can effectively avoid the impact of high-energy plasma bombardment on the underlying film material (such as the cathode layer or the electron transport layer), which is not conducive to the efficiency and stability of the device.
  • the underlying film material such as the cathode layer or the electron transport layer
  • the material of the etch stop layer 15 includes at least one of metal materials, metal oxides and metal fluorides, in the related art, an organic macromolecule layer is arranged between the electron transport layer and the sacrificial layer 20 or an organic Compared with the electron transport layer made of the nanomaterial of the ligand, the etching barrier layer 15 is made of an inorganic material, which is more resistant to high-energy plasma.
  • the etching barrier layer 15 further includes a portion outside each opening K, and the portion of the etching barrier layer 15 located in each opening K is The thickness D2 is less than or equal to the thickness D1 of the portion of the etching stopper layer 15 located outside each opening K.
  • the etching barrier layer 15 is between the electron transport layer and the sacrificial layer 20 in the related art Compared with setting organic macromolecular layers or using nanomaterials containing organic ligands to make electron transport layers, although they can better withstand plasma bombardment, these inorganic materials can still be etched away by plasma breakdown.
  • the etching stopper layer 15 is located outside each opening K
  • the difference between the thickness D1 of the portion of the etch stop layer 15 and the thickness D2 of the portion of the etch stop layer 15 located in each opening K may also be different.
  • the portion D2 of the etching barrier layer 15 located in each opening K is a single-layer structure or a double-layer structure.
  • the material and the etching barrier of the portion of the etching barrier layer 15 located in each opening K The material of the portion of the layer 15 located outside each opening K is the same, and includes at least one of aluminum oxide, silver oxide, molybdenum oxide and lithium fluoride.
  • the portion of the etching barrier layer 15 located in each opening K has a double-layer structure, as shown in FIG. 5 and FIG.
  • the direction of the metal layer 151 and the metal oxide layer 152 are arranged in sequence.
  • the material of the metal layer 151 includes metallic aluminum and/or metallic silver
  • the material of the metal oxide layer 152 includes corresponding oxides of metallic aluminum and/or metallic silver.
  • the material of the portion of the etching stopper layer 15 outside each opening K is the same as the material of the metal layer 151 .
  • the part of the etching barrier layer 15 located in each opening K is a single-layer structure, according to the plasma bombardment will remove a certain thickness of inorganic material, it can be known that during the dry etching process, A material with a thinner breakdown thickness, such as aluminum oxide, silver oxide, molybdenum oxide and/or lithium fluoride, can be selected as the etching barrier layer 15, which is beneficial to improve the etching barrier effect.
  • the portion of the etching barrier layer 15 located in each opening K has a double-layer structure, according to the fact that the oxygen atoms in the plasma will react with the metal material during the plasma bombardment process to generate metal oxides, it can be obtained that It is known that, before dry etching, a metal thin film can be formed on the substrate 11, and an oxygen-containing gas is used as the working gas, and plasma is used to bombard the sacrificial layer 20 located at the position of each opening K.
  • the oxygen atoms in the plasma Oxidation reaction occurs with the part of the metal thin film located at the position of each opening K, and a metal oxide layer can be formed on the surface of the part of the metal thin film located at the position of each opening K, thereby forming a double-layer structure with the metal layer 151 and the metal oxide layer 152 etch stop layer 15.
  • the formation of metal oxides can increase the density of the film and make it more resistant to plasma bombardment.
  • the metal oxide layer no longer reacts with oxygen atoms, which can protect the underlying aluminum from continuing to be bombarded by plasma to be broken down, thereby improving the tolerance of the etching barrier layer 15 .
  • the thinner aluminum oxide film can also play the role of blocking electrons, so that electron and hole transport are more balanced.
  • the energy level of the portion of the etching barrier layer 15 located in each overlapping region J matches the energy level of the first material layer 12 and the energy level of the second material layer 13 located at the corresponding positions, which means that for a For the light-emitting device 100, when the first material layer 12 is the cathode layer and the second material layer 13 is the electron transport layer, the LUMO (Lowest Unoccupied Molecular Orbital, the lowest unoccupied molecular orbital) energy level of the etching barrier layer 15 It is located between the Fermi level of the first material layer 12 and the LUMO level of the second material layer 13 .
  • the LUMO energy level of the etching barrier layer 15 is located between the LUMO energy level of the first material layer 12 and the LUMO energy level of the second material layer 13 between energy levels.
  • the material of the part of the etching barrier layer 15 located in each overlapping region J may be same or different.
  • the LUMO energy level may be the same. It can be known that in the case where the portion of the etching barrier layer 15 located in each opening K has a single-layer structure The LUMO energy level of the part of the etching barrier layer 15 located in each opening K is the same.
  • the first material layer 12 can be a cathode layer or an electron transport layer, it can be known that, as shown in FIG. 6 and FIG.
  • the LUMO energy level of the part of the etching barrier layer 15 located in each opening K is the same as that of the first material layer located at the corresponding position.
  • the absolute value of the energy level difference of the Fermi level of the material layer 12, and the LUMO energy level of the portion of the etching barrier layer 15 located in each opening K and the LUMO energy level of the second material layer 13 located at the corresponding position may all be the same.
  • the LUMO energy level of the portion of the etching barrier layer 15 located in each opening K is the same as that of the first material located at the corresponding position.
  • the absolute value of the energy level difference of the LUMO energy level of the material layer 12, and the difference between the LUMO energy level of the portion of the etching barrier layer 15 located in each opening K and the LUMO energy level of the second material layer 13 located at the corresponding position may all be the same.
  • the Fermi level of the cathode layer may be -4.1 eV.
  • the material of each electron transport layer may be the same, and it can be known that the LUMO energy level of each electron transport layer may be the same, for example, it may be -4.3eV.
  • the etching barrier layer 15 is located in each The LUMO levels of the parts in the opening K may all be -4.2 eV.
  • the first material layer 12 is an electron transport layer ETL
  • the second material layer 13 is a quantum dot light-emitting layer
  • the light-emitting colors of the plurality of light-emitting devices 100 may be the same or different
  • the etching blocking layer 15 is located at each opening.
  • the absolute value of the difference between the LUMO energy level of the part in K and the LUMO energy level of the second material layer 13 at the corresponding position may be the same or different.
  • the light-emitting material of each light-emitting device may be a red quantum dot light-emitting material.
  • the light-emitting layer may include a light-emitting pattern, For example, in the red quantum dot light-emitting pattern, at this time, the absolute difference between the LUMO energy level of the part of the etching barrier layer 15 located in each opening K and the energy level of the LUMO energy level of the second material layer 13 located at the corresponding position The values may all be the same, eg, all 0.1 eV.
  • the light-emitting layer may include i different light-emitting patterns, where i is an integer greater than or equal to 2.
  • the light-emitting layer may include a red quantum dot light-emitting pattern R, a green quantum dot light-emitting pattern G, and a blue quantum dot light-emitting pattern B.
  • the absolute difference between the LUMO energy level of the portion of the etching barrier layer 15 located between the different quantum dot light emitting patterns and the electron transport layer and the energy level of the LUMO energy level of the second material layer at the corresponding position The value can be different, such as the energy level difference between the LUMO energy level of the portion of the etch blocking layer 15 located between the red quantum dot light emitting pattern R and the electron transport layer and the LUMO energy level of the red quantum dot light emitting pattern R located at the corresponding position.
  • the energy level difference between the LUMO energy level of the portion of the etching barrier layer 15 located between the green quantum dot light emitting pattern G and the electron transport layer and the LUMO energy level of the green quantum dot light emitting pattern G located at the corresponding position is 0.11 eV
  • the energy level difference between the LUMO energy level of the portion of the etching barrier layer 15 located between the blue quantum dot light emitting pattern B and the electron transport layer and the LUMO energy level of the blue quantum dot light emitting pattern B located at the corresponding position is 0.12eV.
  • the LUMO energy levels of the portions of the etch stop layer 15 located in each of the overlapping regions J may be the same.
  • the above is only the case where the material of the portion of the etch stop layer 15 located in each overlapping region J is the same, and in the case where the material of the portion of the etch stop layer 15 located in each overlap region J is different, according to the etch stop layer 15.
  • the part located in each opening K may include metal layers and metal oxide layers stacked in sequence along the direction away from the substrate 11. It can be known that the first material layer 12 is a cathode layer, and the second material layer 13 is an electron layer.
  • the energy level of the portion of the etch stop layer 15 located in each overlapping region J matches the energy level of the first material layer 12 and the second material layer 13 located at the corresponding positions, that is, the etched
  • the energy level of the metal layer of the portion of the etch stop layer 15 at each overlapping region J matches the energy levels of the first material layer 12 and the metal oxide layer at the corresponding position, and the etch stop layer 15 is located at each intersection.
  • the energy level of the metal oxide layer in the portion of the stack region J matches the energy level of the metal layer and the second material layer 13 at the corresponding position, that is, at the portion of the etch stop layer 15 in each opening K
  • the LUMO energy level of the first surface 15a is located between the Fermi energy level of the first material layer 12 and the LUMO energy level of the second surface 15b
  • the LUMO energy level of the second surface 15b is located in the first surface. between the LUMO energy level of 15 a and the LUMO energy level of the second material layer 13 .
  • the materials of the cathode layers in the plurality of light-emitting devices 100 may be the same, and the materials of the electron transport layers in the plurality of light-emitting devices 100 may be the same, it can be known that the LUMO energy of the first surface 15a
  • the absolute value of the difference between the energy level of the first material layer 12 and the Fermi level of the first material layer 12 at the corresponding position may be the same, for example, it may be less than 0.15 eV
  • the LUMO energy level of the second surface 15b may be the same as that at the corresponding position.
  • the absolute value of the difference between the LUMO energy levels of the second material layer may also be the same, for example, less than 0.15 eV.
  • the etching barrier layer 15 is located at The energy level of the part of each overlapping region J matches the energy level of the first material layer 12 and the second material layer 13 located at the corresponding position, which means that, for one light emitting device 100, the energy level of the first surface 15a
  • the LUMO energy level is located between the LUMO energy level of the first material layer 12 and the LUMO energy level of the second surface 15b
  • the LUMO energy level of the second surface 15b is located between the LUMO energy level of the first surface 15a and the LUMO energy level of the second material layer 13 between energy levels.
  • the materials of the electron transport layers in the plurality of light emitting devices 100 may be the same, it can be known that the LUMO energy level of the first surface 15a and the Fermi energy level of the first material layer 12 located at the corresponding positions
  • the absolute value of the difference between the energy levels can also be the same, for example, can be less than 0.15eV.
  • the materials of the quantum dot transport layers in the multiple light-emitting devices 100 may be the same or different, it can be known that when the multiple light-emitting devices 100 emit the same color, such as red light, the light-emitting color of each light-emitting device 100
  • the materials may all be red quantum dot light-emitting materials.
  • the light-emitting layer may include a light-emitting pattern, such as a red quantum dot light-emitting pattern.
  • the LUMO energy level of the second surface 15b is the same as that of the first light-emitting layer at the corresponding position.
  • the absolute value of the difference between the LUMO energy levels of the two material layers 13 may be the same, for example, 0.1 eV.
  • the light-emitting layer may include i different light-emitting patterns, where i is an integer greater than or equal to 2.
  • the light-emitting layer may include a red quantum dot light-emitting pattern R, a green quantum dot light-emitting pattern G, and a blue quantum dot light-emitting pattern B.
  • the first surface 15a of the portion of the etching blocking layer 15 located in each overlapping region J is the same.
  • the LUMO levels of the two surfaces 15b may be the same or different.
  • the absolute value of the energy level difference between the LUMO energy level of the second surface 15b and the LUMO energy level of the second material layer 13 located at the corresponding position may also be the same or different.
  • the absolute value of the energy level difference between the LUMO energy level of the second surface 15b and the LUMO energy level of the red quantum dot light-emitting pattern R located at the corresponding position, the LUMO energy level of the second surface 15b The absolute value of the difference between the energy level of the LUMO energy level of the green quantum dot light-emitting pattern G at the corresponding position, the LUMO energy level of the second surface 15b and the LUMO energy level of the blue quantum dot light-emitting pattern B at the corresponding position
  • the absolute value of the difference between the energy levels can be the same, such as 0.1eV.
  • the LUMO energy level of the red quantum dot luminescence pattern R the LUMO energy level of the green quantum dot luminescence pattern G and the blue quantum dot luminescence pattern
  • the LUMO energy levels of B are different, and the LUMO energy levels of the second surface 15b of the portion of the etching barrier layer 15 located in each overlapping region J are also different.
  • the etching barrier layer 15 is located in the red quantum dot light-emitting pattern R
  • the LUMO energy levels of the second surface 15b of the portion of the etch stop layer 15 located between the blue quantum dot light emitting pattern B and the electron transport layer may be -3.7 eV, -3.6 eV and -3.5 eV, respectively.
  • the absolute value of the difference between the LUMO energy level of the second surface 15b and the LUMO energy level of the red quantum dot light emitting pattern R located at the corresponding position, the LUMO energy level of the second surface 15b and the LUMO energy level of the red quantum dot light emitting pattern R located at the corresponding position The absolute value of the energy level difference between the LUMO energy levels of the green quantum dot light-emitting pattern G at the corresponding position, the energy of the LUMO energy level of the second surface 15b and the LUMO energy level of the blue quantum dot light-emitting pattern B at the corresponding position
  • the absolute value of the level difference can be different, eg, 0.13 eV, 0.12 eV and 0.11 eV, respectively.
  • the LUMO energy level of the red quantum dot light emitting pattern R the LUMO energy level of the green quantum dot light emitting pattern G, and the LUMO energy level of the blue quantum dot light emitting pattern B, they are -3.63 eV, -3.62 eV, and -3.63 eV, respectively. 3.61 eV, the LUMO level of the second surface 15b of the portion between the red quantum dot light-emitting pattern R and the electron transport layer of the etching barrier layer 15 is located, and the etching barrier layer 15 is located between the green quantum dot light-emitting pattern G and the electron transport layer.
  • the LUMO energy level of the second surface 15b in the part between the etch barrier layer 15 and the second surface 15b in the part between the blue quantum dot light-emitting pattern B and the electron transport layer may be the same, such as both. -3.5eV.
  • the energy level of the portion of the etch stop layer 15 located in each overlapping region J match the energy levels of the first material layer 12 and the second material layer 13 located at the corresponding positions, it is possible to The etch stop layer 15 is made not to affect carrier transport and injection.
  • the thickness D1 of the portion of the etching barrier layer 15 located outside each opening K and the thickness D2 of the portion of the etching barrier layer 15 located in each opening K are between The difference is less than 5nm.
  • the etching barrier layer 15 under the premise of taking into account the bombardment speed, bombardment time and energy of the plasma, by selecting an appropriate material for the etching barrier layer 15, the etching barrier layer 15 finally obtained is located between each opening K.
  • the difference between the thickness D1 of the outer portion and the thickness D2 of the portion of the etching barrier layer 15 located in each opening K is controlled within a range of less than 5 nm, which can achieve a good etching barrier effect.
  • the thickness D1 of the portion of the etching barrier layer 15 located outside each opening K is 0.5 to 50 nm.
  • the thickness D2 of the portion of the etching barrier layer 15 outside each opening K is 0.5 to 50 nm.
  • the plurality of openings K include i opening groups Q, where i is an integer greater than or equal to 2; each opening group Q corresponds to a light-emitting pattern.
  • the thickness D2 of the portion of the etching barrier layer 15 located in the jth opening group Qj is the same as the thickness D2 of the portion of the etching barrier layer 15 located in the kth opening group Qk; j and k are any one of 1 to i, respectively, And the values of j and k are different.
  • the part of the etching barrier layer 15 located in the jth opening group Qj is connected to the etching barrier. Under the condition that the portion of the layer 15 located in the kth opening group Qk is bombarded by plasma at the same speed, time and energy, the thickness D2 of the portion of the etching barrier layer 15 located in the jth opening group Qj is the same as that of the etching barrier layer 15 located in the jth opening group Qj.
  • the thickness D2 of the part in the kth opening group is the same; the speed, time and When the energy is different, the thickness D2 of the portion of the etching barrier layer 15 located in the jth opening group Qj is different from the thickness D2 of the portion of the etching barrier layer 15 located in the kth opening group Qk.
  • the thickness D2 of the portion of the etching barrier layer 15 located in the jth opening group Qj is the same as the thickness D2 of the portion of the etching barrier layer 15 located in the kth opening group Qk.
  • the quantum dot light-emitting material described above is mainly composed of IIB-VIA, IIIA-VA or IVA-VIA group elements, for example, the quantum dot light-emitting material may include ZnS, ZnSe, ZnTe, CdS, CdSe, CdTe, One or more of HgTe, InP, CuInS, CuInSe, CuInSeS and AgInS.
  • the quantum dots in the quantum dot emissive material may have a core-shell structure.
  • quantum dot light-emitting materials can include CdS/ZnS, CdSe/ZnS, CdSe/ZnSeS, CdSe/CdS, ZnSe/ZnS, InP/ZnS, CuInS/ZnS, AgInS/ZnS, CuInSe/ZnS, CuInSeS/ZnS or PbS/ZnS Wait. Among them, before “/" is the core, after "/" is the shell.
  • the quantum dot light-emitting material may further include ligands, and the ligands are combined with the quantum dots.
  • the emission spectra of quantum dots with different sizes and materials are in different wavelength regions.
  • the luminescence spectrum of ZnS quantum dots of different sizes basically covers the ultraviolet region
  • the luminescence spectrum of CdSe quantum dots basically covers the visible light region
  • the luminescence spectrum of PbSe quantum dots basically covers the infrared region.
  • quantum dot light-emitting materials with different sizes and materials can be selected according to different light-emitting colors.
  • the light-emitting substrate 1 when the first material layer 12 is the cathode layer, the light-emitting substrate 1 further includes: a side of the first material layer 12 away from the substrate 11 .
  • the light-emitting substrate 1 when the first material layer 12 is an electron transport layer, the light-emitting substrate 1 further includes: an anode layer 16 located on the side of the first material layer 12 away from the substrate 11 , and an anode layer 16 located on the side of the first material layer 12 away from the substrate 11 . and the hole transport layer 17 between the second material layer 13 .
  • the light-emitting substrate 1 includes a substrate 11 , a first material layer 12 and a second material layer 13 disposed on the substrate 11 ,
  • the first material layer 12 is closer to the substrate 11 with respect to the second material layer 13 .
  • the material of the first material layer 12 includes conductive material or carrier transport material, and the second material layer 13 is a patterned material layer including a plurality of patterns 131 . There is an overlapping area J between each of the patterns 131 and the first material layer 12 .
  • the light-emitting substrate 1 includes a plurality of light-emitting devices 100, and each light-emitting device 100 includes a first electrode 101, a second electrode 102, a light-emitting layer 103 disposed between the first electrode 101 and the second electrode 102, and a light-emitting layer 103 disposed between the first electrode 101 and the second electrode 102.
  • the carrier transport layer 104 between the light-emitting layer 103 and the first electrode 101 and the second electrode 102 it can be known that the first case (the case where the first material layer 12 includes a conductive material), as shown in FIG. 5,
  • the first material layer 12 can be an electrode layer
  • the second material layer 13 can be a patterned carrier transport layer.
  • the first material layer 12 can be a cathode layer, and the second material layer 13 can be a pattern. Electron transport layer (Electronic Transport Layer, ETL), each electron transport layer ETL is a pattern.
  • the substrate 11 may be a substrate on which a pixel driving circuit is formed, and the first material layer 12 includes a plurality of spaced cathodes, each electron transport layer ETL and one cathode having an overlap region J between them.
  • the second case the case where the material of the first material layer 12 includes a carrier transport material
  • the first material layer 12 may be an electron transport layer ETL, and at this time, the second material layer 13 may be a pattern
  • the luminescent layer includes a plurality of luminescent patterns.
  • the substrate 11 may be a substrate on which a pixel driving circuit, a cathode layer and a pixel defining layer 14 are formed, and the pixel defining layer 14 defines a plurality of openings K.
  • the first material layer 12 may The entire layer is covered, or, as shown in FIG. 3 , the first material layer 12 only includes a portion located in each opening K, each light-emitting pattern is located in one opening K, and the first material layer 12 located in the opening K is located in the opening K. An overlapping region J is formed therebetween.
  • the light-emitting substrate 1 further includes a third material layer 18 located between the first material layer 12 and the second material layer 13 , and the third material layer 18 at least includes The parts of the overlapping regions J, the part of the third material layer 18 located in each overlapping region J is in contact with the first material layer 12 and the second material layer 13 located at the corresponding positions, and the third material layer 18 includes metal, metal At least one of oxides and metal fluorides; the energy level of the portion of the third material layer 18 located in each overlapping region J is the same as the energy level of the first material layer 12 and the energy level of the second material layer 13 located at the corresponding positions energy levels match.
  • the etching stopper layer 15 in the case of forming a patterned electron transport layer or a light emitting layer, by forming the etching stopper layer 15 on the substrate 11 at least at a portion located in each opening K, it is possible to apply plasma to the underlying film.
  • the impact of high-energy plasma bombardment on the underlying film material can be solved, which is not conducive to the efficiency and stability of the device. It can be known that after the bombardment is completed, the etching barrier layer 15 will not be completely bombarded, but will remain. At this time, the portion of the etching barrier layer 15 left on the substrate 11 is the third Material layer 18 .
  • the third material layer 18 In the presence of the third material layer 18, in order that the portion of the third material layer 18 located in each overlapping region J will not affect the injection and transport of electrons and holes, the third material layer 18 needs to satisfy :
  • the energy level of the portion of the third material layer 18 located in each overlapping region J matches the energy level of the first material layer 12 and the energy level of the second material layer 13 located at the corresponding positions.
  • the working gas used in the plasma may be incapable of reacting with the metal when the plasma bombardment is performed above. gases, such as argon, etc.
  • gases such as argon, etc.
  • the material of the etching barrier layer 15 only includes metal materials. It does not react with the plasma, therefore, the material of the portion of the remaining third material layer located in each overlapping region J also only includes metal material.
  • the material of the etching barrier layer 15 includes metal fluoride and/or metal oxide.
  • the remaining The material of the portion of the third material layer 18 located in each overlapping region J also includes only metal fluorides and/or metal oxides.
  • the working gas used in the plasma can be a gas that can react with metal, such as an oxygen-containing gas.
  • metal such as an oxygen-containing gas.
  • the material of the etching barrier layer 15 includes a metal material.
  • the metal material will react with the oxygen atoms in the plasma to form a metal oxide
  • the third material layer 18 may be a double-layer structure including a metal layer and a metal oxide layer.
  • the material of the metal layer includes metallic aluminum and/or metallic silver, and the material of the metal oxide layer includes corresponding oxides of metallic aluminum and/or metallic silver.
  • the material of the etching barrier layer 15 does not include metal materials.
  • the material of the etching barrier layer 15 may include metal oxides and/or metal fluorides, such as oxide In the case of at least one of aluminum, silver oxide, molybdenum oxide, and lithium fluoride.
  • the remaining part of the third material layer 18 located in each overlapping region J may be a single-layer structure, and at this time , the material of the part of the third material layer 18 located outside each opening K and the material of the part of the third material layer 18 located in each opening K may be the same, for example, both include aluminum oxide, silver oxide, molybdenum oxide and lithium fluoride at least one of them.
  • the description that the energy level of the portion of the third material layer 18 located in each overlapping region J matches the energy level of the first material layer 12 and the energy level of the second material layer 13 located at the corresponding positions can be referred to.
  • the above description that the energy level of the portion of the etch barrier layer 15 located in each overlapping region J matches the energy level of the first material layer 12 and the energy level of the second material layer 13 located at the corresponding positions is omitted here. Repeat.
  • Some embodiments of the present disclosure provide a method for preparing a light-emitting substrate, including:
  • a first material layer 12 , an etching barrier layer 15 and a second material layer 13 are sequentially formed on the substrate 11 .
  • the material of the first material layer 12 includes a conductive material or a carrier transport material.
  • the second material layer 13 is a patterned material layer, and includes a plurality of patterns 131 . There is an overlapping area J between each of the patterns 131 and the first material layer 12 .
  • the etching barrier layer 15 at least includes a portion located in each overlapping region J, and the portion of the etching blocking layer 15 located in each overlapping region J is in contact with the first material layer 12 and the second material layer 13 located at the corresponding positions,
  • the material of the etching barrier layer 15 includes at least one of metal materials, metal oxides and metal fluorides; the energy level of the portion of the etching barrier layer 15 located in each overlapping region J and the first material located at the corresponding position
  • the energy level of the layer 12 is matched with the energy level of the second material layer 13 .
  • first material layer 12 may be a cathode layer
  • the second material layer 13 may be an electron transport layer
  • the second material layer 13 may be formed by the same patterning process.
  • the second material layer 13 can be regarded as the same pattern.
  • the second material layer 13 includes a pattern 131 .
  • the first material layer 12 may be an electron transport layer
  • the second material layer 13 may be a light-emitting layer.
  • the light-emitting devices 100 may include light-emitting devices 100 that emit light of the same color, and the light-emitting layer may emit monochromatic light.
  • the second material layer 13 can be regarded as the same pattern.
  • the second material layer 13 also includes a pattern 131 .
  • the plurality of light-emitting devices 100 may include light-emitting devices that emit light of different colors
  • the second material layer 13 may be regarded as including different light-emitting patterns, such as including three patterns: red quantum dot light-emitting pattern R, green quantum dot light-emitting pattern G and blue quantum dot luminescence pattern B.
  • the second material layer 13 includes one or i patterns, where i is an integer greater than or equal to 2.
  • a first material layer 12, an etch stop layer 15 and a second material layer 13 are sequentially formed on the substrate 11, as shown in FIG. 11 and FIG. 12, including:
  • the material of the first thin film 200 includes metallic aluminum and/or metallic silver, or the material of the first thin film 200 includes at least one of aluminum oxide, silver oxide, molybdenum oxide, and lithium fluoride.
  • the material of the first material layer 12 may include ITO (Indium Tin Oxides, indium tin oxide).
  • ITO Indium Tin Oxides, indium tin oxide
  • a photoresist layer is formed thereon, and then the first material layer 12 is formed through exposure, development and etching processes.
  • the first material layer 12 may further include: forming a pixel defining layer 14 on the substrate on which the first material layer 12 is formed, the pixel defining layer 14 defines a plurality of openings K, and each opening K is exposed a cathode.
  • the first thin film 200 is formed on the substrate 11 on which the pixel defining layer 14 is formed.
  • the substrate 11 may be a substrate on which pixel driving circuits have been formed.
  • the material of the first material layer 12 may include nano-zinc oxide, and the first material layer 12 may be formed by spin coating or printing process. At this time, the first thin film 200 may be directly formed on the substrate on which the first material layer 12 is formed.
  • the substrate 11 may be a substrate on which a pixel driving circuit, a cathode layer and a pixel defining layer 14 have been formed. In this case, the first material layer 12 may cover the entire layer, or may only be formed in the opening K defined by the pixel defining layer 14 .
  • the first thin film 200 may be formed by evaporation, deposition or sputtering.
  • forming the first thin film 200 on the substrate 11 includes:
  • the first thin film 200 is formed on the substrate 11 through an evaporation process.
  • Ra is the arithmetic mean deviation of the contour. As shown in Fig. 13, the arithmetic mean deviation Ra of the contour takes the center line as the reference line, and the sum of the mean value of the contour peak height and the mean value of the contour valley depth within the sampling length L is used as the contour micro-roughness average height.
  • first thin film 200 through the evaporation process can reduce the roughness of the surface of the first thin film 200, and it is not easy to damage other film layers during the film forming process.
  • the spikes easily pierce the electron transport layer, causing a short circuit between the metal and the cathode layer.
  • the second material layer 13 is a patterned electron transport layer
  • the second material layer 13 can be regarded as including only one pattern, in this case, j is equal to 1
  • the jth sacrificial layer The layer 300 may be denoted as a first sacrificial layer
  • the j-th photoresist layer 400 may be denoted as a first photoresist layer.
  • the first material layer 12 is an electron transport layer
  • the second material layer 13 is a patterned light-emitting layer
  • the light-emitting layer may include one light-emitting pattern or i light-emitting patterns.
  • j may also be equal to 1
  • the jth sacrificial layer 300 and the jth photoresist layer 400 may also be recorded as the first sacrificial layer and the first photoresist layer, respectively.
  • the light-emitting layer includes i types of light-emitting patterns
  • j is each of 1 ⁇ i.
  • the j-th sacrificial layer 300 can be respectively denoted as the first sacrificial layer, . . . , the (i-1)th sacrificial layer and The i sacrificial layer.
  • the jth photoresist layer 400 may also be denoted as the first photoresist layer, . . . , the (i-1)th photoresist layer and the ith photoresist layer, respectively.
  • the light-emitting layer including three light-emitting patterns such as red quantum dot light-emitting pattern, green quantum dot light-emitting pattern and blue quantum dot light-emitting pattern
  • the red quantum dot light-emitting pattern, green quantum dot light-emitting pattern and blue quantum dot light-emitting pattern are respectively used.
  • the quantum dot light-emitting patterns are respectively denoted as the first quantum dot light-emitting pattern, the second quantum dot light-emitting pattern and the third quantum dot light-emitting pattern.
  • the first quantum dot light-emitting pattern is formed, the first material layer 12 and the third quantum dot light-emitting pattern are formed.
  • a first sacrificial layer and a first photoresist layer are sequentially formed on the substrate 11 of a thin film 200 .
  • a second sacrificial layer and a second photoresist layer are sequentially formed on the substrate on which the first material layer 12 and the first thin film 200 are formed.
  • a third sacrificial layer and a third photoresist layer are sequentially formed on the substrate on which the first material layer 12 and the first thin film 200 are formed.
  • the above also includes forming the pixel defining layer 14 .
  • the plurality of openings K include i opening groups Q.
  • the jth region is the region where the jth opening group Qj in the i opening group Qi is located. For example, if j is equal to 1, and the first quantum dot light-emitting pattern is a red quantum dot light-emitting pattern as an example, the jth region is the region where the first opening group Q1 is located, that is, the region where the red quantum dot light-emitting pattern is located.
  • Plasma is used to bombard the part of the jth sacrificial layer 300 located in the jth region, or plasma can be used to bombard the part of the jth sacrificial layer 300 located in the region of the jth opening group Qj.
  • the working gas used in the plasma includes at least one of oxygen and argon. While using the plasma to bombard the part of the jth sacrificial layer located in the jth region, the high-energy plasma will also bombard the part of the first thin film 200 located in the jth region. Avoid high-energy plasma damage to the underlying film.
  • the working gas used in the plasma is an oxygen-containing gas, so as to remove the part of the jth sacrificial layer located in the jth region when removing the jth sacrificial layer. After that, a corresponding oxide layer of metallic aluminum and/or metallic silver is formed on the surface of the first thin film 200 located in the jth region.
  • the oxygen atoms in the plasma can react with the aluminum atoms and/or silver atoms on the surface of metal aluminum and/or metal silver to generate metal aluminum and/or metal
  • the corresponding oxide of silver can form a corresponding metal oxide layer on the surface of the metal film.
  • the metal oxide layer is denser and more resistant to plasma bombardment than with other working gases.
  • the metal oxide no longer reacts with oxygen atoms, which can shield the metal in the lower layer, and prevent the plasma from breaking down the metal in the lower layer, thereby affecting the lower layer film material.
  • forming a metal oxide layer can also block electrons, which is conducive to a more balanced electron and hole transport.
  • the second thin film 300 includes the part located in the jth region and the jth photoresist pattern layer 401 located away from the surface of the substrate 11 part.
  • the second thin film 500 may be a thin film with electron transport function, and may be formed by spin coating or evaporation process.
  • the second thin film 500 can be a thin film with a light-emitting function, and can be formed by spin coating or printing process.
  • the second film 300 may be a red quantum dot light-emitting film.
  • the part of the jth sacrificial layer outside the jth region can be removed by dissolving an organic solvent, so that the jth photoresist pattern layer 401 and the second film 500 on the jth sacrificial layer can be located outside the jth region parts are removed together.
  • the first material layer 12 is a cathode layer and the second material layer 13 is an electron transport layer
  • j can be equal to 1
  • the above jth region is In the area where each opening K is located above, at this time, the etching barrier layer 15 includes a portion located in each opening K, and is formed by the same bombardment process.
  • the etching barrier layer 15 may also include a portion located in each opening K, and the portions of the etching barrier layer 14 located in different opening groups are respectively formed by different bombardment processes.
  • the first material layer 12 is the cathode layer
  • the second material layer 13 is the electron transport layer
  • the first material layer 12 is the electron transport layer
  • the second material layer 13 is the light emitting layer.
  • the second material layer 13 can be any material layer that needs to be patterned, and is not limited to the above two situations, and the above first material layer 12 and second material layer 13 can be one or more layers respectively.
  • the materials of the multi-layer first material layer 12 may be different.
  • the multi-layer first material layer 12 may be a cathode layer and an electron transport layer respectively.
  • the light-emitting substrate 1 may include an etching blocking layer 15 formed between the cathode layer and the electron transport layer, and an etching blocking layer 15 formed between the electron transport layer and the light-emitting layer.

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Abstract

一种发光基板，包括：衬底；设置于衬底上的第一材料层和第二材料层，第一材料层相对于第二材料层靠近衬底，第一材料层的材料包括导电材料或载流子传输材料，第二材料层为图案化的材料层，包括多个图案，每个图案和第一材料层之间均具有交叠区域；位于第一材料层和第二材料层之间的刻蚀阻挡层，刻蚀阻挡层至少包括位于每个交叠区域的部分，刻蚀阻挡层位于每个交叠区域的部分与位于相应位置处的第一材料层和第二材料层接触，刻蚀阻挡层的材料包括金属材料、金属氧化物和金属氟化物中的至少一种；刻蚀阻挡层位于每个交叠区域的部分的能级与位于相应位置处的第一材料层的能级和第二材料层的能级相匹配。

Description

发光基板及其制备方法和发光装置 技术领域
本公开涉及照明和显示技术领域，尤其涉及一种发光基板及其制备方法和发光装置。
背景技术
相对于OLED(Organic Light-Emitting Diode，有机发光二极管)发光器件来说，QLED(Quantum Dot Light Emitting Diodes，量子点发光二极管)发光器件具有理论发光效率更高、颜色可调、色域更广、色彩饱和度和鲜艳度更好、能耗成本更低等优点。
发明内容
一方面，提供一种发光基板，包括：衬底；设置于所述衬底上的第一材料层和第二材料层，所述第一材料层相对于所述第二材料层靠近所述衬底，所述第一材料层的材料包括导电材料或载流子传输材料，所述第二材料层为图案化的材料层，包括多个图案，每个图案和所述第一材料层之间均具有交叠区域；位于所述第一材料层和所述第二材料层之间的刻蚀阻挡层，所述刻蚀阻挡层至少包括位于每个交叠区域的部分，所述刻蚀阻挡层位于每个交叠区域的部分与位于相应位置处的第一材料层和第二材料层接触，所述刻蚀阻挡层的材料包括金属材料、金属氧化物和金属氟化物中的至少一种；所述刻蚀阻挡层位于每个交叠区域的部分的能级与位于相应位置处的所述第一材料层的能级和所述第二材料层的能级相匹配。
在一些实施例中，还包括：设置于所述衬底上的像素界定层，所述像素界定层限定出多个开口，每个图案位于一个开口中，所述刻蚀阻挡层至少包括位于每个开口中的部分。
在一些实施例中，所述刻蚀阻挡层还包括位于每个开口之外的部分，所述刻蚀阻挡层位于每个开口中的部分的厚度小于或等于所述刻蚀阻挡层位于每个开口之外的部分的厚度。
在一些实施例中，所述刻蚀阻挡层位于每个开口中的部分为单层结构或双层结构；在所述刻蚀阻挡层位于每个开口中的部分为单层结构的情况下，所述刻蚀阻挡层位于每个开口中的部分的材料和所述刻蚀阻挡层位于每个开口之外的部分的材料相同，均包括氧化铝、氧化银、氧化钼和氟化锂中的至少一种；在所述刻蚀阻挡层位于每个开口中的部分为双层结构的情况下，所述刻蚀阻挡层位于每个开口中的部分包括沿远离衬底的方向依次设置的金属 层和金属氧化物层；所述金属层的材料包括金属铝和/或金属银，所述金属氧化物层的材料包括金属铝和/或金属银的相应氧化物；所述刻蚀阻挡层位于每个开口之外的部分的材料与所述金属层的材料相同。
在一些实施例中，所述刻蚀阻挡层位于每个开口之外的部分的厚度与所述刻蚀阻挡层位于每个开口中的部分的厚度之差小于5nm。
在一些实施例中，所述刻蚀阻挡层位于每个开口之外的部分的厚度为0.5～50nm。
在一些实施例中，所述第一材料层为电子传输层，所述第二材料层为量子点发光层；或者，所述第一材料层为阴极层，所述第二材料层为电子传输层。
在一些实施例中，在所述第一材料层为阴极层，所述第二材料层为电子传输层，且所述刻蚀阻挡层为单层结构的情况下，所述刻蚀阻挡层位于每个开口中的部分的LUMO能级与位于相应位置处的所述第一材料层的费米能级的能级之差的绝对值，以及所述刻蚀阻挡层位于每个开口中的部分的LUMO能级与位于相应位置处的所述第二材料层的LUMO能级的能级之差的绝对值均小于0.15eV。在所述第一材料层为阴极层，所述第二材料层为电子传输层，且所述刻蚀阻挡层为双层结构的情况下，所述刻蚀阻挡层位于每个开口中的部分包括靠近所述第一材料层的第一表面和靠近所述第二材料层的第二表面，所述第一表面的LUMO能级与位于相应位置处的所述第一材料层的费米能级的能级之差的绝对值，以及所述第二表面与位于相应位置处的所述第二材料层的LUMO能级之差的绝对值小于0.15eV。
在一些实施例中，在所述第一材料层为电子传输层，所述第二材料层为量子点发光层，且所述刻蚀阻挡层为单层结构的情况下，所述刻蚀阻挡层位于每个开口中的部分的LUMO能级与位于相应位置处的所述第一材料层的LUMO能级的能级之差的绝对值，以及所述刻蚀阻挡层位于每个开口中的部分的LUMO能级与位于相应位置处的所述第二材料层的LUMO能级的能级之差的绝对值均小于0.15eV。在所述第一材料层为电子传输层，所述第二材料层为量子点发光层，且所述刻蚀阻挡层为双层结构的情况下，所述刻蚀阻挡层位于每个开口中的部分包括靠近所述第一材料层的第一表面和靠近所述第二材料层的第二表面，所述第一表面的LUMO能级与位于相应位置处的所述第一材料层的费米能级的能级之差的绝对值，以及所述第二表面与位于相应位置处的所述第二材料层的LUMO能级之差的绝对值小于0.15eV。
在一些实施例中，所述发光层包括i种不同的发光图案，i为大于或等于 2的整数。
在一些实施例中，所述多个开口包括i个开口组，每个开口组与一种发光图案对应；所述刻蚀阻挡层位于第j开口组中的部分的厚度与所述刻蚀阻挡层位于第k开口组中的部分的厚度相同；j和k分别为1～i中的任一个，且j和k的取值不同。
在一些实施例中，在所述第一材料层为阴极层的情况下，所述发光基板还包括：位于所述第一材料层远离衬底一侧的阳极层，位于所述阳极层和所述第二材料层之间的量子点发光层，以及位于所述量子点发光层和所述阳极层之间的空穴传输层。在所述第一材料层为电子传输层的情况下，所述发光基板还包括：位于所述第一材料层远离衬底一侧的阳极层，以及位于所述阳极层和所述第二材料层之间的空穴传输层。
另一方面，提供一种发光基板，包括：衬底；设置于所述衬底上的第一材料层和第二材料层，所述第一材料层相对于所述第二材料层靠近所述衬底，所述第一材料层的材料包括导电材料或载流子传输材料，所述第二材料层为图案化的材料层，包括多个图案，每个图案和所述第一材料层之间均具有交叠区域；位于所述第一材料层和所述第二材料层之间的第三材料层，所述第三材料层至少包括位于每个交叠区域的部分，所述第三材料层位于每个交叠区域的部分与位于相应位置处的第一材料层和第二材料层接触，所述第三材料层为双层结构，包括金属层和金属氧化物层，所述金属层的材料包括金属铝和/或金属银，所述金属氧化物层的材料包括所述金属铝和/或金属银的相应氧化物；所述第三材料层位于每个交叠区域的部分的能级与位于相应位置处的所述第一材料层的能级和所述第二材料层的能级相匹配。
另一方面，提供一种发光装置，包括：如上所述的发光基板。
又一方面，提供一种发光基板的制备方法，包括：
在衬底上依次形成第一材料层、刻蚀阻挡层和第二材料层，所述第一材料层的材料包括导电材料或载流子传输材料，所述第二材料层为图案化的材料层，包括多个图案，每个图案与所述第一材料层之间均具有交叠区域；所述刻蚀阻挡层至少包括位于每个交叠区域的部分，所述刻蚀阻挡层位于每个交叠区域的部分与位于相应位置处的第一材料层和第二材料层接触，所述刻蚀阻挡层的材料包括金属材料、金属氧化物和金属氟化物中的至少一种；所述刻蚀阻挡层位于每个交叠区域的部分的能级与位于相应位置处的所述第一材料层的能级和所述第二材料层的能级相匹配。
在一些实施例中，所述第二材料层包括一种或i种图案，i为大于或等于 2的整数；所述在衬底上依次形成第一材料层、刻蚀阻挡层和第二材料层，包括：
在衬底上依次形成第一材料层和第一薄膜，所述第一薄膜的材料包括金属铝和金属银中的至少一种，或者，所述第一薄膜的材料包括氧化铝、氧化银、氧化钼和氟化锂中的至少一种；在形成有第一材料层和所述第一薄膜的衬底上依次形成第j牺牲层和第j光刻胶层；通过曝光、显影形成第j光刻胶图案层，露出所述第j牺牲层位于第j区域的部分；采用等离子体对所述第j牺牲层位于第j区域的部分进行轰击，去除所述第j牺牲层位于第j区域的部分；在去除所述第j牺牲层位于第j区域的部分的衬底上形成第二薄膜，所述第二薄膜包括位于所述第j区域的部分和位于所述第j光刻胶图案层远离衬底表面的部分；去除所述第j牺牲层位于第j区域以外的部分，并将位于所述第j牺牲层上的第j光刻胶图案层和所述第二薄膜位于所述第j光刻胶图案层远离衬底表面的部分一同去除；其中，在第二材料层包括一种图案的情况下，j等于1，在第二材料层包括i种图案的情况下，j为1～i中的每个。
在一些实施例中，在所述第一材料层为阴极层的情况下，还包括：在形成所述第一薄膜之前，形成像素界定层；在所述第一材料层为电子传输层的情况下，还包括：在形成所述第一材料层之前，形成所述像素界定层；所述像素界定层限定出多个开口；所述多个开口包括i个开口组；所述第j区域是i个开口组中第j开口组所在的区域。
在一些实施例中，在所述第一薄膜的材料包括所述金属铝和/或金属银的情况下，所述等离子体所采用的工作气体为含氧气体，以在去除所述第j牺牲层位于第j区域的部分之后，在所述第一薄膜位于所述第j区域的表面形成所述金属铝和/或金属银的相应氧化物层。
在一些实施例中，所述等离子体所采用的工作气体包括氧气、氩气中的至少一种。
在一些实施例中，所述在衬底上形成第一薄膜，包括：通过蒸镀工艺，在所述衬底上形成所述第一薄膜。
附图说明
为了更清楚地说明本公开中的技术方案，下面将对本公开一些实施例中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本公开的一些实施例的附图，对于本领域普通技术人员来讲，还可以根据这些附图获得其他的附图。此外，以下描述中的附图可以视作示意图，并非对本公开实施例所涉及的产品的实际尺寸、方法的实际流程、信号的实际时序等 的限制。
图1为根据一些实施例的发光基板的剖视结构图；
图2为根据另一些实施例的发光基板的剖视结构图；
图3为根据另一些实施例的发光基板的剖视结构图；
图4为根据另一些实施例的发光基板的剖视结构图；
图5为根据另一些实施例的发光基板的剖视结构图；
图6为根据另一些实施例的发光基板的剖视结构图；
图7为根据一些实施例的发光基板的俯视结构图和A-A’方向上的剖视结构图；
图8为根据又一些实施例的发光基板的剖视结构图；
图9为根据一些实施例形成如图3所示的图案化的电子传输层的流程图；
图10为根据一些实施例形成如图3所示的图案化的发光层的流程图；
图11为根据一些实施例形成如图5所示的图案化的电子传输层的流程图；
图12为根据一些实施例形成如图7所示的图案化的发光层的流程图；
图13为根据一些实施例的表面粗糙度用轮廓算数平均偏差Ra作为参数进行评定曲线图。
具体实施方式
下面将结合附图，对本公开一些实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本公开一部分实施例，而不是全部的实施例。基于本公开所提供的实施例，本领域普通技术人员所获得的所有其他实施例，都属于本公开保护的范围。
除非上下文另有要求，否则，在整个说明书和权利要求书中，术语“包括(comprise)”及其其他形式例如第三人称单数形式“包括(comprises)”和现在分词形式“包括(comprising)”被解释为开放、包含的意思，即为“包含，但不限于”。在说明书的描述中，术语“一个实施例(one embodiment)”、“一些实施例(some embodiments)”、“示例性实施例(exemplary embodiments)”、“示例(example)”、“特定示例(specific example)”或“一些示例(some examples)”等旨在表明与该实施例或示例相关的特定特征、结构、材料或特性包括在本公开的至少一个实施例或示例中。上述术语的示意性表示不一定是指同一实施例或示例。此外，所述的特定特征、结构、材料或特点可以以任何适当方式包括在任何一个或多个实施例或示例中。
以下，术语“第一”、“第二”仅用于描述目的，而不能理解为指示或 暗示相对重要性或者隐含指明所指示的技术特征的数量。由此，限定有“第一”、“第二”的特征可以明示或者隐含地包括一个或者更多个该特征。在本公开实施例的描述中，除非另有说明，“多个”的含义是两个或两个以上。
“A、B和C中的至少一个”与“A、B或C中的至少一个”具有相同含义，均包括以下A、B和C的组合：仅A，仅B，仅C，A和B的组合，A和C的组合，B和C的组合，及A、B和C的组合。
“A和/或B”，包括以下三种组合：仅A，仅B，及A和B的组合。
本文中“适用于”或“被配置为”的使用意味着开放和包容性的语言，其不排除适用于或被配置为执行额外任务或步骤的设备。
另外，“基于”的使用意味着开放和包容性，因为“基于”一个或多个所述条件或值的过程、步骤、计算或其他动作在实践中可以基于额外条件或超出所述的值。
如本文所使用的那样，“约”或“近似”包括所阐述的值以及处于特定值的可接受偏差范围内的平均值，其中所述可接受偏差范围如由本领域普通技术人员考虑到正在讨论的测量以及与特定量的测量相关的误差(即，测量系统的局限性)所确定。
本文参照作为理想化示例性附图的剖视图和/或平面图描述了示例性实施方式。在附图中，为了清楚，放大了层和区域的厚度。因此，可设想到由于例如制造技术和/或公差引起的相对于附图的形状的变动。因此，示例性实施方式不应解释为局限于本文示出的区域的形状，而是包括因例如制造而引起的形状偏差。例如，示为矩形的蚀刻区域通常将具有弯曲的特征。因此，附图中所示的区域本质上是示意性的，且它们的形状并非旨在示出设备的区域的实际形状，并且并非旨在限制示例性实施方式的范围。
本公开的一些实施例提供了一种发光装置，该发光装置包括发光基板，当然还可以包括其他部件，例如可以包括用于向发光基板提供电信号，以驱动发光基板发光的电路，该电路可以称为控制电路。该电路可以包括与发光基板电连接的电路板和/或IC(Integrate Circuit，集成电路)。
在一些实施例中，该发光装置可以为照明装置，此时，发光装置用作光源，实现照明功能。例如，发光装置可以是液晶显示装置中的背光模组，用于内部或外部照明的灯，或各种信号灯等。
在另一些实施例中，该发光装置可以为显示装置，用于显示图像(即画面)。此时，发光装置可以包括显示器或包含显示器的产品。其中，显示器可以是平板显示器(Flat Panel Display，FPD)，微型显示器等。若按照用户 能否看到显示器背面的场景划分，显示器可以是透明显示器或不透明显示器。若按照显示器能否弯折或卷曲，显示器可以是柔性显示器或普通显示器(可以称为刚性显示器)。示例的，包含显示器的产品可以包括：计算机显示器，电视，广告牌，具有显示功能的激光打印机，电话，手机，个人数字助理(Personal Digital Assistant，PDA)，膝上型计算机，数码相机，便携式摄录机，取景器，车辆，大面积墙壁，剧院的屏幕或体育场标牌等。
本公开的一些实施例提供了一种发光基板，如图1和图2所示，该发光基板1包括衬底11、设置于衬底11上的第一材料层12和第二材料层13，第一材料层12相对于第二材料层13靠近衬底11。第一材料层12的材料包括导电材料或载流子传输材料，第二材料层13为图案化的材料层，包括多个图案131。每个图案131和第一材料层12之间均具有交叠区域J。
其中，根据发光基板1包括多个发光器件100，每个发光器件100包括第一电极101、第二电极102，设置于第一电极101和第二电极102之间的发光层103，以及设置于发光层103与第一电极101和第二电极102之间的载流子传输层104，可以得知，第一种情况(第一材料层12包括导电材料的情况)，如图1所示，第一材料层12可以为电极层，此时第二材料层13可以为图案化的载流子传输层，例如，该第一材料层12可以为阴极层，此时第二材料层13为图案化的电子传输层(Electronic Transport Layer，ETL)，每个电子传输层ETL为一个图案。在此情况下，衬底11可以为形成有像素驱动电路的衬底，第一材料层12包括多个间隔的阴极，每个电子传输层ETL和一个阴极之间均具有交叠区域J。第二种情况(第一材料层12的材料包括载流子传输材料的情况)，如图2所示，第一材料层12可以为电子传输层ETL，此时第二材料层13可以为图案化的发光层，包括多个发光图案。在此情况下，衬底11可以为形成有像素驱动电路、阴极层和像素界定层14的衬底，像素界定层14限定出多个开口K，如图2所示，第一材料层12可以整层覆盖，或者，如图3所示，第一材料层12仅包括位于每个开口K中的部分，每个发光图案位于一个开口K内，与位于该开口K内的第一材料层12之间形成交叠区域J。
在一些实施例中，如图4和图5所示，发光基板1还包括位于第一材料层12和第二材料层13之间的刻蚀阻挡层15，刻蚀阻挡层15至少包括位于每个交叠区域J的部分，刻蚀阻挡层15位于每个交叠区域J的部分与位于相应位置处的第一材料层12和第二材料层13接触，刻蚀阻挡层15的材料包括金属材料、金属氧化物和金属氟化物中的至少一种；刻蚀阻挡层15位于每个交叠区域J的部分的能级与位于相应位置处的第一材料层12的能级和第二材料 层13的能级相匹配。
根据以上两种情况，如图5～图8所示，发光基板1还可以包括设置于衬底11上的像素界定层14，像素界定层14限定出多个开口K，每个图案131位于一个开口K中。此时，刻蚀阻挡层15至少包括位于每个开口K中的部分。
其中，根据以上第一材料层12可以为阴极层，第二材料层13为电子传输层，以及第一材料层12可以为电子传输层，第二材料层13为发光层，例如可以为有机发光层或者量子点发光层等。可以得知，在第一材料层12为阴极层，第二材料层13为电子传输层的情况下，如图9所示，在形成图案化的电子传输层ETL时，如图9中的(a)可以先在形成有像素界定层14的衬底11上形成牺牲层20和光刻胶层30，而后通过曝光、显影去除部分光刻胶，露出部分牺牲层20，得到如图9中(b)所示结构，再通过干刻工艺去除露出的牺牲层20，在去除露出的牺牲层20之后，得到如图9中(c)所示结构，再通过旋涂在衬底11上形成具有电子传输功能的薄膜40，得到如图9中(d)所示结构，最后通过溶解去除牺牲层20的方式将形成在牺牲层20上的具有电子传输功能的薄膜40和光刻胶一同去除，从而形成图案化的电子传输层，得到如图9中(e)所示结构，每个电子传输层ETL位于一个开口K中。在第一材料层12为电子传输层，第二材料层13为发光层的情况下，如图10所示，在形成图案化的发光层时，如图10中的(a)可以先在形成有像素界定层14的衬底11上形成牺牲层20和光刻胶层30，而后通过曝光、显影去除部分光刻胶，露出部分牺牲层20，得到如图10中(b)所示结构，再通过干刻工艺去除露出的牺牲层20，在去除露出的牺牲层20之后，得到如图10中(c)所示结构，再通过旋涂在衬底11上形成具有发光功能的薄膜50，得到如图10中(d)所示结构，最后通过溶解去除牺牲层20的方式将形成在牺牲层20上的具有发光功能的薄膜50和光刻胶20一同去除，从而形成图案化的发光层，得到如图10中(e)所示结构，每个发光图案位于一个开口K中。在这两种情况下，在通过干刻工艺去除露出的牺牲层20的情况下，通常采用高能的等离子体对位于每个开口K位置的牺牲层20进行轰击，因此，在本实施例中，通过将刻蚀阻挡层15设置为该刻蚀阻挡层15至少包括位于每个开口K中的部分，在采用高能的等离子体对牺牲层20进行轰击的情况下，由于刻蚀阻挡层15的存在，能够有效地避免高能的等离子体轰击对下层膜材(如阴极层或电子传输层)产生影响，不利于器件的效率和稳定性的问题。
同时，由于刻蚀阻挡层15的材料包括金属材料、金属氧化物和金属氟化 物中的至少一种，与相关技术中在电子传输层和牺牲层20之间设置有机大分子层或者采用含有有机配体的纳米材料制作电子传输层相比，刻蚀阻挡层15采用无机材料，对高能等离子体的耐受性更强。
基于此，在一些实施例中，如图5～图8所示，该刻蚀阻挡层15还包括位于每个开口K之外的部分，刻蚀阻挡层15位于每个开口K中的部分的厚度D2小于或等于刻蚀阻挡层15位于每个开口K之外的部分的厚度D1。
其中，根据刻蚀阻挡层15的材料包括金属材料、金属氧化物和金属氟化物中的至少一种，可以得知，刻蚀阻挡层15与相关技术中在电子传输层和牺牲层20之间设置有机大分子层或者采用含有有机配体的纳米材料制作电子传输层相比，虽然能够更好地耐受等离子体轰击，但是，这些无机材料仍然能够被等离子体击穿而被刻蚀掉，因此，根据所选择材料对等离子体的耐受性不同，在刻蚀阻挡层15位于每个开口K之外的部分的厚度D1一定的情况下，刻蚀阻挡层15位于每个开口K之外的部分的厚度D1与刻蚀阻挡层15位于每个开口K中的部分的厚度D2之差也会有所不同。刻蚀阻挡层15所选择的材料对等离子体的耐受性越好，被去除的厚度就越薄，使得最终所获得的刻蚀阻挡层15位于每个开口K中的部分的厚度就越厚。
在一些实施例中，如图5～图8所示，刻蚀阻挡层15位于每个开口K中的部分D2为单层结构或双层结构。在刻蚀阻挡层15位于每个开口K中的部分为单层结构的情况下，如图6和图8所示，刻蚀阻挡层15位于每个开口K中的部分的材料和刻蚀阻挡层15位于每个开口K之外的部分的材料相同，均包括氧化铝、氧化银、氧化钼和氟化锂中的至少一种。在刻蚀阻挡层15位于每个开口K中的部分为双层结构的情况下，如图5和图7所示，刻蚀阻挡层15位于每个开口K中的部分包括沿远离衬底11的方向依次设置的金属层151和金属氧化物层152。金属层151的材料包括金属铝和/或金属银，金属氧化物层152的材料包括金属铝和/或金属银的相应氧化物。刻蚀阻挡层15位于每个开口K之外的部分的材料与金属层151的材料相同。
在本实施例中，在刻蚀阻挡层15位于每个开口K中的部分为单层结构的情况下，根据等离子体轰击会去除一定厚度的无机材料，可以得知，在干刻过程中，可以选择击穿厚度较薄的材料，如氧化铝、氧化银、氧化钼和/或氟化锂作为刻蚀阻挡层15，有利于提高刻蚀阻挡效果。
而在刻蚀阻挡层15位于每个开口K中的部分为双层结构的情况下，根据等离子体轰击过程中等离子体中的氧原子会与金属材料发生反应，生成金属的氧化物，可以得知，在干刻之前，可以在衬底11上形成金属薄膜，并采用 含氧气体作为工作气体，采用等离子体对位于每个开口K位置的牺牲层20进行轰击，根据等离子体中的氧原子与金属薄膜位于每个开口K位置的部分发生氧化反应，能够在金属薄膜位于每个开口K位置的部分表面形成金属氧化物层，从而形成具有金属层151和金属氧化物层152的双层结构的刻蚀阻挡层15。在此过程中，一方面，金属氧化物的形成能够提高膜层的密度，更耐受等离子体轰击。另一方面，在形成金属氧化物层之后，金属氧化物层不再与氧原子发生反应，能够保护下层的铝继续受等离子体轰击而被击穿，提高刻蚀阻挡层15的耐受性。另外，对于电子传输速度快于空穴传输速度的发光器件100而言，较薄的氧化铝薄膜还能够起到阻挡电子的作用，使电子和空穴传输更加平衡。
刻蚀阻挡层15位于每个交叠区域J的部分的能级与位于相应位置处的第一材料层12的能级和所述第二材料层13的能级相匹配，是指，对于一个发光器件100而言，在第一材料层12为阴极层，第二材料层13为电子传输层的情况下，刻蚀阻挡层15的LUMO(Lowest Unoccupied Molecular Orbital，最低未占分子轨道)能级位于第一材料层12的费米能级和第二材料层13的LUMO能级之间。在第一材料层12为电子传输层，第二材料层13为发光层的情况下，刻蚀阻挡层15的LUMO能级位于第一材料层12的LUMO能级和第二材料层13的LUMO能级之间。
在此，根据以上刻蚀阻挡层15位于每个开口K中的部分可以为单层结构或双层结构，可以得知，该刻蚀阻挡层15位于每个交叠区域J的部分的材料可以相同或不同。
根据该刻蚀阻挡层15位于每个交叠区域J的部分的材料相同，LUMO能级可以相同，可以得知，在刻蚀阻挡层15位于每个开口K中的部分为单层结构的情况下，刻蚀阻挡层15位于每个开口K中的部分的LUMO能级相同，此时，根据第一材料层12可以为阴极层或电子传输层，可以得知，如图6和图8所示，在第一材料层12为阴极层，第二材料层13为电子传输层的情况下，刻蚀阻挡层15位于每个开口K中的部分的LUMO能级与位于相应位置处的第一材料层12的费米能级的能级之差的绝对值，以及刻蚀阻挡层15位于每个开口K中的部分的LUMO能级与位于相应位置处的第二材料层13的LUMO能级之差的绝对值可以均相同。在第一材料层12为电子传输层，第二材料层13为量子点发光层的情况下，刻蚀阻挡层15位于每个开口K中的部分的LUMO能级与位于相应位置处的第一材料层12的LUMO能级的能级之差的绝对值，以及刻蚀阻挡层15位于每个开口K中的部分的LUMO能级与 位于相应位置处的第二材料层13的LUMO能级之差的绝对值也可以均相同。
示例的，在第一材料层12为阴极层，第二材料层13为电子传输层的情况下，阴极层的费米能级可以为-4.1eV，在此情况下，根据对于多个发光器件而言，每个电子传输层的材料可以均相同，可以得知，每个电子传输层的LUMO能级可以均相同，如可以均为-4.3eV，此时，刻蚀阻挡层15位于每个开口K中的部分的LUMO能级可以均为-4.2eV。
在第一材料层12为电子传输层ETL，第二材料层13为量子点发光层的情况下，根据多个发光器件100的发光颜色可以相同或不同，该刻蚀阻挡层15位于每个开口K中的部分的LUMO能级，与位于相应位置处的第二材料层13的LUMO能级的能级之差的绝对值也可以相同或不同。
在多个发光器件100的发光颜色相同，如均发红光的情况下，每个发光器件的发光材料可以均为红色量子点发光材料，在此情况下，发光层可以包括一种发光图案，如红色量子点发光图案，此时，刻蚀阻挡层15位于每个开口K中的部分的LUMO能级，与位于相应位置处的第二材料层13的LUMO能级的能级之差的绝对值可以均相同，如均为0.1eV。而在多个发光器件100的发光颜色不同的情况下，发光层可以包括i种不同的发光图案，i为大于或等于2的整数。如发光层可以包括红色量子点发光图案R、绿色量子点发光图案G和蓝色量子点发光图案B。在此情况下，该刻蚀阻挡层15位于不同的量子点发光图案和电子传输层之间的部分的LUMO能级与相应位置处的第二材料层的LUMO能级的能级之差的绝对值可以不同，如刻蚀阻挡层15位于红色量子点发光图案R和电子传输层之间的部分的LUMO能级与位于相应位置处的红色量子点发光图案R的LUMO能级的能级之差为0.1eV，刻蚀阻挡层15位于绿色量子点发光图案G和电子传输层之间的部分的LUMO能级与位于相应位置处的绿色量子点发光图案G的LUMO能级的能级之差为0.11eV，刻蚀阻挡层15位于蓝色量子点发光图案B和电子传输层之间的部分的LUMO能级与位于相应位置处的蓝色量子点发光图案B的LUMO能级的能级之差为0.12eV。此时，刻蚀阻挡层15位于每个交叠区域J的部分的LUMO能级可以均相同。
以上仅为刻蚀阻挡层15位于每个交叠区域J的部分的材料相同的情况，在刻蚀阻挡层15位于每个交叠区域J的部分的材料不同的情况下，根据刻蚀阻挡层15位于每个开口K中的部分可以包括沿远离衬底11的方向依次层叠的金属层和金属氧化物层，可以得知，在第一材料层12为阴极层，第二材料层13为电子传输层的情况下，刻蚀阻挡层15位于每个交叠区域J的部分的能 级与位于相应位置处的第一材料层12和第二材料层13的能级相匹配，是指，刻蚀阻挡层15位于每个交叠区域J的部分的金属层的能级与位于相应位置处的第一材料层12和金属氧化物层的能级相匹配，刻蚀阻挡层15位于每个交叠区域J的部分的金属氧化物层的能级与位于相应位置处的金属层和第二材料层13的能级相匹配，也即，在刻蚀阻挡层15位于每个开口K中的部分为双层结构的情况下，第一表面15a的LUMO能级位于第一材料层12费米能级与第二表面15b的LUMO能级之间，第二表面15b的LUMO能级位于第一表面15a的LUMO能级与第二材料层13的LUMO能级之间。
在此情况下，根据多个发光器件100中的阴极层的材料可以均相同，以及多个发光器件100中的电子传输层的材料也可以均相同，可以得知，第一表面15a的LUMO能级与位于相应位置处的第一材料层12的费米能级的能级之差的绝对值可以均相同，如可以均小于0.15eV，以及第二表面15b的LUMO能级与位于相应位置处的第二材料层的LUMO能级之差的绝对值也可以均相同，如均小于0.15eV。
在第一材料层12为电子传输层，第二材料层13为量子点发光层，且刻蚀阻挡层15位于每个开口K中的部分为双层结构的情况下，刻蚀阻挡层15位于每个交叠区域J的部分的能级与位于相应位置处的第一材料层12和第二材料层13的能级相匹配，是指，对于一个发光器件100而言，第一表面15a的LUMO能级位于第一材料层12的LUMO能级与第二表面15b的LUMO能级之间，第二表面15b的LUMO能级位于第一表面15a的LUMO能级与第二材料层13的LUMO能级之间。
在此情况下，根据多个发光器件100中的电子传输层的材料可以均相同，可以得知，第一表面15a的LUMO能级与位于相应位置处的第一材料层12的费米能级的能级之差的绝对值也可以均相同，如可以均小于0.15eV。而根据多个发光器件100中的量子点传输层的材料可以相同或不同，可以得知，在多个发光器件100的发光颜色相同，如均发红光的情况下，每个发光器件的发光材料可以均为红色量子点发光材料，在此情况下，发光层可以包括一种发光图案，如红色量子点发光图案，此时，第二表面15b的LUMO能级，与位于相应位置处的第二材料层13的LUMO能级的能级之差的绝对值可以均相同，如均为0.1eV。而在多个发光器件100的发光颜色不同的情况下，发光层可以包括i种不同的发光图案，i为大于或等于2的整数。如发光层可以包括红色量子点发光图案R、绿色量子点发光图案G和蓝色量子点发光图案B。在此情况下，根据刻蚀阻挡层15位于每个交叠区域J的部分的第一表面 15a的LUMO能级相同的情况下，刻蚀阻挡层15位于每个交叠区域J的部分的第二表面15b的LUMO能级可以相同或不同。第二表面15b的LUMO能级与位于相应位置处的第二材料层13的LUMO能级的能级之差的绝对值也可以相同或不同。示例的，在一些实施例中，第二表面15b的LUMO能级与位于相应位置处的红色量子点发光图案R的LUMO能级的能级之差的绝对值，第二表面15b的LUMO能级与位于相应位置处的绿色量子点发光图案G的LUMO能级的能级之差的绝对值，第二表面15b的LUMO能级与位于相应位置处的蓝色量子点发光图案B的LUMO能级的能级之差的绝对值可以均相同，如均为0.1eV，此时，根据红色量子点发光图案R的LUMO能级、绿色量子点发光图案G的LUMO能级和蓝色量子点发光图案B的LUMO能级不同，刻蚀阻挡层15位于每个交叠区域J的部分的第二表面15b的LUMO能级也均不相同，如在红色量子点发光图案R的LUMO能级，绿色量子点发光图案G的LUMO能级，以及蓝色量子点发光图案B的LUMO能级分别为-3.8eV、-3.7eV和-3.6eV的情况下，刻蚀阻挡层15位于红色量子点发光图案R和电子传输层之间的部分的第二表面15b的LUMO能级，刻蚀阻挡层15位于绿色量子点发光图案G和电子传输层之间的部分的第二表面15b的LUMO能级，以及刻蚀阻挡层15位于蓝色量子点发光图案B和电子传输层之间的部分的第二表面15b的LUMO能级可以分别为-3.7eV，-3.6eV和-3.5eV。在另一些实施例中，第二表面15b的LUMO能级与位于相应位置处的红色量子点发光图案R的LUMO能级的能级之差的绝对值、第二表面15b的LUMO能级与位于相应位置处的绿色量子点发光图案G的LUMO能级的能级之差的绝对值，第二表面15b的LUMO能级与位于相应位置处的蓝色量子点发光图案B的LUMO能级的能级之差的绝对值可以不同，如分别为0.13eV，0.12eV和0.11eV。此时，根据红色量子点发光图案R的LUMO能级、绿色量子点发光图案G的LUMO能级和蓝色量子点发光图案B的LUMO能级不同，分别为-3.63eV、-3.62eV和-3.61eV，刻蚀阻挡层15位于红色量子点发光图案R和电子传输层之间的部分的第二表面15b的LUMO能级，刻蚀阻挡层15位于绿色量子点发光图案G和电子传输层之间的部分的第二表面15b的LUMO能级，以及刻蚀阻挡层15位于蓝色量子点发光图案B和电子传输层之间的部分的第二表面15b的LUMO能级可以相同，如均为-3.5eV。
在本实施例中，通过使刻蚀阻挡层15位于每个交叠区域J的部分的能级，与位于相应位置处的第一材料层12和第二材料层13的能级相匹配，能够使刻蚀阻挡层15不对载流子传输和注入产生影响。
在一些实施例中，如图5～图8所示，刻蚀阻挡层15位于每个开口K之外的部分的厚度D1与刻蚀阻挡层15位于每个开口K中的部分的厚度D2之差小于5nm。在本实施例中，在兼顾等离子体的轰击速度、轰击时间和能量的前提下，通过选择合适的刻蚀阻挡层15的材料，使得最终所获得的刻蚀阻挡层15位于每个开口K之外的部分的厚度D1与刻蚀阻挡层15位于每个开口K中的部分的厚度D2之差控制在小于5nm的范围内，能够起到很好的刻蚀阻挡效果。
在一些实施例中，如图5～图8所示，刻蚀阻挡层15位于每个开口K之外的部分的厚度D1为0.5～50nm。在本实施例中，通过将刻蚀阻挡层15位于每个开口K之外的部分的厚度D2限定在以上范围内，能够避免刻蚀阻挡层15的厚度过厚，不利于载流子传输和注入的问题。
在一些实施例中，如图8所示，多个开口K包括i个开口组Q，i为大于或等于2的整数；每个开口组Q与一种发光图案对应。刻蚀阻挡层15位于第j开口组Qj中的部分的厚度D2与刻蚀阻挡层15位于第k开口组Qk中的部分的厚度D2相同；j和k分别为1～i中的任一个，且j和k的取值不同。
示例的，以第j开口组Qj形成红色量子点发光图案R，第k开口组形成绿色量子点发光图案G为例，在刻蚀阻挡层15位于第j开口组Qj中的部分与刻蚀阻挡层15位于第k开口组Qk中的部分受到等离子体轰击的速度、时间和能量相同的情况下，刻蚀阻挡层15位于第j开口组Qj中的部分的厚度D2与刻蚀阻挡层15位于第k开口组中的部分的厚度D2相同；在刻蚀阻挡层15位于第j开口组中的部分与刻蚀阻挡层15位于第k开口组Qk中的部分受到等离子体轰击的速度、时间和能量不同的情况下，刻蚀阻挡层15位于第j开口组Qj中的部分的厚度D2与刻蚀阻挡层15位于第k开口组Qk中的部分的厚度D2不同。
在本实施例中，为刻蚀阻挡层15位于第j开口组Qj中的部分的厚度D2与刻蚀阻挡层15位于第k开口组Qk中的部分的厚度D2相同的情况。
在一些实施例中，以上所述的量子点发光材料主要由IIB-VIA、IIIA-VA或者IVA-VIA族元素构成，如量子点发光材料可以包括ZnS、ZnSe、ZnTe、CdS、CdSe、CdTe、HgTe、InP、CuInS、CuInSe、CuInSeS和AgInS中一种或多种。
在一些实施例中，量子点发光材料中的量子点可以具有核壳结构。如量子点发光材料可以包括CdS/ZnS、CdSe/ZnS、CdSe/ZnSeS、CdSe/CdS、ZnSe/ZnS、InP/ZnS、CuInS/ZnS、AgInS/ZnS、CuInSe/ZnS、CuInSeS/ZnS或 者PbS/ZnS等。其中，“/”前为核，“/”后为壳。
在另一些实施例中，该量子点发光材料还可以包括配体，配体与量子点结合。
其中，需要说明的是，尺寸、材料不同的量子点的发光光谱处于不同的波段区域。如不同尺寸的ZnS量子点的发光光谱基本涵盖紫外区，CdSe量子点的发光光谱基本涵盖可见光区域，而PbSe量子点的发光发光则基本涵盖红外区。在实际应用中，可以根据不同的发光颜色，选择具有不同尺寸和材料的量子点发光材料。
基于以上结构，在一些实施例中，如图5和图6所示，在第一材料层12为阴极层的情况下，发光基板1还包括：位于第一材料层12远离衬底11一侧的阳极层16，位于阳极层16和第二材料层13之间的量子点发光层，以及位于量子点发光层和阳极层16之间的空穴传输层17。
如图7和图8所示，在第一材料层12为电子传输层的情况下，发光基板1还包括：位于第一材料层12远离衬底11一侧的阳极层16，以及位于阳极层和第二材料层13之间的空穴传输层17。
本公开的一些实施例提供一种发光基板1，如图5～图8所示，该发光基板1包括衬底11、设置于衬底11上的第一材料层12和第二材料层13，第一材料层12相对于第二材料层13靠近衬底11。第一材料层12的材料包括导电材料或载流子传输材料，第二材料层13为图案化的材料层，包括多个图案131。每个图案131和第一材料层12之间均具有交叠区域J。
其中，根据发光基板1包括多个发光器件100，每个发光器件100包括第一电极101、第二电极102，设置于第一电极101和第二电极102之间的发光层103，以及设置于发光层103与第一电极101和第二电极102之间的载流子传输层104，可以得知，第一种情况(第一材料层12包括导电材料的情况)，如图5所示，第一材料层12可以为电极层，此时第二材料层13可以为图案化的载流子传输层，例如，该第一材料层12可以为阴极层，此时第二材料层13为图案化的电子传输层(Electronic Transport Layer，ETL)，每个电子传输层ETL为一个图案。在此情况下，衬底11可以为形成有像素驱动电路的衬底，第一材料层12包括多个间隔的阴极，每个电子传输层ETL和一个阴极之间均具有交叠区域J。第二种情况(第一材料层12的材料包括载流子传输材料的情况)，如图7所示，第一材料层12可以为电子传输层ETL，此时第二材料层13可以为图案化的发光层，包括多个发光图案。在此情况下，衬底11可以为形成有像素驱动电路、阴极层和像素界定层14的衬底，像素界定层14 限定出多个开口K，如图2所示，第一材料层12可以整层覆盖，或者，如图3所示，第一材料层12仅包括位于每个开口K中的部分，每个发光图案位于一个开口K内，与位于该开口K内的第一材料层12之间形成交叠区域J。
在一些实施例中，如图5～图8所示，发光基板1还包括位于第一材料层12和第二材料层13之间的第三材料层18，第三材料层18至少包括位于每个交叠区域J的部分，第三材料层18位于每个交叠区域J的部分与位于相应位置处的第一材料层12和第二材料层13接触，第三材料层18包括金属、金属氧化物和金属氟化物中的至少一种；第三材料层18位于每个交叠区域J的部分的能级与位于相应位置处的第一材料层12的能级和第二材料层13的能级相匹配。
其中，根据以上在形成图案化的电子传输层或发光层的情况下，通过在衬底11上至少在位于每个开口K中的部分形成刻蚀阻挡层15，能够对采用等离子体对下层膜材如阴极层或电子传输层轰击进行阻挡，从而能够解决高能的等离子体轰击对下层膜材产生影响，不利于器件的效率和稳定性的问题。可以得知，在轰击完成后，刻蚀阻挡层15并不会被完全轰击掉，而是会有所残留，此时，刻蚀阻挡层15被残留在衬底11上的部分即为第三材料层18。而在第三材料层18存在的情况下，为了使第三材料层18位于每个交叠区域J的部分不会对电子和空穴的注入和传输产生影响，该第三材料层18需要满足：该第三材料层18位于每个交叠区域J的部分的能级与位于相应位置处的第一材料层12的能级和第二材料层13的能级相匹配。
而根据以上第三材料层18包括金属、金属氧化物和金属氟化物中的至少一种，可以得知，在以上进行等离子体轰击时，等离子体所采用的工作气体可以为不能与金属发生反应的气体，如氩气等。此时，可以有两种可能的情况，第一种情况，如图6和图8所示，刻蚀阻挡层15的材料仅包括金属材料，随着等离子体轰击，部分金属材料被轰击掉，并不与等离子体发生反应，因此，所残留的第三材料层位于每个交叠区域J的部分的材料也仅包括金属材料。第二种情况，如图6和图8所示，刻蚀阻挡层15的材料包括金属氟化物和/或金属氧化物，此时，与金属材料相类似的，随着等离子体轰击，所残留的第三材料层18位于每个交叠区域J的部分的材料也仅包括金属氟化物和/或金属氧化物。
而在以上进行等离子体轰击时，等离子体所采用的工作气体可以为能够与金属发生反应的气体如含氧气体，此时，根据刻蚀阻挡层中是否含有金属材料，也可以有两种可能的情况，第一种情况，如图5和图7所示，刻蚀阻 挡层15的材料包括金属材料，随着等离子体轰击，金属材料会与等离子体中的氧原子发生反应生成金属氧化物，此时，第三材料层18可以为双层结构，包括金属层和金属氧化物层。金属层的材料包括金属铝和/或金属银，金属氧化物层的材料包括金属铝和/或金属银的相应氧化物。第二种情况，如图6和图8所示，刻蚀阻挡层15的材料不包括金属材料，此时，刻蚀阻挡层15的材料可以包括金属氧化物和/或金属氟化物，如氧化铝、氧化银、氧化钼和氟化锂中的至少一种的情况。随着等离子体的轰击，仅有部分金属氧化物和/或金属氟化物被轰击掉，因此，所残留的第三材料层18位于每个交叠区域J的部分可以为单层结构，此时，第三材料层18位于每个开口K外的部分的材料和第三材料层18位于每个开口K中的部分的材料可以相同，如均包括氧化铝、氧化银、氧化钼和氟化锂中的至少一种。
基于此，该第三材料层18位于每个交叠区域J的部分的能级与位于相应位置处的第一材料层12的能级和第二材料层13的能级相匹配的描述可以参照以上刻蚀阻挡层15位于每个交叠区域J的部分的能级与位于相应位置处的第一材料层12的能级和第二材料层13的能级相匹配的描述，在此不再赘述。
本公开的一些实施例提供一种发光基板的制备方法，包括：
如图5～图8所示，在衬底11上依次形成第一材料层12、刻蚀阻挡层15和第二材料层13。第一材料层12的材料包括导电材料或载流子传输材料。第二材料层13为图案化的材料层，包括多个图案131。每个图案131和第一材料层12之间均具有交叠区域J。刻蚀阻挡层15至少包括位于每个交叠区域J的部分，刻蚀阻挡层15位于每个交叠区域J的部分与位于相应位置处的第一材料层12和第二材料层13接触，刻蚀阻挡层15的材料包括金属材料、金属氧化物和金属氟化物中的至少一种；刻蚀阻挡层15位于每个交叠区域J的部分的能级与位于相应位置处的第一材料层12的能级和第二材料层13的能级相匹配。
其中，根据以上第一材料层12可以为阴极层，第二材料层13可以为电子传输层，可以得知，第二材料层13可以通过同一次构图工艺形成。该第二材料层13可以看作是同一种图案，此时，第二材料层13包括一种图案131。而根据以上第一材料层12可以为电子传输层，第二材料层13为发光层，根据多个发光器件100可以包括发同一种颜色的光的发光器件100，发光层可以发单色光，第二材料层13可以看作是同一种图案，此时，第二材料层13也包括一种图案131。根据多个发光器件100可以包括发不同颜色的光的发光器件，第二材料层13可以看作包括不同的发光图案，如包括三种图案：红色量 子点发光图案R，绿色量子点发光图案G和蓝色量子点发光图案B。
基于此，在一些实施例中，第二材料层13包括一种或i种图案，i为大于或等于2的整数。在衬底11上依次形成第一材料层12、刻蚀阻挡层15和第二材料层13，如图11和图12所示，包括：
S101、在衬底11上依次形成第一材料层12和第一薄膜200。第一薄膜200的材料包括金属铝和/或金属银，或者，第一薄膜200的材料包括氧化铝、氧化银、氧化钼和氟化锂中的至少一种。
在第一材料层12为阴极层，该阴极层包括多个阴极的情况下，第一材料层12的材料可以包括ITO(Indium Tin Oxides，氧化铟锡)，可以通过沉积ITO薄膜，在ITO薄膜上形成光刻胶层，而后通过曝光、显影、刻蚀工艺形成该第一材料层12。此时，在形成第一材料层12之后，还可以包括：在形成有第一材料层12的衬底上形成像素界定层14，像素界定层14限定出多个开口K，每个开口K露出一个阴极。接着，在形成有像素界定层14的衬底11上形成该第一薄膜200。在此情况下，该衬底11可以是已经形成有像素驱动电路的衬底。
在第一材料层12为电子传输层的情况下，第一材料层12的材料可以包括纳米氧化锌，可以通过旋涂或打印工艺形成第一材料层12。此时，可以在形成有第一材料层12的衬底上直接形成第一薄膜200。该衬底11可以是已经形成有像素驱动电路、阴极层和像素界定层14的衬底。在此情况下，该第一材料层12可以整层覆盖，也可以仅形成在像素界定层14限定的开口K中。
在以上两种情况下，可以通过蒸镀、沉积或溅射形成第一薄膜200。
在一些实施例中，在衬底11上形成第一薄膜200，包括：
通过蒸镀工艺，在衬底11上形成第一薄膜200。
在形成第一薄膜200之后，通过测试发现，第一薄膜200远离衬底11的表面的粗糙度Ra小于0.1。粗糙度是指加工表面具有的较小间距和微小峰谷的不平度。Ra是轮廓算数平均偏差，如图13所示，轮廓算数平均偏差Ra是以中线为基准线，在取样长度L内轮廓峰高的平均值和轮廓谷深的平均值之和作为轮廓微观不平度的平均高度。
可见，通过蒸镀工艺形成第一薄膜200可以降低第一薄膜200表面的粗糙程度，在成膜过程中不易破坏其他膜层，同时，还能够避免第一薄膜200的粗糙度较大，形成的尖刺容易刺穿电子传输层，造成金属和阴极层短路的问题。
S102、在形成有第一材料层12和第一薄膜200的衬底上依次形成第j牺 牲层300和第j光刻胶层400。
其中，根据以上第一材料层12为阴极层，第二材料层13为图案化的电子传输层，第二材料层13可以看作仅包括一种图案，此时，j等于1，第j牺牲层300可以记为第一牺牲层，第j光刻胶层400可以记为第一光刻胶层。
根据以上第一材料层12为电子传输层，第二材料层13为图案化的发光层，发光层可以包括一种发光图案或i种发光图案。此时，在发光层包括一种发光图案的情况下，j也可以等于1，第j牺牲层300和第j光刻胶层400同样可以分别记为第一牺牲层和第一光刻胶层。
在发光层包括i种发光图案的情况下，j为1～i中的每个，此时，第j牺牲层300可以分别记为第一牺牲层、…、第(i-1)牺牲层和第i牺牲层。第j光刻胶层400也可以分别记为第一光刻胶层、…、第(i-1)光刻胶层和第i光刻胶层。
示例的，以发光层包括三种发光图案，如红色量子点发光图案、绿色量子点发光图案和蓝色量子点发光图案为例，分别将红色量子点发光图案、绿色量子点发光图案和蓝色量子点发光图案分别记为第一量子点发光图案、第二量子点发光图案和第三量子点发光图案，在形成第一量子点发光图案的情况下，在形成有第一材料层12和第一薄膜200的衬底11上依次形成第一牺牲层和第一光刻胶层。在形成第二量子点发光图案的情况下，在形成有第一材料层12和第一薄膜200的衬底上依次形成第二牺牲层和第二光刻胶层。在形成第三量子点发光图案的情况下，在形成有第一材料层12和第一薄膜200的衬底上依次形成第三牺牲层和第三光刻胶层。
S103、通过曝光、显影形成第j光刻胶图案层401，露出第j牺牲层300位于第j区域的部分。
在一些实施例中，在以上还包括形成像素界定层14，如图12所示，像素界定层14限定出多个开口K的情况下，多个开口K包括i个开口组Q。第j区域是i个开口组Qi中第j开口组Qj所在区域。如以j等于1，第一量子点发光图案为红色量子点发光图案为例，第j区域为第一开口组Q1所在区域，也即为红色量子点发光图案所在区域。
S104、采用等离子体对第j牺牲层300位于第j区域的部分进行轰击，去除第j牺牲层位于第j区域的部分。
采用等离子体对第j牺牲层300位于第j区域的部分进行轰击，可以是，采用等离子体对第j牺牲层300位于第j开口组Qj所在区域的部分进行轰击。
在一些实施例中，等离子体所采用的工作气体包括氧气、氩气中的至少 一种。在采用等离子体对第j牺牲层位于第j区域的部分进行轰击的同时，高能的等离子体还会对第一薄膜200位于第j区域的部分进行轰击，而由于第一薄膜200的存在，能够避免高能的等离子体对下层膜材造成破坏。
在一些实施例中，在第一薄膜200的材料包括金属铝和/或金属银的情况下，等离子体所采用的工作气体为含氧气体，以在去除第j牺牲层位于第j区域的部分之后，在第一薄膜200位于第j区域的表面形成金属铝和/或金属银的相应氧化物层。
在本实施例中，通过采用含氧气体作为工作气体，能够使等离子体中的氧原子与金属铝和/或金属银表面的铝原子和/或银原子发生反应，生成金属铝和/或金属银的相应氧化物，从而能够在金属薄膜表面形成一层相应的金属氧化物层。
与采用其他工作气体相比，金属氧化物层的密度更大，更耐受等离子体轰击。另一方面，通过形成金属氧化物层，金属氧化物不再与氧原子发生反应，能够对下层的金属进行屏蔽，避免等离子体击穿下层的金属，进而对下层膜材产生影响。同时，通过形成金属氧化物层还能够起到阻挡电子，有利于电子和空穴传输更加平衡。
S105、在去除第j牺牲层位于第j区域的部分的衬底上形成第二薄膜500，第二薄膜300包括位于第j区域的部分和位于第j光刻胶图案层401远离衬底11表面的部分。
在第一材料层12为阴极层的情况下，第二薄膜500可以为具有电子传输功能的薄膜，可以通过旋涂或蒸镀工艺形成。
在第一材料层12为电子传输层的情况下，第二薄膜500可以为具有发光功能的薄膜，可以通过旋涂或打印工艺形成。
在此，仍然以j等于1，第二材料层12为图案化的量子点发光层为例，第二薄膜300可以为红色量子点发光薄膜。
S106、去除第j牺牲层位于第j区域以外的部分，并将位于第j牺牲层上的第j光刻胶图案层401和第二薄膜500位于第j光刻胶图案层401远离衬底11表面的部分一同去除。
如可以采用有机溶剂溶解的方式将第j牺牲层位于第j区域以外的部分去除，从而能够将位于第j牺牲层上的第j光刻胶图案层401和第二薄膜500位于第j区域以外的部分一同去除。
在此，在第一材料层12为阴极层，第二材料层13为电子传输层的情况下，根据以上电子传输层包括一种图案，j可以等于1，可以得知，以上第j 区域是以上每个开口K所在区域，此时，刻蚀阻挡层15包括位于每个开口K中的部分，并通过同一次轰击工艺形成。
在第一材料层12为电子传输层，第二材料层13为发光层的情况下，根据以上第j区域可以包括第j开口组Qj所在区域，以上j可以为1～i中的每个，可以得知，如图7所示，刻蚀阻挡层15同样可以包括位于每个开口K中的部分，且刻蚀阻挡层14位于不同开口组中的部分分别通过不同次的轰击工艺形成。
以上仅示出了第一材料层12为阴极层，第二材料层13为电子传输层，以及第一材料层12为电子传输层，第二材料层13为发光层的情形，本领域技术人员能够理解的是，第二材料层13可以为任何需要图案化的材料层，并不限于以上两种情形，并且，以上第一材料层12和第二材料层13可以分别为一层或多层，且在第一材料层12为多层的情况下，多层第一材料层12的材料可以不同，如多层第一材料层12可以分别为阴极层和电子传输层，此时，相应地，发光基板1可以包括形成在阴极层和电子传输层之间的刻蚀阻挡层15，以及形成在电子传输层和发光层之间的刻蚀阻挡层15。
以上所述，仅为本公开的具体实施方式，但本公开的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本公开揭露的技术范围内，想到变化或替换，都应涵盖在本公开的保护范围之内。因此，本公开的保护范围应以所述权利要求的保护范围为准。

Claims (20)

  1. 一种发光基板，包括：
    衬底；
    设置于所述衬底上的第一材料层和第二材料层，所述第一材料层相对于所述第二材料层靠近所述衬底，所述第一材料层的材料包括导电材料或载流子传输材料，所述第二材料层为图案化的材料层，包括多个图案，每个图案和所述第一材料层之间均具有交叠区域；
    位于所述第一材料层和所述第二材料层之间的刻蚀阻挡层，所述刻蚀阻挡层至少包括位于每个交叠区域的部分，所述刻蚀阻挡层位于每个交叠区域的部分与位于相应位置处的第一材料层和第二材料层接触，所述刻蚀阻挡层的材料包括金属材料、金属氧化物和金属氟化物中的至少一种；
    所述刻蚀阻挡层位于每个交叠区域的部分的能级与位于相应位置处的所述第一材料层的能级和所述第二材料层的能级相匹配。
  2. 根据权利要求1所述的发光基板，还包括：设置于所述衬底上的像素界定层，所述像素界定层限定出多个开口，每个图案位于一个开口中，所述刻蚀阻挡层至少包括位于每个开口中的部分。
  3. 根据权利要求2所述的发光基板，其中，
    所述刻蚀阻挡层还包括位于每个开口之外的部分，所述刻蚀阻挡层位于每个开口中的部分的厚度小于或等于所述刻蚀阻挡层位于每个开口之外的部分的厚度。
  4. 根据权利要求3所述的发光基板，其中，
    所述刻蚀阻挡层位于每个开口中的部分为单层结构或双层结构；
    在所述刻蚀阻挡层位于每个开口中的部分为单层结构的情况下，所述刻蚀阻挡层位于每个开口中的部分的材料和所述刻蚀阻挡层位于每个开口之外的部分的材料相同，均包括氧化铝、氧化银、氧化钼和氟化锂中的至少一种；
    在所述刻蚀阻挡层位于每个开口中的部分为双层结构的情况下，所述刻蚀阻挡层位于每个开口中的部分包括沿远离衬底的方向依次设置的金属层和金属氧化物层；所述金属层的材料包括金属铝和/或金属银，所述金属氧化物层的材料包括金属铝和/或金属银的相应氧化物；所述刻蚀阻挡层位于每个开口之外的部分的材料与所述金属层的材料相同。
  5. 根据权利要求3或4所述的发光基板，其中，
    所述刻蚀阻挡层位于每个开口之外的部分的厚度与所述刻蚀阻挡层位于每个开口中的部分的厚度之差小于5nm。
  6. 根据权利要求3～5任一项所述的发光基板，其中，所述刻蚀阻挡层位 于每个开口之外的部分的厚度为0.5～50nm。
  7. 根据权利要求2～6任一项所述的发光基板，其中，
    所述第一材料层为电子传输层，所述第二材料层为量子点发光层；
    或者，
    所述第一材料层为阴极层，所述第二材料层为电子传输层。
  8. 根据权利要求7所述的发光基板，其中，
    在所述第一材料层为阴极层，所述第二材料层为电子传输层，且所述刻蚀阻挡层为单层结构的情况下，所述刻蚀阻挡层位于每个开口中的部分的LUMO能级与位于相应位置处的所述第一材料层的费米能级的能级之差的绝对值，以及所述刻蚀阻挡层位于每个开口中的部分的LUMO能级与位于相应位置处的所述第二材料层的LUMO能级的能级之差的绝对值均小于0.15eV；
    在所述第一材料层为阴极层，所述第二材料层为电子传输层，且所述刻蚀阻挡层为双层结构的情况下，所述刻蚀阻挡层位于每个开口中的部分包括靠近所述第一材料层的第一表面和靠近所述第二材料层的第二表面，所述第一表面的LUMO能级与位于相应位置处的所述第一材料层的费米能级的能级之差的绝对值，以及所述第二表面的LUMO能级与位于相应位置处的所述第二材料层的LUMO能级之差的绝对值小于0.15eV。
  9. 根据权利要求7所述的发光基板，其中，
    在所述第一材料层为电子传输层，所述第二材料层为量子点发光层，且所述刻蚀阻挡层为单层结构的情况下，所述刻蚀阻挡层位于每个开口中的部分的LUMO能级与位于相应位置处的所述第一材料层的LUMO能级的能级之差的绝对值，以及所述刻蚀阻挡层位于每个开口中的部分的LUMO能级与位于相应位置处的所述第二材料层的LUMO能级的能级之差的绝对值均小于0.15eV；
    在所述第一材料层为电子传输层，所述第二材料层为量子点发光层，且所述刻蚀阻挡层为双层结构的情况下，所述刻蚀阻挡层位于每个开口中的部分包括靠近所述第一材料层的第一表面和靠近所述第二材料层的第二表面，所述第一表面的LUMO能级与位于相应位置处的所述第一材料层的费米能级的能级之差的绝对值，以及所述第二表面与位于相应位置处的所述第二材料层的LUMO能级之差的绝对值小于0.15eV。
  10. 根据权利要求7或9所述的发光基板，其中，
    所述发光层包括i种不同的发光图案，i为大于或等于2的整数。
  11. 根据权利要求10所述的发光基板，其中，
    所述多个开口包括i个开口组，每个开口组与一种发光图案对应；
    所述刻蚀阻挡层位于第j开口组中的部分的厚度与所述刻蚀阻挡层位于第k开口组中的部分的厚度相同；
    j和k分别为1～i中的任一个，且j和k的取值不同。
  12. 根据权利要求7～11任一项所述的发光基板，其中，在所述第一材料层为阴极层的情况下，所述发光基板还包括：位于所述第一材料层远离衬底一侧的阳极层，位于所述阳极层和所述第二材料层之间的量子点发光层，以及位于所述量子点发光层和所述阳极层之间的空穴传输层。
    在所述第一材料层为电子传输层的情况下，所述发光基板还包括：位于所述第一材料层远离衬底一侧的阳极层，以及位于所述阳极层和所述第二材料层之间的空穴传输层。
  13. 一种发光基板，包括：
    衬底；
    设置于所述衬底上的第一材料层和第二材料层，所述第一材料层相对于所述第二材料层靠近所述衬底，所述第一材料层的材料包括导电材料或载流子传输材料，所述第二材料层为图案化的材料层，包括多个图案，每个图案和所述第一材料层之间均具有交叠区域；
    位于所述第一材料层和所述第二材料层之间的第三材料层，所述第三材料层至少包括位于每个交叠区域的部分，所述第三材料层位于每个交叠区域的部分与位于相应位置处的第一材料层和第二材料层接触，所述第三材料层为双层结构，包括金属层和金属氧化物层，所述金属层的材料包括金属铝和/或金属银，所述金属氧化物层的材料包括所述金属铝和/或金属银的相应氧化物；
    所述第三材料层位于每个交叠区域的部分的能级与位于相应位置处的所述第一材料层的能级和所述第二材料层的能级相匹配。
  14. 一种发光装置，包括：如权利要求1～13任一项所述的发光基板。
  15. 一种发光基板的制备方法，包括：
    在衬底上依次形成第一材料层、刻蚀阻挡层和第二材料层，所述第一材料层的材料包括导电材料或载流子传输材料，所述第二材料层为图案化的材料层，包括多个图案，每个图案与所述第一材料层之间均具有交叠区域；所述刻蚀阻挡层至少包括位于每个交叠区域的部分，所述刻蚀阻挡层位于每个交叠区域的部分与位于相应位置处的第一材料层和第二材料层接触，所述刻蚀阻挡层的材料包括金属材料、金属氧化物和金属氟化物中的至少一种；所 述刻蚀阻挡层位于每个交叠区域的部分的能级与位于相应位置处的所述第一材料层的能级和所述第二材料层的能级相匹配。
  16. 根据权利要求15所述的发光基板的制备方法，其中，
    所述第二材料层包括一种或i种图案，i为大于或等于2的整数；
    所述在衬底上依次形成第一材料层、刻蚀阻挡层和第二材料层，包括：
    在衬底上依次形成第一材料层和第一薄膜，所述第一薄膜的材料包括金属铝和金属银中的至少一种，或者，所述第一薄膜的材料包括氧化铝、氧化银、氧化钼和氟化锂中的至少一种；
    在形成有第一材料层和所述第一薄膜的衬底上依次形成第j牺牲层和第j光刻胶层；
    通过曝光、显影形成第j光刻胶图案层，露出所述第j牺牲层位于第j区域的部分；
    采用等离子体对所述第j牺牲层位于第j区域的部分进行轰击，去除所述第j牺牲层位于第j区域的部分；
    在去除所述第j牺牲层位于第j区域的部分的衬底上形成第二薄膜，所述第二薄膜包括位于所述第j区域的部分和位于所述第j光刻胶图案层远离衬底表面的部分；
    去除所述第j牺牲层位于第j区域以外的部分，并将位于所述第j牺牲层上的第j光刻胶图案层和所述第二薄膜位于所述第j光刻胶图案层远离衬底表面的部分一同去除；
    其中，在第二材料层包括一种图案的情况下，j等于1，在第二材料层包括i种图案的情况下，j为1～i中的每个。
  17. 根据权利要求16所述的发光基板的制备方法，其中，在所述第一材料层为阴极层的情况下，还包括：在形成所述第一薄膜之前，形成像素界定层；在所述第一材料层为电子传输层的情况下，还包括：在形成所述第一材料层之前，形成所述像素界定层；
    所述像素界定层限定出多个开口；所述多个开口包括i个开口组；
    所述第j区域是i个开口组中第j开口组所在的区域。
  18. 根据权利要求16或17所述的发光基板的制备方法，其中，在所述第一薄膜的材料包括所述金属铝和/或金属银的情况下，所述等离子体所采用的工作气体为含氧气体，以在去除所述第j牺牲层位于第j区域的部分之后，在所述第一薄膜位于所述第j区域的表面形成所述金属铝和/或金属银的相应氧化物层。
  19. 根据权利要求16～18任一项所述的发光基板的制备方法，其中，
    所述等离子体所采用的工作气体包括氧气、氩气中的至少一种。
  20. 根据权利要求15～19任一项所述的发光基板的制备方法，其中，
    所述在衬底上形成第一薄膜，包括：
    通过蒸镀工艺，在所述衬底上形成所述第一薄膜。
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