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WO2019185005A1 - 信号处理方法、装置及系统 - Google Patents

信号处理方法、装置及系统 Download PDF

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Publication number
WO2019185005A1
WO2019185005A1 PCT/CN2019/080333 CN2019080333W WO2019185005A1 WO 2019185005 A1 WO2019185005 A1 WO 2019185005A1 CN 2019080333 W CN2019080333 W CN 2019080333W WO 2019185005 A1 WO2019185005 A1 WO 2019185005A1
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WO
WIPO (PCT)
Prior art keywords
signal
analog
processing
analog signal
channel
Prior art date
Application number
PCT/CN2019/080333
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English (en)
French (fr)
Inventor
赵建平
俞鑫
马东艺
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华为技术有限公司
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Publication of WO2019185005A1 publication Critical patent/WO2019185005A1/zh

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B7/00—Radio transmission systems, i.e. using radiation field
    • H04B7/02—Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas
    • H04B7/04—Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas
    • H04B7/0413—MIMO systems
    • H04B7/0456—Selection of precoding matrices or codebooks, e.g. using matrices antenna weighting
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B7/00—Radio transmission systems, i.e. using radiation field
    • H04B7/02—Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas
    • H04B7/04—Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas
    • H04B7/06—Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas at the transmitting station
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B7/00—Radio transmission systems, i.e. using radiation field
    • H04B7/02—Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas
    • H04B7/04—Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas
    • H04B7/06—Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas at the transmitting station
    • H04B7/0613—Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas at the transmitting station using simultaneous transmission
    • H04B7/0615—Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas at the transmitting station using simultaneous transmission of weighted versions of same signal
    • H04B7/0617—Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas at the transmitting station using simultaneous transmission of weighted versions of same signal for beam forming
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B7/00—Radio transmission systems, i.e. using radiation field
    • H04B7/02—Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas
    • H04B7/04—Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas
    • H04B7/06—Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas at the transmitting station
    • H04B7/0686—Hybrid systems, i.e. switching and simultaneous transmission
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B7/00—Radio transmission systems, i.e. using radiation field
    • H04B7/02—Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas
    • H04B7/04—Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas
    • H04B7/08—Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas at the receiving station
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B7/00—Radio transmission systems, i.e. using radiation field
    • H04B7/02—Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas
    • H04B7/04—Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas
    • H04B7/08—Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas at the receiving station
    • H04B7/0837—Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas at the receiving station using pre-detection combining
    • H04B7/0842—Weighted combining
    • H04B7/086—Weighted combining using weights depending on external parameters, e.g. direction of arrival [DOA], predetermined weights or beamforming
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W16/00—Network planning, e.g. coverage or traffic planning tools; Network deployment, e.g. resource partitioning or cells structures
    • H04W16/18—Network planning tools
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W16/00—Network planning, e.g. coverage or traffic planning tools; Network deployment, e.g. resource partitioning or cells structures
    • H04W16/24—Cell structures
    • H04W16/28—Cell structures using beam steering

Definitions

  • the present application provides a signal phase shifting method, device and system, which can solve the problem of complicated structure of the signal processing device.
  • the technical solution is as follows:
  • a signal processing device which may be a radio frequency unit of a base station, such as an RRU, or an RFU; or the signal processing device may be a circuit in a radio frequency unit of a base station, and the signal processing device may It is the radio unit of the terminal, or the signal processing device may be a circuit in the radio unit of the terminal.
  • the signal processing device includes: a first processing unit and a second processing unit, wherein the first processing unit is configured to perform fixed beamforming processing on the first analog signal of the N1 channel to obtain a second analog signal of the N2 channel;
  • the processing unit is configured to perform a first process on the second analog signal of the N2 channel to obtain a third analog signal of the N2 channel, where each of the second analog signals includes at least two of the first analog signals, and N2 ⁇ N1 ⁇ 2; the first processing includes phase shift processing; and the third analog signal of the N2 way is used to form N1 beams corresponding to the first analog signal of the N1 road.
  • the second analog signal of the N2 channel is obtained, and then the second analog signal of the N2 channel is phase-shifted. Since each of the second analog signals includes at least two first analog signals, performing phase shift processing on each of the second analog signals is equivalent to performing phase shift processing on at least two first analog signals, so the signal processing device When it is required to perform phase shift processing on the plurality of first analog signals, the signal processing device needs to include fewer phase shifters, and the signal processing device has a simpler structure. Moreover, since the signal processing device does not need to include a large number of phase shifters, the cost of the signal processing device is also low.
  • the first processing unit is configured to: map each of the first analog signals to at least two of the second analog signals.
  • the first processing unit is configured to: map each of the first analog signals to at least two of the second analog signals by using a Butler matrix or a Rotman lens.
  • the second processing unit is configured to: perform phase shift processing on each of the second analog signals by using a phase shift value; wherein, N2 of phase shift processing on the second analog signal of the N2 road
  • the phase shift values do not form an arithmetic progression.
  • the N1 beams formed by the N2 third analog signals are non-preferred beams;
  • the N1 beams formed by the N2 third analog signals are preferred beams.
  • the non-preferred beam can cover the recess of the better beam.
  • the signal processing device can separately control the N2 phase shifters to process the second analog signal of the N2 channel at different times, so that the signals can be processed at different times at different times. A better beam and a non-preferred beam are formed, and the coverage of the formed beam is increased, so that the formed beam can fully cover the area to be covered, the signal processing device has higher throughput, and the signal transmission efficiency is higher.
  • the phase shift values of the phase shift processing of the at least one second analog signal are different.
  • the beams formed by the finally obtained N2 third analog signals are changed.
  • the first process further includes a power amplification process before the phase shift process or after the phase shift process.
  • the signal processing device requires the use of N1 DACs, N1 mixers, N2 phase shifters, and N2 PAs.
  • N2>N1 the number of DACs and mixers that the signal processing device needs to use is small, which further simplifies the structure of the signal processing device and reduces the cost of the signal processing device.
  • each of the second analog signals includes at least two first analog signals
  • performing power amplification processing on each of the second analog signals is equivalent to performing power amplification processing on at least two first analog signals, so signal processing The device needs to use less power for the power amplification process, and the structure of the signal processing device is relatively simple.
  • the power multiplexing of the PA is realized, and the efficiency of performing power amplification processing on the second analog signal of the N2 channel is also high.
  • the first processing unit is configured to: map the at least one of the first analog signals to different at least two of the second analog signals at different times.
  • the first analog signal of the N1 channel is processed to obtain a plurality of different second analog signals, thereby obtaining a plurality of different third analog signals, and forming more different beams.
  • each of the second analog signals includes the first analog signal of the N1 way.
  • performing phase shift processing on each of the second analog signals is equivalent to performing phase shift processing on the first analog signal of the N1 channel. Therefore, when the signal processing device needs to perform phase shift processing on the plurality of first analog signals, The number of phase shifters required for the signal processing device can be further reduced, and the structure of the signal processing device is further simplified to further reduce.
  • any two of the first analog signals of the N1 channel are different from the first analog signal.
  • At least two of the first analog signals of the N1 road are identical.
  • a signal processing apparatus comprising: the signal processing apparatus of the first aspect, and an antenna device, wherein the antenna device is configured to transmit the N2 path output by the second processing unit
  • the third analog signal may be a system composed of a radio frequency unit and an antenna device of the base station, such as an active antenna unit (AAU); or the signal processing device may be a system composed of a radio unit and an antenna device of the terminal.
  • the antenna device may include one or more antennas.
  • a signal processing device which may be a radio frequency unit of a base station, such as an RRU, or an RFU; or the signal processing device may be a circuit in a radio frequency unit of a base station, and the signal processing device may It is the radio unit of the terminal, or the signal processing device may be a circuit in the radio unit of the terminal.
  • the signal processing device includes: a first processing unit and a second processing unit, wherein the second processing unit is configured to perform a first process on the third analog signal of the N2 channel to obtain a second analog signal of the N2 channel;
  • the unit is configured to perform a fixed beamforming process on the second analog signal of the N2 channel to obtain a first analog signal of the N1 channel, where each of the second analog signals includes at least two of the first analog signals, and N2 ⁇ N1 ⁇ 2; the first processing includes phase shift processing; and the third analog signal of the N2 way is used to form N1 beams corresponding to the first analog signal of the N1 road.
  • the first processing unit is configured to: map each of the second analog signals to at least two of the first analog signals by using a Butler matrix or a Rotman lens.
  • the second processing unit is configured to: perform phase shift processing on each of the third analog signals by using a phase shift value; wherein, N2 of phase shift processing on the third analog signal of the N2 road
  • the phase shift values do not form an arithmetic progression.
  • the second processing unit is configured to: perform phase shift processing on each of the third analog signals by using a phase shift value; wherein, N2 of phase shift processing on the third analog signal of the N2 road
  • the phase shift values form an arithmetic progression sequence.
  • the phase shift values of the phase shift processing of the at least one third analog signal are different.
  • the first process further includes a low noise amplification process before the phase shift process or after the phase shift process.
  • the first processing unit is configured to: map the at least one second analog signal to different at least two of the first analog signals at different times.
  • the signal processing device further includes: a mixer and an analog-to-digital converter, wherein the mixer is configured to perform mixing processing on the first analog signal of the N1 channel to obtain an initial analog signal of the N1 channel;
  • the analog-to-digital converter is configured to perform analog-to-digital conversion processing on the initial analog signal of the N1 channel to obtain an N1 digital signal.
  • each of the second analog signals includes the first analog signal of the N1 way.
  • any two of the first analog signals of the N1 channel are different from the first analog signal.
  • At least two of the first analog signals of the N1 road are identical.
  • a signal processing apparatus which may be a system composed of a radio frequency unit and an antenna device of a base station, such as an active antenna unit (AAU); or the signal processing apparatus may It is a system consisting of a radio unit and an antenna device of the terminal.
  • the signal processing device includes: an antenna device, and the signal processing device according to the third aspect, wherein the signal processing device of the third aspect is configured to process the N2 third analog signal received by the antenna device at the air interface.
  • a signal processing method comprising: performing a fixed beamforming process on a first analog signal of an N1 channel to obtain a second analog signal of the N2 channel; and performing a first Processing, obtaining an N2 way third analog signal; wherein each of the second analog signals includes at least two of the first analog signals, and N2 ⁇ N1 ⁇ 2; the first process includes phase shift processing; N2 way The third analog signal is used to form N1 beams corresponding to the first analog signal of the N1 road.
  • the performing fixed beamforming processing on the first analog signal of the N1 channel includes: mapping each of the first analog signals to at least two of the second analog signals.
  • mapping each of the first analog signals to at least two of the second analog signals comprises: mapping each of the first analog signals to at least by a Butler matrix or a Rotman lens. Two of the second analog signals.
  • performing the first processing on the second analog signal of the N2 channel including: performing phase shift processing on each of the second analog signals by using a phase shift value; wherein, the second step is performed on the N2 road
  • the N2 phase shift values of the phase shift processing of the analog signal do not form an arithmetic progression sequence.
  • performing the first processing on the second analog signal of the N2 channel including: performing phase shift processing on each of the second analog signals by using a phase shift value; wherein, the second step is performed on the N2 road
  • the N2 phase shift values of the phase shift processing of the analog signal form an arithmetic progression sequence.
  • the phase shift values of the phase shift processing of the at least one second analog signal are different.
  • the first process further includes a power amplification process before the phase shift process or after the phase shift process.
  • mapping the first analog signal to each of the at least two second analog signals comprises: mapping at least one of the first analog signals to different at least two channels at different times The second analog signal.
  • the method before performing the fixed beamforming process on the first analog signal of the N1 channel, the method further includes: performing digital-to-analog conversion processing on the N1 digital signal to obtain an initial analog signal of the N1 channel; and the N1 road The initial analog signal is subjected to mixing processing to obtain the first analog signal of the N1 path.
  • each of the second analog signals includes the first analog signal of the N1 way.
  • any two of the first analog signals of the N1 channel are different from the first analog signal.
  • At least two of the first analog signals of the N1 road are identical.
  • a signal processing method comprising: performing a first processing on a third analog signal of the N2 channel to obtain a second analog signal of the N2 channel; and performing fixed beamforming on the second analog signal of the N2 channel Processing, obtaining a first analog signal of the N1 channel; wherein, each of the second analog signals includes at least two of the first analog signals, and N2 ⁇ N1 ⁇ 2; the first processing includes phase shift processing; N2 way
  • the third analog signal is used to form N1 beams corresponding to the first analog signal of the N1 road.
  • performing the fixed beamforming process on the second analog signal of the N2 channel includes: mapping each of the second analog signals to at least two of the first analog signals.
  • mapping each of the second analog signals to at least two of the first analog signals comprises: mapping each of the second analog signals to at least by a Butler matrix or a Rotman lens Two of the first analog signals.
  • performing the first processing on the N2 way third analog signal including: performing phase shift processing on each of the third analog signals by using a phase shift value; wherein, the third analog signal is sent to the N2 channel
  • the N2 phase shift values subjected to the phase shift processing do not form an arithmetic progression column.
  • performing the first processing on the N2 way third analog signal including: performing phase shift processing on each of the third analog signals by using a phase shift value; wherein, the third analog signal is sent to the N2 channel
  • the N2 phase shift values subjected to the phase shift processing form an arithmetic progression sequence.
  • the phase shift values of the phase shift processing of the at least one third analog signal are different.
  • the first process further includes a low noise amplification process before the phase shift process or after the phase shift process.
  • mapping the second analog signal to each of the at least two channels of the first analog signal comprises: mapping at least one of the second analog signals to different at least two channels at different times The first analog signal.
  • the method further includes: performing a mixing process on the first analog signal of the N1 channel to obtain an initial analog signal of the N1 channel; Performing analog-to-digital conversion processing on the initial analog signal of the N1 channel to obtain an N1 digital signal.
  • each of the second analog signals includes the first analog signal of the N1 way.
  • the method before performing the first processing on the N2 way third analog signal, the method further includes: receiving, by the air interface, the N2 way the third analog signal.
  • any two of the first analog signals of the N1 channel are different from the first analog signal.
  • At least two of the first analog signals of the N1 road are identical.
  • a signal processing system comprising: the signal processing device of the first aspect; and the signal processing device of the third aspect.
  • a signal processing system comprising: the signal processing device of the second aspect; and the signal processing device of the fourth aspect.
  • FIG. 1 is a schematic structural diagram of a communication system according to an embodiment of the present application.
  • FIG. 1b is a schematic structural diagram of a base station according to an embodiment of the present application.
  • FIG. 1 is a schematic structural diagram of a terminal according to an embodiment of the present application.
  • FIG. 2 is a schematic diagram of a scheme for implementing beamforming in an analog part provided by the related art
  • FIG. 3 is a flowchart of a signal processing method according to an embodiment of the present application.
  • FIG. 4 is a schematic structural diagram of a signal processing apparatus A according to an embodiment of the present application.
  • FIG. 5 is a schematic structural diagram of a single-pole multi-throw switch according to an embodiment of the present application.
  • FIG. 6 is a schematic diagram of a beam according to an embodiment of the present disclosure.
  • FIG. 7 is a schematic diagram of superposition of a beam according to an embodiment of the present disclosure.
  • FIG. 8 is a flowchart of another signal processing method according to an embodiment of the present application.
  • FIG. 9 is a schematic structural diagram of another signal processing apparatus A according to an embodiment of the present disclosure.
  • FIG. 10 is a flowchart of another signal processing method according to an embodiment of the present application.
  • FIG. 11 is a schematic structural diagram of a signal processing apparatus B according to an embodiment of the present disclosure.
  • FIG. 12 is a flowchart of another signal processing method according to an embodiment of the present application.
  • FIG. 13 is a schematic structural diagram of another signal processing apparatus B according to an embodiment of the present disclosure.
  • FIG. 14 is a schematic structural diagram of another signal processing apparatus A according to an embodiment of the present disclosure.
  • FIG. 15 is a schematic structural diagram of another signal processing apparatus B according to an embodiment of the present application.
  • FIG. 1 is a schematic diagram of a communication system according to an embodiment of the present application.
  • the communication system includes a base station 011 and a terminal 012, and the terminal 012 is capable of communicating with the base station 011.
  • the base station 011 and the terminal 012 included in the communication system as shown in FIG. 1a are only an example, and the base station 011 can communicate with multiple terminals, which is not limited in this embodiment of the present application.
  • the communication system may be a communication system supporting a fourth generation (4G) access technology, such as a long term evolution (LTE) access technology; or the communication system may also support a fifth generation (fifth) Generation, 5G) access technology communication system, such as new radio (NR) access technology; or the communication system may also be a communication system supporting third generation (3G) access technology, for example ( Universal mobile telecommunications system (UMTS) access technology; or the communication system may also be a second generation (2G) access technology communication system, such as a global system for mobile communications (GSM) access
  • 3G Universal mobile telecommunications system
  • UMTS Universal mobile telecommunications system
  • 2G second generation
  • GSM global system for mobile communications
  • the communication system may also be a communication system supporting a plurality of wireless technologies, such as a communication system supporting LTE technology and NR technology.
  • the communication system can also be applied to future-oriented communication technologies.
  • the base station 011 in FIG. 1a may be a device for supporting a terminal access communication system, for example, may be a base transceiver station (BTS) and a base station controller in a 2G access technology communication system.
  • BSC base transceiver station
  • RNC radio network controller
  • eNB evolved base station
  • gNB next generation base station
  • TRP transmission reception point
  • AP access point
  • the terminal 012 in FIG. 1a may be a device that provides voice or data connectivity to a user, such as user equipment (UE), mobile station, subscriber unit, and platform. (station), terminal equipment (TE), etc.
  • the terminal can be a cellular phone, a personal digital assistant (PDA), a wireless modem, a handheld, a laptop computer, a cordless phone, and a wireless device. Local loop (WLL) station, tablet (pad), etc.
  • PDA personal digital assistant
  • WLL Local loop
  • the device that can access the communication system can communicate with the network side of the communication system, or communicate with other objects through the communication system can be the terminal in the embodiment of the present application, for example, intelligent transportation.
  • communication may also be performed between multiple terminals.
  • the terminal can be statically fixed or mobile.
  • FIG. 1b is a schematic structural diagram of a base station 011.
  • the base station 011 includes a baseband unit (BBU), a radio frequency unit, and an antenna.
  • the radio unit may be a remote radio unit (RRU), and the RRU is physically separated from the BBU.
  • the radio unit may be a radio unit ( The radio frequency unit (RFU), the RFU and the BBU are physically set together.
  • the radio unit can be physically integrated with the antenna and is an Active Antenna Unit (AAU).
  • AAU Active Antenna Unit
  • the RRU is taken as an example in FIG. 1b.
  • the base station 011 includes a BBU 111, an RRU 112, and an antenna 113.
  • the BBU 111 includes a processor 1111 and a memory 1112.
  • the BBU 111 may also be referred to as a processing unit, and is mainly used to perform processing on a baseband signal, such as channel coding, multiplexing, modulation, spreading, and the like.
  • the processor 1111 can be used to control the base station 011 to implement a series of functions. For example, it may be a general-purpose central processing unit (CPU), a digital signal processor (DSP), a microprocessor, an application-specific integrated circuit (ASIC), and a micro A Microcontroller Unit (MCU), a Field Programmable Gate Array (FPGA), or an integrated circuit for implementing logic operations.
  • Memory 1112 can be any medium that carries or stores desired program code in the form of instructions or data structures and that can be accessed by a computer.
  • ROM read-only memory
  • RAM random access memory
  • EEPROM electrically erasable programmabler-only memory
  • RRU 112 may also be referred to as a transceiver unit, a transceiver, a transceiver circuit, or a transceiver. Mainly used for the conversion of RF signals and baseband signals.
  • the antenna 113 is mainly used for transmitting and receiving radio frequency signals with the terminal.
  • the RRU 112 receives the baseband signal from the BBU 111, converts the baseband signal into a radio frequency signal, and transmits the radio frequency signal to the terminal 12 through the antenna 113.
  • the antenna 113 receives the radio frequency signal from the terminal 12 and sends it to the RRU 112.
  • the RRU 112 converts the radio frequency signal into a baseband signal and sends it to the BBU 111.
  • the BBU 111 further processes the baseband signal, for example, decoding processing.
  • FIG. 1c is a schematic structural diagram of the terminal 012.
  • Terminal 012 includes at least one processor 121, at least one radio frequency unit 122, and at least one memory 123.
  • the processor 121, the memory 123 and the radio frequency unit 122 are connected.
  • the terminal 121 may further include an output device 124, an input device 125, and one or more antennas 126.
  • the antenna 126 is connected to the radio frequency unit 122, and the output device 124 and the input device 125 are connected to the processor 121.
  • the processor 121 can refer to the description of the processor 1111 of the base station 011 described above.
  • the memory 123 can refer to the description of the memory 1112 of the above-described base station 011.
  • the radio frequency unit 122 may also be referred to as a transceiver unit, a transceiver, a transceiver circuit, or a transceiver. It is mainly used for transmitting and receiving RF signals with base stations and converting RF signals with baseband signals.
  • Output device 124 is in communication with processor 121 and can display information in a variety of ways.
  • the output device 124 can be a liquid crystal display (LCD), a light emitting diode (LED) display device, a cathode ray tube (CRT) display device, or a projector. Wait.
  • Input device 125 is in communication with processor 121 and can accept user input in a variety of ways.
  • input device 125 can be a mouse, keyboard, touch screen device, or sensing device, and the like.
  • the radio frequency unit 122 receives the baseband signal from the processor 121, converts the baseband signal into a radio frequency signal, and transmits the radio frequency signal to the terminal 12 via the antenna 126.
  • the antenna 126 receives the radio frequency signal from the terminal 12 and sends it to the radio frequency unit 122.
  • the radio frequency unit 122 converts the radio frequency signal into a baseband signal and sends it to the processor 121.
  • the processor 121 further processes the baseband signal, for example, decoding processing.
  • the analog part may refer to a part that processes the analog signal.
  • the analog part of the base station 011 may refer to the RRU 112 and the antenna 113 of the base station 011, or the analog part of the terminal 011 may refer to the radio frequency unit 122 and the antenna 126 of the terminal 012.
  • the analog part in the embodiment of the present application may include a digital to analog converter or an analog to digital converter.
  • the base station 011 when the base station 011 communicates with the terminal 012, a beamforming technique can be employed.
  • the base station 011 forms a beam with a pointing, and the beam with the pointing can better cover the area where the terminal 012 is located.
  • FIG. 2 is a schematic diagram of a scheme for implementing beamforming in an analog part provided by the related art.
  • the analog portion of the base station 011 or the analog portion of the terminal 012 may include a signal processing device 20, which may include W digital to analog converters (DACs) 201, W hybrids.
  • the frequency converter 202, the W power dividers 203, the X phase shifters 204, the X power amplifiers (PAs) 205 and the antennas 206, W are greater than or equal to 2, and X is a multiple of W.
  • the signal processing device 20 is capable of processing W data streams, which may be data stream 1 to data stream W as shown in FIG.
  • the DAC 201 converts the data stream 1 from a digital signal to an analog signal, the mixer 202 will mix the analog signals, and the power divider 203 will mix the signals. Divided into two analog signals, after which the two analog signals are output to the antenna 206 via the phase shifter 204 and the PA 205.
  • the mixed-processed signal can be divided into multiple paths by the power divider 203, each of which is Power amplification is performed by the PA to ensure that the stream 1 has a large radiant power when it is transmitted through the antenna 206, thereby countering the path loss.
  • Ghz represents Gyz.
  • the signal processing device 20 When there are multiple data streams, the signal processing device 20 requires multiple phase shifters and PAs for each data stream, which results in the signal processing device 20 consuming more hardware resources and the hardware structure is more complicated.
  • data stream 1 requires 2 phase shifters and 2 PAs
  • data stream W also requires 2 phase shifters and 2 PAs.
  • Signal processing unit 20 requires 2W phase shifters and 2W PAs. .
  • FIG. 3 is a flowchart of a signal processing method according to an embodiment of the present application, and the processing method may be used in the signal processing apparatus A.
  • 4 is a schematic structural diagram of a signal processing apparatus A according to an embodiment of the present application. It should be noted that 30 in the signal processing apparatus A may be the RRU 112 in the base station 011; or 30 in the signal processing apparatus A may be the RRU 112.
  • the circuit in the antenna 304 can be the antenna 113 in the base station 011.
  • the signal processing device A 30 may be the radio frequency unit 122 in the terminal 012; or, the signal processing device A 30 may be the circuit in the radio frequency unit 122, and the signal processing device A 304 may be the antenna 126 in the terminal 012. .
  • the signal processing method may include:
  • Step 201 Perform digital-to-analog conversion processing on the N1 digital signal to obtain an initial analog signal of the N1 channel.
  • the signal processing device A can perform digital-to-analog conversion processing on the N1 digital signals one by one through the N1 DACs 306, thereby obtaining an initial analog signal processed by each DAC 306, and N1 DACs 306.
  • N1 may be an integer greater than or equal to 2.
  • the N1 digital signal can be N1 data streams.
  • any two of the N1 digital signals may be different, or at least two of the N1 digital signals may be the same, which is not limited in this embodiment of the present application.
  • Step 202 Perform mixing processing on the initial analog signal of the N1 channel to obtain a first analog signal of the N1 channel.
  • the initial analog signal of the N1 channel can be input to the N1 mixers 305 one by one, so that the N1 mixers 305 are paired with N1.
  • the initial analog signal of the path is subjected to mixing processing to obtain the first analog signal of the N1 path.
  • any two of the N1 digital signals are different, any two of the first analog signals of the N1 road are different; when at least two of the N1 digital signals are different When the signals are the same, at least two of the first analog signals of the N1 channel are the same.
  • Step 203 Perform fixed beamforming processing on the first analog signal of the N1 channel to obtain a second analog signal of the N2 channel.
  • N2 N1
  • the signal processing device A can perform fixed beamforming processing on the first analog signal of the N1 channel through the first processing circuit 301 in FIG.
  • the first processing circuit 301 may pass through the Butler matrix 3012 or a Rotman lens (also referred to as a Rotman lens) when processing the first analog signal of the N1 channel.
  • each first analog signal is mapped to at least two second analog signals, and each second analog signal can superimpose at least two signals mapped by the first analog signal, thereby
  • Each second analog signal that arrives includes at least two first analog signals.
  • each of the second analog signals obtained by the fixed beamforming process has a preset phase and amplitude.
  • the Butler Matrix 3012 has X inputs (not shown in Figure 4) and N2 outputs (not shown in Figure 4), X > N1.
  • the signal processing device A can input the first analog signal of the N1 channel to the Butler matrix 3012 through the N1 input terminals of the X input terminals.
  • the first analog signal of the N1 channel can be represented as the X row and the 1 column.
  • the input matrix, and the X elements in the input matrix are the X-channel first analog signals input in the X inputs.
  • the processing of the first analog signal of the input N1 way by the Butler matrix 3012 can be understood as: calculating the input matrix and the preset matrix in the Butler matrix, such as adding, subtracting, multiplying and summing the input matrix and the preset matrix.
  • the embodiment of the present application does not limit this, except for at least one of the operations.
  • the operation result of the input matrix and the preset matrix may be represented as an output matrix of N2 rows and 1 column, and the N2 elements in the output matrix are N2 second analog signals outputted by N2 input terminals of the Butler matrix. That is, the Butler matrix can calculate the first analog signal of the N1 channel and the preset matrix by mapping the first analog signal of the N1 channel to at least two second analog signals, so that each output of the Butler matrix is The second analog signal includes at least two first analog signals.
  • the first analog signal is mapped to the at least two second analog signals.
  • each of the first analog signals may be mapped to the N2 second analog signal. Therefore, the second analog signal that is obtained includes the first analog signal of the N1 channel, which is not limited by the embodiment of the present application.
  • At least one of the first analog signals of the first analog signal of the N1 channel may be mapped to different at least two second analog signals at different times.
  • at least one of the first analog signals of the first analog signal of the N1 channel may be changed at an input end of the Butler matrix at different times, thereby changing an input matrix for indicating the first analog signal of the N1 channel, and further The output matrix of the Butler matrix is changed to map the at least one first analog signal to obtain a different second analog signal.
  • the phase shifter 302 By mapping at least one of the first analog signals of the N1 way first analog signals to different at least two second analog signals at different times, different times may be formed, the at least one first analog signal, different beams, Thereby, the accuracy requirement of the phase shifter 302 can be lowered, for example, the number of bits of the phase shifter can be reduced.
  • the first processing circuit 301 may further include a single-pole multi-throw switch 3011 (the single-pole multi-throw switch is taken as an example in the embodiment of the present application, and other switches may be implemented in the implementation), and the first processing circuit 301 may be combined with the single-pole multi-throw switch 3011. Realizing mapping the at least one first analog signal to different at least two second analog signals at different times (eg, the phases of the signals are different, and/or the amplitudes of the signals are different).
  • the first processing circuit 301 may The change in the input in the Butler matrix is achieved by two single-pole multi-throw switches 3011. Each single-pole multi-throw switch may have one moving end and a plurality of fixed ends. As shown in FIG.
  • the first analog signal of the Y1 road can be input to the dynamic terminal D1, and the first analog signal of the Y2 road can be input to the dynamic terminal D2.
  • the first processing circuit 301 can control the dynamic terminal D1 to be connected to the fixed terminal B1, and the control terminal D2 is connected to the fixed terminal B3, thereby inputting the first analog signal of the Y1 channel to the Butler matrix.
  • the input terminal connected to the fixed terminal B1, and the first analog signal of the Y2 channel are input to the input terminal of the Butler matrix connected to the fixed terminal B3.
  • the first processing circuit 301 can control the connection between the movable end D1 and the fixed end B2, and the control end D2 is connected with the fixed end B3, thereby inputting the first analog signal of the Y1 channel to the Butler matrix.
  • the input terminal connected to the fixed terminal B2, and the first analog signal of the Y2 channel are input to the input terminal of the Butler matrix connected to the fixed terminal B3.
  • the first processing circuit 301 can control the dynamic terminal D1 to be connected to the fixed terminal B1, and the control terminal D2 is connected to the fixed terminal B4, thereby inputting the first analog signal of the Y1 channel to the Butler matrix.
  • the input terminal connected to the fixed terminal B1, and the first analog signal of the Y2 channel are input to the input terminal of the Butler matrix connected to the fixed terminal B4.
  • the first processing circuit 301 can control the connection between the dynamic end D1 and the fixed end B2, and the control end D2 is connected with the fixed end B4, thereby inputting the first analog signal of the Y1 channel to the Butler matrix.
  • the input terminal connected to the fixed terminal B2, and the first analog signal of the Y2 channel are input to the input terminal of the Butler matrix connected to the fixed terminal B4.
  • the first analog signal of the Y1 channel and the first analog signal of the Y2 channel are respectively input to different sets of inputs of the Butler matrix during each of the four time periods (each input includes two inputs), where Four different time periods are mapped to different second analog signals.
  • each of the single-pole multi-throw switches includes two non-moving ends as an example.
  • the number of non-moving ends in each single-pole multi-throw switch may be other numbers, and The number of the non-moving ends of the plurality of single-pole multi-throw switches may be different, which is not limited in the embodiment of the present application.
  • the process of mapping the first analog signal of the N1 channel to the second analog signal of the N2 channel by using a Rotman lens and referring to the process of mapping the first analog signal of the N1 channel to the second analog signal of the N2 channel through the Butler matrix, the present application implements The example will not be described here.
  • Step 204 Perform a first process on the second analog signal of the N2 channel to obtain a third analog signal of the N2 channel.
  • the signal processing device A can also perform the first processing on the N2 second analog signal through the second processing circuit V1.
  • the first processing may include: phase shift processing and power amplification processing, and the power amplification processing is performed before the phase shift processing, or after the phase shift processing, in the embodiment of the present application, the power amplification processing is taken as an example after the phase shift processing, and the second The processing circuit V1 can perform power amplification processing on the N2 second analog signal through the N2 PAs 303.
  • the PA can compensate for the power loss caused by the phase shifter 302, thereby ensuring that the signal is transmitted from the antenna and has a large radiated power.
  • the second processing circuit V1 can perform phase shift processing on the N2 way second analog signals one by one through the N2 phase shifters 302.
  • Each phase shifter 302 can perform phase shift processing on each second analog signal by a phase shift value.
  • the N2 phase shift values of the phase shift processing of the second analog signal of the N2 channel may not form an arithmetic progression, and the N2 phase shift values of the phase shift processing of the second analog signal of the N2 channel may also form an arithmetic progression column.
  • each of the N1 way first analog signals can be made to form a better beam.
  • the better beam but points to a better beam.
  • the terminal can be made to be in a comparative coverage, thereby improving the quality of wireless communication.
  • Each of the N1 way first analog signals can form a non-preferred beam by not forming an arithmetic progression by N2 phase shift values.
  • the direction of the non-preferred beam can be between the directions of the two better beams.
  • the second processing circuit V1 performs phase shift processing on the N2 second analog signal by using N2 phase shifters
  • at least one of the second analog signals of the N2 second analog signals may be used at different times. Phase shift processing is performed using different phase shift values.
  • the N2 way second analog signal includes the Z1 way, the Z2 way, and the Z3 way second analog signal
  • the second processing circuit V1 can control the three phase shifters 302 to the three paths in a time period.
  • the three phase shifting values of the second analog signal for phase shift processing are: 0 degrees, 30 degrees, and 60 degrees, respectively, and the three phase shifting values form an arithmetic progression column.
  • the second processing circuit V1 can control the three phase shifting values of the three phase shifters 302 to phase-shift the three second analog signals into: 0 degrees, 20 degrees, and 40 degrees, respectively.
  • the three phase shift values also form an arithmetic progression column, and the phase shift value of the second analog signal of the Z1 road is not changed during the two time periods, and the Z2 and Z3 roads are not changed.
  • the phase shift values of the second analog signal undergoing phase shift processing during these two time periods are all changed.
  • the second processing circuit V1 can control the three phase shifting values of the three phase shifters 302 to perform phase shift processing on the three second analog signals in order: 0 degrees, 25 degrees and 40 degrees, at which time the three phase shift values do not form an arithmetic progression.
  • the at least one second analog signal can be formed at different times, corresponding to different beams, Thereby beam scanning is achieved.
  • Step 205 The third analog signal of the N2 channel is transmitted on the air interface.
  • the signal processing device A can also transmit the N2 third analog signal through the antenna 304 to form an N1 beam corresponding to the first analog signal of the N1 channel.
  • the phase shift value of the N2 phase shifters is changed, a new N1 beam can be formed after the generated N2 way third analog signal is transmitted by the air interface.
  • the signal processing method may not include the step 205, which is not limited by the embodiment of the present application.
  • the N1 beams formed in step 205 are non-preferred beams;
  • the N1 beams formed in step 205 are preferred beams.
  • the non-preferred beam can cover the recess of the better beam.
  • the signal processing device can separately control the N2 phase shifters to process the second analog signal of the N2 channel at different times, so that at different times A better beam and a non-preferred beam can be formed respectively, and the coverage of the formed beam is increased, thereby enabling the formed beam to fully cover the area to be covered, the signal processing device A has a higher throughput, and the signal transmission efficiency is higher.
  • the signal processing device A can adjust the phase shift value of the phase shifter and adjust the input manner of the first analog signal input to the input of the Butler matrix, so that the N1 beams formed in step 205 are The angles are separated as much as possible to reduce sidelobe interference between the N1 beams.
  • the signal processing device A needs to use N1 DACs 306 in step 201, N1 mixers 305 are needed in step 202, and N2 phase shifters 302 are needed in step 204.
  • N2 PA 303 When N2>N1, the number of DACs 306 and mixers 305 that the signal processing device A needs to use is small, further saving hardware resources, simplifying the structure of the signal processing device, and reducing the signal processing device. cost.
  • each of the second analog signals includes at least two first analog signals
  • performing power amplification processing on each of the second analog signals is equivalent to performing power amplification processing on at least two first analog signals, so signal processing
  • PA 303 required for the device to perform power amplification processing
  • the structure of the signal processing device is relatively simple.
  • the power multiplexing of the PA 303 is realized, and the efficiency of performing power amplification processing on the N2 second analog signal is also high.
  • the signal processing device A can map at least one first analog signal to different at least two second analog signals at different times. Therefore, the first analog signal of the N1 channel can be processed to obtain more different numbers.
  • the two analog signals obtain a plurality of different third analog signals to form more different beams.
  • the first analog signal of the Y1 channel and the first analog signal of the Y2 channel are respectively input to different sets of inputs of the Butler matrix during the four time periods (each set includes two inputs)
  • the input terminal is respectively mapped to different second analog signals in the four time periods, and the first analog signal of the Y1 channel and the first analog signal of the Y2 channel are respectively formed in the four time segments.
  • Each group of beams corresponding to the first analog signal of the Y1 channel and the first analog signal of the Y2 channel includes: a first analog signal of the Y1 channel and two beams corresponding to the first analog signal of the Y2 channel.
  • Each phase shifter can perform phase shift processing of multiple different phase shift values on the second analog signal when the input second analog signal is phase-shifted, and the phase shifter pairs each of the second analog signals.
  • the number of phase shifting processes is related to the bit position of the phase shifter.
  • the n-bit phase shifter can perform phase shift processing of 2 n different phase shift values for each second analog signal to obtain 2 n third analog signals with different phases, n ⁇ 1. If each of the first analog signals of the first analog signal of the N1 channel corresponds to one beam, the N2 phase shifters perform phase shift processing on the second analog signal of the N2 channel, and a set of third simulations corresponding to the N1 beams can be obtained.
  • N2 phase shifters perform 2 n phase shift processing on each set of second analog signals, and can obtain 2 n sets of third analog signals corresponding to N1 ⁇ 2 n beams; when in M time periods, N1 roads
  • the N2 phase shifters respectively perform 2 n phase shift processing on the M sets of second analog signals mapped to the M time segments.
  • a third analog signal of the M ⁇ 2 n group corresponding to M ⁇ N1 ⁇ 2 n beams is obtained.
  • M ⁇ N1 ⁇ 2 n beams can be formed.
  • the signal processing apparatus in the embodiment of the present application can obtain a plurality of better beams, and the coverage areas of the beams are also large.
  • each phase shifter is a 1-bit phase shifter, N2.
  • the phase shifters can perform two phase shift processing on a set of second analog signals obtained by mapping each time period, and the N2 phase shifters can perform four times on the four sets of second analog signals obtained by mapping the four time segments.
  • Phase shift processing As shown in FIG. 6 , two beams can be formed after each set of the third analog signal after each phase shift processing is performed. In the embodiment of the present application, eight sets of third analog signals obtained after eight phase shift processing can be performed. Eight shots were made to form 16 beams. If the correlation technique shown in FIG.
  • the signal processing device in the embodiment of the present application obtains a much larger number of beams than the related art.
  • the signal processing device obtains the number of beams.
  • the abscissa in FIG. 6 is an angle, and the ordinate is a signal intensity.
  • the superposition result of the 16 beams shown in FIG. 6 can be as shown in FIG. 7, and it can be seen that the coverage areas of the 16 beams are large.
  • the number of bits of the phase shifter that needs to be used in the embodiment of the present application may be smaller than that of the phase shifter used in the related art.
  • the bit position of the phase shifter is n, and the number of beams to be obtained is M ⁇ N1 ⁇ 2 n
  • the related technology shown in FIG. 2 is adopted, a total of M ⁇
  • the first analog signal of the N1 channel is processed, and the signal processing device in the embodiment of the present application only needs to process the first analog signal of the N1 channel. Therefore, the number of paths of the first analog signal required in the embodiment of the present application is small, so that the number of DACs and mixers for processing the first analog signal of the N1 channel is also small, further saving hardware. Resources simplify the structure of the signal processing device and reduce the cost of the signal processing device.
  • each of the first analog signals passes through the power splitter, the plurality of phase shifters, and the plurality of PAs.
  • each of the first analog signals can be transmitted through all the column antennas, and the more the number of antenna columns required to transmit the signal, the more the antenna gain of the antenna is. Therefore, the antenna gain of the antenna in the embodiment of the present application is greater than the antenna gain of the antenna in FIG. 2.
  • each phase shifter performs phase shift processing on one second analog signal, which is equivalent to at least two paths.
  • the analog signal is phase-shifted at the same time. Therefore, the first analog signal of the N1 channel is synchronously changed during processing. Therefore, only minor correction (or no correction) is required before the antenna transmits the third analog signal.
  • the first analog signal may be a signal of various frequency bands, such as a signal with a frequency of 28 GHz, a signal with a frequency of 38 GHz, and a high frequency signal of a signal of 60 GHz, or a frequency. Lower low frequency signal.
  • the second analog signal of the N2 channel is obtained by performing fixed beamforming processing on the first analog signal of the N1 channel, and then the second analog signal of the N2 channel is obtained.
  • Phase shift processing was performed. Since each of the second analog signals includes at least two first analog signals, performing phase shift processing on each of the second analog signals is equivalent to performing phase shift processing on at least two first analog signals, so the signal processing device When it is required to perform phase shift processing on the plurality of first analog signals, the signal processing device needs to include fewer phase shifters, and the signal processing device has a simpler structure. Moreover, since the signal processing device does not need to include a large number of phase shifters, the cost of the signal processing device is also low.
  • FIG. 8 is a flowchart of another signal processing method according to an embodiment of the present application, which may be used in the signal processing apparatus A in FIG. 9.
  • FIG. 9 is a schematic structural diagram of another signal processing apparatus A according to an embodiment of the present application.
  • the signal processing device A in FIG. 9 may be the RRU 112 in the base station 011, or the signal processing device A is a circuit in the RRU 112.
  • signal processing device A may be radio frequency unit 122 in terminal 012, or signal processing device A may be a circuit in radio frequency unit 122.
  • Step 801 Perform fixed beamforming processing on the first analog signal of the N1 channel to obtain a second analog signal of the N2 channel.
  • each second analog signal includes at least two first analog signals, and N2 ⁇ N1 ⁇ 2.
  • the signal processing device A can perform fixed beamforming processing on the first analog signal of the N1 channel through the first processing unit 301 in FIG.
  • the first processing unit 301 may map each of the first analog signals to at least two second analog signals by using a Butler matrix or a Rotman lens, thereby Each second analog signal that arrives includes at least two first analog signals. Moreover, each of the second analog signals obtained by the fixed beamforming process has a fixed phase and amplitude.
  • Step 802 Perform a first process on the second analog signal of the N2 channel to obtain a third analog signal of the N2 channel.
  • the signal processing device A can also perform the first processing on the N2 second analog signal through the second processing unit V1.
  • the first process may include: phase shift processing.
  • the second processing unit V1 may perform phase shift processing on the second analog signal of the N2 channel by using N2 phase shifters.
  • Each phase shifter can perform phase shift processing on each second analog signal through a phase shift value.
  • the N2 phase shift values of the phase shift processing of the second analog signal of the N2 channel may not form an arithmetic progression, or the N2 phase shift values of the phase shift processing of the second analog signal of the N2 channel may form an arithmetic progression column.
  • the second analog signal of the N2 channel is obtained by performing fixed beamforming processing on the first analog signal of the N1 channel, and then the second analog signal of the N2 channel is obtained.
  • Phase shift processing was performed. Since each of the second analog signals includes at least two first analog signals, performing phase shift processing on each of the second analog signals is equivalent to performing phase shift processing on at least two first analog signals, so the signal processing device When it is required to perform phase shift processing on the plurality of first analog signals, the signal processing device needs to include fewer phase shifters, and the signal processing device has a simpler structure. Moreover, since the signal processing device does not need to include a large number of phase shifters, the cost of the signal processing device is also low.
  • FIG. 10 is a flowchart of another signal processing method according to an embodiment of the present application, and the processing method may be used in the signal processing device B.
  • FIG. 11 is a schematic structural diagram of a signal processing apparatus B according to an embodiment of the present disclosure.
  • 40 in the signal processing apparatus B may be the RRU 112 in the base station 011; or 40 in the signal processing apparatus B may be Circuitry in RRU 112; antenna 404 may be antenna 113 in base station 011.
  • the signal processing device B 40 may be the radio frequency unit 122 in the terminal 012; or, 40 of the signal processing device B may be the circuit in the radio frequency unit 122, and the 404 in the signal processing device B may be the antenna 126 in the terminal 012. .
  • the signal processing method may include:
  • Step 1001 Receive a third analog signal of the N2 channel at the air interface.
  • the signal processing device B can receive the N2 third analog signal through the antenna 404 at the air interface.
  • the third analog signal of the N2 channel can be obtained by other means.
  • the signal processing method may not include the step 1001, which is not limited by the embodiment of the present application. N2 ⁇ 2.
  • Step 1002 Perform a first process on the third analog signal of the N2 channel to obtain a second analog signal of the N2 channel.
  • the signal processing device B can also perform the first processing on the N2 way third analog signal by using the second processing unit V2.
  • the first processing may include: phase shift processing and low noise amplification processing, and the low noise amplification processing is preceded by the phase shift processing, or after the phase shift processing, in the embodiment of the present application, the low noise amplification processing is taken as an example before the phase shift processing.
  • the second processing unit V2 can perform low noise amplification processing on the N2 way third analog signal through N2 low noise amplifiers (LNAs) 403.
  • LNAs low noise amplifiers
  • the second processing unit V2 may perform phase shift processing on the N2 way third analog signal one by one through the N2 phase shifters 402.
  • Each phase shifter 402 can perform phase shift processing on each third analog signal by a phase shift value.
  • the N2 phase shift values of the N2 way third analog signal phase shift processing do not form an arithmetic progression, or the N2 phase shift values of the N2 way third analog signal phase shift processing may form an arithmetic progression.
  • At least one third analog signal of the N2 way third analog signals may be used at different times. Phase shift processing is performed using different phase shift values.
  • Step 1003 Perform fixed beamforming processing on the second analog signal of the N2 channel to obtain a first analog signal of the N1 channel.
  • the signal processing device B can perform fixed beamforming processing on the second analog signal of the N2 channel through the first processing unit 401 in FIG. 11 to obtain the first analog signal of the N1 channel.
  • the N2 way third analog signal received in step 1001 is used to form N1 beams corresponding to the N1 way first analog signal.
  • the first processing unit 401 may map each second analog signal to at least two first analog signals through a Butler matrix 4012 or a Rotman lens, thereby
  • the second analog signal includes at least two first analog signals obtained by mapping.
  • each of the first analog signals obtained by the fixed beamforming process has a fixed phase and amplitude.
  • the first processing unit 401 may further include a single-pole multi-throw switch 4011.
  • the first processing unit 401 may be combined with the single-pole multi-throw switch 4011 to map the at least one second analog signal to different at least two paths at different times.
  • the first analog signal is implemented by the first analog signal outputted from the output of the different output of the Butler matrix.
  • FIG. 3 For the principle, reference may be made to the embodiment shown in FIG. 3, which is not described herein.
  • any two of the first analog signals of the processed N1 road may be different, or at least two of the first analog signals of the N1 road are the same.
  • Step 1004 Perform mixing processing on the first analog signal of the N1 channel to obtain an initial analog signal of the N1 channel.
  • the signal processing device B processes the first analog signal of the N1 channel
  • the first analog signal of the N1 channel can be input to the N1 mixers 405 one by one, so that the N1 mixers 405 are one by one.
  • the first analog signal of the N1 channel is subjected to mixing processing to obtain an initial analog signal of the N1 channel.
  • Step 1005 Perform analog-to-digital conversion processing on the initial analog signal of the N1 channel to obtain an N1 digital signal.
  • the signal processing device B can perform analog-to-digital conversion processing on the initial analog signals of the N1 channels through the N1 analog to digital converters (ADCs) 406, thereby obtaining each ADC 406.
  • the obtained one digital signal is processed by the N1 ADCs 406 to obtain the N1 digital signal.
  • the first analog signal may be a signal of various frequency bands, such as a signal with a frequency of 28 GHz, a signal with a frequency of 38 GHz, and a high frequency signal of a signal of 60 GHz, or a frequency. Lower low frequency signal.
  • the signal processing method provided by the embodiment of the present application is the reverse processing method of the signal processing method shown in FIG. 3, and each step in the embodiment of the present application may refer to the explanation of the corresponding steps in the signal processing method shown in FIG.
  • the embodiments of the present application are not described herein.
  • the second analog signal of the N2 channel is first phase-shifted to obtain the second analog signal of the N2 channel. Then, the second analog signal of N1 is subjected to fixed beamforming processing to obtain the third analog signal of N1. Since each of the second analog signals includes at least two first analog signals, performing phase shift processing on each of the second analog signals is equivalent to performing phase shift processing on at least two first analog signals, so the signal processing device When it is required to perform phase shift processing on the plurality of first analog signals, the signal processing device needs to include fewer phase shifters, and the signal processing device has a simpler structure. Moreover, since the signal processing device does not need to include a large number of phase shifters, the cost of the signal processing device is also low.
  • FIG. 12 is a flowchart of another signal processing method according to an embodiment of the present application, and the processing method may be used in the signal processing apparatus B.
  • FIG. 13 is a schematic structural diagram of another signal processing apparatus B according to an embodiment of the present disclosure.
  • the signal processing apparatus B may be the RRU 112 in the base station 011, or the signal processing apparatus B is a circuit in the RRU 112.
  • signal processing device B may be radio frequency unit 122 in terminal 012, or signal processing device B may be a circuit in radio frequency unit 122.
  • Step 1201 Perform a first process on the third analog signal of the N2 channel to obtain a second analog signal of the N2 channel.
  • each second analog signal includes at least two first analog signals, and N2 ⁇ N1 ⁇ 2.
  • the signal processing device B can perform the first processing on the N2 way third analog signal through the second processing unit V2 in FIG.
  • the first process may include: phase shift processing.
  • the second processing unit V2 may perform phase shift processing on the N2 way third analog signal by using N2 phase shifters.
  • Each phase shifter can perform phase shift processing on each third analog signal through a phase shift value.
  • the N2 phase shift values of the phase shift processing of the third analog signal of the N2 channel may not form an arithmetic progression, or the N2 phase shift values of the phase shift processing of the third analog signal of the N2 channel may form an arithmetic progression.
  • Step 1202 Perform fixed beamforming processing on the second analog signal of the N2 channel to obtain a first analog signal of the N1 channel.
  • the signal processing device B can also perform fixed beamforming processing on the N2 second analog signal by using the first processing unit 401.
  • the first processing unit 401 may map each second analog signal to at least two first analog signals by using a Butler matrix or a Rotman lens, thereby Each second analog signal that arrives includes at least two first analog signals. Moreover, each of the first analog signals obtained by the fixed beamforming process has a fixed phase and amplitude.
  • the second analog signal of the N2 channel is first phase-shifted to obtain the second analog signal of the N2 channel. Then, the second analog signal of N1 is subjected to fixed beamforming processing to obtain the third analog signal of N1. Since each of the second analog signals includes at least two first analog signals, performing phase shift processing on each of the second analog signals is equivalent to performing phase shift processing on at least two first analog signals, so the signal processing device When it is required to perform phase shift processing on the plurality of first analog signals, the signal processing device needs to include fewer phase shifters, and the signal processing device has a simpler structure. Moreover, since the signal processing device does not need to include a large number of phase shifters, the cost of the signal processing device is also low.
  • the embodiment of the present application further provides an apparatus, which may include a functional unit that implements each step in the above signal processing method.
  • the signal processing apparatus A provided in Fig. 9 will be further described below with reference to Fig. 9.
  • the signal processing device A may include a first processing circuit 301 and a second processing circuit V1.
  • the first processing circuit 301 is configured to perform fixed beamforming processing on the first analog signal of the N1 channel to obtain a second analog signal of the N2 channel;
  • the second processing circuit V1 is configured to perform a first processing on the second analog signal of the N2 channel to obtain a third analog signal of the N2 channel; wherein each second analog signal includes at least two first analog signals, and N2 ⁇ N1 ⁇ 2
  • the first processing includes phase shift processing; the N2 third analog signal is used to form N1 beams corresponding to the first analog signal of the N1 channel.
  • the first processing circuit 301 can be configured to: map each of the first analog signals to at least two second analog signals.
  • the first processing circuit 301 may include a Butler matrix 3012 or a Rotman lens, a Butler matrix 3012 or a Rotman lens (not shown in FIG. 14) mapping each of the first analog signals to at least Two second analog signals.
  • the second processing circuit V1 is configured to: perform phase shift processing on each second analog signal by using a phase shift value
  • the second processing circuit V1 includes N2 phase shifters, and one phase shifter performs phase shift processing on one channel of the first analog signal through a phase shift value, wherein the second analog signal of the N2 channel is performed.
  • the N2 phase shift values of the phase shift processing do not form an arithmetic progression column.
  • the second processing circuit V1 is configured to: perform phase shift processing on each second analog signal by using a phase shift value
  • the second processing circuit V1 includes N2 phase shifters, and one phase shifter performs phase shift processing on one channel of the first analog signal through a phase shift value, wherein the second analog signal of the N2 channel is performed.
  • the N2 phase shift values of the phase shift processing form an arithmetic progression sequence.
  • the phase shift values of the phase shift processing of the at least one second analog signal are different.
  • the first process further includes a power amplification process, the power amplification process before the phase shift process, or after the phase shift process.
  • the second processing circuit V1 includes: N2 power amplifiers PA 303.
  • the first processing circuit 301 is configured to: map the at least one first analog signal to different at least two second analog signals at different times.
  • the first processing circuit 301 includes a single-pole multi-throw switch 3011, which can input the first analog signal to different ports of the Butler matrix at different times, thereby mapping to at least two different paths.
  • the second analog signal can be input to different ports of the Butler matrix at different times, thereby mapping to at least two different paths.
  • the signal processing device A may further include: a digital-to-analog converter 306 and a mixer 305, and the digital-to-analog converter 306 is configured to perform digital-to-analog conversion processing on the N1 digital signal to obtain an initial analog signal of the N1 channel;
  • the frequency converter 305 is configured to perform a mixing process on the initial analog signal of the N1 channel to obtain a first analog signal of the N1 channel.
  • each second analog signal includes a first analog signal of the N1 channel.
  • any two of the first analog signals of the N1 channel are different.
  • At least two of the first analog signals in the first analog signal of the N1 channel are the same.
  • the signal transmitting device A may further include an antenna 304 for transmitting the N2 third analog signal output by the second processing unit V1.
  • the signal processing device B may include a first processing circuit 401 and a second processing circuit V2.
  • the second processing circuit V2 is configured to perform a first processing on the third analog signal of the N2 channel to obtain a second analog signal of the N2 channel;
  • the first processing circuit 401 is configured to perform a fixed beamforming process on the second analog signal of the N2 channel to obtain a first analog signal of the N1 channel; the fixed beamforming process may include a beam selection process, for example, each of the second analog signals of the N2 channel The path is mapped to at least one of the first analog signals of the N1 channel, wherein the first analog signal of the N1 channel corresponds to the N1 beams of the signal processing device B.
  • each second analog signal includes at least two first analog signals, and N2 ⁇ N1 ⁇ 2;
  • the first process includes phase shift processing
  • the N2 way third analog signal is received from N1 beams.
  • the second processing circuit V2 is configured to: perform phase shift processing on each third analog signal by using a phase shift value
  • the second processing circuit V2 includes N2 phase shifters 402, and one phase shifter performs phase shift processing on one channel of the first analog signal through a phase shift value.
  • the N2 phase shift values of the phase shift processing of the third analog signal of the N2 channel do not form an arithmetic progression sequence.
  • the second processing circuit V2 is configured to: perform phase shift processing on each third analog signal by using a phase shift value
  • the second processing circuit V2 includes N2 phase shifters 402.
  • One phase shifter performs phase shift processing on one channel of the first analog signal through a phase shift value, wherein the third analog signal of the N2 channel is used.
  • the N2 phase shift values subjected to the phase shift processing form an arithmetic progression sequence.
  • the phase shift values of the phase shift processing of the at least one third analog signal are different.
  • the first process further includes a low noise amplification process, the low noise amplification process before the phase shift process, or after the phase shift process.
  • the first processing circuit 401 is configured to: map each second analog signal to at least two first analog signals.
  • the first processing circuit 401 includes a Butler matrix 4012 or a Rotman lens, and a Butler matrix 4012 or a Rotman lens is used to map each second analog signal to at least two first analog signals.
  • the first processing circuit 401 is configured to: map the at least one second analog signal to different at least two first analog signals at different times.
  • the first processing circuit 401 includes N2 single-pole multi-throw switches 4011, and each of the N2 second analog signals can be mapped to at least one of the N1 first analog signals by different times, wherein the N1 first analog signal Corresponding to N1 beams covering the signal processing device B.
  • the signal processing device B further includes: a mixer 305 and a DAC 306.
  • the mixer 305 is configured to perform mixing processing on the first analog signal of the N1 channel to obtain an initial analog signal of the N1 channel; and the DAC 306 is used to pair the N1.
  • the initial analog signal of the path is subjected to analog-to-digital conversion processing to obtain an N1 digital signal.
  • each second analog signal includes a first analog signal of the N1 channel.
  • any two of the first analog signals of the N1 channel are different.
  • At least two of the first analog signals in the first analog signal of the N1 channel are the same.
  • the signal processing apparatus shown in Fig. 11 will be further described below on the basis of Fig. 15 in conjunction with Fig. 11.
  • the signal processing device B further includes an antenna 404.
  • the signal processing device shown in FIG. 15 is for processing the N2 third analog signal received by the antenna 404 at the air interface.
  • the various method embodiments provided by the embodiments of the present application may be referred to each other, and the device embodiments may be referred to each other.
  • the method embodiments may also refer to the device embodiments.
  • the sequence of the steps of the method embodiments provided by the embodiments of the present application can be appropriately adjusted, and the steps can be correspondingly increased or decreased according to the situation. Any person skilled in the art can easily think of the technical scope disclosed in the embodiments of the present application.
  • the method of the change should be included in the scope of protection of the embodiments of the present application, and therefore will not be described again.

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Abstract

本申请公开了一种信号处理方法、装置及系统，属于通信技术领域。所述信号处理装置包括：第一处理单元和第二处理单元，所述第一处理单元用于对N1路第一模拟信号进行固定波束成形处理，得到N2路第二模拟信号；所述第二处理单元用于对N2路所述第二模拟信号进行第一处理，得到N2路第三模拟信号；其中，每路所述第二模拟信号包括至少两路所述第一模拟信号，且N2≥N1≥2；所述第一处理包括移相处理；N2路所述第三模拟信号用于形成N1路所述第一模拟信号对应的N1个波束。本申请解决了信号移相装置的结构较复杂的问题。本申请用于信号的处理。

Description

信号处理方法、装置及系统
相关申请的交叉引用
本公开要求于2018年3月31日递交的中国专利申请第201810278136.7号的优先权，在此全文引用上述中国专利申请公开的内容以作为本公开的一部分。
技术领域
本申请涉及通信技术领域，特别涉及一种信号处理方法、装置及系统。
背景技术
波束赋形是能够通过调整天线阵列中每个阵元的加权系数，以产生具有指向性的波束。
在模拟部分实现波束赋形时，通常需要较多的模拟组件，例如，移相器，从而带来了硬件资源消耗大的问题。
亟需一种在模拟部分实现波束赋形，但能够节约硬件资源的方案。
发明内容
本申请提供了一种信号移相方法、装置以及系统，可以解决信号处理装置的结构较复杂的问题，所述技术方案如下：
第一方面，提供了一种信号处理装置，该信号处理装置可以是基站的射频单元，例如RRU，或者RFU；或者，该信号处理装置可以是基站的射频单元中的电路，该信号处理装置可以是终端的射频单元，或者，该信号处理装置可以是终端的射频单元中的电路。所述信号处理装置包括：第一处理单元和第二处理单元，所述第一处理单元用于对N1路第一模拟信号进行固定波束成形处理，得到N2路第二模拟信号；所述第二处理单元用于对N2路所述第二模拟信号进行第一处理，得到N2路第三模拟信号；其中，每路所述第二模拟信号包括至少两路所述第一模拟信号，且N2≥N1≥2；所述第一处理包括移相处理；N2路所述第三模拟信号用于形成N1路所述第一模拟信号对应的N1个波束。
由于首先对N1路第一模拟信号进行了固定波束成形处理得到了N2路第二模拟信号，之后又对这N2路第二模拟信号进行了移相处理。由于每路第二模拟信号均包括至少两路第一模拟信号，对每路第二模拟信号进行移相处理，就相当于对至少两路第一模拟信号进行移相处理，所以，信号处理装置在需要对多路第一模拟信号进行移相处理时，信号处理装置所需包括的移相器的个数较少，信号处理装置的结构较简单。并且，由于信号处理装置无需包括较多的移相器，因此，信号处理装置的成本也较低。
可选的，所述第一处理单元用于：将每路所述第一模拟信号映射到至少两路所述第二模拟信号。
可选的，所述第一处理单元用于：通过巴特勒矩阵或者罗特曼透镜将每路所述第一模拟信号映射到至少两路所述第二模拟信号。
可选的，所述第二处理单元用于：对每路所述第二模拟信号通过一个移相值进行移相处理；其中，对N2路所述第二模拟信号进行移相处理的N2个移相值不形成等差数列。
可选的，所述第二处理单元用于：对每路所述第二模拟信号通过一个移相值进行移相处 理；其中，对N2路所述第二模拟信号进行移相处理的N2个移相值形成等差数列。
需要说明的是，当对N2路第二模拟信号进行移相处理的N2个移相值不形成等差数列时，N2个第三模拟信号形成的N1个波束为非较优波束；当对N2路第二模拟信号进行移相处理的N2个移相值形成等差数列时，N2个第三模拟信号形成的N1个波束为较优波束。并且，非较优波束可以覆盖较优波束的凹陷，本申请中信号处理装置可以在不同的时间分别控制N2个移相器对N2路第二模拟信号进行处理，以使得在不同的时间分别能够形成较优波束和非较优波束，增大形成的波束的覆盖范围，进而能够使得形成的波束将待覆盖区域全覆盖，信号处理装置的吞吐量较高，信号传输的效率较高。
可选的，不同时间，对至少一路所述第二模拟信号进行移相处理的移相值不同。通过在不同的时间调整移相值，以使得最终得到的N2个第三模拟信号形成的波束发生变化。
可选的，所述第一处理还包括功率放大处理，所述功率放大处理在所述移相处理之前，或者在所述移相处理之后。信号处理装置需要使用到N1个DAC、N1个混频器、N2个移相器和N2个PA。当N2＞N1时，信号处理装置需要使用到的DAC和混频器的个数均较少，进一步的简化了信号处理装置的结构，以及减少了信号处理装置的成本。又由于每路第二模拟信号均包括至少两路第一模拟信号，对每路第二模拟信号进行功率放大处理，就相当于对至少两路第一模拟信号进行功率放大处理，所以，信号处理装置进行功率放大处理所需使用到的PA较少，信号处理装置的结构较简单。并且，实现了PA的功率复用，对N2路第二模拟信号进行功率放大处理的效率也较高。
可选的，所述第一处理单元用于：不同时间，将至少一路所述第一模拟信号映射到不同的至少两路所述第二模拟信号。这样一来，就实现了对N1路第一模拟信号进行处理得到较多不同的第二模拟信号，进而得到较多不同的第三模拟信号，形成较多不同的波束。
可选的，所述信号处理装置还包括：数模转换器和混频器，所述数模转换器用于对N1路数字信号进行数模转换处理，得到N1路初始模拟信号；所述混频器用于对所述N1路初始模拟信号进行混频处理，得到所述N1路第一模拟信号。
可选的，每路所述第二模拟信号包括N1路所述第一模拟信号。此时，对每路第二模拟信号进行移相处理，就相当于对N1路第一模拟信号进行移相处理，所以，信号处理装置在需要对多路第一模拟信号进行移相处理时，信号处理装置所需包括的移相器的个数能够进一步的减少，信号处理装置的结构进一步的被简化，成进一步降低。
可选的，所述N1路第一模拟信号中任意两路所述第一模拟信号不同。
可选的，所述N1路第一模拟信号中至少两路所述第一模拟信号相同。
第二方面，提供了一种信号处理装置，所述信号发射装置包括：第一方面所述的信号处理装置，以及天线器件，所述天线器件用于发射第二处理单元输出的所述N2路第三模拟信号。该信号处理装置可以是基站的射频单元与天线器件组成的系统，例如有源天线处理单元(active antenna unit，AAU)；或者，该信号处理装置可以是终端的射频单元与天线器件组成的系统。天线器件可以包括1个或者多个天线。
第三方面，提供了一种信号处理装置，该信号处理装置可以是基站的射频单元，例如RRU，或者RFU；或者，该信号处理装置可以是基站的射频单元中的电路，该信号处理装置可以是终端的射频单元，或者，该信号处理装置可以是终端的射频单元中的电路。所述信号处理装置包括：第一处理单元和第二处理单元，所述第二处理单元用于对N2路第三模拟信号进行第一处理，得到N2路第二模拟信号；所述第一处理单元用于对N2路所述第二模拟信 号进行固定波束成形处理，得到N1路第一模拟信号；其中，每路所述第二模拟信号包括至少两路所述第一模拟信号，且N2≥N1≥2；所述第一处理包括移相处理；N2路所述第三模拟信号用于形成N1路所述第一模拟信号对应的N1个波束。
可选的，所述第一处理单元用于：将每路所述第二模拟信号映射到至少两路所述第一模拟信号。
可选的，所述第一处理单元用于：通过巴特勒矩阵或者罗特曼透镜将每路所述第二模拟信号映射到至少两路所述第一模拟信号。
可选的，所述第二处理单元用于：对每路所述第三模拟信号通过一个移相值进行移相处理；其中，对N2路所述第三模拟信号进行移相处理的N2个移相值不形成等差数列。
可选的，所述第二处理单元用于：对每路所述第三模拟信号通过一个移相值进行移相处理；其中，对N2路所述第三模拟信号进行移相处理的N2个移相值形成等差数列。
可选的，不同时间，对至少一路所述第三模拟信号进行移相处理的移相值不同。
可选的，所述第一处理还包括低噪声放大处理，所述低噪声放大处理在所述移相处理之前，或者在所述移相处理之后。
可选的，所述第一处理单元用于：不同时间，将至少一路所述第二模拟信号映射到不同的至少两路所述第一模拟信号。
可选的，所述信号处理装置还包括：混频器和模数转换器，所述混频器用于对所述N1路第一模拟信号进行混频处理，得到N1路初始模拟信号；所述模数转换器用于对所述N1路初始模拟信号进行模数转换处理，得到N1路数字信号。
可选的，每路所述第二模拟信号包括N1路所述第一模拟信号。
可选的，所述N1路第一模拟信号中任意两路所述第一模拟信号不同。
可选的，所述N1路第一模拟信号中至少两路所述第一模拟信号相同。
第四方面，提供了一种信号处理装置，该信号处理装置可以是基站的射频单元与天线器件组成的系统，例如有源天线处理单元(active antenna unit，AAU)；或者，该信号处理装置可以是终端的射频单元与天线器件组成的系统。所述信号处理装置包括：天线器件，以及第三方面所述的信号处理装置，第三方面所述的信号处理装置用于对所述天线器件在空口接收的N2路第三模拟信号进行处理。
第五方面，提供了一种信号处理方法，所述方法包括：对N1路第一模拟信号进行固定波束成形处理，得到N2路第二模拟信号；对N2路所述第二模拟信号进行第一处理，得到N2路第三模拟信号；其中，每路所述第二模拟信号包括至少两路所述第一模拟信号，且N2≥N1≥2；所述第一处理包括移相处理；N2路所述第三模拟信号用于形成N1路所述第一模拟信号对应的N1个波束。
可选的，所述对N1路第一模拟信号进行固定波束成形处理，包括：将每路所述第一模拟信号映射到至少两路所述第二模拟信号。
可选的，所述将每路所述第一模拟信号映射到至少两路所述第二模拟信号，包括：通过巴特勒矩阵或者罗特曼透镜将每路所述第一模拟信号映射到至少两路所述第二模拟信号。
可选的，所述对N2路所述第二模拟信号进行第一处理，包括：对每路所述第二模拟信号通过一个移相值进行移相处理；其中，对N2路所述第二模拟信号进行移相处理的N2个移相值不形成等差数列。
可选的，所述对N2路所述第二模拟信号进行第一处理，包括：对每路所述第二模拟信 号通过一个移相值进行移相处理；其中，对N2路所述第二模拟信号进行移相处理的N2个移相值形成等差数列。
可选的，不同时间，对至少一路所述第二模拟信号进行移相处理的移相值不同。
可选的，所述第一处理还包括功率放大处理，所述功率放大处理在所述移相处理之前，或者在所述移相处理之后。
可选的，所述将每路所述第一模拟信号映射到至少两路所述第二模拟信号，包括：不同时间，将至少一路所述第一模拟信号映射到不同的至少两路所述第二模拟信号。
可选的，在所述对N1路第一模拟信号进行固定波束成形处理之前，所述方法还包括：对N1路数字信号进行数模转换处理，得到N1路初始模拟信号；对所述N1路初始模拟信号进行混频处理，得到所述N1路第一模拟信号。
可选的，每路所述第二模拟信号包括N1路所述第一模拟信号。
可选的，所述N1路第一模拟信号中任意两路所述第一模拟信号不同。
可选的，所述N1路第一模拟信号中至少两路所述第一模拟信号相同。
可选的，在所述对N2路所述第二模拟信号进行第一处理，得到N2路第三模拟信号之后，所述方法还包括：在空口发射N2路所述第三模拟信号。
第六方面，提供了一种信号处理方法，所述方法包括：对N2路第三模拟信号进行第一处理，得到N2路第二模拟信号；对N2路所述第二模拟信号进行固定波束成形处理，得到N1路第一模拟信号；其中，每路所述第二模拟信号包括至少两路所述第一模拟信号，且N2≥N1≥2；所述第一处理包括移相处理；N2路所述第三模拟信号用于形成N1路所述第一模拟信号对应的N1个波束。
可选的，所述对N2路所述第二模拟信号进行固定波束成形处理，包括：将每路所述第二模拟信号映射到至少两路所述第一模拟信号。
可选的，所述将每路所述第二模拟信号映射到至少两路所述第一模拟信号，包括：通过巴特勒矩阵或者罗特曼透镜将每路所述第二模拟信号映射到至少两路所述第一模拟信号。
可选的，所述对N2路第三模拟信号进行第一处理，包括：对每路所述第三模拟信号通过一个移相值进行移相处理；其中，对N2路所述第三模拟信号进行移相处理的N2个移相值不形成等差数列。
可选的，所述对N2路第三模拟信号进行第一处理，包括：对每路所述第三模拟信号通过一个移相值进行移相处理；其中，对N2路所述第三模拟信号进行移相处理的N2个移相值形成等差数列。
可选的，不同时间，对至少一路所述第三模拟信号进行移相处理的移相值不同。
可选的，所述第一处理还包括低噪声放大处理，所述低噪声放大处理在所述移相处理之前，或者在所述移相处理之后。
可选的，所述将每路所述第二模拟信号映射到至少两路所述第一模拟信号，包括：不同时间，将至少一路所述第二模拟信号映射到不同的至少两路所述第一模拟信号。
可选的，在所述对N2路所述第二模拟信号进行固定波束成形处理之后，所述方法还包括：对所述N1路第一模拟信号进行混频处理，得到N1路初始模拟信号；对所述N1路初始模拟信号进行模数转换处理，得到N1路数字信号。
可选的，每路所述第二模拟信号包括N1路所述第一模拟信号。
可选的，在所述对N2路第三模拟信号进行第一处理之前，所述方法还包括：在空口接 收N2路所述第三模拟信号。
可选的，所述N1路第一模拟信号中任意两路所述第一模拟信号不同。
可选的，所述N1路第一模拟信号中至少两路所述第一模拟信号相同。
第七方面，提供了一种信号处理系统，所述系统包括：第一方面所述信号处理装置；以及第三方面所述信号处理装置。
第八方面，提供了一种信号处理系统，所述系统包括：第二方面所述信号处理装置；以及第四方面所述信号处理装置。
附图说明
图1a为本申请实施例提供的一种通信系统的结构示意图；
图1b为本申请实施例提供的一种基站的结构示意图；
图1c为本申请实施例提供的一种终端的结构示意图；
图2为相关技术提供的一种在模拟部分实现波束赋形的方案示意图；
图3为本申请实施例提供的一种信号处理方法的流程图；
图4为本申请实施例提供的一种信号处理装置A的结构示意图；
图5为本申请实施例提供的一种单刀多掷开关的结构示意图；
图6为本申请实施例提供的一种波束的示意图；
图7为本申请实施例提供的一种波束的叠加示意图；
图8为本申请实施例提供的另一种信号处理方法的流程图；
图9为本申请实施例提供的另一种信号处理装置A的结构示意图；
图10为本申请实施例提供的另一种信号处理方法的流程图；
图11为本申请实施例提供的一种信号处理装置B的结构示意图；
图12为本申请实施例提供的另一种信号处理方法的流程图；
图13为本申请实施例提供的另一种信号处理装置B的结构示意图；
图14为本申请实施例提供的另一种信号处理装置A的结构示意图；
图15为本申请实施例提供的另一种信号处理装置B的结构示意图。
具体实施方式
为使本申请的目的、技术方案和优点更加清楚，下面将结合附图对本申请实施方式作进一步地详细描述。
图1a为本申请实施例提供的一种通信系统的示意图。该通信系统包括基站011和终端012，终端012与基站011能够进行通信。需要说明的是，如图1a所述的通信系统所包含的基站011和终端012仅仅是一种示例，基站011可以与多个终端进行通信，本申请实施例对此不作限定。
该通信系统可以是支持第四代(fourth generation，4G)接入技术的通信系统，例如长期演进(long term evolution，LTE)接入技术；或者，该通信系统也可以是支持第五代(fifth generation，5G)接入技术通信系统，例如新无线(new radio，NR)接入技术；或者，该通信系统也可以是支持第三代(third generation，3G)接入技术的通信系统，例如(universal mobile telecommunications system，UMTS)接入技术；或者该通信系统也可以是第二代(second generation，2G)接入技术的通信系统，例如全球移动通讯系统(global system for mobile  communications，GSM)接入技术；或者，该通信系统还可以是支持多种无线技术的通信系统，例如支持LTE技术和NR技术的通信系统。另外，该通信系统也可以适用于面向未来的通信技术。
图1a中的基站011可以是用于支持终端接入通信系统的设备，例如，可以是2G接入技术通信系统中的基站收发信台(base transceiver station，BTS)和基站控制器(base station controller，BSC)、3G接入技术通信系统中的节点B(node B)和无线网络控制器(radio network controller，RNC)、4G接入技术通信系统中的演进型基站(evolved nodeB，eNB)、5G接入技术通信系统中的下一代基站(next generation nodeB，gNB)、发送接收点(transmission reception point，TRP)、中继节点(relay node)、接入点(access point，AP)等等。
图1a中的终端012可以是一种向用户提供语音或者数据连通性的设备，例如也可以称为用户设备(user equipment，UE)，移动台(mobile station)，用户单元(subscriber unit)，站台(station)，终端设备(terminal equipment，TE)等。终端可以为蜂窝电话(cellular phone)，个人数字助理(personal digital assistant，PDA)，无线调制解调器(modem)，手持设备(handheld)，膝上型电脑(laptop computer)，无绳电话(cordless phone)，无线本地环路(wireless local loop，WLL)台，平板电脑(pad)等。随着无线通信技术的发展，可以接入通信系统、可以与通信系统的网络侧进行通信，或者通过通信系统与其它物体进行通信的设备都可以是本申请实施例中的终端，譬如，智能交通中的终端和汽车、智能家居中的家用设备、智能电网中的电力抄表仪器、电压监测仪器、环境监测仪器、智能安全网络中的视频监控仪器、收款机等等。在本申请实施例中，多个终端之间也可以进行通信。终端可以是静态固定的，也可以是移动的。
图1b是基站011的结构示意图。
基站011包括基带单元(baseband unit，BBU)，射频单元和天线，其中射频单元可以是远端射频单元(remote radio unit，RRU)，RRU与BBU物理上分离；或者，射频单元可以是射频单元(radio frequency unit，RFU)，RFU与BBU物理上设置在一起。射频单元可以与天线物理上集成在一起，为有源天线单元(Active Antenna Unit，AAU)。
图1b中以RRU为例，基站011包括BBU111，RRU112和天线113，其中BBU111包括处理器1111和存储器1112。
BBU111也可以称为处理单元，主要用于完成对基带信号的处理，例如信道编码，复用，调制，扩频等等。处理器1111可以用于控制基站011实现一系列功能。例如，可以是通用中央处理器(Central Processing Unit，CPU)、数字信号处理器(Digital Signal Processor，DSP)、微处理器、特定应用集成电路专用集成电路(Application-Specific Integrated Circuit，ASIC)、微控制器(Microcontroller Unit，MCU)、现场可编程门阵列(Field Programmable Gate Array，FPGA)、或者用于实现逻辑运算的集成电路。存储器1112可以是用于携带或存储具有指令或数据结构形式的期望的程序代码并能够由计算机存取的任何介质。例如可以是只读存储器(read-only memory，ROM)或可存储静态信息和指令的其他类型的静态存储设备，随机存取存储器(random access memory，RAM)或者可存储信息和指令的其他类型的动态存储设备，也可以是电可擦可编程只读存储器(Electrically erasable programmabler-only memory，EEPROM)。
RRU112也可以称为收发单元、收发机、收发电路或者收发器。主要用于射频信号与基带信号的转换。
天线113主要用于与终端之间射频信号的收发。
具体地，RRU112接收来自BBU111的基带信号，将该基带信号转换为射频信号，通过天线113向终端12发送该射频信号。相应的，天线113从终端12接收射频信号，发送至RRU112，RRU112将该射频信号转换为基带信号发送至BBU111，BBU111对基带信号进行进一步处理，例如译码处理。
图1c是终端012的结构示意图。
终端012包括至少一个处理器121、至少一个射频单元122和至少一个存储器123。处理器121、存储器123和射频单元122相连。可选的，终端121还可以包括输出设备124、输入设备125和一个或多个天线126。天线126与射频单元122相连，输出设备124、输入设备125与处理器121相连。
处理器121可以参考上述基站011的处理器1111的描述。
存储器123可以参考上述基站011的存储器1112的描述。
射频单元122也可以称为收发单元、收发机、收发电路或者收发器。主要用于与基站之间射频信号的收发以及射频信号与基带信号的转换。输出设备124和处理器121通信，可以以多种方式来显示信息。例如，输出设备124可以是液晶显示器(Liquid Crystal Display，LCD)、发光二级管(Light Emitting Diode，LED)显示设备、阴极射线管(Cathode Ray Tube，CRT)显示设备、或投影仪(projector)等。输入设备125和处理器121通信，可以以多种方式接受用户的输入。例如，输入设备125可以是鼠标、键盘、触摸屏设备或传感设备等。
具体地，射频单元122接收来自处理器121的基带信号，将该基带信号转换为射频信号，通过天线126向终端12发送该射频信号。相应的，天线126从终端12接收射频信号，发送至射频单元122，射频单元122将该射频信号转换为基带信号发送至处理器121，处理器121对基带信号进行进一步处理，例如译码处理。
本申请实施例中，模拟部分可以指处理模拟信号的部分，例如基站011的模拟部分可以指基站011的RRU112和天线113，或者终端011的模拟部分可以指终端012的射频单元122和天线126。需要说明的是，为了描述方便，本申请实施例中的模拟部分可以包括数模转换器或者模数转换器。
在上述通信系统中，当基站011与终端012进行通信时，可以采用波束赋形技术，例如，基站011形成具有指向的波束，该具有指向的波束能够较好的覆盖终端012所在区域。
图2为相关技术提供的一种在模拟部分实现波束赋形的方案示意图。如图2所示，基站011的模拟部分或者终端012的模拟部分可以包括信号处理装置20，该信号处理装置20可以包括W个数模转换器(Digital to analog converter，DAC)201、W个混频器202、W个功分器203、X个移相器204、X个功率放大器(Power Amplifier，PA)205和天线206，W大于或等于2，X为W的倍数。该信号处理装置20能够对W个数据流进行处理，这W个数据流可以如图2中示出的数据流1至数据流W。
例如，以图2中的数据流1为例，DAC 201将数据流1从数字信号转换为模拟信号，混频器202将对模拟信号进行混频处理，功分器203将混频后的信号分成两路模拟信号，之后，这两路模拟信号经过移相器204和PA 205输出至天线206。
若数据流1要以高频(例如，28Ghz，38GHz或者60GHz)信号发射出去，由于高频信号路径损耗大，则可以通过功分器203将混频处理后的信号分成多路，每一路都通过PA进行功率放大，从而保证流1通过天线206发射出去时具有较大的辐射功率，从而对抗路径损 耗。其中，Ghz表示吉赫兹。
当有多个数据流时，对于每个数据流，信号处理装置20分别需要多个移相器和PA，这导致信号处理装置20需要消耗较多的硬件资源，且硬件结构较复杂。例如，在图2中数据流1需要2个移相器和2个PA，数据流W也需要2个移相器和2个PA，信号处理装置20一共需要2W个移相器和2W个PA。
基于此，本申请实施例提供了一种在模拟部分实现波束赋形时，节约硬件资源的方案。本申请实施例提供的方案通过在模拟部分对多个数据流进行固定波束成形处理，可以使得多个数据流共用硬件资源，从而节约硬件资源。图3为本申请实施例提供的一种信号处理方法的流程图，该处理方法可以用于信号处理装置A。图4为本申请实施例提供的一种信号处理装置A的结构示意图，需要说明的是信号处理装置A中的30可以是基站011中的RRU112；或者，信号处理装置A中的30可以是RRU112中的电路；天线304可以是基站011中的天线113。信号处理装置A中的30可以是终端012中的射频单元122；或者，信号处理装置A中的30可以是射频单元122中的电路，信号处理装置A中的304可以是终端012中的天线126。
下面结合图3和图4对本申请实施例提供的信号处理方法进行描述。
如图3所示，该信号处理方法可以包括：
步骤201、对N1路数字信号进行数模转换处理，得到N1路初始模拟信号。
如图4所示，该信号处理装置A可以通过该N1个DAC 306对该N1路数字信号一一进行数模转换处理，从而得到每个DAC 306处理得到的一路初始模拟信号，N1个DAC 306共能够处理的得到N1路初始模拟信号。N1可以为大于或等于2的整数。
需要说明的是，N1路数字信号可以为N1个数据流。可选的，该N1路数字信号中的任意两路数字信号可以不同，或者该N1路数字信号中的至少两路数字信号可以相同，本申请实施例对此不作限定。
步骤202、对N1路初始模拟信号进行混频处理，得到N1路第一模拟信号。
请继续参考图4，信号处理装置A在处理得到N1路初始模拟信号后，可以将这N1路初始模拟信号一一输入N1个混频器305，以便于N1个混频器305一一对N1路初始模拟信号进行混频处理，从而得到N1路第一模拟信号。
可选的，当该N1路数字信号中的任意两路数字信号不同时，该N1路第一模拟信号中的任意两路第一模拟信号不同；当该N1路数字信号中的至少两路数字信号相同时，该N1路第一模拟信号中的至少两路数字信号相同。
步骤203、对N1路第一模拟信号进行固定波束成形处理，得到N2路第二模拟信号。
需要说明的是，N2≥N1。
信号处理装置A在得到N1路第一模拟信号之后，可以通过图4中的第一处理电路301对该N1路第一模拟信号进行固定波束成形处理。第一处理电路301在对N1路第一模拟信号进行处理时，可以通过巴特勒矩阵3012或者罗特曼透镜(也称Rotman透镜)。图4中以巴特勒矩阵为例，将每路第一模拟信号映射到至少两路第二模拟信号，每路第二模拟信号可以将至少两路第一模拟信号映射的信号进行叠加，从而使得到的每路第二模拟信号包括至少两路第一模拟信号。并且，固定波束成形处理得到的每路第二模拟信号均具有预设的相位和幅值。
以下将对第一处理电路301通过巴特勒矩阵3012将N1路第一模拟信号映射得到N2路 第二模拟信号的过程进行讲解：
示例的，巴特勒矩阵3012具有X个输入端(图4中未标出)和N2个输出端(图4中未标出)，X≥N1。在步骤203中信号处理装置A可以将N1路第一模拟信号通过该X个输入端中的N1个输入端输入巴特勒矩阵3012，此时，N1路第一模拟信号可以表示为X行1列的输入矩阵，且该输入矩阵中的X个元素为该X个输入端中输入的X路第一模拟信号。其中，当X＝N1＝3，且这N1路第一模拟信号的值分别为1、2和3，则该输入矩阵可以表示为
Figure PCTCN2019080333-appb-000001
需要说明的是，当N1＜X时，也即这X个输入端中存在未输入有第一模拟信号的输入端时，该输入端输入的一路第一模拟信号可以表示为零。如，假设X＝3，N1＝2，且这N1路第一模拟信号的值分别为1和2，则该输入矩阵可以为
Figure PCTCN2019080333-appb-000002
巴特勒矩阵3012对输入的N1路第一模拟信号的处理可以理解为：将该输入矩阵与巴特勒矩阵中的预设矩阵进行运算，如将输入矩阵与该预设矩阵加、减、乘和除等运算中的至少一种运算，本申请实施例对此不作限定。并且，该输入矩阵与预设矩阵的运算结果可以表示为N2行1列的输出矩阵，且该输出矩阵中的N2个元素为巴特勒矩阵的N2个输入端输出的N2路第二模拟信号。也即，巴特勒矩阵可以通过对输入的N1路第一模拟信号与预设矩阵进行运算，从而将N1路第一模拟信号向至少两路第二模拟信号映射，使得巴特勒矩阵输出的每路第二模拟信号包括至少两路第一模拟信号。
可选的，上述实施例中以将每路第一模拟信号映射至至少两路第二模拟信号为例，实际应用中，还可以将每路第一模拟信号均映射到N2路第二模拟信号，从而使得到的每路第二模拟信号包括N1路第一模拟信号，本申请实施例对此不作限定。
可选的，在对N1路第一模拟信号进行映射时，还可以在不同时间，将该N1路第一模拟信号中的至少一路第一模拟信号映射到不同的至少两路第二模拟信号。示例的，可以在不同的时间，改变N1路第一模拟信号中的至少一路第一模拟信号在巴特勒矩阵上的输入端，从而改变用于表示该N1路第一模拟信号的输入矩阵，进而改变巴特勒矩阵的输出矩阵，实现将该至少一路第一模拟信号映射得到不同的第二模拟信号。
通过在不同时间，将该N1路第一模拟信号中的至少一路第一模拟信号映射到不同的至少两路第二模拟信号，可以形成不同时间，该至少一路第一模拟信号，不同的波束，从而可以降低移相器302的精度要求，例如可以降低移相器的bit(比特)数。
例如，该第一处理电路301还可以包括单刀多掷开关3011(本申请实施例以单刀多掷开关为例，实现中可以为其他开关)，第一处理电路301可以结合单刀多掷开关3011来实现在不同时间将该至少一路第一模拟信号映射到不同的至少两路第二模拟信号(如信号的相位不同，和/或，信号的幅值不同)。假设需要在不同的时间改变在巴特勒矩阵3012上的输入端 的第一模拟信号可以有两路(如第Y1路第一模拟信号和第Y2路第一模拟信号)，则第一处理电路301可以通过两个单刀多掷开关3011实现在巴特勒矩阵中输入端的改变。每个单刀多掷开关可以具有一个动端和多个不动端，如图5所示，单刀多掷开关X1具有一个动端D1和两个不动端(分别为不动端C1和不动端C2)，单刀多掷开关X2具有一个动端D2和两个不动端(分别为不动端C3和不动端C3)。不动端C1、C2、C3和C4分别与巴特勒矩阵的四个输入端连接。
第Y1路第一模拟信号可以输入至动端D1，第Y2路第一模拟信号可以输入至动端D2。
在第一时间段内，第一处理电路301可以控制动端D1与不动端B1连接，以及控制动端D2与不动端B3连接，从而将第Y1路第一模拟信号输入至巴特勒矩阵中与不动端B1连接的输入端，以及将第Y2路第一模拟信号输入至巴特勒矩阵中与不动端B3连接的输入端。
在第二时间段内，第一处理电路301可以控制动端D1与不动端B2连接，以及控制动端D2与不动端B3连接，从而将第Y1路第一模拟信号输入至巴特勒矩阵中与不动端B2连接的输入端，以及将第Y2路第一模拟信号输入至巴特勒矩阵中与不动端B3连接的输入端。
在第三时间段内，第一处理电路301可以控制动端D1与不动端B1连接，以及控制动端D2与不动端B4连接，从而将第Y1路第一模拟信号输入至巴特勒矩阵中与不动端B1连接的输入端，以及将第Y2路第一模拟信号输入至巴特勒矩阵中与不动端B4连接的输入端。
在第四时间段内，第一处理电路301可以控制动端D1与不动端B2连接，以及控制动端D2与不动端B4连接，从而将第Y1路第一模拟信号输入至巴特勒矩阵中与不动端B2连接的输入端，以及将第Y2路第一模拟信号输入至巴特勒矩阵中与不动端B4连接的输入端。
这样一来，第Y1路第一模拟信号和第Y2路第一模拟信号分别在这四个时间段输入至巴特勒矩阵的不同组输入端(每组输入端包括两个输入端)，在这四个时间段内分别映射到不同的第二模拟信号。
需要说明的是，本申请实施例中以每个单刀多掷开关包括两个不动端为例，实际应用中，每个单刀多掷开关中不动端的个数还可以为其他个数，且多个单刀多掷开关中不动端的个数也可以不同，本申请实施例对此不作限定。通过罗特曼透镜将N1路第一模拟信号映射得到N2路第二模拟信号的过程，可以参考通过巴特勒矩阵将N1路第一模拟信号映射得到N2路第二模拟信号的过程，本申请实施例在此不做赘述。
步骤204、对N2路第二模拟信号进行第一处理，得到N2路第三模拟信号。
在得到N2路第二模拟信号之后，信号处理装置A还可以通过第二处理电路V1对这N2路第二模拟信号进行第一处理。第一处理可以包括：移相处理和功率放大处理，且功率放大处理在移相处理之前，或者在移相处理之后，本申请实施例中以功率放大处理在移相处理以后为例，第二处理电路V1可以通过N2个PA 303对N2路第二模拟信号进行功率放大处理。通过先移相处理，再通过PA进行功率放大处理，PA能够补偿移相器302带来的功率损耗，从而保证信号从天线发射出去具有较大的辐射功率。
在对N2路第二模拟信号进行移相处理时，第二处理电路V1可以通过N2个移相器302对N2路第二模拟信号一一进行移相处理。每个移相器302可以对每路第二模拟信号通过一个移相值进行移相处理。对N2路第二模拟信号进行移相处理的N2个移相值可以不形成等差数列，对N2路第二模拟信号进行移相处理的N2个移相值也可以形成等差数列。
通过N2个移相值形成等差数列，可以使得N1路第一模拟信号中的每个形成较优波束。这里较优波束，可是指向较好的波束。当终端个数比较少时，通过形成指向较好的波束，能 够使得终端处于比较的覆盖，从而提升无线通信质量。
通过N2个移相值不形成等差数列，可以使得N1路第一模拟信号中的每个形成非较优波束。该非较优波束的指向可以在两个较优波束的指向之间。当终端个数较多时，为了覆盖较多的终端，降低覆盖区域内的凹陷。
可选的，第二处理电路V1在通过N2个移相器对N2路第二模拟信号进行移相处理时，还可以不同时间，对这N2路第二模拟信号中的至少一路第二模拟信号采用不同的移相值进行移相处理。
例如，N2路第二模拟信号包括第Z1路、第Z2路和第Z3路第二模拟信号，则在一个时间段内，第二处理电路V1可以可以控制三个移相器302对这三路第二模拟信号进行移相处理的三个移相值依次为：0度、30度和60度，此时这三个移相值形成等差数列。在另一个时间段内，第二处理电路V1可以控制三个移相器302对这三路第二模拟信号进行移相处理的三个移相值依次为：0度、20度和40度，此时这三个移相值也是形成等差数列，并且，第Z1路第二模拟信号在这两个时间段内进行移相处理的移相值并未发生改变，第Z2路和第Z3路第二模拟信号在这两个时间段内进行移相处理的移相值均发生了改变。在该另一个时间段的下一个时间段内，第二处理电路V1可以控制三个移相器302对这三路第二模拟信号进行移相处理的三个移相值依次为：0度、25度和40度，此时这三个移相值不形成等差数列。
通过在不同时间，对N2路第二模拟信号中的至少一路第二模拟信号采用不同的移相值进行移相处理，能够形成该至少一路第二模拟信号在不同时间，对应的不同的波束，从而实现波束扫描。
步骤205、在空口发射N2路第三模拟信号。
在得到N2路第三模拟信号后，信号处理装置A还可以通过天线304在空口发射这N2路第三模拟信号，以形成N1路第一模拟信号对应的N1个波束。当N2个移相器的移相值改变时，在空口发射生成的N2路第三模拟信号后，能够形成新的N1个波束。实际应用中，该信号处理方法也可以不包括步骤205，本申请实施例对此不作限定。
需要说明的是，当步骤204中对N2路第二模拟信号进行移相处理的N2个移相值不形成等差数列时，步骤205中形成的N1个波束为非较优波束；当步骤204中对N2路第二模拟信号进行移相处理的N2个移相值形成等差数列时，步骤205中形成的N1个波束为较优波束。并且，非较优波束可以覆盖较优波束的凹陷，本申请实施例中信号处理装置可以在不同的时间分别控制N2个移相器对N2路第二模拟信号进行处理，以使得在不同的时间分别能够形成较优波束和非较优波束，增大形成的波束的覆盖范围，进而能够使得形成的波束将待覆盖区域全覆盖，信号处理装置A的吞吐量较高，信号传输的效率较高。另外，在步骤203和步骤204中，信号处理装置A可以通过调整移相器的移相值以及调整第一模拟信号输入巴特勒矩阵的输入端的方式，以使得步骤205中形成的N1个波束在角度上尽量分开，从而降低该N1个波束之间的旁瓣干扰。
本申请实施例中，信号处理装置A在步骤201中需要使用到N1个DAC 306，在步骤202中需要使用到N1个混频器305，在步骤204中需要使用到N2个移相器302和N2个PA 303。当N2＞N1时，信号处理装置A需要使用到的DAC 306和混频器305的个数均较少，进一步地节约了硬件资源，简化了信号处理装置的结构，以及减少了信号处理装置的成本。又由于每路第二模拟信号均包括至少两路第一模拟信号，对每路第二模拟信号进行功率放大处理，就相当于对至少两路第一模拟信号进行功率放大处理，所以，信号处理装置进行功率放大处 理所需使用到的PA 303较少，信号处理装置的结构较简单。并且，实现了PA 303的功率复用，对N2路第二模拟信号进行功率放大处理的效率也较高。
在步骤203中信号处理装置A可以在不同时间，将至少一路第一模拟信号映射到不同的至少两路第二模拟信号，因此，可以对N1路第一模拟信号进行处理得到较多不同的第二模拟信号，进而得到较多不同的第三模拟信号，形成较多不同的波束。示例的，请继续参考图5，若第Y1路第一模拟信号和第Y2路第一模拟信号分别在这四个时间段输入至巴特勒矩阵的不同组输入端(每组输入端包括两个输入端)，在这四个时间段内分别映射到不同的第二模拟信号，则在这四个时间段内分别能够形成第Y1路第一模拟信号和第Y2路第一模拟信号对应的四组不同的波束，第Y1路第一模拟信号和第Y2路第一模拟信号对应的每组波束包括：第Y1路第一模拟信号和第Y2路第一模拟信号对应的两个波束。
每个移相器在对输入的第二模拟信号进行移相处理时，均可以对该第二模拟信号进行多次不同移相值的移相处理，且移相器对每路第二模拟信号进行移相处理的次数与移相器的比特位相关。示例的，n比特的移相器能够对每路第二模拟信号进行2 n次不同移相值的移相处理，以得到2 n个相位不同的第三模拟信号，n≥1。若N1路第一模拟信号中的每路第一模拟信号对应一个波束，则N2个移相器对N2路第二模拟信号进行一次移相处理，能够得到对应N1个波束的一组第三模拟信号；N2个移相器对每组第二模拟信号进行2 n次移相处理，能够得到对应N1·2 n个波束的2 n组第三模拟信号；当在M个时间段，将N1路第一模拟信号中的至少一路第一模拟信号映射至不同的第二模拟信号时，N2个移相器对在M个时间段映射到的M组第二模拟信号分别进行2 n次移相处理，从而得到对应M·N1·2 n个波束的M·2 n组第三模拟信号。步骤205中能够形成M·N1·2 n个波束。而若采用如图2所示的相关技术则只能够根据N1路第一模拟信号得到N1·2 n个波束。所以，本申请实施例中的信号处理装置能够得到较多的较优波束，这些波束的覆盖面积也较大。
例如，当N1＝2，M＝4，n＝1时，本申请实施例中的信号处理装置最多能够得到16个较优波束，且每个移相器均为1比特的移相器，N2个移相器能够对每个时间段映射得到的一组第二模拟信号进行两次移相处理，N2个移相器能够对四个时间段映射得到的四组第二模拟信号共进行八次移相处理。如图6所示，在发射每次移相处理后的一组第三模拟信号后可以形成两个波束，本申请实施例中共能够对八次移相处理后得到的八组第三模拟信号进行八次发射以形成16个波束。而若采用如图2所示的相关技术，在N1＝2且n＝1时最多能够得到4个波束，可见，本申请实施例中的信号处理装置得到的波束数量远远多于相关技术中的信号处理装置得到波束数量。需要说明的是，图6中的横坐标为角度，纵坐标为信号强度。图6所示的16个波束的叠加结果可以如图7所示，可见，这16个波束的覆盖区域较大。
本申请实施例提供的信号处理方法还具有以下优点：
第一方面，在第一模拟信号的路数相同，且需要得到相同个数的波束时，本申请实施例中需要使用到的移相器的比特数可以小于相关技术中需要使用的移相器的比特数。例如，在第一模拟信号的路数N1＝2，且需要得到16个波束时，若采用图2所示的相关技术则共需要使用3比特的移相器。而本申请实施例中仅需要使用1比特的移相器即可。由于低比特数的移相器的成本往往较低，因此，本申请实施例中信号处理装置的成本较低。
第二方面，在移相器的比特位均为n，且需要得到的波束个数均为M·N1·2 n的情况下，若采用如图2所示的相关技术则共需要对M·N1路第一模拟信号进行处理，而本申请实施例中的信号处理装置仅需要对N1路第一模拟信号进行处理即可。所以，本申请实施例中所需 的第一模拟信号的路数较少，从而用于对N1路第一模拟信号进行处理的DAC和混频器的个数也较少，进一步的节约了硬件资源，简化了信号处理装置的结构，以及减少信号处理装置的成本。
第三方面，在天线均包括相同列数的天线的前提下，若采用如图2所示的相关技术，则每路第一模拟信号经过功分器、多个移相器和多个PA后，只能通过较少列天线发射出去；而本申请实施例中，每路第一模拟信号可以通过所有列天线发射出去，且发射信号所需的天线列数越多，则天线的天线增益越大，因此，本申请实施例中天线的天线增益大于图2中天线的天线增益。
再者，如图2所示的相关技术对多路信号采用不同的硬件链路进行处理，因此，多路信号在处理过程中并不是同步改变的，在天线发射信号前通常还需要通过与天线连接的校正单元对信号进行严格的矫正。而本申请实施例中，当每路第二模拟信号与至少两路第一模拟信号相关时，每个移相器对一路第二模拟信号进行一次移相处理，相当于对至少两路第一模拟信号同时进行移相处理，因此，N1路第一模拟信号在处理过程中是同步改变的，因此，在天线发射第三模拟信号前仅需进行轻微的矫正(或者无需矫正)即可。
可选的，本申请实施例中第一模拟信号可以为各种频段的信号，例如频率为28千兆赫的信号、频率为38千兆赫的信号以及60千兆赫的信号等高频信号，或者频率较低的低频信号。
综上所述，由于本申请实施例提供的信号处理方法中，首先对N1路第一模拟信号进行了固定波束成形处理得到了N2路第二模拟信号，之后又对这N2路第二模拟信号进行了移相处理。由于每路第二模拟信号均包括至少两路第一模拟信号，对每路第二模拟信号进行移相处理，就相当于对至少两路第一模拟信号进行移相处理，所以，信号处理装置在需要对多路第一模拟信号进行移相处理时，信号处理装置所需包括的移相器的个数较少，信号处理装置的结构较简单。并且，由于信号处理装置无需包括较多的移相器，因此，信号处理装置的成本也较低。
图8为本申请实施例提供的另一种信号处理方法的流程图，该处理方法可以用于图9中的信号处理装置A。图9为本申请实施例提供的另一种信号处理装置A的结构示意图。图9中的信号处理装置A可以是基站011中的RRU112，或者，信号处理装置A是RRU112中的电路。或者，信号处理装置A可以是终端012中的射频单元122，或者，信号处理装置A可以是射频单元122中的电路。
下面结合图8和图9对本申请实施例提供的另一种信号处理方法进行描述。
步骤801、对N1路第一模拟信号进行固定波束成形处理，得到N2路第二模拟信号。
需要说明的是，每路第二模拟信号包括至少两路第一模拟信号，且N2≥N1≥2。
如图9所示，信号处理装置A在得到N1路第一模拟信号之后，可以通过图9中的第一处理单元301对该N1路第一模拟信号进行固定波束成形处理。
可选的，第一处理单元301在对N1路第一模拟信号进行处理时，可以通过巴特勒矩阵或者罗特曼透镜将每路第一模拟信号映射到至少两路第二模拟信号，从而使得到的每路第二模拟信号包括至少两路第一模拟信号。并且，固定波束成形处理得到的每路第二模拟信号均具有固定的相位和幅值。
步骤802、对N2路第二模拟信号进行第一处理，得到N2路第三模拟信号。
请继续参考图9，在得到N2路第二模拟信号之后，信号处理装置A还可以通过第二处 理单元V1对这N2路第二模拟信号进行第一处理。第一处理可以包括：移相处理。
可选的，在对N2路第二模拟信号进行移相处理时，第二处理单元V1可以通过N2个移相器对N2路第二模拟信号一一进行移相处理。每个移相器可以对每路第二模拟信号通过一个移相值进行移相处理。对N2路第二模拟信号进行移相处理的N2个移相值可以不形成等差数列，或者，对N2路第二模拟信号进行移相处理的N2个移相值可以形成等差数列。
综上所述，由于本申请实施例提供的信号处理方法中，首先对N1路第一模拟信号进行了固定波束成形处理得到了N2路第二模拟信号，之后又对这N2路第二模拟信号进行了移相处理。由于每路第二模拟信号均包括至少两路第一模拟信号，对每路第二模拟信号进行移相处理，就相当于对至少两路第一模拟信号进行移相处理，所以，信号处理装置在需要对多路第一模拟信号进行移相处理时，信号处理装置所需包括的移相器的个数较少，信号处理装置的结构较简单。并且，由于信号处理装置无需包括较多的移相器，因此，信号处理装置的成本也较低。
图10为本申请实施例提供的另一种信号处理方法的流程图，该处理方法可以用于信号处理装置B。图11为本申请实施例提供的一种信号处理装置B的结构示意图，需要说明的是，信号处理装置B中的40可以是基站011中的RRU112；或者，信号处理装置B中的40可以是RRU112中的电路；天线404可以是基站011中的天线113。信号处理装置B中的40可以是终端012中的射频单元122；或者，信号处理装置B中的40可以是射频单元122中的电路，信号处理装置B中的404可以是终端012中的天线126。
下面结合图10和图11对本申请实施例提供的另一信号处理方法进行描述。
如图10所示，该信号处理方法可以包括：
步骤1001、在空口接收N2路第三模拟信号。
如图11所示，信号处理装置B可以通过天线404在空口接收这N2路第三模拟信号。实际应用中，N2路第三模拟信号可以通过其他方式获取，此时，该信号处理方法也可以不包括步骤1001，本申请实施例对此不作限定。N2≥2。
步骤1002、对N2路第三模拟信号进行第一处理，得到N2路第二模拟信号。
在得到N2路第三模拟信号之后，信号处理装置B还可以通过第二处理单元V2对这N2路第三模拟信号进行第一处理。第一处理可以包括：移相处理和低噪声放大处理，且低噪声放大处理在移相处理之前，或者在移相处理之后，本申请实施例中以低噪声放大处理在移相处理以前为例。并且，第二处理单元V2可以通过N2个低噪声放大器(low noise amplifier，LNA)403对N2路第三模拟信号进行低噪声放大处理。
在对N2路第三模拟信号进行移相处理时，第二处理单元V2可以通过N2个移相器402对N2路第三模拟信号一一进行移相处理。每个移相器402可以对每路第三模拟信号通过一个移相值进行移相处理。对N2路第三模拟信号进行移相处理的N2个移相值不形成等差数列，或者，对N2路第三模拟信号进行移相处理的N2个移相值可以形成等差数列。
可选的，第二处理单元V2在通过N2个移相器对N2路第三模拟信号进行移相处理时，还可以不同时间，对这N2路第三模拟信号中的至少一路第三模拟信号采用不同的移相值进行移相处理。
步骤1003、对N2路第二模拟信号进行固定波束成形处理，得到N1路第一模拟信号。
需要说明的是，N2≥N1≥2。
信号处理装置B在得到N2路第二模拟信号之后，可以通过图11中的第一处理单元401 对该N2路第二模拟信号进行固定波束成形处理，得到N1路第一模拟信号。步骤1001中接收到的N2路第三模拟信号用于形成N1路第一模拟信号对应的N1个波束。
第一处理单元401在对N2路第二模拟信号进行处理时，可以通过巴特勒矩阵4012或者罗特曼透镜将每路第二模拟信号映射到至少两路第一模拟信号，从而使得到的每路第二模拟信号包括映射得到的至少两路第一模拟信号。并且，固定波束成形处理得到的每路第一模拟信号均具有固定的相位和幅值。
可选的，在对N2路第二模拟信号进行映射时，还可以在不同时间，将该N2路第二模拟信号中的至少一路第二模拟信号映射到不同的至少两路第一模拟信号。示例的，该第一处理单元401还可以包括单刀多掷开关4011，第一处理单元401可以结合单刀多掷开关4011来实现在不同时间将该至少一路第二模拟信号映射到不同的至少两路第一模拟信号，并从巴特勒矩阵上的不同输出端输出映射得到的第一模拟信号实现，其原理可以参考图3所示的实施例，本申请实施例在此不做赘述。
可选的，处理得到的N1路第一模拟信号中任意两路第一模拟信号可以不同，或者，N1路第一模拟信号中至少两路第一模拟信号相同。
步骤1004、对N1路第一模拟信号进行混频处理，得到N1路初始模拟信号。
请继续参考图11，信号处理装置B在处理得到N1路第一模拟信号后，可以将这N1路第一模拟信号一一输入N1个混频器405，以便于N1个混频器405一一对N1路第一模拟信号进行混频处理，从而得到N1路初始模拟信号。
步骤1005、对N1路初始模拟信号进行模数转换处理，得到N1路数字信号。
请继续参考图11，该信号处理装置B可以通过该N1个模数转换器(analog to digital converter，ADC)406对该N1路初始模拟信号一一进行模数转换处理，从而得到每个ADC 406处理得到的一路数字信号，N1个ADC 406共能够处理的得到N1路数字信号。
可选的，本申请实施例中第一模拟信号可以为各种频段的信号，例如频率为28千兆赫的信号、频率为38千兆赫的信号以及60千兆赫的信号等高频信号，或者频率较低的低频信号。
需要说明的是，本申请实施例提供的信号处理方法为图3所示的信号处理方法的逆向处理方法，本申请实施例中各个步骤可以参考图3所示的信号处理方法中相应步骤的解释，本申请实施例在此不做赘述。
综上所述，由于本申请实施例提供的信号处理方法中，首先将N2路第三拟信号进行了移相处理得到了N2路第二模拟信号。之后又对N2路第二模拟信号进行了固定波束成形处理得到了N1路第三模拟信号。由于每路第二模拟信号均包括至少两路第一模拟信号，对每路第二模拟信号进行移相处理，就相当于对至少两路第一模拟信号进行移相处理，所以，信号处理装置在需要对多路第一模拟信号进行移相处理时，信号处理装置所需包括的移相器的个数较少，信号处理装置的结构较简单。并且，由于信号处理装置无需包括较多的移相器，因此，信号处理装置的成本也较低。
图12为本申请实施例提供的另一种信号处理方法的流程图，该处理方法可以用于信号处理装置B。图13为本申请实施例提供的另一种信号处理装置B的结构示意图，该信号处理装置B可以是基站011中的RRU112，或者，信号处理装置B是RRU112中的电路。或者，信号处理装置B可以是终端012中的射频单元122，或者，信号处理装置B可以是射频单元122中的电路。
下面结合图12和图13对本申请实施例提供的另一种信号处理方法进行描述。
步骤1201、对N2路第三模拟信号进行第一处理，得到N2路第二模拟信号。
需要说明的是，每路第二模拟信号包括至少两路第一模拟信号，且N2≥N1≥2。
如图13所示，信号处理装置B在得到N2路第三模拟信号之后，可以通过图13中的第二处理单元V2对该N2路第三模拟信号进行第一处理。第一处理可以包括：移相处理。
可选的，在对N2路第三模拟信号进行移相处理时，第二处理单元V2可以通过N2个移相器对N2路第三模拟信号一一进行移相处理。每个移相器可以对每路第三模拟信号通过一个移相值进行移相处理。对N2路第三模拟信号进行移相处理的N2个移相值可以不形成等差数列，或者，对N2路第三模拟信号进行移相处理的N2个移相值可以形成等差数列。
步骤1202、对N2路第二模拟信号进行固定波束成形处理，得到N1路第一模拟信号。
请继续参考图13，在得到N2路第二模拟信号之后，信号处理装置B还可以通过第一处理单元401对这N2路第二模拟信号进行固定波束成形处理。
可选的，第一处理单元401在对N1路第二模拟信号进行处理时，可以通过巴特勒矩阵或者罗特曼透镜将每路第二模拟信号映射到至少两路第一模拟信号，从而使得到的每路第二模拟信号包括至少两路第一模拟信号。并且，固定波束成形处理得到的每路第一模拟信号均具有固定的相位和幅值。
综上所述，由于本申请实施例提供的信号处理方法中，首先将N2路第三拟信号进行了移相处理得到了N2路第二模拟信号。之后又对N2路第二模拟信号进行了固定波束成形处理得到了N1路第三模拟信号。由于每路第二模拟信号均包括至少两路第一模拟信号，对每路第二模拟信号进行移相处理，就相当于对至少两路第一模拟信号进行移相处理，所以，信号处理装置在需要对多路第一模拟信号进行移相处理时，信号处理装置所需包括的移相器的个数较少，信号处理装置的结构较简单。并且，由于信号处理装置无需包括较多的移相器，因此，信号处理装置的成本也较低。
本申请实施例还提供了一种装置，其可以包括实现上述信号处理方法中的各个步骤的功能单元。
下面结合图9，对图9中提供的信号处理装置A进行进一步的描述。如图9所示，该信号处理装置A可以包括：第一处理电路301和第二处理电路V1。
第一处理电路301用于对N1路第一模拟信号进行固定波束成形处理，得到N2路第二模拟信号；
第二处理电路V1用于对N2路第二模拟信号进行第一处理，得到N2路第三模拟信号；其中，每路第二模拟信号包括至少两路第一模拟信号，且N2≥N1≥2；第一处理包括移相处理；N2路第三模拟信号用于形成N1路第一模拟信号对应的N1个波束。
可选的，第一处理电路301可以用于：将每路第一模拟信号映射到至少两路第二模拟信号。
如图14所示，第一处理电路301可以包括巴特勒矩阵3012或者罗特曼透镜，巴特勒矩阵3012或者罗特曼透镜(图14中未示出)将每路第一模拟信号映射到至少两路第二模拟信号。
可选的，第二处理电路V1用于：对每路第二模拟信号通过一个移相值进行移相处理；
如图14所示，第二处理电路V1包括N2个移相器，1个移相器通过一个移相值对1路第一模拟信号进行移相处理，其中，对N2路第二模拟信号进行移相处理的N2个移相值不形 成等差数列。
可选的，第二处理电路V1用于：对每路第二模拟信号通过一个移相值进行移相处理；
如图14所示，第二处理电路V1包括N2个移相器，1个移相器通过一个移相值对1路第一模拟信号进行移相处理，其中，对N2路第二模拟信号进行移相处理的N2个移相值形成等差数列。
可选的，不同时间，对至少一路第二模拟信号进行移相处理的移相值不同。
可选的，第一处理还包括功率放大处理，功率放大处理在移相处理之前，或者在移相处理之后。如图14所示，该第二处理电路V1包括：N2个功率放大器PA 303。
可选的，第一处理电路301用于：不同时间，将至少一路第一模拟信号映射到不同的至少两路第二模拟信号。
如图14所示，第一处理电路301包括单刀多掷开关3011，单刀多掷开关3011能够在不同时间，将第一模拟信号输入至巴特勒矩阵的不同端口，从而映射到不同的至少两路第二模拟信号。
可选的，该信号处理装置A还可以包括：数模转换器306和混频器305，数模转换器306用于对N1路数字信号进行数模转换处理，得到N1路初始模拟信号；混频器305用于对N1路初始模拟信号进行混频处理，得到N1路第一模拟信号。
可选的，每路第二模拟信号包括N1路第一模拟信号。
可选的，N1路第一模拟信号中任意两路第一模拟信号不同。
可选的，N1路第一模拟信号中至少两路第一模拟信号相同。
下面在图14的基础上，结合图4，对图4所示的信号处理装置进行进一步的描述。
如图4所示，信号发射装置A还可以包括天线304，天线304用于发射第二处理单元V1输出的N2路第三模拟信号。
下面结合图13，对图13中提供的信号处理装置B进行进一步的描述。如图13所示，该信号处理装置B可以包括：第一处理电路401和第二处理电路V2。
第二处理电路V2用于对N2路第三模拟信号进行第一处理，得到N2路第二模拟信号；
第一处理电路401用于对N2路第二模拟信号进行固定波束成形处理，得到N1路第一模拟信号；该固定波束成形处理可以包括波束选择处理，例如将N2路第二模拟信号中的每路映射到N1路第一模拟信号中的至少一路，其中N1路第一模拟信号与覆盖信号处理装置B的N1个波束相对应。
其中，每路第二模拟信号包括至少两路第一模拟信号，且N2≥N1≥2；
第一处理包括移相处理；
N2路第三模拟信号是从N1个波束中接收到的。
可选的，第二处理电路V2用于：对每路第三模拟信号通过一个移相值进行移相处理；
如图15所示，第二处理电路V2包括N2个移相器402，1个移相器通过一个移相值对1路第一模拟信号进行移相处理。其中，对N2路第三模拟信号进行移相处理的N2个移相值不形成等差数列。
可选的，第二处理电路V2用于：对每路第三模拟信号通过一个移相值进行移相处理；
如图15所示，第二处理电路V2包括N2个移相器402，1个移相器通过一个移相值对1路第一模拟信号进行移相处理，其中，对N2路第三模拟信号进行移相处理的N2个移相值形 成等差数列。
可选的，不同时间，对至少一路第三模拟信号进行移相处理的移相值不同。
可选的，第一处理还包括低噪声放大处理，低噪声放大处理在移相处理之前，或者在移相处理之后。
如图15所示，第二处理电路包括N2个低噪声放大器。
可选的，第一处理电路401用于：将每路第二模拟信号映射到至少两路第一模拟信号。
如图15所示，第一处理电路401包括巴特勒矩阵4012或者罗特曼透镜，巴特勒矩阵4012或者罗特曼透镜用于将每路第二模拟信号映射到至少两路第一模拟信号。
可选的，第一处理电路401用于：不同时间，将至少一路第二模拟信号映射到不同的至少两路第一模拟信号。
第一处理电路401包括N2个单刀多掷开关4011，可以通过不同时间，将N2路第二模拟信号中的每个映射到N1路第一模拟信号中的至少一路，其中N1路第一模拟信号与覆盖信号处理装置B的N1个波束相对应。可选的，信号处理装置B还包括：混频器305和DAC 306，混频器305用于对N1路第一模拟信号进行混频处理，得到N1路初始模拟信号；DAC 306用于对N1路初始模拟信号进行模数转换处理，得到N1路数字信号。
可选的，每路第二模拟信号包括N1路第一模拟信号。
可选的，N1路第一模拟信号中任意两路第一模拟信号不同。
可选的，N1路第一模拟信号中至少两路第一模拟信号相同。
下面在图15的基础上，结合图11，对图11所示的信号处理装置进行进一步的描述。如图11所示，信号处理装置B还包括：天线404，图15所示的信号处理装置用于对天线404在空口接收的N2路第三模拟信号进行处理。
需要说明的是，本申请实施例中的各种电路，可以集成在芯片中。
需要说明的是，本申请实施例提供的各个方法实施例可以相互参考，各个装置实施例也可以相互参考，方法实施例也可以与装置实施例互相参考，本申请实施例对此不做限定。本申请实施例提供的方法实施例步骤的先后顺序能够进行适当调整，步骤也能够根据情况进行相应增减，任何熟悉本技术领域的技术人员在本申请实施例揭露的技术范围内，可轻易想到变化的方法，都应涵盖在本申请实施例的保护范围之内，因此不再赘述。
本申请中术语“和/或”，仅仅是一种描述关联对象的关联关系，表示可以存在三种关系，例如，I和/或J，可以表示：单独存在I，同时存在I和J，单独存在J这三种情况。另外，本文中字符“/”，一般表示前后关联对象是一种“或”的关系。多个可以为2个，3个，4个或者更多。
以上所述仅为本申请的可选实施例，并不用以限制本申请，凡在本申请的精神和原则之内，所作的任何修改、等同替换、改进等，均应包含在本申请的保护范围之内。

Claims (24)

  1. 一种信号处理装置，其特征在于，所述信号处理装置包括：第一处理电路和第二处理电路，
    所述第一处理电路用于对N1路第一模拟信号进行固定波束成形处理，得到N2路第二模拟信号；
    所述第二处理电路用于对所述N2路第二模拟信号进行第一处理，得到N2路第三模拟信号；
    其中，每路所述第二模拟信号包括至少两路所述第一模拟信号，且N2≥N1≥2；
    所述第一处理包括移相处理；
    N2路所述第三模拟信号用于形成N1路所述第一模拟信号对应的N1个波束。
  2. 根据权利要求1所述的信号处理装置，其特征在于，所述第一处理电路包括巴特勒矩阵或者罗特曼透镜，所述巴特勒矩阵或者罗特曼透镜用于：
    将每路所述第一模拟信号映射到至少两路所述第二模拟信号。
  3. 根据权利要求1或者2所述的信号处理装置，其特征在于，所述第二处理电路包括移相器，所述移相器用于：
    对每路所述第二模拟信号通过一个移相值进行移相处理；
    其中，对N2路所述第二模拟信号进行移相处理的N2个移相值形成非等差数列。
  4. 根据权利要求1-3任一项所述的信号处理装置，其特征在于，对至少一路所述第二模拟信号，在不同时间进行移相处理的移相值不同。
  5. 根据权利要求1-4任一项所述的信号处理装置，其特征在于，所述第二处理电路还包括功率放大器，所述功率放大器用于对经过移相后的所述N2路第二模拟信号功率放大处理。
  6. 根据权利要求2所述的信号处理装置，其特征在于，所述巴特勒矩阵或者罗特曼透镜还用于：
    对至少一路所述第一模拟信号，在不同时间映射到不同的至少两路所述第二模拟信号。
  7. 根据权利要求1-6任一项所述的信号处理装置，其特征在于，所述信号处理装置还包括：数模转换器和混频器，
    所述数模转换器用于对N1路数字信号进行数模转换处理，得到N1路数模转换后的模拟信号；
    所述混频器用于对所述N1路数模转换后的模拟信号进行混频处理，得到所述N1路第一模拟信号。
  8. 根据权利要求1-7任一项所述的信号处理装置，其特征在于，每路所述第二模拟信号包括N1路所述第一模拟信号。
  9. 根据权利要求1-8任一项所述的信号处理装置，其特征在于，所述N1路第一模拟信号中任意两路所述第一模拟信号不同。
  10. 根据权利要求1-9任一项所述的信号处理装置，其特征在于，所述N1路第一模拟信号中至少两路所述第一模拟信号相同。
  11. 根据权利要求1-10任一项所述的信号处理装置，其特征在于，所述信号处理装置为远端射频单元RRU或者射频单元RFU。
  12. 一种信号处理装置，其特征在于，所述信号发射装置包括：权利要求1-10任一项所述的信号处理装置，以及天线器件，
    所述天线器件用于发射第二处理电路输出的所述N2路第三模拟信号。
  13. 根据权利要求12所述的信号处理装置，其特征在于，所述信号处理装置为有源天线单元AAU。
  14. 一种基站，其特征在于，所述基站包括权利要求11或者13所述的信号处理装置。
  15. 一种终端，其特征在于，所述终端包括权利要求1-10任一项所述的信号处理装置。
  16. 一种信号处理方法，其特征在于，所述方法包括：
    对N1路第一模拟信号进行固定波束成形处理，得到N2路第二模拟信号；
    对N2路所述第二模拟信号进行第一处理，得到N2路第三模拟信号；
    其中，每路所述第二模拟信号包括至少两路所述第一模拟信号，且N2≥N1≥2；
    所述第一处理包括移相处理；
    N2路所述第三模拟信号用于形成N1路所述第一模拟信号对应的N1个波束。
  17. 根据权利要求16所述的方法，其特征在于，所述对N1路第一模拟信号进行固定波束成形处理，包括：
    通过巴特勒矩阵或者罗特曼透镜将每路所述第一模拟信号映射到至少两路所述第二模拟信号。
  18. 根据权利要求16或者17所述的方法，其特征在于，所述对N2路所述第二模拟信号进行第一处理，包括：
    对每路所述第二模拟信号通过一个移相值进行移相处理；
    其中，对N2路所述第二模拟信号进行移相处理的N2个移相值不形成等差数列。
  19. 根据权利要求16-18任一项所述的方法，其特征在于，不同时间，对至少一路所述第二模拟信号进行移相处理的移相值不同。
  20. 根据权利要求16-19任一项所述的方法，其特征在于，所述第一处理还包括功率放大处理，所述功率放大处理在所述移相处理之后。
  21. 根据权利要求17述的方法，其特征在于，所述将每路所述第一模拟信号映射到至少两路所述第二模拟信号，包括：
    不同时间，将至少一路所述第一模拟信号映射到不同的至少两路所述第二模拟信号。
  22. 根据权利要求17-21任一项所述的方法，其特征在于，每路所述第二模拟信号包括N1路所述第一模拟信号。
  23. 根据权利要求17-21任一项所述的方法，其特征在于，所述N1路第一模拟信号中任意两路所述第一模拟信号不同。
  24. 根据权利要求17至23任一项所述的方法，其特征在于，在所述对N2路所述第二模拟信号进行第一处理，得到N2路第三模拟信号之后，所述方法还包括：
    在空口发射N2路所述第三模拟信号。
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