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WO2018000490A1 - 一种基于液晶面板的驱动电路及液晶面板 - Google Patents

一种基于液晶面板的驱动电路及液晶面板 Download PDF

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Publication number
WO2018000490A1
WO2018000490A1 PCT/CN2016/090885 CN2016090885W WO2018000490A1 WO 2018000490 A1 WO2018000490 A1 WO 2018000490A1 CN 2016090885 W CN2016090885 W CN 2016090885W WO 2018000490 A1 WO2018000490 A1 WO 2018000490A1
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WO
WIPO (PCT)
Prior art keywords
sub
pixel
row
source driving
pixels
Prior art date
Application number
PCT/CN2016/090885
Other languages
English (en)
French (fr)
Inventor
安泰生
Original Assignee
武汉华星光电技术有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 武汉华星光电技术有限公司 filed Critical 武汉华星光电技术有限公司
Priority to US15/118,871 priority Critical patent/US20180174533A1/en
Publication of WO2018000490A1 publication Critical patent/WO2018000490A1/zh

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Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3607—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals for displaying colours or for displaying grey scales with a specific pixel layout, e.g. using sub-pixels
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3648—Control of matrices with row and column drivers using an active matrix
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3685—Details of drivers for data electrodes
    • G09G3/3688—Details of drivers for data electrodes suitable for active matrices only
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0421—Structural details of the set of electrodes
    • G09G2300/0426—Layout of electrodes and connections
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0439—Pixel structures
    • G09G2300/0452—Details of colour pixel setup, e.g. pixel composed of a red, a blue and two green components
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/0297—Special arrangements with multiplexing or demultiplexing of display data in the drivers for data electrodes, in a pre-processing circuitry delivering display data to said drivers or in the matrix panel, e.g. multiplexing plural data signals to one D/A converter or demultiplexing the D/A converter output to multiple columns
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/08—Details of timing specific for flat panels, other than clock recovery

Definitions

  • the present invention relates to the field of liquid crystal display, and in particular to a driving circuit and a liquid crystal panel based on a liquid crystal panel.
  • the existing liquid crystal panel for a mobile terminal generally adopts an RGB pixel arrangement manner, wherein one pixel includes three sub-pixels, that is, one pixel includes an R sub-pixel, a G sub-pixel, and a B sub-pixel.
  • the source driving chip needs to provide 3N source driving signals. It can be understood that since the 3N source driving signals require the source driving chip to provide 3N source driving signal lines for transmission, the size of the source driving chip is large, and the cost of the source driving chip is greatly increased.
  • the technical problem to be solved by the present invention is to provide a driving circuit and a liquid crystal panel, which can greatly reduce the size of the source driving chip, thereby saving the cost of the source driving chip.
  • a technical solution adopted by the present invention is to provide a driving circuit based on a liquid crystal panel, wherein the liquid crystal panel includes a four-color pixel array arranged in a matrix, and each pixel in the four-color pixel array includes two a sub-pixel of different colors; wherein the driving circuit comprises a source driving chip and a plurality of multiplexing circuits, the source driving chip is configured to provide a plurality of source driving signals, and each multiplexing circuit is configured to receive a source And driving the source driving signal to a plurality of sub-pixel columns corresponding to the source driving signal in the four-color pixel array; wherein the source driving chip includes a plurality of first output terminals, multiplexing The circuit comprises an input end, a plurality of control terminals and a plurality of second output ends, a first output end of the source drive chip is connected to the input end of the multiplexing circuit, and the plurality of control ends of the multiplexing circuit respectively Receiving a plurality of control signals
  • the multiplexing circuit includes an input terminal, three control terminals, and three second output terminals, and the multiplexing circuit further includes three transistors; wherein the input terminals are respectively connected to the drains of the three transistors, The gates of the three transistors are respectively connected to three control terminals, and the sources of the three transistors are respectively connected to the three second output terminals.
  • another technical solution adopted by the present invention is to provide a driving circuit based on a liquid crystal panel, the liquid crystal panel includes a four-color pixel array arranged in a matrix, and each pixel in the four-color pixel array includes two a sub-pixel of different colors; wherein the driving circuit comprises a source driving chip and a plurality of multiplexing circuits, the source driving chip is configured to provide a plurality of source driving signals, and each multiplexing circuit is configured to receive one The source driving signal transmits the source driving signal to a plurality of sub-pixel columns corresponding to the source driving signal in the four-color pixel array in a time division manner.
  • the source driving chip includes a plurality of first output ends
  • the multiplexing circuit includes an input end, a plurality of control terminals, and a plurality of second output ends, and a first output end of the source driving chip and the multiplexing Connected to the input terminals of the circuit, the plurality of control terminals of the multiplexing circuit respectively receive a plurality of control signals, and the plurality of second output terminals of the multiplexing circuit are respectively connected to the plurality of sub-pixel columns in the four-color pixel array.
  • the multiplexing circuit includes an input terminal, three control terminals, and three second output terminals, and the multiplexing circuit further includes three transistors; wherein the input terminals are respectively connected to the drains of the three transistors, The gates of the three transistors are respectively connected to three control terminals, and the sources of the three transistors are respectively connected to the three second output terminals.
  • the multiplexing circuit includes an input terminal, six control terminals, and six second output terminals, and the multiplexing circuit further includes six transistors; wherein the input terminals are respectively connected to the drains of the six transistors, The gates of the six transistors are respectively connected to six control terminals, and the sources of the six transistors are respectively connected to the six second output terminals.
  • the four-color pixel array includes a plurality of sub-pixel rows arranged in the column direction, and each sub-pixel row includes a plurality of sub-pixels of different colors periodically arranged in the row direction.
  • Each of the sub-pixel rows includes a plurality of sub-pixels periodically arranged in a row direction by a red sub-pixel, a green sub-pixel, a blue sub-pixel, and a white sub-pixel.
  • the two sub-pixels forming one pixel are a red sub-pixel, a green sub-pixel or a blue sub-pixel, and a white sub-pixel.
  • the four-color pixel array includes a plurality of sub-pixel rows arranged in a column direction, wherein each two rows of sub-pixel rows are repeatedly arranged, and the odd-row sub-pixel rows include a plurality of sub-pixels periodically arranged in the first arrangement order along the row direction.
  • the even-line sub-pixel rows include a plurality of sub-pixels periodically arranged in the second arrangement order in the row direction.
  • the four-color pixel array includes a plurality of sub-pixel rows arranged in a column direction, and each four rows of sub-pixel rows are repeatedly arranged, wherein the first row of sub-pixel rows and the second row of sub-pixel rows of each of the four rows of sub-pixel rows,
  • the third row of sub-pixel rows and the fourth sub-pixel row respectively include a plurality of sub-pixels periodically arranged in the row direction in the first arrangement order, the second arrangement order, the third arrangement order, and the fourth arrangement order.
  • a liquid crystal panel including a four-color pixel array arranged in a matrix, each pixel of the four-color pixel array including two different colors.
  • the liquid crystal panel includes a driving circuit including a source driving chip and a plurality of multiplexing circuits, wherein the source driving chip is configured to provide a plurality of source driving signals, and each multiplexing circuit is used for A source driving signal is received and the source driving signal is time-divisionally transmitted to a plurality of sub-pixel columns corresponding to the source driving signal in the four-color pixel array.
  • the source driving chip includes a plurality of first output ends
  • the multiplexing circuit includes an input end, a plurality of control terminals, and a plurality of second output ends, and a first output end of the source driving chip and the multiplexing Connected to the input terminals of the circuit, the plurality of control terminals of the multiplexing circuit respectively receive a plurality of control signals, and the plurality of second output terminals of the multiplexing circuit are respectively connected to the plurality of sub-pixel columns in the four-color pixel array.
  • the multiplexing circuit includes an input terminal, three control terminals, and three second output terminals, and the multiplexing circuit further includes three transistors; wherein the input terminals are respectively connected to the drains of the three transistors, The gates of the three transistors are respectively connected to three control terminals, and the sources of the three transistors are respectively connected to the three second output terminals.
  • the multiplexing circuit includes an input terminal, six control terminals, and six second output terminals, and the multiplexing circuit further includes six transistors; wherein the input terminals are respectively connected to the drains of the six transistors, The gates of the six transistors are respectively connected to six control terminals, and the sources of the six transistors are respectively connected to the six second output terminals.
  • the four-color pixel array includes a plurality of sub-pixel rows arranged in the column direction, and each sub-pixel row includes a plurality of sub-pixels of different colors periodically arranged in the row direction.
  • Each of the sub-pixel rows includes a plurality of sub-pixels periodically arranged in a row direction by a red sub-pixel, a green sub-pixel, a blue sub-pixel, and a white sub-pixel.
  • the two sub-pixels forming one pixel are a red sub-pixel, a green sub-pixel or a blue sub-pixel, and a white sub-pixel.
  • the four-color pixel array includes a plurality of sub-pixel rows arranged in a column direction, wherein each two rows of sub-pixel rows are repeatedly arranged, and the odd-row sub-pixel rows include a plurality of sub-pixels periodically arranged in the first arrangement order along the row direction.
  • the even-line sub-pixel rows include a plurality of sub-pixels periodically arranged in the second arrangement order in the row direction.
  • the four-color pixel array includes a plurality of sub-pixel rows arranged in a column direction, and each four rows of sub-pixel rows are repeatedly arranged, wherein the first row of sub-pixel rows and the second row of sub-pixel rows of each of the four rows of sub-pixel rows,
  • the third row of sub-pixel rows and the fourth sub-pixel row respectively include a plurality of sub-pixels periodically arranged in the row direction in the first arrangement order, the second arrangement order, the third arrangement order, and the fourth arrangement order.
  • the liquid crystal panel-based driving circuit and the liquid crystal panel of the present invention adopts a four-color pixel array and two sub-pixels of different colors in the four-color pixel as one pixel.
  • the number of gate drive signals can be reduced, thereby reducing the size of the source drive chip.
  • one source driving signal can drive a plurality of sub-pixels, thereby further reducing the source driving signal, thereby greatly reducing the size of the source driving chip.
  • FIG. 1 is a schematic structural view of a liquid crystal panel according to an embodiment of the present invention.
  • FIG. 2 is a schematic structural view of another embodiment of a multiplexing circuit in the liquid crystal panel shown in FIG. 1;
  • FIG. 3 is a schematic structural view of still another embodiment of a multiplexing circuit in the liquid crystal panel shown in FIG. 1;
  • FIG. 4 is a schematic view showing another embodiment of a four-color pixel array in the liquid crystal panel shown in FIG. 1;
  • FIG. 5 is a schematic view showing another embodiment of a four-color pixel array in the liquid crystal panel shown in FIG. 1.
  • FIG. 5 is a schematic view showing another embodiment of a four-color pixel array in the liquid crystal panel shown in FIG. 1.
  • the liquid crystal panel 100 includes a driving circuit 1 and a four-color pixel array 2 arranged in a matrix, wherein the driving circuit 1 is for driving the four-color pixel array 2, and each pixel of the four-color pixel array 2 includes two Subpixels of different colors.
  • the drive circuit 1 includes a source drive chip 11 and a plurality of multiplexing circuits 12.
  • the source driving chip 11 is configured to provide a plurality of source driving signals Isource
  • each multiplexing circuit 12 is configured to receive a source driving signal Isource and transmit the source driving signal Isource to four color pixels in a time division manner. A plurality of sub-pixel columns in the array 2 corresponding to the source driving signal Isource.
  • the source driving chip 11 includes a plurality of first output ends 111.
  • the multiplexing circuit 12 includes an input terminal 121, a plurality of control terminals 122, and a plurality of second output terminals 123.
  • a first output terminal 111 of the source driver chip 11 is connected to the input terminal 121 of the multiplexing circuit 12.
  • the plurality of control terminals 122 of the multiplexing circuit 12 respectively receive a plurality of control signals MUX1, MUX2, ..., MUXN, and the plurality of second output terminals 123 of the multiplexing circuit 12 and the plurality of sub-pixel arrays 2, respectively Pixel column connections.
  • the four-color pixel array 2 includes a plurality of sub-pixel rows 21 arranged in the column direction, and each of the sub-pixel rows 21 includes a plurality of sub-pixels of different colors periodically arranged in the row direction.
  • each sub-pixel row 21 includes a plurality of sub-pixels that are periodically arranged in the order of RGBW, that is, a red sub-pixel, a green sub-pixel, a blue pixel, and a white sub-pixel in the row direction.
  • the two adjacent sub-pixels form one pixel.
  • the two sub-pixels forming one pixel are red sub-pixels, green sub-pixels or blue sub-pixels, and white sub-pixels.
  • the first pixel includes a first red sub-pixel R1 and a first green sub-pixel G1
  • the second pixel includes a second blue sub-pixel B2 and a second white sub-pixel.
  • W2 the third pixel includes a third red sub-pixel R3 and a third green sub-pixel G3
  • the fourth sub-pixel includes a fourth blue sub-pixel B4 and a fourth white sub-pixel W4, and so on, up to the sub-pixel row The last pixel.
  • each sub-pixel row in the four-color pixel array may also be arranged in different orders of GBWR, BWRG, and the like, and the invention is not limited thereto.
  • the RGB display screen in the prior art includes each of the pixels including a red sub-pixel, a green sub-pixel, and a blue sub-pixel.
  • the source driver chip needs to provide 3N source drive signals.
  • each pixel point includes two sub-pixels.
  • the source driving chip only needs to provide 2N source driving signals.
  • one source driving signal can drive a plurality of sub-pixels, for example, m sub-pixels.
  • the source driving chip only needs to provide 2N/m source driving signals, thereby greatly reducing the source.
  • the size of the pole drive chip which in turn saves the cost of the source driver chip.
  • FIG. 2 is a schematic structural diagram of another embodiment of a multiplexing circuit in the liquid crystal panel shown in FIG. 1.
  • the multiplexing circuit 12' includes an input terminal 121', three control terminals 122', and three second output terminals 123'.
  • the internal portion of the multiplexing circuit 12' further includes three. Transistors 124'.
  • the input end 121' is connected to the first output end 111 of the source driving chip 11 and receives the source driving signal Isource, respectively connected to the drains of the three transistors 124', and the gates of the three transistors 124' are respectively Connected to three control terminals 122' for receiving three different control signals MUX1, MUX2 and MUX3, the sources of the three transistors 124' are respectively connected to the three second output terminals 123' to control the four-color pixel array The three columns of sub-pixel columns in 2.
  • each of the multiplexing circuits 12' controls three sub-pixels in the case of a sub-pixel behavior.
  • the first multiplexing circuit 12' controls the first red sub-pixel R1, the first green sub-pixel G1, and the second blue sub-pixel B2, and the second multiplexing circuit 12 controls the second white.
  • the first red sub-pixel R1 and the first green sub-pixel G1 form a first pixel
  • the second blue sub-pixel B2 and the second white sub-pixel W2 form a second pixel, a third red sub-pixel R3 and a third green sub-pixel.
  • the pixel G3 forms a third pixel, ... and so on.
  • control signal MUX1 is used to control the first one of the three sub-pixels
  • control signal MUX2 is used to control the second sub-pixel of the three sub-pixels
  • control signal MUX3 is used to control the three sub-pixels.
  • control signals MUX1, MUX2 and MUX3 are time-sharing effective, and the three transistors 124' connected to the control signals MUX1, MUX2 and MUX3 are time-divisionally connected, so that the source driving signal Isource is time-divisionally transmitted to the first and the first Two and third sub-pixels.
  • the source driving signal Isource when the control signal MUX1 is active, the source driving signal Isource is turned on with the first red sub-pixel R1.
  • the control signal MUX2 when the control signal MUX2 is active, the source driving signal Isource is turned on with the first green sub-pixel G1.
  • the control signal MUX3 When the control signal MUX3 is active, the source driving signal Isource is turned on with the second blue sub-pixel B2.
  • each pixel in the four-color pixel array 2 of the present invention includes two sub-pixels, and the two sub-pixels are red sub-pixels. Green sub-pixel or blue sub-pixel, white sub-pixel.
  • the multiplexing circuit 12' is a circuit for inputting three outputs, that is, the multiplexing circuit 12' can implement one source driving signal Isource to drive three sub-pixels. Therefore, the source driving chip 11 only needs to provide 2N/3 source driving signals Isource, so that the size of the source driving chip 11 can be greatly reduced, thereby saving the production cost of the source driving chip 11.
  • FIG. 3 is a schematic structural diagram of still another embodiment of the multiplexing circuit in the liquid crystal panel shown in FIG.
  • the multiplexing circuit 12" includes an input terminal 121", Six control terminals 122" and six second outputs 123", in addition, the inside of the multiplexing circuit 12" further includes six transistors 124".
  • the input end 121" is connected to the first output end 111 of the source driving chip 11 to receive the source driving signal Isource, and is respectively connected to the drains of the six transistors 124", and the gates of the six transistors 124" are respectively Six control terminals 122" are connected for receiving six different control signals MUX1, MUX2, MUX3, MUX4, MUX5 and MUX6, and the sources of the six transistors 124" are respectively connected to the six second output terminals 123" to Six columns of sub-pixel columns in the four-color pixel array 2 are controlled.
  • each multiplexing circuit 12" controls six sub-pixels.
  • the first multiplexing circuit 12" controls the first red sub-pixel R1. a first green sub-pixel G1, a second blue sub-pixel B2, a second white sub-pixel W2, a third red sub-pixel R3, and a third green sub-pixel G3.
  • the second multiplexing circuit 12 controls the fourth blue sub-pixel B4, the fourth white sub-pixel W4, the fifth red sub-pixel R5, the fifth green sub-pixel G5, the sixth blue sub-pixel B6, and the sixth white Sub-pixels W6,, ... and so on.
  • the first red sub-pixel R1 and the first green sub-pixel G1 form a first pixel
  • the second blue sub-pixel B2 and the second white sub-pixel W2 form a second pixel
  • the pixel G3 forms a third pixel
  • the fourth blue sub-pixel B4 and the fourth white sub-pixel W4 form a fourth pixel
  • the fifth red sub-pixel R5 and the fifth green sub-pixel G5 form a fifth pixel
  • the sixth blue sub-pixel B6, the sixth white sub-pixel W6 forms a sixth pixel, ... and so on.
  • control signal MUX1 is used to control the first one of the six sub-pixels
  • control signal MUX2 is used to control the second sub-pixel of the six sub-pixels
  • control signal MUX3 is used to control the six sub-pixels.
  • the third sub-pixel the control signal MUX4 is used to control the fourth sub-pixel of the six sub-pixels
  • control signal MUX5 is used to control the fifth sub-pixel of the six sub-pixels
  • control signal MUX6 is used to control the sixth of the six sub-pixels Sub-pixels.
  • control signals MUX1, MUX2, MUX3, MUX4, MUX5 and MUX6 are time-dependent, and the six transistors 124" connected to the control signals MUX1, MUX2, MUX3, MUX4, MUX5 and MUX6 are time-divisionally connected, thereby making the source
  • the drive signal Isource is time-divisionally transmitted to the first, second, third, fourth, fifth, and sixth sub-pixels.
  • the source driving signal Isource is turned on with the first red sub-pixel R1.
  • the control signal MUX2 is valid, the source The pole drive signal Isource is connected to the first green sub-pixel G1.
  • the control signal MUX3 is valid, the source drive signal Isource is turned on with the second blue sub-pixel B2.
  • the control signal MUX4 is valid, the source drive signal Isource is The second white sub-pixel W2 is turned on.
  • the control signal MUX5 is valid, the source driving signal Isource is turned on with the third red sub-pixel R3.
  • the control signal MUX6 is valid, the source driving signal Isource and the third green sub-pixel G3 Turn on.
  • each pixel in the four-color pixel array 2 of the present invention includes two sub-pixels, and the two sub-pixels are red sub-pixels. Green sub-pixel or blue sub-pixel, white sub-pixel.
  • the multiplexing circuit 12" is a circuit that inputs six outputs, that is, the multiplexing circuit 12" can implement one source driving signal Isource to drive six sub-pixels. Therefore, the source driving chip 11 only needs to provide 2N/6 source driving signals Isource, so that the size of the source driving chip 11 can be greatly reduced, thereby saving the production cost of the source driving chip 11.
  • the four-color pixel array 2' includes a plurality of sub-pixel rows arranged in a column direction, wherein each two rows of sub-pixel rows are repeatedly arranged, which are respectively recorded as an odd row sub-pixel row 311 and an even row sub-pixel row 312.
  • the odd-line sub-pixel row 311 includes a plurality of sub-pixels periodically arranged in the first arrangement order in the row direction
  • the even-line sub-pixel row 312 includes a plurality of sub-pixels periodically arranged in the second arrangement order in the row direction.
  • the odd-line sub-pixel row 311 includes a plurality of sub-pixels periodically arranged in the order of RGBW in the row direction
  • the even-row row sub-pixel row 312 includes a plurality of sub-pixels periodically arranged in the order of BWRG in the row direction.
  • the two sub-pixels forming one pixel are a red sub-pixel, a green sub-pixel or a blue sub-pixel, and a white sub-pixel.
  • odd row sub-pixel row 311 and the even row sub-pixel row 312 in the four-color pixel array 2 may also be arranged in the order of GBWR and WRGB, GBRW, RWGB, and the like.
  • the present invention is not limited thereto, as long as it is ensured that every two rows of sub-pixel rows are repeatedly arranged.
  • FIG. 5 is a schematic view showing another embodiment of a four-color pixel array in the liquid crystal panel shown in FIG. 1.
  • the four-color pixel array 2' includes a plurality of sub-pixel rows arranged in a column direction, and each four rows of sub-pixel rows are repeatedly arranged, wherein a first row of sub-pixel rows in every four rows of sub-pixel rows, The second row of sub-pixel rows, the third row of sub-pixel rows, and the fourth sub-pixel row respectively include a plurality of sub-periods arranged in a row direction in a first arrangement order, a second arrangement order, a third arrangement order, and a fourth arrangement order.
  • Pixel is a schematic view showing another embodiment of a four-color pixel array in the liquid crystal panel shown in FIG. 1.
  • the four-color pixel array 2' includes a plurality of sub-pixel rows arranged in a column direction, and each four rows of sub-pixel rows are repeatedly arranged, wherein a first row of sub-pixel rows in every four rows of
  • the first row of sub-pixel rows 411, the second row of sub-pixels 412, the third row of sub-pixel rows 413, and the fourth sub-pixel row 414 of each of the four rows of sub-pixel rows respectively include RGBW along the row direction.
  • a plurality of sub-pixels of the order of WRGB, RWGB, and GBWR periodically arranged.
  • the two sub-pixels forming one pixel are a red sub-pixel, a green sub-pixel or a blue sub-pixel, a white sub-pixel white sub-pixel, a red sub-pixel or a green sub-pixel, a blue sub-pixel or a red sub-pixel, and a white sub-pixel. .
  • the four rows of sub-pixel rows repeatedly arranged in the four-color pixel array 2'" may also be periodically arranged in the other four-color order in the row direction, and the present invention does not Limited.
  • the liquid crystal panel-based driving circuit and the liquid crystal panel of the present invention adopts a four-color pixel array and two sub-pixels of different colors in the four-color pixel as one pixel.
  • the number of gate drive signals can be reduced, thereby reducing the size of the source drive chip.
  • one source driving signal can drive a plurality of sub-pixels, thereby further reducing the source driving signal, thereby greatly reducing the size of the source driving chip.

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Abstract

一种基于液晶面板（100）的驱动电路（1）及液晶面板（100）。液晶面板（100）包括按照矩阵排列的四色像素阵列（2），四色像素阵列（2）中的每个像素包括两个不同颜色的子像素；其中，驱动电路（1）包括源极驱动芯片（11）和多个多路复用电路（12），源极驱动芯片（11）用于提供多个源极驱动信号（Isource），每一多路复用电路（12）用于接收一源极驱动信号（Isource）并将源极驱动信号（Isource）分时传输至四色像素阵列（2）中与源极驱动信号（Isource）对应的多个子像素列。通过这种方式，能够大大减少源极驱动信号（Isource）的数量，从而大大减少源极驱动芯片（11）的尺寸，进而节省源极驱动芯片（11）的成本。

Description

一种基于液晶面板的驱动电路及液晶面板
【技术领域】
本发明涉及液晶显示领域，特别是涉及一种基于液晶面板的驱动电路及液晶面板。
【背景技术】
现有的用于移动终端的液晶面板一般采用RGB像素排列方式，其中，一个像素包括三个子像素，也即一个像素包括R子像素，G子像素和B子像素。为了使液晶面板达到N×M的分辨率，其中，由于每列子像素需要一个源极驱动信号，此时源极驱动芯片需要提供3N个源极驱动信号。可以理解，由于3N个源极驱动信号需要源极驱动芯片提供3N条源极驱动信号线来进行传输，从而使得源极驱动芯片的尺寸会很大，源极驱动芯片的成本大大增加。
【发明内容】
本发明主要解决的技术问题是提供一种驱动电路及液晶面板，能够大大减少源极驱动芯片的尺寸，进而节省源极驱动芯片的成本。
为解决上述技术问题，本发明采用的一个技术方案是：提供一种基于液晶面板的驱动电路，该液晶面板包括按照矩阵排列的四色像素阵列，四色像素阵列中的每个像素包括两个不同颜色的子像素；其中，驱动电路包括源极驱动芯片和多个多路复用电路，源极驱动芯片用于提供多个源极驱动信号，每一多路复用电路用于接收一源极驱动信号并将该源极驱动信号分时传输至四色像素阵列中与该源极驱动信号对应的多个子像素列；其中，源极驱动芯片包括多个第一输出端，多路复用电路包括一输入端、多个控终端和多个第二输出端，源极驱动芯片的一第一输出端与多路复用电路的输入端连接，多路复用电路的多个控制端分别接收多个控制信号，多路复用电路的多个第二输出端分别与四色像素阵列中的多个子像素列连接；其中，四色像素阵列包括沿列方向排列的多个子像素行，每一子像素行包括沿行方向周期性排列的不同颜色的多个子像素。
其中，多路复用电路包括一输入端、三个控制端、三个第二输出端，多路复用电路进一步包括三个晶体管；其中，输入端分别与三个晶体管的漏极的连接，三个晶体管的栅极分别与三个控制端连接，三个晶体管的源极分别与三个第二输出端连接。
为解决上述技术问题，本发明采用的另一个技术方案是：提供一种基于液晶面板的驱动电路，该液晶面板包括按照矩阵排列的四色像素阵列，四色像素阵列中的每个像素包括两个不同颜色的子像素；其中，驱动电路包括源极驱动芯片和多个多路复用电路，源极驱动芯片用于提供多个源极驱动信号，每一多路复用电路用于接收一源极驱动信号并将该源极驱动信号分时传输至四色像素阵列中与该源极驱动信号对应的多个子像素列。
其中，源极驱动芯片包括多个第一输出端，多路复用电路包括一输入端、多个控终端和多个第二输出端，源极驱动芯片的一第一输出端与多路复用电路的输入端连接，多路复用电路的多个控制端分别接收多个控制信号，多路复用电路的多个第二输出端分别与四色像素阵列中的多个子像素列连接。
其中，多路复用电路包括一输入端、三个控制端、三个第二输出端，多路复用电路进一步包括三个晶体管；其中，输入端分别与三个晶体管的漏极的连接，三个晶体管的栅极分别与三个控制端连接，三个晶体管的源极分别与三个第二输出端连接。
其中，多路复用电路包括一输入端、六个控制端、六个第二输出端，多路复用电路进一步包括六个晶体管；其中，输入端分别与六个晶体管的漏极的连接，六个晶体管的栅极分别与六个控制端连接，六个晶体管的源极分别与六个第二输出端连接。
其中，四色像素阵列包括沿列方向排列的多个子像素行，每一子像素行包括沿行方向周期性排列的不同颜色的多个子像素。
其中，每一子像素行包括沿行方向按照红色子像素、绿色子像素、蓝色子像素和白色子像素周期性排列的多个子像素。
其中，形成一个像素的两个子像素为红色子像素、绿色子像素或者蓝色子像素、白色子像素。
其中，四色像素阵列包括沿列方向排列的多个子像素行，其中，每两行子像素行重复排列，奇数行子像素行包括沿行方向按照第一排列顺序周期性排列的多个子像素，偶数行子像素行包括沿行方向按照第二排列顺序周期性排列的多个子像素。
其中，四色像素阵列包括沿列方向排列的多个子像素行，每四行子像素行重复排列，其中，每四行子像素行中的第一行子像素行、第二行子像素行、第三行子像素行和第四子像素行分别包括沿行方向按照第一排列顺序、第二排列顺序、第三排列顺序和第四排列顺序周期性排列的多个子像素。
为解决上述问题，本发明提供的再一技术方案是：提供一种液晶面板，，该液晶面板包括按照矩阵排列的四色像素阵列，四色像素阵列中的每个像素包括两个不同颜色的子像素；该液晶面板包括驱动电路，该驱动电路包括源极驱动芯片和多个多路复用电路，源极驱动芯片用于提供多个源极驱动信号，每一多路复用电路用于接收一源极驱动信号并将该源极驱动信号分时传输至四色像素阵列中与该源极驱动信号对应的多个子像素列。
其中，源极驱动芯片包括多个第一输出端，多路复用电路包括一输入端、多个控终端和多个第二输出端，源极驱动芯片的一第一输出端与多路复用电路的输入端连接，多路复用电路的多个控制端分别接收多个控制信号，多路复用电路的多个第二输出端分别与四色像素阵列中的多个子像素列连接。
其中，多路复用电路包括一输入端、三个控制端、三个第二输出端，多路复用电路进一步包括三个晶体管；其中，输入端分别与三个晶体管的漏极的连接，三个晶体管的栅极分别与三个控制端连接，三个晶体管的源极分别与三个第二输出端连接。
其中，多路复用电路包括一输入端、六个控制端、六个第二输出端，多路复用电路进一步包括六个晶体管；其中，输入端分别与六个晶体管的漏极的连接，六个晶体管的栅极分别与六个控制端连接，六个晶体管的源极分别与六个第二输出端连接。
其中，四色像素阵列包括沿列方向排列的多个子像素行，每一子像素行包括沿行方向周期性排列的不同颜色的多个子像素。
其中，每一子像素行包括沿行方向按照红色子像素、绿色子像素、蓝色子像素和白色子像素周期性排列的多个子像素。
其中，形成一个像素的两个子像素为红色子像素、绿色子像素或者蓝色子像素、白色子像素。
其中，四色像素阵列包括沿列方向排列的多个子像素行，其中，每两行子像素行重复排列，奇数行子像素行包括沿行方向按照第一排列顺序周期性排列的多个子像素，偶数行子像素行包括沿行方向按照第二排列顺序周期性排列的多个子像素。
其中，四色像素阵列包括沿列方向排列的多个子像素行，每四行子像素行重复排列，其中，每四行子像素行中的第一行子像素行、第二行子像素行、第三行子像素行和第四子像素行分别包括沿行方向按照第一排列顺序、第二排列顺序、第三排列顺序和第四排列顺序周期性排列的多个子像素。
本发明的有益效果是：区别于现有技术的情况，本发明的基于液晶面板的驱动电路及液晶面板通过采用四色像素阵列且四色像素中每两个不同颜色的子像素作为一个像素，从而能够减少栅极驱动信号的数量，进而减少源极驱动芯片的尺寸。另外，由于多路复用电路的引入，一个源极驱动信号可以驱动多个子像素，从而可以进一步减少源极驱动信号，进而大大减少源极驱动芯片的尺寸。
【附图说明】
图1是本发明实施例的液晶面板的构示意图；
图2是图1所示液晶面板中多路复用电路的另一实施例的结构示意图；
图3是图1所示液晶面板中多路复用电路的再一实施例的结构示意图；
图4是图1所示液晶面板中四色像素阵列另一实施例的排列示意图；
图5是图1所示液晶面板中四色像素阵列再一实施例的排列示意图。
【具体实施方式】
下面结合附图和实施方式对本发明进行详细说明。
图1是本发明实施例的液晶面板的结构示意图。如图1所示，液晶面板100包括驱动电路1和按照矩阵排列的四色像素阵列2，其中，驱动电路1用于驱动四色像素阵列2，四色像素阵列2中的每个像素包括两个不同颜色的子像素。
其中，驱动电路1包括源极驱动芯片11和多个多路复用电路12。其中，源极驱动芯片11用于提供多个源极驱动信号Isource，每一多路复用电路12用于接收一源极驱动信号Isource并将该源极驱动信号Isource分时传输至四色像素阵列2中与该源极驱动信号Isource对应的多个子像素列。
其中，源极驱动芯片11包括多个第一输出端111。多路复用电路12包括一输入端121、多个控终端122和多个第二输出端123，源极驱动芯片11的一第一输出端111与多路复用电路12的输入端121连接，多路复用电路12的多个控制端122分别接收多个控制信号MUX1、MUX2、…MUXN，多路复用电路12的多个第二输出端123分别与四像素阵列2中的多个子像素列连接。
其中，四色像素阵列2包括沿列方向排列的多个子像素行21，每一子像素行21包括沿行方向周期性排列的不同颜色的多个子像素。在本实施例中，每一子像素行21包括沿行方向按照RGBW也即红色子像素、绿色子像素、蓝色像素、白色子像素的顺序周期性排列的多个子像素。其中，相邻的两个子像素形成一个像素，在本实施例中，形成一个像素的两个子像素为红色子像素、绿色子像素或者蓝色子像素、白色子像素。具体来说，以一行子像素行21来说，第一个像素包括第一红色子像素R1和第一绿色子像素G1，第二个像素包括第二蓝色子像素B2和第二白色子像素W2，第三个像素包括第三红色子像素R3和第三绿色子像素G3，第四个子像素包括第四蓝色子像素B4和第四白色子像素W4，依此类推，直至该子像素行的最后一个像素。
本领域的技术人员可以理解，在其它实施例中，四色像素阵列中的每一子像素行也可以按照GBWR、BWRG等等不同的顺序排列，本发明不以此为限。
在本实施例中，与现有技术相比，以实现N×M的分辨率来说，现有技术中的RGB显示屏，每一个像素点包括红色子像素、绿色子像素和蓝色子像素三个子像素，此时，源极驱动芯片需要提供3N个源极驱动信号。而本发明的RGBW显示屏，每一个像素点包括两个子像素，此时，源极驱动芯片仅仅需要提供2N个源极驱动信号。另外，由于多路复用电路的引入，一个源极驱动信号可以驱动多个子像素例如m个子像素，此时，源极驱动芯片仅仅需要提供2N/m个源极驱动信号，从而可以大大减少源极驱动芯片的尺寸，进而节省源极驱动芯片的成本。
请一并参考图2，图2是图1所示液晶面板中多路复用电路的另一实施例的结构示意图。如图2所示，多路复用电路12’包括一输入端121’、三个控终端122’和三个第二输出端123’，另外，多路复用电路12’的内部还包括三个晶体管124’。
其中，输入端121’与源极驱动芯片11的第一输出端111连接并接收源极驱动信号Isource后，分别与三个晶体管124’的漏极的连接，三个晶体管124’的栅极分别与三个控制端122’连接，用于接收三个不同的控制信号MUX1、MUX2和MUX3，三个晶体管124’的源极分别与三个第二输出端123’连接，以控制四色像素阵列2中的三列子像素列。
在本实施例中，以一子像素行为例来说，每一多路复用电路12’控制三个子像素。具体来说，第一个多路复用电路12’控制第一红色子像素R1、第一绿色子像素G1、第二蓝色子像素B2，第二个多路复用电路12控制第二白色子像素W2，第三红色子像素R3和第三绿色子像素G3，……依此类推。其中，第一红色子像素R1和第一绿色子像素G1形成第一像素，第二蓝色子像素B2和第二白色子像素W2形成第二像素，第三红色子像素R3和第三绿色子像素G3形成第三像素，……依此类推。
在本实施例中，控制信号MUX1用于控制三个子像素中的第一个子像素，控制信号MUX2用于控制三个子像素中的第二个子像素，控制信号MUX3用于控制三个子像素中的第三个子像素。
其中，控制信号MUX1、MUX2和MUX3分时有效，与控制信号MUX1、MUX2和MUX3相连的三个晶体管124’对应分时导通，从而使得源极驱动信号Isource分时传输到第一个、第二个和第三个子像素。
具体来说，以第一个多路复用电路12为例来说，当控制信号MUX1有效时，源极驱动信号Isource与第一红色子像素R1接通。当控制信号MUX2有效时，源极驱动信号Isource与第一绿色子像素G1接通。当控制信号MUX3有效时，源极驱动信号Isource与第二蓝色子像素B2接通。
在本实施例中，与现有技术相比，以实现N×M的分辨率来说，本发明的四色像素阵列2中每一个像素点包括两个子像素，两个子像素为红色子像素、绿色子像素或者蓝色子像素、白色子像素。其中，由于多路复用电路12’为一路输入三路输出的电路，也就是说多路复用电路12’可以实现一个源极驱动信号Isource驱动三个子像素。因此，源极驱动芯片11仅仅需要提供2N/3个源极驱动信号Isource，从而可以大大减少源极驱动芯片11的尺寸，进而节省源极驱动芯片11的生产成本。
请一并参考图3，图3是图1所示液晶面板中多路复用电路的再一实施例的结构示意图。如图3所示，多路复用电路12”包括一输入端121”、 六个控终端122”和六个第二输出端123”，另外，多路复用电路12”的内部还包括六个晶体管124”。
其中，输入端121”与源极驱动芯片11的第一输出端111连接接收源极驱动信号Isource后，分别与六个晶体管124”的漏极的连接，六个晶体管124”的栅极分别与六个控制端122”连接，用于接收六个不同的控制信号MUX1、MUX2、MUX3、MUX4、MUX5和MUX6，六个晶体管124”的源极分别与六个第二输出端123”连接，以控制四色像素阵列2中的六列子像素列。
在本实施例中，以一子像素行为例来说，每一多路复用电路12”控制六个子像素。具体来说，第一个多路复用电路12”控制第一红色子像素R1、第一绿色子像素G1、第二蓝色子像素B2、第二白色子像素W2，第三红色子像素R3和第三绿色子像素G3。第二个多路复用电路12控制第四蓝色子像素B4、第四白色子像素W4，第五红色子像素R5、第五绿色子像素G5、第六蓝色子像素B6、第六白色子像素W6，，……依此类推。其中，第一红色子像素R1、第一绿色子像素G1形成第一像素，第二蓝色子像素B2、第二白色子像素W2形成第二像素，第三红色子像素R3和第三绿色子像素G3形成第三像素，第四蓝色子像素B4、第四白色子像素W4形成第四像素，第五红色子像素R5、第五绿色子像素G5形成第五像素，第六蓝色子像素B6、第六白色子像素W6形成第六像素，……依此类推。
在本实施例中，控制信号MUX1用于控制六个子像素中的第一个子像素，控制信号MUX2用于控制六个子像素中的第二个子像素，控制信号MUX3用于控制六个子像素中的第三个子像素，控制信号MUX4用于控制六个子像素中的第四个子像素，控制信号MUX5用于控制六个子像素中的第五个子像素，控制信号MUX6用于控制六个子像素中的第六个子像素。
其中，控制信号MUX1、MUX2、MUX3、MUX4、MUX5和MUX6分时有效，与控制信号MUX1、MUX2、MUX3、MUX4、MUX5和MUX6相连的六个晶体管124”对应分时导通，从而使得源极驱动信号Isource分时传输到第一个、第二个、第三个、第四个、第五个和第六个子像素。
具体来说，以第一个多路复用电路12”为例来说，当控制信号MUX1有效时，源极驱动信号Isource与第一红色子像素R1接通。当控制信号MUX2有效时，源极驱动信号Isource与第一绿色子像素G1接通。当控制信号MUX3有效时，源极驱动信号Isource与第二蓝色子像素B2接通。当控制信号MUX4有效时，源极驱动信号Isource与第二白色子像素W2接通。当控制信号MUX5有效时，源极驱动信号Isource与第三红色子像素R3接通。当控制信号MUX6有效时，源极驱动信号Isource与第三绿色子像素G3接通。
在本实施例中，与现有技术相比，以实现N×M的分辨率来说，本发明的四色像素阵列2中每一个像素点包括两个子像素，两个子像素为红色子像素、绿色子像素或者蓝色子像素、白色子像素。其中，由于多路复用电路12”为一路输入六路输出的电路，也就是说多路复用电路12”可以实现一个源极驱动信号Isource驱动六个子像素。因此，源极驱动芯片11仅仅需要提供2N/6个源极驱动信号Isource，从而可以大大减少源极驱动芯片11的尺寸，进而节省源极驱动芯片11的生产成本。
图4是图1所示液晶面板中四色像素阵列另一实施例的排列示意图。如图4所示，四色像素阵列2’包括沿列方向排列的多个子像素行，其中，每两行子像素行重复排列，分别记为奇数行子像素行311和偶数行子像素行312，奇数行子像素行311包括沿行方向按照第一排列顺序周期性排列的多个子像素，偶数行子像素行312包括沿行方向按照第二排列顺序周期性排列的多个子像素。在本实施例中，奇数行子像素行311包括沿行方向按照RGBW的顺序周期性排列的多个子像素，偶数行子像素行312包括沿行方向按照BWRG的顺序周期性排列的多个子像素。
其中，形成一个像素的两个子像素为红色子像素、绿色子像素或者蓝色子像素、白色子像素。
本领域的技术人员可以理解，在其它实施例中，四色像素阵列2中的奇数行子像素行311和偶数行子像素行312也可以按照GBWR和WRGB、GBRW和RWGB等等的顺序排列，本发明不以此为限，只要保证每两行子像素行重复排列即可。
图5是图1所示液晶面板中四色像素阵列再一实施例的排列示意图。如图5所示，四色像素阵列2’”包括沿列方向排列的多个子像素行，每四行子像素行重复排列，其中，每四行子像素行中的第一行子像素行、第二行子像素行、第三行子像素行和第四子像素行分别包括沿行方向按照第一排列顺序、第二排列顺序、第三排列顺序和第四排列顺序周期性排列的多个子像素。
在本实施例中，每四行子像素行中的第一行子像素行411、第二行子像素412、第三行子像素行413和第四子像素行414分别包括沿行方向按照RGBW、WRGB、RWGB和GBWR的顺序周期性排列的多个子像素。
其中，形成一个像素的两个子像素为红色子像素、绿色子像素或者蓝色子像素、白色子像素白色子像素、红色子像素或者绿色子像素、蓝色子像素或者红色子像素、白色子像素。
本领域的技术人员可以理解，在其它实施例中，四色像素阵列2’”中重复排列的四行子像素行也可以沿行方向按照其它的四色顺序周期性排列，本发明不以此为限。
本发明的有益效果是：区别于现有技术的情况，本发明的基于液晶面板的驱动电路及液晶面板通过采用四色像素阵列且四色像素中每两个不同颜色的子像素作为一个像素，从而能够减少栅极驱动信号的数量，进而减少源极驱动芯片的尺寸。另外，由于多路复用电路的引入，一个源极驱动信号可以驱动多个子像素，从而可以进一步减少源极驱动信号，进而大大减少源极驱动芯片的尺寸。
以上所述仅为本发明的实施方式，并非因此限制本发明的专利范围，凡是利用本发明说明书所作的等效结构或等效流程变换，或直接或间接运用在其他相关的技术领域，均同理包括在本发明的专利保护范围内。

Claims (20)

  1. 一种基于液晶面板的驱动电路，其中，所述液晶面板包括按照矩阵排列的四色像素阵列，所述四色像素阵列中的每个像素包括两个不同颜色的子像素；
    其中，所述驱动电路包括源极驱动芯片和多个多路复用电路，所述源极驱动芯片用于提供多个源极驱动信号，每一所述多路复用电路用于接收一所述源极驱动信号并将该源极驱动信号分时传输至所述四色像素阵列中与该源极驱动信号对应的多个子像素列；
    其中，所述源极驱动芯片包括多个第一输出端，所述多路复用电路包括一输入端、多个控终端和多个第二输出端，所述源极驱动芯片的一所述第一输出端与所述多路复用电路的所述输入端连接，所述多路复用电路的所述多个控制端分别接收多个控制信号，所述多路复用电路的多个所述第二输出端分别与所述四色像素阵列中的多个子像素列连接；
    其中，所述四色像素阵列包括沿列方向排列的多个子像素行，每一子像素行包括沿行方向周期性排列的不同颜色的多个子像素。
  2. 根据权利要求1所述的驱动电路，其中，所述多路复用电路包括一输入端、三个控制端、三个第二输出端，所述多路复用电路进一步包括三个晶体管；
    其中，所述输入端分别与三个所述晶体管的漏极的连接，三个所述晶体管的栅极分别与三个所述控制端连接，三个所述晶体管的源极分别与三个所述第二输出端连接。
  3. 一种基于液晶面板的驱动电路，其中，所述液晶面板包括按照矩阵排列的四色像素阵列，所述四色像素阵列中的每个像素包括两个不同颜色的子像素；
    其中，所述驱动电路包括源极驱动芯片和多个多路复用电路，所述源极驱动芯片用于提供多个源极驱动信号，每一所述多路复用电路用于接收一所述源极驱动信号并将该源极驱动信号分时传输至所述四色像素阵列中与该源极驱动信号对应的多个子像素列。
  4. 根据权利要求3所述的驱动电路，其中，所述源极驱动芯片包括多个第一输出端，所述多路复用电路包括一输入端、多个控终端和多个第二输出端，所述源极驱动芯片的一所述第一输出端与所述多路复用电路的所述输入端连接，所述多路复用电路的所述多个控制端分别接收多个控制信号，所述多路复用电路的多个所述第二输出端分别与所述四色像素阵列中的多个子像素列连接。
  5. 根据权利要求4所述的驱动电路，其中，所述多路复用电路包括一输入端、三个控制端、三个第二输出端，所述多路复用电路进一步包括三个晶体管；
    其中，所述输入端分别与三个所述晶体管的漏极的连接，三个所述晶体管的栅极分别与三个所述控制端连接，三个所述晶体管的源极分别与三个所述第二输出端连接。
  6. 根据权利要求4所述的驱动电路，其中，所述多路复用电路包括一输入端、六个控制端、六个第二输出端，所述多路复用电路进一步包括六个晶体管；
    其中，所述输入端分别与六个所述晶体管的漏极的连接，六个所述晶体管的栅极分别与六个所述控制端连接，六个所述晶体管的源极分别与六个所述第二输出端连接。
  7. 根据权利要求3所述的驱动电路，其中，所述四色像素阵列包括沿列方向排列的多个子像素行，每一子像素行包括沿行方向周期性排列的不同颜色的多个子像素。
  8. 根据权利要求7所述的驱动电路，其中，每一所述子像素行包括沿行方向按照红色子像素、绿色子像素、蓝色子像素和白色子像素周期性排列的多个子像素。
  9. 根据权利要求8所述的驱动电路，其中，形成一个像素的两个所述子像素为红色子像素、绿色子像素或者蓝色子像素、白色子像素。
  10. 根据权利要求3所述的驱动电路，其中，所述四色像素阵列包括沿列方向排列的多个子像素行，其中，每两行子像素行重复排列，奇数行子像素行包括沿行方向按照第一排列顺序周期性排列的多个子像素，偶数行子像素行包括沿行方向按照第二排列顺序周期性排列的多个子像素。
  11. 根据权利要求3所述的驱动电路，其中，所述四色像素阵列包括沿列方向排列的多个子像素行，每四行子像素行重复排列，其中，每四行子像素行中的第一行子像素行、第二行子像素行、第三行子像素行和第四子像素行分别包括沿行方向按照第一排列顺序、第二排列顺序、第三排列顺序和第四排列顺序周期性排列的多个子像素。
  12. 一种液晶面板，其中，所述液晶面板包括按照矩阵排列的四色像素阵列，所述四色像素阵列中的每个像素包括两个不同颜色的子像素；
    所述液晶面板包括驱动电路，所述驱动电路包括源极驱动芯片和多个多路复用电路，所述源极驱动芯片用于提供多个源极驱动信号，每一所述多路复用电路用于接收一所述源极驱动信号并将该源极驱动信号分时传输至所述四色像素阵列中与该源极驱动信号对应的多个子像素列。
  13. 根据权利要求12所述的液晶面板，其中，所述源极驱动芯片包括多个第一输出端，所述多路复用电路包括一输入端、多个控终端和多个第二输出端，所述源极驱动芯片的一所述第一输出端与所述多路复用电路的所述输入端连接，所述多路复用电路的所述多个控制端分别接收多个控制信号，所述多路复用电路的多个所述第二输出端分别与所述四色像素阵列中的多个子像素列连接。
  14. 根据权利要求13所述的液晶面板，其中，所述多路复用电路包括一输入端、三个控制端、三个第二输出端，所述多路复用电路进一步包括三个晶体管；
    其中，所述输入端分别与三个所述晶体管的漏极的连接，三个所述晶体管的栅极分别与三个所述控制端连接，三个所述晶体管的源极分别与三个所述第二输出端连接。
  15. 根据权利要求13所述的液晶面板，其中，所述多路复用电路包括一输入端、六个控制端、六个第二输出端，所述多路复用电路进一步包括六个晶体管；
    其中，所述输入端分别与六个所述晶体管的漏极的连接，六个所述晶体管的栅极分别与六个所述控制端连接，六个所述晶体管的源极分别与六个所述第二输出端连接。
  16. 根据权利要求12所述的液晶面板，其中，所述四色像素阵列包括沿列方向排列的多个子像素行，每一子像素行包括沿行方向周期性排列的不同颜色的多个子像素。
  17. 根据权利要求16所述的液晶面板，其中，每一所述子像素行包括沿行方向按照红色子像素、绿色子像素、蓝色子像素和白色子像素周期性排列的多个子像素。
  18. 根据权利要求17所述的液晶面板，其中，形成一个像素的两个所述子像素为红色子像素、绿色子像素或者蓝色子像素、白色子像素。
  19. 根据权利要求12所述的液晶面板，其中，所述四色像素阵列包括沿列方向排列的多个子像素行，其中，每两行子像素行重复排列，奇数行子像素行包括沿行方向按照第一排列顺序周期性排列的多个子像素，偶数行子像素行包括沿行方向按照第二排列顺序周期性排列的多个子像素。
  20. 根据权利要求12所述的液晶面板，其中，所述四色像素阵列包括沿列方向排列的多个子像素行，每四行子像素行重复排列，其中，每四行子像素行中的第一行子像素行、第二行子像素行、第三行子像素行和第四子像素行分别包括沿行方向按照第一排列顺序、第二排列顺序、第三排列顺序和第四排列顺序周期性排列的多个子像素。
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