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WO2017032269A1 - 电压转换电路、方法和多相并联电源系统 - Google Patents

电压转换电路、方法和多相并联电源系统 Download PDF

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Publication number
WO2017032269A1
WO2017032269A1 PCT/CN2016/095950 CN2016095950W WO2017032269A1 WO 2017032269 A1 WO2017032269 A1 WO 2017032269A1 CN 2016095950 W CN2016095950 W CN 2016095950W WO 2017032269 A1 WO2017032269 A1 WO 2017032269A1
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Prior art keywords
power transistor
turned
energy storage
voltage
storage element
Prior art date
Application number
PCT/CN2016/095950
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English (en)
French (fr)
Inventor
黄晨
Original Assignee
华为技术有限公司
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Filing date
Publication date
Application filed by 华为技术有限公司 filed Critical 华为技术有限公司
Priority to BR112018003286-7A priority Critical patent/BR112018003286A2/zh
Priority to EP16838528.4A priority patent/EP3340449A4/en
Publication of WO2017032269A1 publication Critical patent/WO2017032269A1/zh
Priority to US15/902,782 priority patent/US10164536B2/en
Priority to US16/198,408 priority patent/US20190097538A1/en

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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of DC power input into DC power output
    • H02M3/02—Conversion of DC power input into DC power output without intermediate conversion into AC
    • H02M3/04—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters
    • H02M3/10—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/156—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
    • H02M3/158—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of DC power input into DC power output
    • H02M3/02—Conversion of DC power input into DC power output without intermediate conversion into AC
    • H02M3/04—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters
    • H02M3/10—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/156—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
    • H02M3/158—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
    • H02M3/1582—Buck-boost converters
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of DC power input into DC power output
    • H02M3/02—Conversion of DC power input into DC power output without intermediate conversion into AC
    • H02M3/04—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters
    • H02M3/10—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/156—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
    • H02M3/158—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
    • H02M3/1584—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load with a plurality of power processing stages connected in parallel
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/01—Shaping pulses
    • H03K5/04—Shaping pulses by increasing duration; by decreasing duration
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K7/00—Modulating pulses with a continuously-variable modulating signal
    • H03K7/08—Duration or width modulation ; Duty cycle modulation
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/0003—Details of control, feedback or regulation circuits
    • H02M1/0025—Arrangements for modifying reference values, feedback values or error values in the control loop of a converter
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of DC power input into DC power output
    • H02M3/02—Conversion of DC power input into DC power output without intermediate conversion into AC
    • H02M3/04—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters
    • H02M3/10—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/156—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
    • H02M3/158—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
    • H02M3/1584—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load with a plurality of power processing stages connected in parallel
    • H02M3/1586—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load with a plurality of power processing stages connected in parallel switched with a phase shift, i.e. interleaved

Definitions

  • Embodiments of the present invention relate to electronic technologies, and in particular, to a voltage conversion circuit, a method, and a multi-phase parallel power supply system.
  • a DC-DC (Direct Current, DC for short) converter is a circuit topology that converts an input DC voltage into an output DC voltage.
  • DC-DC converters can be divided into main types such as boost type (BOOST), step-down type (BUCK) and buck-boost type (BUCK-BOOST).
  • BOOST boost type
  • BUCK step-down type
  • BUCK-BOOST buck-boost type
  • the general low-power DC-DC converter adopts a buck (BUCK) and boost (BOOST) structure.
  • the BUCK DC-DC converter has higher conversion efficiency and is more energy-saving. The efficiency can reach more than 80%, and it has been widely used in mobile base stations and consumer terminals.
  • PWM pulse width modulation
  • PFM pulse frequency modulation
  • the PWM modulation mode of the DC-DC converter is further divided into a voltage mode control mode, a current mode control mode, and a hysteresis mode control mode.
  • the current mode controlled DC-DC structure can fix the frequency and is suitable for multi-phase parallel connection, but the structure is complex, the anti-noise ability is poor, and the load transient response is poor;
  • the voltage mode controlled DC-DC can also fix the frequency, but it is not suitable for many.
  • Parallel connection the internal compensation circuit is complex and wasteful area; while the hysteresis mode controlled DC-DC circuit has a simple structure and the load transient response speed is fast, but the frequency is difficult to fix.
  • Embodiments of the present invention provide a voltage conversion circuit, a method, and a multi-phase parallel power supply system to solve the problem that the operating frequency of the hysteresis mode DC-DC converter in the prior art is not fixed.
  • an embodiment of the present invention provides a voltage conversion circuit for converting a first DC voltage into a second DC voltage, including: a sub voltage conversion circuit and a feedback loop;
  • the sub voltage conversion circuit includes a power transistor, a first energy storage element, and a second energy storage element for controlling the first energy storage element and the second by controlling conduction and deactivation of the power transistor
  • the energy storage element receives and stores energy of the first DC voltage, thereby outputting the second DC voltage at a connection end of the first energy storage element and the second energy storage element;
  • the feedback loop includes a sampling and amplifying circuit, a feedback circuit and a comparison circuit;
  • the sampling and amplifying circuit is configured to sample the second DC voltage, and input the sampled sampling signal into the comparison circuit;
  • the feedback The circuit is configured to sample the second DC voltage, and synthesize the sampled second DC voltage and the frequency controllable triangular wave signal into a frequency controllable feedback ripple signal, and the frequency controllable feedback ripple signal Inputting the comparison circuit;
  • the comparison circuit is configured to compare the sampling signal with the frequency controllable feedback ripple signal, and output a frequency controllable pulse width modulation PWM signal;
  • the frequency controllable PWM signal is used to control the on and off of the power transistor, and the frequency of the frequency controllable PWM signal is the same as the frequency of the frequency controllable feedback ripple signal.
  • the feedback circuit includes a triangular wave signal generator, a frequency control sub-circuit, and a DC control sub-circuit;
  • the triangular wave signal generator is configured to generate the frequency controllable triangular wave signal; the frequency control subcircuit is configured to make the frequency of the frequency controllable feedback ripple signal the same as the frequency of the frequency controllable triangular wave signal.
  • the DC control sub-circuit is configured to control a DC component voltage of the frequency controllable feedback ripple signal according to the second DC voltage and a DC component of the frequency controllable triangular wave signal.
  • the frequency control sub-circuit includes a first capacitor and a second capacitor, the straight The flow control subcircuit includes a first resistor and a second resistor;
  • the triangular wave signal generator is connected to the comparison circuit through the first capacitor, and the second capacitor is connected to the comparison circuit and a connection end between the first energy storage element and the second energy storage element
  • the first resistor is connected between the comparison circuit and the connection end of the first energy storage element and the second energy storage element, and the second resistor is connected to the comparison circuit and the ground. between.
  • the sampling and amplifying circuit includes a voltage dividing sampling circuit and an error amplifying circuit
  • the voltage dividing sampling circuit is configured to perform partial voltage sampling on the second DC voltage to obtain a voltage dividing sampling signal, and input the voltage dividing sampling signal into the error amplifying circuit; the error amplifying circuit is used for comparing the Deriving the divided voltage sampling signal and a predetermined reference voltage signal, amplifying the difference signal of the divided voltage sampling signal and the preset reference voltage signal to obtain the sampling signal, and inputting the sampling signal into the Compare circuits.
  • the voltage dividing sampling circuit includes a third resistor and a fourth resistor, where the third resistor is connected Between the error amplifying circuit and the connection end of the first energy storage element and the second energy storage element, the fourth resistor is connected between the error amplifying circuit and the ground.
  • the feedback loop further includes a logic circuit and a driving circuit, An output end of the comparison circuit is sequentially connected to the power transistor through the logic circuit and the driving circuit;
  • the logic circuit is configured to compare the frequency controllable PWM signal with a preset control logic signal to obtain a control signal for controlling the power transistor to be turned on and off, and the driving circuit is configured to use the control signal It is converted into a drive signal having a current drive capability, and the drive signal is used to control the turn-on and turn-off of the power transistor.
  • the power transistor includes a first power transistor and a second Power transistor
  • the second power transistor is turned off when the first power transistor is turned on, and the second power transistor is turned on when the first power transistor is turned off;
  • the first energy storage element and the second energy storage element are coupled to the first power transistor and the second power transistor, and are turned on by the first power transistor and turned off by the second power transistor And charging the second energy storage element by the first DC voltage through the first energy storage element; the second energy storage when the first power transistor is turned off and the second power transistor is turned on An element is discharged through the second power transistor through the first energy storage element.
  • the power transistor includes a first power transistor and a second Power transistor
  • the second power transistor is turned off when the first power transistor is turned on, and the second power transistor is turned on when the first power transistor is turned off;
  • the first energy storage element and the second energy storage element are coupled to the first power transistor and the second power transistor, and are turned on by the first power transistor and turned off by the second power transistor And storing energy by the first DC voltage through the first energy storage element, the second energy storage element discharging, when the first power transistor is turned off and the second power transistor is turned on, A first energy storage element releases energy through the second power transistor, and the second energy storage element is charged by the first energy storage element and the first DC voltage.
  • the power transistor includes a first power transistor, and a second a power transistor, a third power tube, and a fourth power tube;
  • the second power transistor is turned off when the first power transistor is turned on, the second power transistor is turned on when the first power transistor is turned off, and the fourth power transistor is turned on at the third power transistor Turning off, the fourth power transistor is turned on when the third power transistor is turned off;
  • the first energy storage element and the second energy storage element are coupled to the third power transistor and the fourth power transistor, and the first energy storage element is further coupled to the first power transistor and The second power transistor is coupled;
  • the third power transistor When the first power transistor is turned on and the second power transistor is turned off, the third power transistor is turned on, the fourth power transistor is turned off, and the first DC voltage is passed by the first energy storage.
  • the element stores energy, the second energy storage element is discharged, the third power transistor is turned off, the fourth power transistor is turned on, and the first energy storage element releases energy through the fourth power transistor, Charging the second energy storage element with the first energy storage element and the first DC voltage;
  • the third power transistor When the third power transistor is turned off and the fourth power transistor is turned on, the first power transistor is turned on, the second power transistor is turned off, and the first direct current voltage is passed through the first energy storage element pair.
  • the second energy storage element is charged, the first power transistor is turned off, the second power transistor is turned on, and the second energy storage element is discharged through the second power transistor through the first energy storage element.
  • an embodiment of the present invention provides a multi-phase parallel power supply system, including: the plurality of voltage conversion circuits according to the first aspect, the first to the eighth possible implementation manners of the first aspect ;
  • the frequency of the frequency controllable triangular wave signal of each of the voltage conversion circuits is the same, and the phase difference of the frequency controllable triangular wave signal of the voltage conversion circuit of the adjacent phase is 360° divided by The number of voltage conversion circuits;
  • Each of the voltage conversion circuits shares one of the sampling and amplifying circuits.
  • an embodiment of the present invention provides a method for voltage conversion, including:
  • connection terminal outputs a second DC voltage
  • the frequency controllable PWM signal is used to control the on and off of the power transistor, and the frequency of the frequency controllable PWM signal is the same as the frequency of the frequency controllable feedback ripple signal.
  • the frequency controllable triangular wave signal is generated, and the frequency of the frequency controllable feedback ripple signal and the frequency controllable triangular wave are generated.
  • the frequency of the signal is the same;
  • the sampling the second DC voltage to obtain the sampling signal includes:
  • the method further includes:
  • the control signal is converted into a drive signal having a current drive capability, and the drive signal is used to control the turn-on and turn-off of the power transistor.
  • the power transistor includes a first power transistor and a second a power transistor, wherein the first power storage element and the second energy storage element are controlled to receive and store energy of the first direct current voltage by controlling on and off of the power transistor, including:
  • the power transistor includes the first a power transistor and a second power transistor; the controlling the power transistor to be turned on and off to control the first energy storage element and the second energy storage element to receive and store the energy of the first DC voltage, including:
  • the first power transistor When the first power transistor is turned on and the second power transistor is turned off, energy is stored by the first DC voltage through the first energy storage element, and the second energy storage element is discharged.
  • the first energy storage element releases energy through the second power transistor, and the first energy storage element and the first DC voltage pair The second energy storage element is charged.
  • the power transistor includes a first power transistor, and a second a power transistor, a third power tube, and a fourth power tube; the controlling the power transistor to be turned on and off to control the first energy storage element and the second energy storage element to receive and store the energy of the first DC voltage, including:
  • the third power transistor When the first power transistor is turned on and the second power transistor is turned off, the third power transistor is turned on, the fourth power transistor is turned off, and the first DC voltage is passed by the first energy storage.
  • the element stores energy, the second energy storage element is discharged, the third power transistor is turned off, the fourth power transistor is turned on, and the first energy storage element releases energy through the fourth power transistor, Charging the second energy storage element with the first energy storage element and the first DC voltage;
  • the third power transistor When the third power transistor is turned off and the fourth power transistor is turned on, the first power transistor is turned on, the second power transistor is turned off, and the first direct current voltage is passed through the first energy storage element pair.
  • the second energy storage element is charged, the first power transistor is turned off, the second power transistor is turned on, and the second energy storage element is discharged through the second power transistor through the first energy storage element.
  • the voltage conversion circuit, the method and the multi-phase parallel power supply system of the embodiment of the invention provide a frequency-controllable feedback ripple signal through the feedback circuit, so that the operating frequency of the voltage conversion circuit of the present embodiment is controllable, can meet the load-to-frequency requirement, and is hysteretic
  • the mode does not need to compensate for the fast response speed, and since the operating frequency is fixed, the voltage conversion circuit of the embodiment can be applied to the multi-phase parallel power supply system to meet the application scenario of the large load current.
  • FIG. 1 is a schematic structural view of a first embodiment of a voltage conversion circuit according to the present invention.
  • FIG. 2 is a schematic structural diagram of a feedback circuit of the present invention
  • Embodiment 2 of a voltage conversion circuit according to the present invention
  • FIG. 4 is a schematic diagram showing the working waveforms of key nodes in the voltage conversion circuit of the present invention.
  • Embodiment 3 is a schematic structural diagram of Embodiment 3 of a voltage conversion circuit according to the present invention.
  • Embodiment 4 of a voltage conversion circuit according to the present invention
  • FIG. 7 is a schematic structural view of a multiphase parallel power supply system according to the present invention.
  • Figure 8 is a flow chart of a method of voltage conversion of the present invention.
  • the embodiment of the present invention can implement a frequency-controllable voltage conversion circuit.
  • the “frequency controllable” in the embodiment of the present invention specifically refers to any fixed frequency, and may be, for example, 5HZ, 8HZ, and 8HZ.
  • Flexible design according to the requirements of the voltage conversion circuit load It is not a fixed unique value. For example, when the frequency requirement of the load is 5 Hz, then the voltage conversion circuit of the embodiment of the present invention can perform voltage conversion at an operating frequency of 5 Hz, and the operating frequency thereof does not change during the operation of the circuit.
  • FIG. 1 is a schematic structural diagram of a first embodiment of a voltage conversion circuit according to the present invention. As shown in FIG. 1, the voltage conversion circuit of the embodiment is configured to convert a first DC voltage into a second DC voltage.
  • the voltage conversion circuit of this embodiment may be Including: sub voltage conversion circuit and feedback loop.
  • the sub-voltage conversion circuit may include a power transistor (PMOS, NMOS shown in FIG. 1, not limited thereto as shown in FIG. 1, for example, the power transistor may be a triode, an IGBT, etc.), the first energy storage element. (L 1 ) and a second energy storage element (C 0 ) for controlling the first energy storage element (L 1 ) and the second energy storage element by controlling conduction and deactivation of the power transistor (C 0 ) receiving and storing energy of the first direct current voltage, thereby outputting the second direct current at a connection end of the first energy storage element (L 1 ) and the second energy storage element (C 0 ) Voltage (V O ).
  • a power transistor PMOS, NMOS shown in FIG. 1, not limited thereto as shown in FIG. 1, for example, the power transistor may be a triode, an IGBT, etc.
  • the first energy storage element. (L 1 ) and a second energy storage element (C 0 ) for controlling the first energy storage element (L 1
  • FIG. 1 is schematically illustrated by a BUCK type DC-DC conversion circuit, and the connection relationship between the power transistor of the present embodiment and the first energy storage element (L 1 ) is not limited as shown in FIG. 1 .
  • the voltage conversion circuit of this embodiment may be of the BUCK type, the BOOST type (refer to the embodiment shown in FIG. 5) and the BUCK-BOOST type (see the embodiment shown in FIG. 6 for details).
  • the principle is that the first energy storage element and the second energy storage element are charged and discharged by the power transistor, thereby converting the first DC voltage to the second output. DC voltage.
  • the feedback loop includes a sampling and amplifying circuit, a feedback circuit, and a comparison circuit; the sampling and amplifying circuit is configured to sample the second DC voltage, and input the sampled sampled signal into the comparison circuit;
  • the feedback circuit is configured to sample the second DC voltage, and synthesize the sampled second DC voltage and the frequency controllable triangular wave signal into a frequency controllable feedback ripple signal, and the frequency controllable feedback pattern
  • the wave signal is input to the comparison circuit;
  • the comparison circuit is configured to compare the sampling signal with the frequency controllable feedback ripple signal, and output a frequency controllable pulse width modulation PWM signal.
  • the frequency controllable PWM signal is used to control the on and off of the power transistor, and the frequency of the frequency controllable PWM signal is the same as the frequency of the frequency controllable feedback ripple signal.
  • the second DC voltage (V O ) is sampled by the sampling and amplifying circuit, and V EA_OUT is output as an input voltage signal of the comparison circuit.
  • the feedback circuit may sample the second DC voltage (V O), and a second DC voltage (V O) and the sampling frequency controllable synthesized wave signal is frequency-controllable feedback triangular ripple signal V FB_COMP, And the V FB_COMP is a triangular wave signal, and the comparison circuit compares V FB_COMP with V EA_OUT to output a frequency-controlled pulse width modulated PWM signal to adjust the output second DC voltage (V O ).
  • the voltage conversion circuit is exemplified as a BUCK type, that is, the pulse width modulation PWM signal controlled by the frequency is used to control the on or off of the power switch tubes (PMOS and NMOS), specifically, when the PMOS is turned on and the NMOS is turned off, when the first energy storage element (L 1) and the second energy storage element (C 0) is charged by the input power provided V I, off the PMOS, the NMOS is turned on, a first energy storage element (L 1) and a second The energy storage element (C 0 ) is discharged through the NMOS. That is, the switching frequency of the voltage conversion circuit of the present embodiment is controlled by the frequency controllable PWM signal, thereby converting the input voltage V I into the output voltage V O .
  • the switching frequency of the voltage conversion circuit of the present embodiment is controlled by the frequency controllable PWM signal, thereby converting the input voltage V I into the output voltage V O .
  • the voltage conversion circuit of the present embodiment can control the frequency of V FB_COMP through the feedback circuit, thereby realizing controllable switching frequency of the voltage conversion circuit for hysteresis mode control.
  • the feedback circuit of the present implementation may include:
  • a triangular wave signal generator a frequency control sub-circuit, and a DC control sub-circuit
  • the triangular wave signal generator is configured to generate the frequency controllable triangular wave signal Ripple;
  • the frequency control subcircuit is configured to make the frequency of the frequency controllable feedback ripple signal and the frequency controllable triangular wave signal The frequency is the same;
  • the DC control sub-circuit is configured to control a DC component voltage of the frequency controllable feedback ripple signal according to the second DC voltage and a DC component of the frequency controllable triangular wave signal.
  • the frequency control sub-circuit includes a first capacitor (C 1 ) and a second capacitor (C 2 ), and the DC control sub-circuit includes a first resistor (R 1 ) and a second resistor (R 2 );
  • the triangular wave signal generator is connected to the comparison circuit through the first capacitor (C 1 ), and the second capacitor (C 2 ) is connected to the comparison circuit and the first energy storage element and the first Between the connection ends of the two energy storage elements, the first resistor (R 1 ) is connected between the comparison circuit and the connection end of the first energy storage element and the second energy storage element, A two resistor (R 2 ) is connected between the comparison circuit and the ground.
  • the voltage signal is a frequency controllable feedback ripple signal V FB_COMP
  • V FB_COMP is a superposition of V Ripple and V O
  • V Ripple is a frequency controllable triangular wave voltage signal
  • V O is a DC voltage signal, according to the superposition theorem, V Ripple and V O are shorted to ground respectively, and the corresponding expression is calculated.
  • V FB_COMP consists of two parts, one part is determined by V Ripple and the other part is determined by V O , when s ⁇ 0, A(s) ⁇ 0, which is related to V Ripple in the above formula (1). This part is 0, and the expression of V FB_COMP is as in formula (2).
  • V FB_COMP the DC portion of V FB_COMP is determined by the voltage division of V O .
  • the first capacitor (C 1 ) blocks the DC portion of the frequency controllable triangular wave signal Ripple such that the DC portion of V FB_COMP is only related to V O
  • the second capacitor ( C 2 ) blocks V O .
  • the DC part makes the AC part of V FB_COMP only related to the frequency controllable triangular wave signal Ripple, and since the frequency of the frequency controllable triangular wave signal Ripple is controllable, the frequency of V FB_COMP is controllable.
  • the frequency controllable triangular wave signal comprises a fixed frequency triangular wave signal.
  • the frequency controllable feedback voltage signal comprises a fixed frequency feedback voltage signal.
  • the feedback circuit of the embodiment of the present invention is applied to a hysteresis mode controlled DC-DC converter. Since the V Ripple in the feedback circuit of the embodiment of the present invention is frequency controllable, the frequency controllable feedback ripple signal V can be known by the above analysis.
  • the frequency of FB_COMP is controllable and its DC component remains the same as the traditional hysteresis mode, as determined by the output voltage signal. Therefore, the feedback circuit of the embodiment of the invention can realize the controllable switching frequency of the hysteresis mode controlled DC-DC converter and has strong transient response capability.
  • the switching frequency of the DC-DC converter is fixed.
  • the DC-DC converter controlled by the BUCK-type hysteresis mode is exemplified below.
  • the feedback circuit of the present invention can also be applied to the DC of the BOOST-type hysteresis mode control.
  • a DC converter see the embodiment shown in Fig. 5
  • a BUCK-BOOST type hysteresis mode controlled DC-DC converter see the embodiment shown in Fig. 6) to achieve a fixed switching frequency.
  • Embodiment 2 of a voltage conversion circuit is a schematic structural diagram of Embodiment 2 of a voltage conversion circuit according to the present invention.
  • This embodiment is a specific embodiment of applying the feedback circuit shown in FIG. 2 to a DC-DC converter controlled by a BUCK type hysteresis mode, as shown in FIG. 3.
  • the comparison circuit of the embodiment is exemplified by a comparator (CMP).
  • the voltage conversion circuit of this embodiment may include:
  • PMOS First power transistor
  • NMOS second power transistor
  • L 1 inductor
  • C 0 capacitor
  • CMP comparator
  • sampling and amplifying circuit and logic circuit (LOG) and driving circuit (DRI).
  • the sampling and amplifying circuit may include a voltage dividing sampling circuit and an error amplifying circuit (EA); the voltage dividing sampling circuit is configured to perform voltage dividing sampling on the second DC voltage to obtain a voltage dividing sampling signal V FB , And inputting the divided voltage sampling signal V FB into the error amplifying circuit (EA); the error amplifying circuit (EA) is used for comparing the divided sampling signal V FB and a preset reference voltage signal V REF , The difference signal of the divided voltage sampling signal V FB and the preset reference voltage signal V REF is amplified to obtain the sampling signal V EA_OUT_ , and the sampling signal V EA_OUT_ is input to the comparison circuit (CMP).
  • EA error amplifying circuit
  • Dividing said sampling circuit comprises a third resistor and a fourth resistor R 3 R 4, the third resistor R 3 connected to the error amplifying circuit (EA) and the first energy storage element (L 1) and the Between the terminals of the second energy storage element (C 0 ), the fourth resistor R 4 is connected between the error amplifying circuit (EA) and the ground.
  • sampling and amplifying circuits (R 3 , R 4 and EA) shown in FIG. 3 are only schematically illustrated, and the sampling and amplifying circuits of the embodiments of the present invention are not limited thereto.
  • An output of the comparison circuit (CMP) is sequentially connected to the power transistor through the logic circuit (LOG) and the driving circuit (DRI); the logic circuit (LOG) is used to control the frequency Comparing the PWM signal with a preset control logic signal to obtain a control signal for controlling the power transistor to be turned on and off, the driving circuit (DRI) for converting the control signal into a driving signal having a current driving capability, And using the driving signal to control the on and off of the power transistor.
  • the power transistor comprises a first power crystal Tube (PMOS) and second power transistor (NMOS).
  • the inductance (L 1 ) and the capacitance (C 0 ) are respectively used as the first energy storage element and the second energy storage element in the above embodiment.
  • the feedback circuit includes a first capacitor C 1 , a second capacitor C 2 , a first resistor R 1 , a second resistor R 2 , and a triangular wave signal generator for generating a frequency-controlled triangular wave signal Ripple.
  • the connection relationship of the components in the feedback circuit is specifically: a first capacitor C 1 and a second capacitor C 2 connected in series with each other, and one end of the first capacitor C 1 and the second capacitor C 2 connected in series and the fixed frequency are controllable
  • the triangular wave signal Ripple is connected, and the other end is connected to the output node, the voltage of the output node is V 0 ;
  • the first resistor R 1 and the second resistor R 2 are connected in series with each other, and the first resistor R 1 and the second resistor connected in series with each other
  • One end of the R 2 is connected to the output node, and the other end is grounded, wherein a node between the first capacitor C 1 and the second capacitor C 2 is connected to a node between the first resistor R 3 and the second resistor R 4 , that is, the present
  • the feedback circuit of the embodiment has the same structure as the feedback circuit shown in FIG.
  • the specific connection relationship of the voltage conversion circuit of this embodiment is a first power transistor (PMOS) and a second power transistor (NMOS) connected in series with each other, the first terminal of the first power transistor (PMOS) and the anode of the input voltage source V I is connected, a second terminal of the first power transistor (PMOS) is connected to a second terminal of the second power transistor (NMOS) at a first connection point, and a third terminal of the first power transistor (PMOS) is a first terminal of the second power transistor (NMOS) is connected at a second connection point LX, a third terminal of the second power transistor (NMOS) is grounded; one end of the inductor L 1 is connected at a second connection point, and One end is connected to the output node; a comparator (CMP) and an error amplifier (EA) are connected in series, and the output of the comparator (CMP) is connected at the first connection point, and the first input of the comparator (CMP) is a node connection between the first capacitor (C 1 ) and
  • the first power transistor PMOS and the second power transistor NMOS in this embodiment may be a MOS transistor, the first power transistor PMOS is a P-type MOS transistor, and the second power transistor NMOS is an N-type MOS transistor, corresponding, One terminal is a drain, the second terminal is a gate, and the third terminal is a source, that is, the drain of the first power transistor PMOS is connected to the input voltage positive V I , and the source thereof is connected to the drain of the second power transistor NMOS The gate is connected to the gate of the second power transistor NMOS, and the source of the second power transistor NMOS is grounded.
  • the first power transistor and the second power transistor in the embodiment may also be a triode, the first power transistor is a PNP type transistor, and the second power transistor is an NPN type triode, correspondingly, the first terminal is set The electrode, the second terminal is a base, and the third terminal is an emitter, that is, the collector of the first power transistor is connected to the input voltage positive V I , and the emitter thereof is connected to the collector of the second power transistor, and the base and the The base of the two power transistors is connected, and the emitter of the second power transistor is grounded.
  • the specific working mode of the voltage conversion circuit of this embodiment is that the feedback circuit provides a fixed frequency feedback ripple signal (V FB_COMP ), and the V FB_COMP is compared with V EA_OUT to output a fixed frequency pulse width modulated PWM signal.
  • V FB_COMP fixed frequency feedback ripple signal
  • the first power transistor (PMOS) When the fixed frequency PWM signal is high, the first power transistor (PMOS) is turned on, the second power transistor (NMOS) is turned off, and the input voltage V I charges the inductor (L 1 ) and the capacitor (C 0 ), after that,
  • the fixed frequency PWM signal When the fixed frequency PWM signal is turned to a low level, the first power transistor (PMOS) is turned off, the second power transistor (NMOS) is turned on, and the inductor (L 1 ) and the capacitor (C 0 ) are discharged, that is, the fixed frequency is passed.
  • the PWM signal controls the switching frequency of the voltage conversion circuit of the present embodiment, thereby converting the input voltage V I to the output voltage V O .
  • the voltage conversion circuit of the embodiment couples the triangular wave signal of the fixed frequency through the feedback circuit, so that the operating frequency of the voltage conversion circuit of the present embodiment is fixed, which can meet the load requirement of the fixed frequency, and the hysteresis mode does not need compensation, the response speed is fast, and at the same time, due to the operating frequency Fixed, so the voltage conversion circuit of the embodiment can be applied to a multi-phase parallel power supply system to meet the application scenario of large load current.
  • FIG 4 is a schematic diagram of the node key operation waveform voltage converting circuit to the invention, shown in Figure 4, wherein the triangular waveform in FIG. 3 is a first capacitor C 1 and the operating waveform of the node between the second capacitor C, the comparison The operating waveform of the first input V FB_COMP of the CMP, when the output of the error amplifier EA is V EA_OUT , then the output of the comparator CMP (PWM pulse width modulated output) is the solid square wave in FIG.
  • V FB_COMP passes through V EA_OUT , the PWM signal is turned to a high level, and accordingly, the first power transistor PMOS in FIG. 3 is turned on, and the second power transistor NMOS is turned off; when V FB_COMP is over V EA_OUT The PWM signal is turned to a low level. Correspondingly, the first power transistor PMOS of FIG. 3 is turned off, and the second power transistor NMOS is turned on.
  • V FB_COMP and V EA_OUT The relative position of the PWM pulse width modulator output signal obtained by comparing V FB_COMP and V EA_OUT does not change, and its frequency is determined by the frequency of V FB_COMP .
  • the voltage conversion circuit of the above embodiment of the present invention has a fixed operating frequency.
  • the duty ratio of the PWM pulse width modulation signal output by the comparator CMP of the embodiment of the present invention can be controlled by the output of the error amplifier EA. Specifically, when the relative positions of V FB_COMP and V EA_OUT change, As shown in FIG. 4, the V EA_OUT moves up to V' EA_OUT , and the PWM pulse width modulation signal output by the comparator CMP is adjusted to the square wave of the dotted line in FIG. 4, and the PWM pulse width modulation signal outputted by the comparator accounts for The air ratio changes to adjust the on-time and off-time of the first power transistor and the second power transistor to ensure that the output voltage tends to be stable.
  • the duty cycle can be expressed as Equation (3).
  • the gain of the PWM pulse width modulation signal in the voltage conversion circuit of the present invention is the same as the gain calculation method of the common voltage mode, and the size of the V RAMP determines the gain of the portion, then, by adjusting the AC of the V FB_COMP By adjusting the peak-to-peak value of the component ripple, the V FB_COMP loop gain and bandwidth in the hysteresis mode DC-DC conversion circuit of the present invention can be adjusted to improve the transient response capability.
  • the operating frequency of the voltage conversion circuit of the embodiment of the present invention is more easily upgraded, thereby realizing a hysteresis mode DC-DC conversion circuit with high frequency and high transient performance.
  • FIG. 5 is a schematic structural diagram of Embodiment 3 of a voltage conversion circuit according to the present invention.
  • the feedback circuit shown in FIG. 2 is applied to a DC-DC converter controlled by a BOOST type hysteresis mode.
  • the voltage conversion circuit of the embodiment is applied to a BO-type hysteresis mode controlled DC-DC converter through a feedback circuit, and the switching frequency of the hysteresis mode controlled DC-DC converter can be controlled, so that the embodiment
  • the BOOST-type hysteresis mode controlled DC-DC converter has a controllable operating frequency, which can meet the load requirement of a fixed frequency, and the hysteresis mode does not need to be compensated, the response speed is fast, and since the operating frequency is fixed, the voltage conversion of the embodiment can be performed.
  • the circuit is applied in a multi-phase parallel power supply system to meet the application scenario of large load current.
  • the feedback circuit provides a frequency controllable feedback ripple signal (V FB_COMP ), and the V FB_COMP and V EA_OUT are compared to output a frequency controllable pulse width modulation PWM signal, when the frequency is controllable PWM
  • the signal is high, the first power transistor (PMOS) is turned on, and the second power transistor (NOMS) is turned off, so that the first DC voltage passes through the first energy storage element (L 1 ) to the second energy storage element (C 0 ).
  • Embodiment 4 of a voltage conversion circuit according to the present invention is a specific embodiment of applying the feedback circuit shown in FIG. 2 to a BUCK-BOOST hysteresis mode controlled DC-DC converter.
  • the voltage conversion circuit of the embodiment is applied to the BUCK-BOOST hysteresis mode controlled DC-DC converter through the feedback circuit, and the switching frequency of the hysteresis mode controlled DC-DC converter can be controlled, so that the BUCK-BOOST of the present embodiment is implemented.
  • the hysteresis mode controlled DC-DC converter has controllable operating frequency, which can meet the load requirement of fixed frequency, and the hysteresis mode does not need compensation, the response speed is fast, and the operating voltage is fixed, so the voltage conversion circuit of the embodiment can be applied.
  • the multi-phase parallel power supply system it meets the application scenario of large load current.
  • the feedback circuit provides a frequency controllable feedback ripple signal (V FB_COMP ), and the V FB_COMP is respectively provided to two comparators (CMP 1 and CMP 2 ), and the comparator (CMP 1 ) V FB_COMP compares with V C1 and outputs a frequency controllable pulse width modulation PWM signal to control the turning on or off of the third power transistor (PMOS2) and the fourth power transistor (NMOS2), and the comparator (CMP 2 ) will V FB_COMP compares with V C2 and outputs a frequency controllable pulse width modulation PWM signal to control the on or off of the first power transistor (PMOS1) and the second power transistor (NMOS1) when the first power transistor (PMOS1) When the second power transistor (NMOS1) is turned off, the circuit shown in FIG.
  • V IN stores energy through the first energy storage element (L 1 ), discharges the second energy storage element (C 0 ), controls the third power transistor (PMOS 2) to be turned off, and the fourth power transistor (NMOS 2) is turned on, first The energy storage element (L 1 ) passes through the fourth power transistor (NMOS 2 The energy is released, and the second energy storage element (C 0 ) is charged by the first energy storage element (L 1 ) and the first DC voltage (V IN ).
  • the circuit shown in FIG. 6 is a step-down circuit, that is, the first power transistor (PMOS1) is turned on, and the second power transistor (NMOS1) is controlled. Turning off, causing the first DC voltage (V IN ) to charge the second energy storage element (C 0 ) through the first energy storage element (L 1 ), controlling the first power transistor (PMOS 1) to be turned off, and second a power transistor (NMOS1) is turned on, the second energy storage element (C 0) passing through the first energy storage element (L 1) is discharged through the second power transistor (NMOS1).
  • the switching frequency of the voltage conversion circuit of the present embodiment is controlled by the frequency controllable PWM signal, thereby converting the input voltage V IN into the output voltage V O .
  • the multi-phase parallel power supply system of the embodiment of the present invention includes a plurality of voltage conversion circuits shown in FIG. 3, wherein each of the voltage conversion circuits The frequency of the frequency controllable triangular wave signal is the same, and the phase difference of the frequency controllable triangular wave signal of the voltage conversion circuit of the adjacent phase is 360° divided by the number of the voltage conversion circuit; The voltage conversion circuit shares one of the sampling and amplifying circuits.
  • each of the voltage conversion circuits uses a driving circuit and a logic circuit separately.
  • the input voltage sources of the respective voltage conversion circuits are the same.
  • the number of the voltage conversion circuits may be two, three, etc., which are exemplified by two, that is, two voltage conversion circuits according to the embodiments of the present invention realize parallel two-phase parallel power supply systems in parallel
  • the phase of the fixed frequency triangular wave signal in the two voltage conversion circuits is 180°
  • the phase of the square wave of the PWM pulse width modulation output in the two voltage conversion circuits is also 180°, that is, the phase difference between Ripple1 and Ripple2 is 180°.
  • a plurality of voltage conversion circuits shown in FIG. 3 are applied to a multi-phase parallel structure to meet a large load current application scenario.
  • the equivalent inductance of the multi-phase parallel structure is equal to the single-phase inductance value divided by the number of phases.
  • the switching frequency of the multi-phase parallel structure is equivalent to the single-phase switching frequency multiplied by the number of phases, so that the multi-phase parallel structure can greatly improve the response speed of the loop.
  • FIG. 8 is a flowchart of a method for voltage conversion according to the present invention. As shown in FIG. 8, the method of the present invention may include:
  • Step 801 by controlling conduction and deactivation of the power transistor, to control the first energy storage element and the second energy storage element to receive and store energy of the first DC voltage, thereby at the first energy storage element and the second The connection end of the energy storage element outputs a second DC voltage.
  • Step 802 Sample the second DC voltage to obtain a sampling signal.
  • Step 803 Sample the second DC voltage, and synthesize the sampled second DC voltage and the frequency controllable triangular wave signal into a frequency controllable feedback ripple signal.
  • Step 804 Compare the sampling signal with the frequency controllable feedback ripple signal, and output a frequency controllable pulse width modulation PWM signal.
  • the frequency controllable PWM signal is used to control the on and off of the power transistor, and the frequency of the frequency controllable PWM signal is the same as the frequency of the frequency controllable feedback ripple signal.
  • the frequency of the frequency controllable feedback ripple signal being the same as the frequency of the frequency controllable triangular wave signal; according to the second DC voltage and the The DC component of the frequency controllable triangular wave signal controls the DC component voltage of the frequency controllable feedback ripple signal.
  • the step 802 may be: performing voltage division sampling on the second DC voltage to obtain a divided voltage sampling signal; comparing the divided voltage sampling signal and a preset reference voltage signal, and dividing the voltage sampling signal And amplifying the difference between the predetermined reference voltage signal to obtain the sampling signal.
  • the method may further include: the frequency controllable PWM signal and the preset Comparing the control logic signals to obtain a control signal for controlling the power transistor to be turned on and off; converting the control signal into a driving signal having a current driving capability, and controlling the conduction of the power transistor using the driving signal And deadline.
  • the power transistor may include a first power transistor and a second power transistor
  • the step 801 controls the power source transistor to be turned on and off to control the first energy storage element and the second energy storage element to receive and store.
  • the energy of the first DC voltage may specifically include: controlling the second power transistor to be turned off when the first power transistor is turned on, and controlling the second power transistor to be turned on when the first power transistor is turned off; When the first power transistor is turned on and the second power transistor is turned off, causing the first DC voltage to charge the second energy storage element through the first energy storage element; when the first power transistor is turned off, The second energy storage element is discharged through the second power transistor through the first energy storage element when the second power transistor is turned on.
  • the power transistor may include a first power transistor and a second power transistor; and the step 801 controls controlling the power transistor to be turned on and off to control the first energy storage element and the second energy storage element to receive and store.
  • the energy of the first DC voltage may specifically include: controlling the second power transistor to be turned off when the first power transistor is turned on, and controlling the second power transistor to be turned on when the first power transistor is turned off; When the first power transistor is turned on and the second power transistor is turned off, energy is stored by the first DC voltage through the first energy storage element, and the second energy storage element is discharged, in the first When the power transistor is turned off and the second power transistor is turned on, the first energy storage element releases energy through the second power transistor, and the first energy storage element and the first DC voltage pair The two energy storage elements are charged.
  • the power transistor may include a first power transistor, a second power transistor, a third power tube, and a fourth power tube; and the step 801 controls the power storage transistor to turn on and off to control the first energy storage.
  • the receiving and storing the energy of the first DC voltage by the component and the second energy storage component may include: controlling the second power transistor to be turned off when the first power transistor is turned on, and controlling the second power transistor to be in the Turning on when the first power transistor is turned off, controlling the fourth power transistor to be turned off when the third power transistor is turned on, and controlling the fourth power transistor to be turned on when the third power transistor is turned off;
  • the third power is turned on, the second power transistor is turned off, the third power
  • the transistor is turned on, the fourth power transistor is turned off, energy is stored by the first DC voltage through the first energy storage element, the second energy storage element is discharged, and the third power transistor is turned off, the first a four power transistor is turned on, the first energy storage element releasing energy through the fourth power transistor, and charging the second energy
  • the method of the present embodiment can be used to implement the technical solution of the method embodiment shown in FIG. 1 to FIG. 7.
  • the implementation principle and technical effects are similar, and details are not described herein again.
  • the aforementioned program can be stored in a computer readable storage medium.
  • the program when executed, performs the steps including the foregoing method embodiments; and the foregoing storage medium includes various media that can store program codes, such as a ROM, a RAM, a magnetic disk, or an optical disk.

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Abstract

一种电压转换电路、方法和多相并联电源系统，通过反馈电路提供频率可控的反馈纹波信号，使得电压转换电路工作频率可控，满足负载对频率需求，并且迟滞模式无需补偿响应速度快。同时由于工作频率固定，可以将电压转换电路应用于多相并联电源系统中，使其满足大负载电流的应用场景。

Description

电压转换电路、方法和多相并联电源系统 技术领域
本发明实施例涉及电子技术，尤其涉及一种电压转换电路、方法和多相并联电源系统。
背景技术
DC-DC(Direct Current，简称DC)变换器是将输入直流电压转换为输出直流电压的电路拓扑。根据系统升降压的特性，DC-DC变换器可以分为：升压型(BOOST)、降压型(BUCK)以及升降压型(BUCK-BOOST)等主要几类。而一般小功率的DC-DC变换器采用降压式(BUCK)和升压式(BOOST)的结构，与传统线性电源系统相比，BUCK式DC-DC变换器的转换效率更高，更加节能，效率可达80％以上，在移动基站，消费类终端的各产品中都得到了广泛的使用。
在现有的较成熟的DC-DC变换器中，通常利用脉冲宽度调制(Pulse Width Modulation，简称PWM)、脉冲频率调制(Pulse Frequency Modulation，简称PFM)等调制方式，使得DC-DC变换器应用到不同工作条件下都能保持稳定的性能。而DC-DC变换器PWM调制方式又分为电压模式控制方式、电流模式控制方式以及迟滞模式控制方式。其中，电流模式控制的DC-DC结构可固定频率，适合多相并联，但是结构复杂，抗噪声能力差，负载瞬态响应差；电压模式控制的DC-DC也可固定频率，但不适合多相并联，内部补偿电路复杂且较浪费面积；而迟滞模式控制的DC-DC电路结构简单，负载瞬态响应速度快，但是频率很难固定。
现今的商用电源系统中，特别是消费类终端，其对电源系统的转换效率和瞬态响应能力的要求越来越高，电流模式控制的DC-DC变换器和电压模式控制的DC-DC变换器由于结构限制，已经不能满足客户的要求，而迟滞模式控制的DC-DC变换器由于其工作频率很难固定，不能满足对于频率较为敏感的负载要求。
发明内容
本发明实施例提供一种电压转换电路、方法和多相并联电源系统，以解决现有技术中的迟滞模式DC-DC变换器的工作频率不固定的问题。
第一方面，本发明实施例提供一种电压转换电路，用于将第一直流电压转换为第二直流电压；包括：子电压转换电路和反馈回路；
所述子电压转换电路包括功率晶体管、第一能量存储元件和第二能量存储元件，用于通过控制所述功率晶体管的导通和截止，以控制所述第一能量存储元件和所述第二能量存储元件接收和存储所述第一直流电压的能量，从而在所述第一能量存储元件与所述第二能量存储元件的连接端输出所述第二直流电压；
所述反馈回路包括采样及放大电路、反馈电路和比较电路；所述采样及放大电路用于对所述第二直流电压进行采样，并将采样获取的采样信号输入所述比较电路；所述反馈电路用于采样所述第二直流电压，并将采样的所述第二直流电压和频率可控的三角波信号合成为频率可控的反馈纹波信号，将所述频率可控的反馈纹波信号输入所述比较电路；所述比较电路用于将所述采样信号和所述频率可控的反馈纹波信号进行比较，输出频率可控的脉冲宽度调制PWM信号；
其中，所述频率可控的PWM信号用于控制所述功率晶体管的导通和截止，所述频率可控的PWM信号的频率与所述频率可控的反馈纹波信号的频率相同。
结合第一方面，在第一方面的第一种可能的实现方式中，所述反馈电路包括三角波信号发生器、频率控制子电路和直流控制子电路；
所述三角波信号发生器用于生成所述频率可控的三角波信号；所述频率控制子电路用于使所述频率可控的反馈纹波信号的频率与所述频率可控的三角波信号的频率相同；所述直流控制子电路用于根据所述第二直流电压和所述频率可控的三角波信号的直流分量控制所述频率可控的反馈纹波信号的直流分量电压。
结合第一方面的第一种可能的实现方式，在第一方面的第二种可能的实现方式中，所述频率控制子电路包括第一电容和第二电容，所述直 流控制子电路包括第一电阻和第二电阻；
所述三角波信号发生器通过所述第一电容与所述比较电路连接，所述第二电容连接在所述比较电路和所述第一能量存储元件与所述第二能量存储元件的连接端之间，所述第一电阻连接在所述比较电路和所述第一能量存储元件与所述第二能量存储元件的连接端之间，所述第二电阻连接在所述比较电路和接地端之间。
结合第一方面、第一方面的第一种可能的实现方式或者第一方面的第二种可能的实现方式，在第一方面的第三种可能的实现方式中，所述采样及放大电路包括分压采样电路和误差放大电路；
所述分压采样电路用于对所述第二直流电压进行分压采样，得到分压采样信号，并将所述分压采样信号输入所述误差放大电路；所述误差放大电路用于比较所述分压采样信号和一预设参考电压信号，将所述分压采样信号和所述预设参考电压信号的差值信号进行放大后得到所述采样信号，并将所述采样信号输入所述比较电路。
结合第一方面的第三种可能的实现方式，在第一方面的第四种可能的实现方式中，所述分压采样电路包括第三电阻和第四电阻，所述第三电阻连接在所述误差放大电路和所述第一能量存储元件与所述第二能量存储元件的连接端之间，所述第四电阻连接在所述误差放大电路和和接地端之间。
结合第一方面、第一方面的第一种至第四种任一种可能的实现方式，在第一方面的第五种可能的实现方式中，所述反馈回路还包括逻辑电路和驱动电路，所述比较电路的输出端依次通过所述逻辑电路和所述驱动电路与所述功率晶体管连接；
所述逻辑电路用于将所述频率可控的PWM信号和预设的控制逻辑信号进行比较，得到控制所述功率晶体管导通和截止的控制信号，所述驱动电路用于将所述控制信号转换为具有电流驱动能力的驱动信号，并使用所述驱动信号控制所述功率晶体管的导通和截止。
结合第一方面、第一方面的第一种至第五种任一种可能的实现方式，在第一方面的第六种可能的实现方式中，所述功率晶体管包括第一功率晶体管和第二功率晶体管；
所述第二功率晶体管在所述第一功率晶体管导通时截止，所述第二功率晶体管在所述第一功率晶体管截止时导通；
所述第一能量存储元件和所述第二能量存储元件，与所述第一功率晶体管及所述第二功率晶体管耦合，并在所述第一功率晶体管导通、所述第二功率晶体管截止时，使第一直流电压经过所述第一能量存储元件对所述第二能量存储元件充电；在所述第一功率晶体管截止、所述第二功率晶体管导通时，所述第二能量存储元件经过所述第一能量存储元件通过所述第二功率晶体管放电。
结合第一方面、第一方面的第一种至第五种任一种可能的实现方式，在第一方面的第七种可能的实现方式中，所述功率晶体管包括第一功率晶体管和第二功率晶体管；
所述第二功率晶体管在所述第一功率晶体管导通时截止，所述第二功率晶体管在所述第一功率晶体管截止时导通；
所述第一能量存储元件和所述第二能量存储元件，与所述第一功率晶体管及所述第二功率晶体管耦合，并在所述第一功率晶体管导通、所述第二功率晶体管截止时，由所述第一直流电压通过所述第一能量存储元件存储能量，所述第二能量存储元件放电，在所述第一功率晶体管截止、所述第二功率晶体管导通时，所述第一能量存储元件通过所述第二功率晶体管释放能量，由所述第一能量存储元件和所述第一直流电压对所述第二能量存储元件充电。
结合第一方面、第一方面的第一种至第五种任一种可能的实现方式，在第一方面的第八种可能的实现方式中，所述功率晶体管包括第一功率晶体管、第二功率晶体管、第三功率管和第四功率管；
所述第二功率晶体管在所述第一功率晶体管导通时截止，所述第二功率晶体管在所述第一功率晶体管截止时导通，所述第四功率晶体管在所述第三功率晶体管导通时截止，所述第四功率晶体管在所述第三功率晶体管截止时导通；
所述第一能量存储元件和所述第二能量存储元件，与所述第三功率晶体管及所述第四功率晶体管耦合，并且，所述第一能量存储元件还与所述第一功率晶体管及所述第二功率晶体管耦合；
在所述第一功率晶体管导通、所述第二功率晶体管截止时，所述第三功率晶体管导通、所述第四功率晶体管截止，由所述第一直流电压通过所述第一能量存储元件存储能量，所述第二能量存储元件放电，所述第三功率晶体管截止、所述第四功率晶体管导通，所述第一能量存储元件通过所述第四功率晶体管释放能量，由所述第一能量存储元件和所述第一直流电压对所述第二能量存储元件充电；
在所述第三功率晶体管截止、所述第四功率晶体管导通时，所述第一功率晶体管导通、所述第二功率晶体管截止，使第一直流电压经过所述第一能量存储元件对所述第二能量存储元件充电，所述第一功率晶体管截止、所述第二功率晶体管导通，所述第二能量存储元件经过所述第一能量存储元件通过所述第二功率晶体管放电。
第二方面，本发明实施例提供一种多相并联电源系统，包括：多个如第一方面、第一方面的第一种至第八种任一种可能实现的方式的所述电压转换电路；
其中，各个所述电压转换电路的所述频率可控的三角波信号的频率相同，且相邻相位的所述电压转换电路的所述频率可控的三角波信号的相位差为360°除以所述电压转换电路的个数；
各个所述电压转换电路共用一个所述采样及放大电路。
第三方面，本发明实施例提供一种电压转换的方法，包括：
通过控制功率晶体管的导通和截止，以控制第一能量存储元件和第二能量存储元件接收和存储第一直流电压的能量，从而在所述第一能量存储元件与所述第二能量存储元件的连接端输出第二直流电压；
对所述第二直流电压进行采样，获取采样信号；
采样所述第二直流电压，并将采样的所述第二直流电压和频率可控的三角波信号合成为频率可控的反馈纹波信号；
将所述采样信号和所述频率可控的反馈纹波信号进行比较，输出频率可控的脉冲宽度调制PWM信号；
其中，所述频率可控的PWM信号用于控制所述功率晶体管的导通和截止，所述频率可控的PWM信号的频率与所述频率可控的反馈纹波信号的频率相同。
结合第三方面，在第三方面的第一种可能的实现方式中，生成所述频率可控的三角波信号，使所述频率可控的反馈纹波信号的频率与所述频率可控的三角波信号的频率相同；
根据所述第二直流电压和所述频率可控的三角波信号的直流分量控制所述频率可控的反馈纹波信号的直流分量电压。
结合第三方面或者第三方面的第一种可能的实现方式，在第三方面的第二种可能的实现方式中，所述对所述第二直流电压进行采样，获取采样信号，包括：
对所述第二直流电压进行分压采样，得到分压采样信号；
比较所述分压采样信号和一预设参考电压信号，将所述分压采样信号和所述预设参考电压信号的差值进行放大后得到所述采样信号。
结合第三方面或者第三方面的第一种或者第三方面的第二种可能的实现方式，在第三方面的第三种可能的实现方式中，所述方法还包括：
将所述频率可控的PWM信号和预设的控制逻辑信号进行比较，得到控制所述功率晶体管导通和截止的控制信号；
将所述控制信号转换为具有电流驱动能力的驱动信号，并使用所述驱动信号控制所述功率晶体管的导通和截止。
结合第三方面、第三方面的第一种至第三种任一种可能的实现方式，在第三方面的第四种可能的实现方式中，所述功率晶体管包括第一功率晶体管和第二功率晶体管，所述通过控制功率晶体管的导通和截止，以控制第一能量存储元件和第二能量存储元件接收和存储第一直流电压的能量，包括：
控制所述第二功率晶体管在所述第一功率晶体管导通时截止，控制所述第二功率晶体管在所述第一功率晶体管截止时导通；
在所述第一功率晶体管导通、所述第二功率晶体管截止时，使第一直流电压经过所述第一能量存储元件对所述第二能量存储元件充电；在所述第一功率晶体管截止、所述第二功率晶体管导通时，所述第二能量存储元件经过所述第一能量存储元件通过所述第二功率晶体管放电。
结合第三方面、第三方面的第一种至第三种任一种可能的实现方式，在第三方面的第五种可能的实现方式中，所述功率晶体管包括第一 功率晶体管和第二功率晶体管；所述通过控制功率晶体管的导通和截止，以控制第一能量存储元件和第二能量存储元件接收和存储第一直流电压的能量，包括：
控制所述第二功率晶体管在所述第一功率晶体管导通时截止，控制所述第二功率晶体管在所述第一功率晶体管截止时导通；
在所述第一功率晶体管导通、所述第二功率晶体管截止时，由所述第一直流电压通过所述第一能量存储元件存储能量，所述第二能量存储元件放电，在所述第一功率晶体管截止、所述第二功率晶体管导通时，所述第一能量存储元件通过所述第二功率晶体管释放能量，由所述第一能量存储元件和所述第一直流电压对所述第二能量存储元件充电。
结合第三方面、第三方面的第一种至第三种任一种可能的实现方式，在第三方面的第六种可能的实现方式中，所述功率晶体管包括第一功率晶体管、第二功率晶体管、第三功率管和第四功率管；所述通过控制功率晶体管的导通和截止，以控制第一能量存储元件和第二能量存储元件接收和存储第一直流电压的能量，包括：
控制所述第二功率晶体管在所述第一功率晶体管导通时截止，控制所述第二功率晶体管在所述第一功率晶体管截止时导通，控制所述第四功率晶体管在所述第三功率晶体管导通时截止，控制所述第四功率晶体管在所述第三功率晶体管截止时导通；
在所述第一功率晶体管导通、所述第二功率晶体管截止时，所述第三功率晶体管导通、所述第四功率晶体管截止，由所述第一直流电压通过所述第一能量存储元件存储能量，所述第二能量存储元件放电，所述第三功率晶体管截止、所述第四功率晶体管导通，所述第一能量存储元件通过所述第四功率晶体管释放能量，由所述第一能量存储元件和所述第一直流电压对所述第二能量存储元件充电；
在所述第三功率晶体管截止、所述第四功率晶体管导通时，所述第一功率晶体管导通、所述第二功率晶体管截止，使第一直流电压经过所述第一能量存储元件对所述第二能量存储元件充电，所述第一功率晶体管截止、所述第二功率晶体管导通，所述第二能量存储元件经过所述第一能量存储元件通过所述第二功率晶体管放电。
本发明实施例电压转换电路、方法和多相并联电源系统，通过反馈电路提供频率可控的反馈纹波信号，使得本实施的电压转换电路工作频率可控，可以满足负载对频率需求，并且迟滞模式无需补偿响应速度快，同时由于工作频率固定，所以可以将本实施例的电压转换电路应用于多相并联电源系统中，使其满足大负载电流的应用场景
附图说明
为了更清楚地说明本发明实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作一简单地介绍，显而易见地，下面描述中的附图是本发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动性的前提下，还可以根据这些附图获得其他的附图。
图1为本发明电压转换电路实施例一的结构示意图；
图2为本发明反馈电路结构示意图；
图3为本发明电压转换电路实施例二的结构示意图；
图4为本发明电压转换电路中关键节点工作波形示意图；
图5为本发明电压转换电路实施例三的结构示意图；
图6为本发明电压转换电路实施例四的结构示意图；
图7为本发明多相并联电源系统结构示意图；
图8为本发明电压转换的方法的流程图。
具体实施方式
为使本发明实施例的目的、技术方案和优点更加清楚，下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
本发明实施例可以实现一种频率可控的电压转换电路，需要说明的是，本发明实施例中的“频率可控”具体指任一固定频率，例如可以是5HZ、8HZ以及8HZ等，可以根据电压转换电路负载的需求进行灵活设 置，其并非为一固定唯一值。举例而言，当负载的频率需求为5HZ时，那么本发明实施例的电压转换电路可以以5HZ的工作频率进行电压转换，电路工作过程中其工作频率不会改变。
图1为本发明电压转换电路实施例一的结构示意图，如图1所示，本实施例的电压转换电路用于将第一直流电压转换为第二直流电压，本实施例的电压转换电路可以包括：子电压转换电路和反馈回路。
其中，所述子电压转换电路可以包括功率晶体管(图1中所示PMOS、NMOS，此处不以图1所示的作为限制，例如功率晶体管可以是三极管、IGBT等)、第一能量存储元件(L1)和第二能量存储元件(C0)，用于通过控制所述功率晶体管的导通和截止，以控制所述第一能量存储元件(L1)和所述第二能量存储元件(C0)接收和存储所述第一直流电压的能量，从而在所述第一能量存储元件(L1)与所述第二能量存储元件(C0)的连接端输出所述第二直流电压(VO)。
需要说明的是，图1以BUCK型DC-DC变换电路做示意性说明，本实施例的功率晶体管与第一能量存储元件(L1)的连接关系并不以图1所示作为限制。本实施例的电压转换电路可以是BUCK型、BOOST型(具体可参见图5所示实施例)和BUCK-BOOST型(具体可参见图6所示实施例)。但是无论本实施例的电压转换电路是上述哪一种类型，其原理均是通过功率晶体管使得第一能量存储元件和第二能量存储元件充电以及放电，从而将第一直流电压转换输出为第二直流电压。
其中，所述反馈回路包括采样及放大电路、反馈电路和比较电路；所述采样及放大电路用于对所述第二直流电压进行采样，并将采样获取的采样信号输入所述比较电路；所述反馈电路用于采样所述第二直流电压，并将采样的所述第二直流电压和频率可控的三角波信号合成为频率可控的反馈纹波信号，将所述频率可控的反馈纹波信号输入所述比较电路；所述比较电路用于将所述采样信号和所述频率可控的反馈纹波信号进行比较，输出频率可控的脉冲宽度调制PWM信号。
其中，所述频率可控的PWM信号用于控制所述功率晶体管的导通和截止，所述频率可控的PWM信号的频率与所述频率可控的反馈纹波信号的频率相同。
具体的，通过所述采样及放大电路对所述第二直流电压(VO)进行采样，输出VEA_OUT作为比较电路的一输入电压信号。反馈电路也可以对所述第二直流电压(VO)进行采样，并将采样的第二直流电压(VO)和频率可控的三角波信号合成为频率可控的反馈纹波信号VFB_COMP，并且该VFB_COMP为三角波信号，比较电路将VFB_COMP与VEA_OUT进行比较输出一频率可控的脉冲宽度调制PWM信号，以调节输出的第二直流电压(VO)。
以电压转换电路为BUCK型进行举例说明，即利用该频率可控的脉冲宽度调制PWM信号控制功率开关管(PMOS和NMOS)的导通或截止，具体的，在PMOS导通、NMOS截止时，由提供VI的输入电源对第一能量存储元件(L1)与第二能量存储元件(C0)充电，在PMOS截止、NMOS导通时，第一能量存储元件(L1)和第二能量存储元件(C0)通过NMOS放电。即通过该频率可控的PWM信号控制本实施例的电压转换电路的开关频率，从而将输入电压VI转换为输出电压VO。
与传统的迟滞模式控制的DC-DC电路相比，本实施例的电压转换电路可以通过反馈电路使得VFB_COMP的频率可控，从而实现迟滞模式控制的电压转换电路的开关频率可控。
图2为本发明反馈电路结构示意图，如图2所示，本实施的反馈电路可以包括：
三角波信号发生器、频率控制子电路和直流控制子电路；
其中，所述三角波信号发生器用于生成所述频率可控的三角波信号Ripple；所述频率控制子电路用于使所述频率可控的反馈纹波信号的频率与所述频率可控的三角波信号的频率相同；所述直流控制子电路用于根据所述第二直流电压和所述频率可控的三角波信号的直流分量控制所述频率可控的反馈纹波信号的直流分量电压。
具体的，所述频率控制子电路包括第一电容(C1)和第二电容(C2)，所述直流控制子电路包括第一电阻(R1)和第二电阻(R2)；
所述三角波信号发生器通过所述第一电容(C1)与所述比较电路连接，所述第二电容(C2)连接在所述比较电路和所述第一能量存储元件与所述第二能量存储元件的连接端之间，所述第一电阻(R1)连接在所述比较电路和所述第一能量存储元件与所述第二能量存储元件的连接端之间，所 述第二电阻(R2)连接在所述比较电路和接地端之间。
如图2所示，第一电容(C1)和第二电容(C2)之间的节点与第一电阻(R1)和第二电阻(R2)之间的节点连接的节点处的电压信号为频率可控的反馈纹波信号VFB_COMP，VFB_COMP为VRipple和VO的叠加，VRipple为一频率可控的三角波电压信号，VO为一直流电压信号，根据叠加定理，将VRipple与VO分别对地短路，计算出相应表达式，相加后得到VFB_COMP的s域表达式为公式(1)。
Figure PCTCN2016095950-appb-000001
由公式(1)可以看出，VFB_COMP由两部分组成，一部分由VRipple决定，一部分由VO决定，当s→0，A(s)→0，上述公式(1)中与VRipple有关这部分为0，VFB_COMP的表达式如公式(2)。
Figure PCTCN2016095950-appb-000002
即，VFB_COMP的直流部分由VO的分压决定。
根据上述分析可知，第一电容(C1)阻隔了频率可控的三角波信号Ripple的直流部分，使得VFB_COMP的直流部分仅与VO有关，而第二电容(C2)阻隔了VO的直流部分，使得VFB_COMP的交流部分仅与频率可控的三角波信号Ripple有关，进而由于频率可控的三角波信号Ripple的频率可控，所以VFB_COMP的频率可控。
可选的，所述频率可控的三角波信号包括固定频率的三角波信号，相应的，所述频率可控的反馈电压信号包括固定频率的反馈电压信号。
本发明实施例的反馈电路应用于迟滞模式控制的DC-DC变换器中，由于本发明实施例的反馈电路中的VRipple为频率可控，通过上述分析可知频率可控的反馈纹波信号VFB_COMP的频率可控，且其直流分量保持与传统迟滞模式一样，由输出电压信号决定。所以利用本发明实施例的反馈电路可以实现迟滞模式控制的DC-DC变换器开关频率可控，且具有很强的瞬态响应能力。
为了更清楚的理解利用本发明的反馈电路实现迟滞模式控制的 DC-DC变换器开关频率固定，下面以BUCK式的迟滞模式控制的DC-DC变换器进行举例说明，需要说明的是，也可以将本发明的反馈电路应用于BOOST式的迟滞模式控制的DC-DC变换器(可参见图5所示实施例)，和BUCK-BOOST式的迟滞模式控制的DC-DC变换器(可参见图6所示实施例)，以实现开关频率固定。
图3为本发明电压转换电路实施例二的结构示意图，本实施例即是将图2所示的反馈电路应用于BUCK式迟滞模式控制的DC-DC变换器中的具体实施例，如图3所示，本实施例的比较电路采用比较器(CMP)做举例说明，本实施例的电压转换电路可以包括：
第一功率晶体管(PMOS)、第二功率晶体管(NMOS)、电感(L1)、电容(C0)、反馈电路、比较器(CMP)、采样及放大电路以及逻辑电路(LOG)和驱动电路(DRI)。
其中，所述采样及放大电路可以包括分压采样电路和误差放大电路(EA)；所述分压采样电路用于对所述第二直流电压进行分压采样，得到分压采样信号VFB，并将所述分压采样信号VFB输入所述误差放大电路(EA)；所述误差放大电路(EA)用于比较所述分压采样信号VFB和一预设参考电压信号VREF，将所述分压采样信号VFB和所述预设参考电压信号VREF的差值信号进行放大后得到所述采样信号VEA_OUT_，并将所述采样信号VEA_OUT_输入所述比较电路(CMP)。所述分压采样电路包括第三电阻R3和第四电阻R4，所述第三电阻R3连接在所述误差放大电路(EA)和所述第一能量存储元件(L1)与所述第二能量存储元件(C0)的连接端之间，所述第四电阻R4连接在所述误差放大电路(EA)和接地端之间。
需要说明的是，图3所示的采样及放大电路(R3、R4及EA)仅做示意性说明，本发明实施例的采样及放大电路并不以此作为限制。
所述比较电路(CMP)的输出端依次通过所述逻辑电路(LOG)和所述驱动电路(DRI)与所述功率晶体管连接；所述逻辑电路(LOG)用于将所述频率可控的PWM信号和预设的控制逻辑信号进行比较，得到控制所述功率晶体管导通和截止的控制信号，所述驱动电路(DRI)用于将所述控制信号转换为具有电流驱动能力的驱动信号，并使用所述驱动信号控制所述功率晶体管的导通和截止。其中，所述功率晶体管包括第一功率晶体 管(PMOS)和第二功率晶体管(NMOS)。
其中，电感(L1)、电容(C0)分别作为上述实施例中的第一能量存储元件和第二能量存储元件。
其中，反馈电路包括第一电容C1、第二电容C2、第一电阻R1、第二电阻R2和三角波信号发生器，该三角波发生器用于生成频率可控的三角波信号Ripple。该反馈电路中的各部件的连接关系具体为：相互串联的第一电容C1和第二电容C2，该相互串联的第一电容C1和第二电容C2的一端与固频率可控的三角波信号Ripple连接，另一端与输出节点连接，该输出节点的电压为V0；相互串联的第一电阻R1和第二电阻R2，该相互串联的第一电阻R1和第二电阻R2的一端与输出节点连接，另一端接地，其中，第一电容C1和第二电容C2之间的节点与第一电阻R3和第二电阻R4之间的节点连接，即本实施例的该反馈电路与图2所示的反馈电路结构相同。
本实施例的电压转换电路的具体连接关系为，相互串联的第一功率晶体管(PMOS)和第二功率晶体管(NMOS)，该第一功率晶体管(PMOS)的第一端子与输入电压源的正极VI连接，该第一功率晶体管(PMOS)的第二端子与该第二功率晶体管(NMOS)的第二端子在第一连接点处连接，该第一功率晶体管(PMOS)的第三端子与该第二功率晶体管(NMOS)的第一端子在第二连接点LX处连接，该第二功率晶体管(NMOS)的第三端子接地；该电感L1的一端连接在第二连接点处，另一端与输出节点连接；相互串联的比较器(CMP)和误差放大器(EA)，该比较器(CMP)的输出端连接在第一连接点处，该比较器(CMP)的第一输入端与第一电容(C1)和第二电容(C2)之间的节点连接，该比较器(CMP)的第二输入端与误差放大器(EA)的输出端连接，该误差放大器(EA)的第一输入端通过反馈电阻与输出节点V0连接，该误差放大器(EA)的第二输入端与参考电压信号VREF连接。
进一步地，本实施例中的第一功率晶体管PMOS和第二功率晶体管NMOS可以为MOS管，第一功率晶体管PMOS为P型MOS管，第二功率晶体管NMOS为N型MOS管，对应的，第一端子为漏极，第二端子为栅极，第三端子为源极，即第一功率晶体管PMOS的漏极与输入电压正 极VI连接，其源极与第二功率晶体管NMOS的漏极连接，其栅极与第二功率晶体管NMOS的栅极连接，第二功率晶体管NMOS的源极接地。
可选的，本实施例中的第一功率晶体管和第二功率晶体管也可以均为三极管，第一功率晶体管为PNP型三极管，第二功率晶体管为NPN型三极管，对应的，第一端子为集电极，第二端子为基极，第三端子为发射极，即第一功率晶体管的集电极与输入电压正极VI连接，其发射极与第二功率晶体管的集电极连接，其基极与第二功率晶体管的基极连接，第二功率晶体管的发射极接地。
本实施例的电压转换电路的具体工作方式为，反馈电路提供一频率固定的反馈纹波信号(VFB_COMP)，该VFB_COMP与VEA_OUT比较后输出一固定频率的脉冲宽度调制PWM信号，当该固定频率的PWM信号为高电平时，第一功率晶体管(PMOS)导通，第二功率晶体管(NMOS)截止，输入电压VI对电感(L1)和电容(C0)进行充电，之后，该固定频率的PWM信号翻转为低电平时，第一功率晶体管(PMOS)截止，第二功率晶体管(NMOS)导通，电感(L1)和电容(C0)进行放电，即通过该固定频率的PWM信号控制本实施例的电压转换电路的开关频率，从而将输入电压VI转换为输出电压VO。
本实施例的电压转换电路通过反馈电路耦合固定频率的三角波信号，使得本实施的电压转换电路工作频率固定，可以满足固定频率的负载需求，并且迟滞模式无需补偿，响应速度快，同时由于工作频率固定，所以可以将本实施例的电压转换电路应用于多相并联电源系统中，使其满足大负载电流的应用场景。
下面以上述实施例中的关键节点的工作波形图对上述实施例进行补充解释说明。
图4为本发明电压转换电路中关键节点工作波形示意图，如图4所示，其中的三角波形为图3中第一电容C1和第二电容C2之间的节点的工作波形，即比较器CMP的第一输入VFB_COMP的工作波形，当误差放大器EA的输出为VEA_OUT，那么比较器CMP的输出(PWM脉宽调制输出)为图4中的实线方波。
具体的，当VFB_COMP下穿VEA_OUT时，PWM信号翻转为高电平，相应地，图 3中的第一功率晶体管PMOS导通，第二功率晶体管NMOS截止；当VFB_COMP上穿VEA_OUT时，PWM信号翻转为低电平，相应的，图3中的第一功率晶体管PMOS截止，第二功率晶体管NMOS导通，当图3的电压转换电路的输出电压稳定时，该VFB_COMP和VEA_OUT的相对位置不变，VFB_COMP和VEA_OUT比较得到的PWM脉宽调制器输出信号的频率即不会改变，其频率由VFB_COMP的频率决定。
由此可知，本发明上述实施例的电压转换电路具有固定的工作频率。
除此之外，本发明实施例的比较器CMP输出的PWM脉宽调制信号的占空比可以通过误差放大器EA的输出进行控制，具体的，当VFB_COMP和VEA_OUT的相对位置发生变化时，如图4所示，该VEA_OUT向上移动至V′EA_OUT，那么比较器CMP输出的PWM脉宽调制信号即调整为图4中的虚线方波，通过比较器输出的PWM脉宽调制信号的占空比变化，来调节第一功率晶体管和第二功率晶体管的导通时间、截止时间，以保证输出电压趋于稳定。
如图4所示，将VEA_OUT近似为一基准电压，VFB_COMP的中心值为VFB_COMP，其波形信号的峰峰值为VRAMP，则占空比可表示为公式(3)。
Figure PCTCN2016095950-appb-000003
根据公式(3)，可以得到：
Figure PCTCN2016095950-appb-000004
由此可以看出，本发明的电压转换电路中的PWM脉宽调制信号的增益与常见的电压模式的增益计算方式相同，VRAMP的大小决定该部分的增益，那么，通过调整VFB_COMP的AC分量纹波峰峰值大小，即可调整本发明的迟滞模式的DC-DC变换电路中的VFB_COMP环路增益与带宽，提高其瞬态响应能力。
本发明实施例的电压转换电路的工作频率更容易提升，从而实现高频高瞬态性能的迟滞模式的DC-DC变换电路。
图5为本发明电压转换电路实施例三的结构示意图，本实施例即是将图2所示的反馈电路应用于BOOST式迟滞模式控制的DC-DC变换器中的 具体实施例，本实施例的电压转换电路通过反馈电路应用于BOOST式迟滞模式控制的DC-DC变换器中，可以将迟滞模式控制的DC-DC变换器的开关频率可控，使得本实施例的BOOST式迟滞模式控制的DC-DC变换器工作频率可控，可以满足固定频率的负载需求，并且迟滞模式无需补偿，响应速度快，同时由于工作频率固定，所以可以将本实施例的电压转换电路应用于多相并联电源系统中，使其满足大负载电流的应用场景。
其具体工作方式为：反馈电路提供一频率可控的反馈纹波信号(VFB_COMP)，该VFB_COMP与VEA_OUT比较后输出一频率可控的脉冲宽度调制PWM信号，当该频率可控的PWM信号为高电平时，第一功率晶体管(PMOS)导通、第二功率晶体管(NOMS)截止，使第一直流电压经过第一能量存储元件(L1)对第二能量存储元件(C0)充电；当该频率可控的PWM信号为低电平时，第一功率晶体管(PMOS)截止、第二功率晶体管(NOMS)导通，第二能量存储元件(C0)经过第一能量存储元件(L1)通过第二功率晶体管(NOMS)放电。即通过该频率可控的PWM信号控制本实施例的电压转换电路的开关频率，从而将输入电压VI转换为输出电压VO。
图6为本发明电压转换电路实施例四的结构示意图，本实施例即是将图2所示的反馈电路应用于BUCK-BOOST式迟滞模式控制的DC-DC变换器中的具体实施例，本实施例的电压转换电路通过反馈电路应用于BUCK-BOOST式迟滞模式控制的DC-DC变换器中，可以将迟滞模式控制的DC-DC变换器的开关频率可控，使得本实施的BUCK-BOOST式迟滞模式控制的DC-DC变换器工作频率可控，可以满足固定频率的负载需求，并且迟滞模式无需补偿，响应速度快，同时由于工作频率固定，所以可以将本实施例的电压转换电路应用于多相并联电源系统中，使其满足大负载电流的应用场景。
其具体工作方式为：反馈电路提供一频率可控的反馈纹波信号(VFB_COMP)，将该VFB_COMP分别提供给两个比较器(CMP1和CMP2)，比较器(CMP1)将该VFB_COMP与VC1比较后输出一频率可控的脉冲宽度调制PWM信号,以控制第三功率晶体管(PMOS2)和第四功率晶体管(NMOS2)的导通或截止，比较器(CMP2)将该VFB_COMP与VC2比较后输出一频率可控的脉冲宽度调制PWM 信号,以控制第一功率晶体管(PMOS1)和第二功率晶体管(NMOS1)的导通或截止，当第一功率晶体管(PMOS1)导通、第二功率晶体管(NMOS1)截止时，图6所示的电路为升压电路，即控制第三功率晶体管(PMOS2)导通，第四功率晶体管(NMOS2)截止，则第一直流电压(VIN)经过第一能量存储元件(L1)存储能量，第二能量存储元件(C0)放电，控制第三功率晶体管(PMOS2)截止，第四功率晶体管(NMOS2)导通，第一能量存储元件(L1)通过第四功率晶体管(NMOS2)释放能量，由第一能量存储元件(L1)和第一直流电压(VIN)对第二能量存储元件(C0)充电。
在第三功率晶体管(PMOS2)截止、第四功率晶体管(NMOS2)导通时，图6所示的电路为降压电路，即控制第一功率晶体管(PMOS1)导通、第二功率晶体管(NMOS1)截止，使第一直流电压(VIN)经过所述第一能量存储元件(L1)对所述第二能量存储元件(C0)充电，控制第一功率晶体管(PMOS1)截止、第二功率晶体管(NMOS1)导通，所述第二能量存储元件(C0)经过所述第一能量存储元件(L1)通过所述第二功率晶体管(NMOS1)放电。
即通过该频率可控的PWM信号控制本实施例的电压转换电路的开关频率，从而将输入电压VIN转换为输出电压VO。
图7为本发明多相并联电源系统结构示意图，如图7所示，本发明实施例的多相并联电源系统包括多个图3所示的电压转换电路，其中，各个所述电压转换电路的所述频率可控的三角波信号的频率相同，且相邻相位的所述电压转换电路的所述频率可控的三角波信号的相位差为360°除以所述电压转换电路的个数；各个所述电压转换电路共用一个所述采样及放大电路。
需要说明的是，各个所述电压转换电路的驱动电路和逻辑电路是相互独立的，即各个所述电压转换电路单独使用一个驱动电路和逻辑电路。
各个所述电压转换电路的输入电压源相同。
其中，该电压转换电路的个数可以为2个、3个等等，以2个进行举例说明，即两个本发明实施例的电压转换电路并联实现两相并联电源系 统，则两个电压转换电路中的固定频率三角波信号的相位即相差为180°，两个电压转换电路中的PWM脉宽调制输出的方波相位也相差180°，即Ripple1与Ripple2相位差为180°。
本实施例将多个图3所示的电压转换电路应用于多相并联结构中，从而满足大负载电流的应用场景，同时，多相并联结构的等效电感等于单相电感值除以相位数，多相并联结构的开关频率等效为单相开关频率乘以相位数，从而多相并联结构可大大提升环路的响应速度。
图8为本发明电压转换的方法的流程图，如图8所示，本发明的方法可以包括：
步骤801、通过控制功率晶体管的导通和截止，以控制第一能量存储元件和第二能量存储元件接收和存储第一直流电压的能量，从而在所述第一能量存储元件与所述第二能量存储元件的连接端输出第二直流电压。
步骤802、对所述第二直流电压进行采样，获取采样信号。
步骤803、采样所述第二直流电压，并将采样的所述第二直流电压和频率可控的三角波信号合成为频率可控的反馈纹波信号。
步骤804、将所述采样信号和所述频率可控的反馈纹波信号进行比较，输出频率可控的脉冲宽度调制PWM信号。
其中，所述频率可控的PWM信号用于控制所述功率晶体管的导通和截止，所述频率可控的PWM信号的频率与所述频率可控的反馈纹波信号的频率相同。
可选的，生成所述频率可控的三角波信号，使所述频率可控的反馈纹波信号的频率与所述频率可控的三角波信号的频率相同；根据所述第二直流电压和所述频率可控的三角波信号的直流分量控制所述频率可控的反馈纹波信号的直流分量电压。
可选的，步骤802具体可以为：对所述第二直流电压进行分压采样，得到分压采样信号；比较所述分压采样信号和一预设参考电压信号，将所述分压采样信号和所述预设参考电压信号的差值进行放大后得到所述采样信号。
进一步的，所述方法还可以包括：将所述频率可控的PWM信号和预设 的控制逻辑信号进行比较，得到控制所述功率晶体管导通和截止的控制信号；将所述控制信号转换为具有电流驱动能力的驱动信号，并使用所述驱动信号控制所述功率晶体管的导通和截止。
可选的，所述功率晶体管可以包括第一功率晶体管和第二功率晶体管，步骤801所述通过控制功率晶体管的导通和截止，以控制第一能量存储元件和第二能量存储元件接收和存储第一直流电压的能量，具体可以包括：控制所述第二功率晶体管在所述第一功率晶体管导通时截止，控制所述第二功率晶体管在所述第一功率晶体管截止时导通；在所述第一功率晶体管导通、所述第二功率晶体管截止时，使第一直流电压经过所述第一能量存储元件对所述第二能量存储元件充电；在所述第一功率晶体管截止、所述第二功率晶体管导通时，所述第二能量存储元件经过所述第一能量存储元件通过所述第二功率晶体管放电。
可选的，所述功率晶体管可以包括第一功率晶体管和第二功率晶体管；步骤801所述通过控制功率晶体管的导通和截止，以控制第一能量存储元件和第二能量存储元件接收和存储第一直流电压的能量，具体可以包括：控制所述第二功率晶体管在所述第一功率晶体管导通时截止，控制所述第二功率晶体管在所述第一功率晶体管截止时导通；在所述第一功率晶体管导通、所述第二功率晶体管截止时，由所述第一直流电压通过所述第一能量存储元件存储能量，所述第二能量存储元件放电，在所述第一功率晶体管截止、所述第二功率晶体管导通时，所述第一能量存储元件通过所述第二功率晶体管释放能量，由所述第一能量存储元件和所述第一直流电压对所述第二能量存储元件充电。
可选的，所述功率晶体管可以包括第一功率晶体管、第二功率晶体管、第三功率管和第四功率管；步骤801所述通过控制功率晶体管的导通和截止，以控制第一能量存储元件和第二能量存储元件接收和存储第一直流电压的能量，具体可以包括：控制所述第二功率晶体管在所述第一功率晶体管导通时截止，控制所述第二功率晶体管在所述第一功率晶体管截止时导通，控制所述第四功率晶体管在所述第三功率晶体管导通时截止，控制所述第四功率晶体管在所述第三功率晶体管截止时导通；在所述第一功率晶体管导通、所述第二功率晶体管截止时，所述第三功率 晶体管导通、所述第四功率晶体管截止，由所述第一直流电压通过所述第一能量存储元件存储能量，所述第二能量存储元件放电，所述第三功率晶体管截止、所述第四功率晶体管导通，所述第一能量存储元件通过所述第四功率晶体管释放能量，由所述第一能量存储元件和所述第一直流电压对所述第二能量存储元件充电；在所述第三功率晶体管截止、所述第四功率晶体管导通时，所述第一功率晶体管导通、所述第二功率晶体管截止，使第一直流电压经过所述第一能量存储元件对所述第二能量存储元件充电，所述第一功率晶体管截止、所述第二功率晶体管导通，所述第二能量存储元件经过所述第一能量存储元件通过所述第二功率晶体管放电。
本实施例的方法，可以用于执行图1至图7所示方法实施例的技术方案，其实现原理和技术效果类似，此处不再赘述。
本领域普通技术人员可以理解：实现上述各方法实施例的全部或部分步骤可以通过程序指令相关的硬件来完成。前述的程序可以存储于一计算机可读取存储介质中。该程序在执行时，执行包括上述各方法实施例的步骤；而前述的存储介质包括：ROM、RAM、磁碟或者光盘等各种可以存储程序代码的介质。
最后应说明的是：以上各实施例仅用以说明本发明的技术方案，而非对其限制；尽管参照前述各实施例对本发明进行了详细的说明，本领域的普通技术人员应当理解：其依然可以对前述各实施例所记载的技术方案进行修改，或者对其中部分或者全部技术特征进行等同替换；而这些修改或者替换，并不使相应技术方案的本质脱离本发明各实施例技术方案的范围。

Claims (17)

  1. 一种电压转换电路，其特征在于，用于将第一直流电压转换为第二直流电压；包括：子电压转换电路和反馈回路；
    所述子电压转换电路包括功率晶体管、第一能量存储元件和第二能量存储元件，用于通过控制所述功率晶体管的导通和截止，以控制所述第一能量存储元件和所述第二能量存储元件接收和存储所述第一直流电压的能量，从而在所述第一能量存储元件与所述第二能量存储元件的连接端输出所述第二直流电压；
    所述反馈回路包括采样及放大电路、反馈电路和比较电路；所述采样及放大电路用于对所述第二直流电压进行采样，并将采样获取的采样信号输入所述比较电路；所述反馈电路用于采样所述第二直流电压，并将采样的所述第二直流电压和频率可控的三角波信号合成为频率可控的反馈纹波信号，将所述频率可控的反馈纹波信号输入所述比较电路；所述比较电路用于将所述采样信号和所述频率可控的反馈纹波信号进行比较，输出频率可控的脉冲宽度调制PWM信号；
    其中，所述频率可控的PWM信号用于控制所述功率晶体管的导通和截止，所述频率可控的PWM信号的频率与所述频率可控的反馈纹波信号的频率相同。
  2. 根据权利要求1所述的电压转换电路，其特征在于，所述反馈电路包括三角波信号发生器、频率控制子电路和直流控制子电路；
    所述三角波信号发生器用于生成所述频率可控的三角波信号；所述频率控制子电路用于使所述频率可控的反馈纹波信号的频率与所述频率可控的三角波信号的频率相同；所述直流控制子电路用于根据所述第二直流电压和所述频率可控的三角波信号的直流分量控制所述频率可控的反馈纹波信号的直流分量电压。
  3. 根据权利要求2所述的电压转换电路，其特征在于，所述频率控制子电路包括第一电容和第二电容，所述直流控制子电路包括第一电阻和第二电阻；
    所述三角波信号发生器通过所述第一电容与所述比较电路连接，所述第二电容连接在所述比较电路和所述第一能量存储元件与所述第二能 量存储元件的连接端之间，所述第一电阻连接在所述比较电路和所述第一能量存储元件与所述第二能量存储元件的连接端之间，所述第二电阻连接在所述比较电路和接地端之间。
  4. 根据权利要求1～3任一项所述的电压转换电路，其特征在于，所述采样及放大电路包括分压采样电路和误差放大电路；
    所述分压采样电路用于对所述第二直流电压进行分压采样，得到分压采样信号，并将所述分压采样信号输入所述误差放大电路；所述误差放大电路用于比较所述分压采样信号和一预设参考电压信号，将所述分压采样信号和所述预设参考电压信号的差值信号进行放大后得到所述采样信号，并将所述采样信号输入所述比较电路。
  5. 根据权利要求4所述的电压转换电路，其特征在于，所述分压采样电路包括第三电阻和第四电阻，所述第三电阻连接在所述误差放大电路和所述第一能量存储元件与所述第二能量存储元件的连接端之间，所述第四电阻连接在所述误差放大电路和和接地端之间。
  6. 根据权利要求1～5任一项所述的电压转换电路，其特征在于，所述反馈回路还包括逻辑电路和驱动电路，所述比较电路的输出端依次通过所述逻辑电路和所述驱动电路与所述功率晶体管连接；
    所述逻辑电路用于将所述频率可控的PWM信号和预设的控制逻辑信号进行比较，得到控制所述功率晶体管导通和截止的控制信号，所述驱动电路用于将所述控制信号转换为具有电流驱动能力的驱动信号，并使用所述驱动信号控制所述功率晶体管的导通和截止。
  7. 根据权利要求1～6任一项所述的电压转换电路，其特征在于，所述功率晶体管包括第一功率晶体管和第二功率晶体管；
    所述第二功率晶体管在所述第一功率晶体管导通时截止，所述第二功率晶体管在所述第一功率晶体管截止时导通；
    所述第一能量存储元件和所述第二能量存储元件，与所述第一功率晶体管及所述第二功率晶体管耦合，并在所述第一功率晶体管导通、所述第二功率晶体管截止时，使第一直流电压经过所述第一能量存储元件对所述第二能量存储元件充电；在所述第一功率晶体管截止、所述第二功率晶体管导通时，所述第二能量存储元件经过所述第一能量存储元件 通过所述第二功率晶体管放电。
  8. 根据权利要求1～6任一项所述的电压转换电路，其特征在于，所述功率晶体管包括第一功率晶体管和第二功率晶体管；
    所述第二功率晶体管在所述第一功率晶体管导通时截止，所述第二功率晶体管在所述第一功率晶体管截止时导通；
    所述第一能量存储元件和所述第二能量存储元件，与所述第一功率晶体管及所述第二功率晶体管耦合，并在所述第一功率晶体管导通、所述第二功率晶体管截止时，由所述第一直流电压通过所述第一能量存储元件存储能量，所述第二能量存储元件放电，在所述第一功率晶体管截止、所述第二功率晶体管导通时，所述第一能量存储元件通过所述第二功率晶体管释放能量，由所述第一能量存储元件和所述第一直流电压对所述第二能量存储元件充电。
  9. 根据权利要求1～6任一项所述的电压转换电路，其特征在于，所述功率晶体管包括第一功率晶体管、第二功率晶体管、第三功率管和第四功率管；
    所述第二功率晶体管在所述第一功率晶体管导通时截止，所述第二功率晶体管在所述第一功率晶体管截止时导通，所述第四功率晶体管在所述第三功率晶体管导通时截止，所述第四功率晶体管在所述第三功率晶体管截止时导通；
    所述第一能量存储元件和所述第二能量存储元件，与所述第三功率晶体管及所述第四功率晶体管耦合，并且，所述第一能量存储元件还与所述第一功率晶体管及所述第二功率晶体管耦合；
    在所述第一功率晶体管导通、所述第二功率晶体管截止时，所述第三功率晶体管导通、所述第四功率晶体管截止，由所述第一直流电压通过所述第一能量存储元件存储能量，所述第二能量存储元件放电，所述第三功率晶体管截止、所述第四功率晶体管导通，所述第一能量存储元件通过所述第四功率晶体管释放能量，由所述第一能量存储元件和所述第一直流电压对所述第二能量存储元件充电；
    在所述第三功率晶体管截止、所述第四功率晶体管导通时，所述第一功率晶体管导通、所述第二功率晶体管截止，使第一直流电压经过所 述第一能量存储元件对所述第二能量存储元件充电，所述第一功率晶体管截止、所述第二功率晶体管导通，所述第二能量存储元件经过所述第一能量存储元件通过所述第二功率晶体管放电。
  10. 一种多相并联电源系统，其特征在于，包括：多个如权利要求1～9任一项所述电压转换电路；
    其中，各个所述电压转换电路的所述频率可控的三角波信号的频率相同，且相邻相位的所述电压转换电路的所述频率可控的三角波信号的相位差为360°除以所述电压转换电路的个数；
    各个所述电压转换电路共用一个所述采样及放大电路。
  11. 一种电压转换的方法，其特征在于，包括：
    通过控制功率晶体管的导通和截止，以控制第一能量存储元件和第二能量存储元件接收和存储第一直流电压的能量，从而在所述第一能量存储元件与所述第二能量存储元件的连接端输出第二直流电压；
    对所述第二直流电压进行采样，获取采样信号；
    采样所述第二直流电压，并将采样的所述第二直流电压和频率可控的三角波信号合成为频率可控的反馈纹波信号；
    将所述采样信号和所述频率可控的反馈纹波信号进行比较，输出频率可控的脉冲宽度调制PWM信号；
    其中，所述频率可控的PWM信号用于控制所述功率晶体管的导通和截止，所述频率可控的PWM信号的频率与所述频率可控的反馈纹波信号的频率相同。
  12. 根据权利要求11所述的方法，其特征在于，生成所述频率可控的三角波信号，使所述频率可控的反馈纹波信号的频率与所述频率可控的三角波信号的频率相同；
    根据所述第二直流电压和所述频率可控的三角波信号的直流分量控制所述频率可控的反馈纹波信号的直流分量电压。
  13. 根据权利要求11或12所述的方法，其特征在于，所述对所述第二直流电压进行采样，获取采样信号，包括：
    对所述第二直流电压进行分压采样，得到分压采样信号；
    比较所述分压采样信号和一预设参考电压信号，将所述分压采样信 号和所述预设参考电压信号的差值进行放大后得到所述采样信号。
  14. 根据权利要求11至13任一项所述的方法，其特征在于，所述方法还包括：
    将所述频率可控的PWM信号和预设的控制逻辑信号进行比较，得到控制所述功率晶体管导通和截止的控制信号；
    将所述控制信号转换为具有电流驱动能力的驱动信号，并使用所述驱动信号控制所述功率晶体管的导通和截止。
  15. 根据权利要求11至14任一项所述的方法，其特征在于，所述功率晶体管包括第一功率晶体管和第二功率晶体管，所述通过控制功率晶体管的导通和截止，以控制第一能量存储元件和第二能量存储元件接收和存储第一直流电压的能量，包括：
    控制所述第二功率晶体管在所述第一功率晶体管导通时截止，控制所述第二功率晶体管在所述第一功率晶体管截止时导通；
    在所述第一功率晶体管导通、所述第二功率晶体管截止时，使第一直流电压经过所述第一能量存储元件对所述第二能量存储元件充电；在所述第一功率晶体管截止、所述第二功率晶体管导通时，所述第二能量存储元件经过所述第一能量存储元件通过所述第二功率晶体管放电。
  16. 根据权利要求11至14任一项所述的方法，其特征在于，所述功率晶体管包括第一功率晶体管和第二功率晶体管；所述通过控制功率晶体管的导通和截止，以控制第一能量存储元件和第二能量存储元件接收和存储第一直流电压的能量，包括：
    控制所述第二功率晶体管在所述第一功率晶体管导通时截止，控制所述第二功率晶体管在所述第一功率晶体管截止时导通；
    在所述第一功率晶体管导通、所述第二功率晶体管截止时，由所述第一直流电压通过所述第一能量存储元件存储能量，所述第二能量存储元件放电，在所述第一功率晶体管截止、所述第二功率晶体管导通时，所述第一能量存储元件通过所述第二功率晶体管释放能量，由所述第一能量存储元件和所述第一直流电压对所述第二能量存储元件充电。
  17. 根据权利要求11至14任一项所述的方法，其特征在于，所述功率晶体管包括第一功率晶体管、第二功率晶体管、第三功率管和第四功 率管；所述通过控制功率晶体管的导通和截止，以控制第一能量存储元件和第二能量存储元件接收和存储第一直流电压的能量，包括：
    控制所述第二功率晶体管在所述第一功率晶体管导通时截止，控制所述第二功率晶体管在所述第一功率晶体管截止时导通，控制所述第四功率晶体管在所述第三功率晶体管导通时截止，控制所述第四功率晶体管在所述第三功率晶体管截止时导通；
    在所述第一功率晶体管导通、所述第二功率晶体管截止时，所述第三功率晶体管导通、所述第四功率晶体管截止，由所述第一直流电压通过所述第一能量存储元件存储能量，所述第二能量存储元件放电，所述第三功率晶体管截止、所述第四功率晶体管导通，所述第一能量存储元件通过所述第四功率晶体管释放能量，由所述第一能量存储元件和所述第一直流电压对所述第二能量存储元件充电；
    在所述第三功率晶体管截止、所述第四功率晶体管导通时，所述第一功率晶体管导通、所述第二功率晶体管截止，使第一直流电压经过所述第一能量存储元件对所述第二能量存储元件充电，所述第一功率晶体管截止、所述第二功率晶体管导通，所述第二能量存储元件经过所述第一能量存储元件通过所述第二功率晶体管放电。
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