WO2016058225A1

WO2016058225A1 - Multilayer printed circuit board

Info

Publication number: WO2016058225A1
Application number: PCT/CN2014/090039
Authority: WO
Inventors: 符俭泳
Original assignee: 深圳市华星光电技术有限公司
Priority date: 2014-10-16
Filing date: 2014-10-31
Publication date: 2016-04-21
Also published as: CN104302097A; CN104302097B

Abstract

The present invention relates to the technical field of electronics. Disclosed is a multilayer printed circuit board, which can prevent the problems such as board bending, board warping and copper sheet blistering caused by different residual copper rates of various layers. The multilayer printed circuit board comprises multiple wiring layers and isolating layers that are superimposed alternately. Any wiring layer comprises a copper sheet, and the copper sheets in the same network on the layers are conducted through via holes.

Description

Multilayer printed circuit board

The present application claims priority to Chinese Patent Application No. CN20141055036, filed on Oct. 16, 2014, which is incorporated herein by reference.

Technical field

The present invention relates to the field of electronic technology, and in particular to a multilayer printed circuit board.

Background technique

As is well known, Printed Circuit Board (PCB) is widely used in various electronic components with high density. The multilayer printed circuit board is often formed by alternately overlapping the wiring layer and the isolation layer. With the popularity of Surface Mount Technology (SMT), more stringent requirements have been placed on the plate bending and panel warpage of multilayer printed circuit boards. In the case where the residual copper ratio of each layer of the multilayer printed circuit board is different, when the temperature is high, the thermal expansion and contraction of each layer may be different due to the difference in the residual copper ratio of each layer, and plate bending may occur. , plate warping, copper blistering and other problems.

The inventors have found that problems such as plate bending, plate warping, and copper blistering will affect the contact between the electronic components carried by the multilayer printed circuit board and the solder joints of the multilayer printed circuit board, and even cause more The layer printed circuit board is invalid.

Summary of the invention

SUMMARY OF THE INVENTION An object of the present invention is to provide a multilayer printed circuit board which can prevent the occurrence of defects such as plate bending, warpage, and copper blistering due to the difference in residual copper ratio of each layer.

The present invention provides a multilayer printed circuit board comprising a plurality of alternately stacked trace layers and isolation layers, any trace layer comprising copper skin, and copper layers of the same network of each layer being conductive through vias .

Among them, a pad is formed around the via hole.

Wherein the pad comprises an annular portion disposed around the via and a plurality of traces extending from an edge of the annular portion, each trace connecting the annular portion and the copper skin.

Wherein, the via hole is filled with a conductive material, and the conductive material is connected to the copper skin through the pad.

Among them, on the same wiring layer, the copper skin is integrally formed with the pad.

Wherein, the distance between the outer edges of the annular portions of the adjacent pads is 0.66 to 0.86 mm.

Wherein, the annular portion of the pad is a ring structure, and each of the wires is located on a radius extending line of the ring portion.

Among them, the annular portion has an inner diameter of 0.25 to 0.3 mm and an outer diameter of 0.5 to 0.6 mm.

Wherein, the via hole grouping is set, and when the number of via holes in the group is not less than three, the arrangement of the via holes in the group is a regular polygon.

The present invention brings about the following advantageous effects: In the technical solution of the embodiment of the present invention, a multilayer printed circuit board is provided. Any of the wiring layers of the multilayer printed circuit board includes a copper skin, and the copper skin of the same network of each layer is conducted through the via holes. When the multilayer printed circuit board is subjected to high-temperature treatment (for example, soldering), the generated thermal stress can be effectively released, the expansion amount of the copper skin is alleviated, and the plate bending and the plate bending of the multilayer printed circuit board can be effectively prevented. The copper foil blistering and other unfavorable conditions ensure the contact between the electronic components and the solder joints carried by the multilayer printed circuit board, and the normal operation of the multilayer printed circuit board is ensured.

Other features and advantages of the invention will be set forth in the description which follows, The objectives and other advantages of the invention may be realized and obtained by means of the structure particularly pointed in the appended claims.

DRAWINGS

In order to more clearly illustrate the technical solutions in the embodiments of the present invention, a brief description of the drawings required in the description of the embodiments will be briefly made below:

1 is a schematic diagram of a multilayer printed circuit board according to an embodiment of the present invention.

Figure 2 is an enlarged schematic view of the via area of Figure 1;

Figure 3 is an enlarged schematic view of the via area of Figure 1;

4 is an enlarged schematic view 3 of the via area of FIG. 1.

detailed description

The embodiments of the present invention will be described in detail below with reference to the accompanying drawings and embodiments, in which the present invention can be applied to the technical problems, and the implementation of the technical effects can be fully understood and implemented. It should be noted, The various embodiments of the present invention and the various features of the various embodiments may be combined with each other as long as they do not constitute a conflict, and the technical solutions formed are all within the scope of the present invention.

Embodiments of the present invention provide a multilayer printed circuit board. As shown in FIG. 1, the multilayer printed circuit board includes:

A plurality of alternately stacked trace layers 1 and isolation layers 4 are included, and any of the trace layers 1 includes copper bumps 2, and the copper strips 2 of the same network of the respective layers are turned on through the via holes 3.

In a technical solution of an embodiment of the present invention, a multilayer printed circuit board is provided. Any of the wiring layers of the multilayer printed circuit board includes a copper skin, and the copper skin of the same network of each layer is conducted through the via holes. When the multilayer printed circuit board is subjected to high-temperature processing (for example, soldering), the generated thermal stress can be effectively released, the expansion amount of the copper skin of the wiring layer is alleviated, and the board of the multilayer printed circuit board can be effectively prevented from appearing. Defects such as bending, warping, and copper blistering ensure the contact between the electronic components and the solder joints carried by the multilayer printed circuit board, and ensure the normal operation of the multilayer printed circuit board.

It should be noted that the copper skin 2 has a relatively large electric resistance value compared with the wiring on the multilayer printed circuit board because of its large area. Therefore, the copper skin 2 is generally used to carry a large current of the multilayer printed circuit board. The copper skin 2 carrying a large current will also cause a local temperature of the multilayer printed circuit board to be high, which may cause defects such as plate bending, warping, and copper blistering of the multilayer printed circuit board. Obviously, the via hole 3 provided on the copper sheet 2 can also prevent the above-mentioned problem from occurring in a region where a large current flows.

In the embodiment of the present invention, the shape of the via hole 3 can be arbitrarily set, for example, a regular polygon, an irregular polygon, etc., but the shape of the via hole 3 is generally set to a circle due to comprehensive considerations of manufacturing process, aesthetics, and the like. .

In addition, since the size of the copper sheet 2 is large relative to the trace, the copper sheet 2 can also be used for grounding. The copper skin 2 is grounded to prevent the ground potential from changing with the circuit on the multilayer printed circuit board, preventing the signal level of the grounded copper 2 from being unstable, and the anti-noise performance is superior, thereby ensuring the quality of the multilayer printed circuit board. Work effect.

Further, in order to improve the ability of the copper skin 2 of the multilayer printed circuit board to carry current to improve the noise resistance of the multilayer printed circuit board, in the present invention, the vias 3 can be used to connect the copper layers of the same network of the layers. 2 electrical connection.

In the embodiment of the present invention, the pad 5 is formed around the via hole 3 so as to be filled with the conductive material in the via hole 3. Among them, the conductive material may be a metal or an alloy commonly used in soldering such as tin.

It should be noted that the pins of the electronic component are electrically connected to the multilayer printed circuit board by soldering. Welding on a large area of copper 2 requires comprehensive consideration of the soldering process of the pins of the electronic components. In terms of electrical performance, the pads 5 of the soldered electronic components should be well connected to the copper 2; however, the soldering process itself There are some hidden dangers, for example, the pad 5 which is fully connected with the copper skin 2 dissipates heat quickly, which causes the temperature at the solder joint to decrease, which will lead to the occurrence of a virtual solder joint. Obviously, in this case, in order to prevent the occurrence of the virtual solder joint, it is necessary to use a high-power heater for soldering, increase the power consumption of the soldering process, and increase the manufacturing cost.

Therefore, electrical performance and process requirements should be taken into consideration to prevent the copper skin 2 from releasing thermal stress through the via 3 after the via 3 is filled. It is conceivable to use the pad 5 as shown in FIGS. 2 to 4. Specifically, the pad 5 includes an annular portion 6 disposed around the via 3 and a plurality of traces 7 extending from the edge of the annular portion 6, each of the traces 7 connecting the annular portion 6 and the copper sheet 2. That is, as shown in any of Figs. 2 to 4, an insulating portion is formed between the annular portion 6, the adjacent wiring 7 and the copper skin 2, and the insulating region exposes the insulating layer 4 covered by the copper skin 2. Wherein, the isolating layer 4 is generally made of fiber paper, fiberglass cloth, glass fiber paper or the like as a reinforcing substrate, and the reinforcing substrate is impregnated with a resin glue liquid, and then heated by a gluing machine oven at 120 to 180 ° C. Dry to form. This ensures an electrical connection between the pad 5 and the copper skin 2 around it, while also preventing the pad 5 from dissipating too quickly during the soldering process. It can prevent the occurrence of virtual solder joints without using high-power heaters and improve the soldering success rate of multilayer printed circuit boards.

Among them, the line 7 can be a straight line or a curved set, and can be selected and designed according to actual conditions.

In summary, the conductive material filled in the via holes 3 and the pads 5 on the surface of the multilayer printed circuit board connect the copper layers 2 of the respective layers. In this case, the copper layers 2 of the respective layers are connected in parallel. According to the basic knowledge of the resistor, the resistance of the resistor obtained in parallel with the plurality of resistors is smaller than the resistance of any of the resistors participating in the parallel connection. Obviously, connecting the copper layers 2 of each layer in parallel helps to reduce the resistance of the copper skin 2, thereby improving the ability of the copper skin 2 to conduct current.

For the consideration of the preparation process, it is preferable that the copper skin 2 is integrally formed with the pad 5 on the same wiring layer. Also, as shown in any of FIGS. 2 to 4, the annular portion of the pad 5 is preferably a ring structure for the convenience of processing. Then, each of the traces 7 should be located on the radius extension line of the annular portion 6, so that the formed pads 5 are more beautiful and generous.

The placement and number of each of the traces 7 can be set according to actual conditions. For example, the trace 7 can be placed in a cross shape (as shown in FIG. 2) and a right angle (as shown in FIG. 3). Plum shape (as shown in Figure 4) and other shapes.

In the embodiment of the present invention, the structure of the pads 5 of each of the wiring layers 1 can be patterned by wet etching or the like, and details are not described herein.

In order to ensure that adjacent vias 3 and pads 5 do not interact with each other, in the embodiment of the invention, the distance between the outer edges of the annular portions 6 of adjacent pads 5 may be from 0.66 to 0.86 mm. Among them, a distance of 0.76 mm is preferred.

The via 3 may have a diameter of 0.25 to 0.3 mm in consideration of the processing of the via 3. When the annular portion 6 of the pad 5 has a circular ring structure, its inner diameter is also 0.25 to 0.3 mm, and the outer diameter may be 0.5 to 0.6 mm.

Further, since any wiring layer of a multilayer circuit board usually includes a plurality of copper sheets 2, a plurality of via holes 3 may be disposed on each of the copper sheets 2. In order to make the appearance of the multi-layer circuit board more beautiful and more distinctive, in the embodiment of the present invention, as shown in FIG. 1 , the via holes 3 can be grouped and set, and when the number of via holes in the group is not less than three, the group The inner via arrangement may be a regular polygon, such as a regular triangle, a regular quadrangle, a regular pentagon, or the like.

Further, as shown in FIG. 1, an insulating region is formed between the pads 5 of the via holes 3 in the same group, which exposes the isolation layer 4 covered by the copper skin 2. Obviously, the size of the insulating region between the pads 5 in the same group is much larger than the size of the insulating region between the pad 5 and the copper skin 2, which is more advantageous for releasing thermal stress. Therefore, the via hole 3 can be formed in a group on the copper sheet 2 having a large size, and the copper sheet 2 having a large size can be prevented from foaming, thereby preventing the board printed circuit board from being bent, warped, etc. Bad situation.

While the embodiments of the present invention have been described above, the described embodiments are merely illustrative of the embodiments of the invention and are not intended to limit the invention. Any modification and variation of the form and details of the embodiments may be made by those skilled in the art without departing from the spirit and scope of the invention. It is still subject to the scope defined by the appended claims.

Description of the reference signs:

1-wire layer; 2-copper skin; 3-via;

4-isolation layer; 5-pad; 6-ring portion;

7-Line.

Claims

A multilayer printed circuit board comprising a plurality of alternately stacked trace layers and isolation layers, any trace layer comprising a copper skin, and copper of the same network of each layer being conductive through the vias.
The multilayer printed circuit board according to claim 1, wherein a pad is formed around the via hole.
The multilayer printed circuit board according to claim 2, wherein the pad comprises an annular portion disposed around the via hole and a plurality of traces extending from an edge of the annular portion, each trace connecting the annular portion and the copper skin .
The multilayer printed circuit board according to claim 3, wherein the via hole is filled with a conductive material, and the conductive material is connected to the copper pad through the pad.
The multilayer printed circuit board according to claim 2, wherein the copper skin is integrally formed with the pad on the same wiring layer.
The multilayer printed circuit board according to claim 3, wherein a distance between outer edges of the annular portions of adjacent pads is 0.66 to 0.86 mm.
The multilayer printed circuit board according to claim 3, wherein the annular portion of the pad is a ring structure, and each of the traces is located on a radius extension line of the annular portion.
The multilayer printed circuit board according to claim 7, wherein

The annular portion has an inner diameter of 0.25 to 0.3 mm and an outer diameter of 0.5 to 0.6 mm.
The multilayer printed circuit board according to claim 1, wherein

When the number of via holes in the group is not less than three, the arrangement of the via holes in the group is a regular polygon.