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WO2016058184A1 - 液晶显示面板及其阵列基板 - Google Patents

液晶显示面板及其阵列基板 Download PDF

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Publication number
WO2016058184A1
WO2016058184A1 PCT/CN2014/088844 CN2014088844W WO2016058184A1 WO 2016058184 A1 WO2016058184 A1 WO 2016058184A1 CN 2014088844 W CN2014088844 W CN 2014088844W WO 2016058184 A1 WO2016058184 A1 WO 2016058184A1
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Prior art keywords
region
electrode pattern
electrode
liquid crystal
crystal display
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PCT/CN2014/088844
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English (en)
French (fr)
Inventor
郑华
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深圳市华星光电技术有限公司
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Priority to US14/401,520 priority Critical patent/US9250485B1/en
Publication of WO2016058184A1 publication Critical patent/WO2016058184A1/zh

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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement
    • G02F1/134318—Electrodes characterised by their geometrical arrangement having a patterned common electrode

Definitions

  • the present invention relates to the field of liquid crystal display technologies, and in particular, to a liquid crystal display panel and an array substrate thereof.
  • TFT-LCD Thin Film Transistor-Liquid Crystal Display
  • the principle of the "whitening on both sides” phenomenon is as follows: as shown in FIG. 1, the driving voltage of the gate line 11 is input by the scanning drive electrodes (Gate COF) 12 located on the left and right sides of the liquid crystal display panel 10. Due to the resistance-capacitance delay (RC Delay) of the scan line 11, the scan drive voltage of the normal input on both sides is distorted when transmitted to the intermediate area A, that is, the scan line waveform is distorted, and the distorted scan drive voltage lowers the intermediate area A. The charging rate is reduced, thereby reducing the display brightness of the intermediate area A. At this time, the display brightness of the two side areas B1, B2 becomes higher, that is, the phenomenon of "whitening on both sides” occurs. In the low gray scale display, due to the sensitivity of the human eye, the phenomenon of "whitening on both sides" during viewing is particularly obvious.
  • the technical problem to be solved by the present invention is to provide a liquid crystal display panel and an array substrate thereof, which can make the display brightness of the liquid crystal display panel uniform, and slow or eliminate the phenomenon of “whitening on both sides”.
  • a technical solution adopted by the present invention is to provide a liquid crystal display panel including a plurality of pixel units, each pixel unit including a pixel electrode, each pixel electrode including a plurality of strip-shaped gaps and Strip-shaped first electrode patterns, gaps are interlaced with the first electrode patterns, and in a plurality of pixel units, a gap in each pixel unit along a direction of an intermediate portion of the liquid crystal display panel toward both side regions of the liquid crystal display panel
  • the sum of the areas of the areas gradually increases, and the sum of the areas of the first electrode patterns in each pixel unit does not change;
  • the width of the gaps in each pixel unit increases in the direction of the intermediate areas toward the two side areas,
  • the width of an electrode pattern The degree is constant, and the sum of the width of the first electrode pattern and the width of the gap increases sequentially;
  • the pixel unit is further connected to the scan line and the data line, and the pixel unit further includes a thin film transistor driving the pixel electrode, a gate and a source of the thin
  • Each of the pixel electrodes includes a first region, a second region, a third region, and a fourth region.
  • the first region and the second region are juxtaposed, and the first region and the fourth region are diagonally disposed, and the second region and the third region are disposed.
  • the area is diagonally set.
  • the first electrode pattern of the first region is the same as the electrode of the first electrode pattern of the fourth region, and the first electrode pattern of the second region is the same as the electrode of the first electrode pattern of the third region.
  • the first electrode pattern of the first region and the electrode pattern of the first electrode pattern of the fourth region are in a first direction, and the electrode patterns of the first electrode pattern of the second region and the first electrode pattern of the third region are second.
  • Direction, and the first direction and the second direction are perpendicular to each other.
  • Each of the pixel electrodes further includes a second electrode pattern and a third electrode pattern, the second electrode pattern is disposed around the first region, the second region, the third region, and the fourth region, and the third electrode pattern is used to define the first region , the second area, the third area, and the fourth area.
  • a liquid crystal display panel including a plurality of pixel units, each pixel unit including a pixel electrode, each pixel electrode including a plurality of strip gaps and a plurality of strip-shaped first electrode patterns, wherein the gap is interlaced with the first electrode pattern, in a plurality of pixel units, in a direction along a middle portion of the liquid crystal display panel toward a side region of the liquid crystal display panel, in each pixel unit
  • the sum of the areas of the gaps is gradually increased, and the sum of the areas of the first electrode patterns in each pixel unit does not change.
  • the width of the gap in each pixel unit increases sequentially, the width of the first electrode pattern does not change, and the width and gap of the first electrode pattern are along the direction of the intermediate portion toward the two side regions. The sum of the widths increases in turn.
  • Each of the pixel electrodes includes a first region, a second region, a third region, and a fourth region.
  • the first region and the second region are juxtaposed, and the first region and the fourth region are diagonally disposed, and the second region and the third region are disposed.
  • the area is diagonally set.
  • the first electrode pattern of the first region is the same as the electrode of the first electrode pattern of the fourth region, and the first electrode pattern of the second region is the same as the electrode of the first electrode pattern of the third region.
  • the first electrode pattern of the first region and the electrode pattern of the first electrode pattern of the fourth region are in a first direction, and the electrode patterns of the first electrode pattern of the second region and the first electrode pattern of the third region are second.
  • Direction, and the first direction and the second direction are perpendicular to each other.
  • Each of the pixel electrodes further includes a second electrode pattern and a third electrode pattern, the second electrode pattern is disposed around the first region, the second region, the third region, and the fourth region, and the third electrode pattern is used to define the first region , the second area, the third area, and the fourth area.
  • the pixel unit further includes a scan line and a data line.
  • the pixel unit further includes a thin film transistor that drives the pixel electrode.
  • the gate, the source and the drain of the thin film transistor are electrically connected to the scan line, the data line and the pixel electrode, respectively.
  • the liquid crystal display panel further includes a gate driver and a source driver.
  • the gate driver is connected to the scan line for providing a scan voltage for the plurality of pixel units
  • the source driver is connected to the data line for providing the plurality of pixel units. Drive voltage.
  • an array substrate suitable for a liquid crystal display panel includes a plurality of pixel units, each pixel unit includes a pixel electrode, and each pixel electrode includes a plurality of strip-shaped gaps and a plurality of strip-shaped electrode patterns, wherein the gaps are alternately arranged with the electrode patterns, wherein, in the plurality of pixel units, a direction along the intermediate portion of the liquid crystal display panel toward the both side regions of the liquid crystal display panel.
  • the width of the gap of each pixel unit increases sequentially, the width of the electrode pattern does not change, and the sum of the width of the electrode pattern and the width of the gap Increase in turn.
  • Each of the pixel electrodes includes a first region, a second region, a third region, and a fourth region.
  • the first region and the second region are juxtaposed, and the first region and the fourth region are diagonally disposed, and the second region and the third region are disposed.
  • the area is diagonally set.
  • first electrode pattern of the first region is the same as the electrode of the first electrode pattern of the fourth region, and the electrode orientation of the first electrode pattern of the second region and the first electrode pattern of the third region the same.
  • the first electrode pattern of the first region and the electrode pattern of the first electrode pattern of the fourth region are in a first direction, and the electrode patterns of the first electrode pattern of the second region and the first electrode pattern of the third region are second.
  • Direction, and the first direction and the second direction are perpendicular to each other.
  • Each of the pixel electrodes further includes a second electrode pattern and a third electrode pattern, the second electrode pattern is disposed around the first region, the second region, the third region, and the fourth region, and the third electrode pattern is used to define the first region , the second area, the third area, and the fourth area.
  • the beneficial effects of the embodiments of the present invention are: in the embodiment of the present invention, by designing the direction along the middle region of the liquid crystal display panel toward the two side regions, in the plurality of pixel units, the pixel electrode of each pixel unit The sum of the areas of the gaps is gradually increased and the sum of the areas of the electrode patterns is constant, thereby reducing the liquid crystal efficiency of the both sides, reducing the transmittance of the pixel units on both sides, thereby reducing the display brightness of the both sides.
  • the display brightness of the two sides is smaller or eliminated, the display brightness of the entire liquid crystal display panel is uniform, and the phenomenon of "whitening on both sides" is slowed down or eliminated.
  • FIG. 1 is a top plan view showing a structure of a liquid crystal display panel in the prior art
  • Figure 2 is a cross-sectional view of a liquid crystal display panel in accordance with a preferred embodiment of the present invention
  • Figure 3 is a plan view of a liquid crystal display panel in accordance with a preferred embodiment of the present invention.
  • FIG. 4 is a schematic diagram of a pixel structure of a liquid crystal display panel according to a preferred embodiment of the present invention.
  • FIG. 5 is a schematic structural view of a pixel unit in the liquid crystal display panel shown in FIG. 3;
  • FIG. 6 is a schematic diagram showing the correspondence relationship between the aperture ratio of the pixel unit of the liquid crystal display panel shown in FIG. 3 and the length of the pixel electrode.
  • the liquid crystal display panel 20 includes a first substrate 21, a second substrate 22, and a liquid crystal layer 23, wherein the first substrate 21 and the second substrate 22 are relatively spaced apart, and the second substrate 22 is CF ( a color filter substrate, the first substrate 21 is a TFT (Thin Film Transistor) array substrate, and the first substrate 21 includes a transparent substrate and various wirings and pixels disposed on the transparent substrate. Electrodes, etc. specifically,
  • the first substrate 21 includes a plurality of data lines D 1 , D 2 , . . . , D N , a plurality of scanning lines G 1 , G 2 , . . . , G L , and a plurality of lines arranged in a direction perpendicular to the data line direction.
  • a plurality of pixel units P 1 , P 2 , . . . , P X defined by the scanning lines G 1 , G 2 , . . . , G L and the plurality of data lines D 1 , D 2 , . . . , D N
  • Each pixel unit is connected to one scan line and one data line.
  • the plurality of scan lines G 1 , G 2 , . . . , G L are connected to the gate driver 31 , and the plurality of data lines D 1 , D 2 , . . . , D N are connected to the source driver 32 .
  • the gate driver 31 is for supplying a scan voltage for a plurality of pixel units P 1 , P 2 , . . . , P X
  • the source driver 32 is for a plurality of pixel units P 1 , P 2 , . . . , P X Provide drive voltage.
  • FIG. 5 is a schematic structural view of a pixel unit in the liquid crystal display panel 20 shown in FIG.
  • the liquid crystal display panel 20 includes a plurality of pixel units P1, P2, . . . , PX arranged in a matrix, each pixel unit includes a pixel electrode, and each pixel electrode is connected to a scan line and a data line, such as the scan line 60 and the data line 70 of the pixel unit 50 shown in FIG. 5, each pixel electrode includes a plurality of strip-shaped first electrode patterns 51, a plurality of strip-shaped (ITO) gaps 52, a second electrode pattern 53 and a third electrode pattern 54, wherein:
  • the second electrode pattern 53 is used to define an opening area of the pixel unit 50, and the two strip-shaped third electrode patterns 54 are vertically disposed in a cross shape for defining each pixel electrode as the first area O1 and the second area O2.
  • the strip-shaped second electrode pattern 53 surrounds the first region O1, the second region O2, the third region O3, and the fourth region O4, so that the pixel electrodes of the pixel unit 50 are entirely rectangular.
  • the first area O1 located at the upper left side and the second area O2 located at the upper right side are arranged side by side in the same horizontal direction, and the fourth area O4 located at the lower right side is disposed diagonally with the first area O1, located at the lower left.
  • the third region O3 of the square is disposed diagonally with the second region O2, and the electrode directions of the first region O1 and the fourth region O4 are the same, for example, the first direction D1 shown in the figure;
  • the second region O2 is the same as the electrode of the third region O3, for example, the second direction D2 shown in the drawing.
  • the first direction D1 and the second direction D2 are perpendicular to each other, and the first direction D1 is, for example, a direction at an angle of 135° with respect to the horizontal positive direction, and the second direction D2 is, for example, a direction at an angle of 45° with the horizontal positive direction.
  • the horizontal positive direction indicates a direction parallel to the direction in which the scanning line 60 is located and from the first region O1 toward the second region O2 or the third region O3 toward the fourth region O4.
  • the width L of the first electrode pattern 51 of each pixel electrode is the same, and the width S of the gap 52 of each pixel electrode is the same, that is, the first electrode pattern 51 of the same pixel electrode
  • the width L is the same and the width S of the gap 52 is the same.
  • a plurality of strip-shaped gaps 52 and a plurality of strip-shaped first electrode patterns 51 are alternately arranged on a plane on which the pixel electrodes are located.
  • the main purpose of the embodiment of the present invention is to face the direction of the two sides of the liquid crystal display panel 20 toward the two side regions C 1 and C 2 of the liquid crystal display panel 20, that is, the direction of the arrow shown in FIG. 4, in the plurality of pixel units P. 1 , P 2 , . . . , P X , the sum of the areas of the gaps 52 in each of the pixel units 50 gradually increases.
  • the width S of the gap 52 of the pixel electrode in each pixel unit 50 increases sequentially, and the width L of the first electrode pattern 51 of the pixel electrode in each pixel unit 50 does not change, preferably with the prior art.
  • the sum of the widths is the same such that the sum W of the width L of each of the first electrode patterns 51 and the width S of each of the gaps 52 is sequentially increased.
  • the transmittance of the pixel unit aperture ratio * liquid crystal efficiency (ie, the transmittance of the unit opening area), and the gap 52 only facilitates the liquid crystal corresponding to the first electrode pattern 51 to tilt toward the pretilt direction, and does not contribute to the transmittance.
  • the transmittance of the pixel unit 50 to reduce both the display luminance region C 1, C 2, in which case both sides of the region C 1, the gap between the display luminance display luminance C of the intermediate region D 2 can be reduced or even eliminated, the whole
  • the display brightness of the liquid crystal display panel 20 tends to be uniform, and the phenomenon of "whitening on both sides" can be alleviated or eliminated.
  • the structure of the plurality of pixel units P 1 , P 2 , . . . , P X is different.
  • one pixel unit located in the intermediate portion D of the liquid crystal display panel 20 and the liquid crystal display panel 20 are located.
  • One pixel unit of the two side regions (C 1 ) will be described as an example. See FIGS.
  • the width of the first electrode pattern on both sides of the pixel electrode defines a pixel unit region C 1 is 50 51 C L, C S is the width of the gap, the pixel cell intermediate region 50 of D
  • the width of the first electrode pattern 51 of the pixel electrode is L D
  • the width of the gap is S D
  • L C L D and S C > S D and L C + S C > L D + S D .
  • the difference in the widths of the gaps 52 of the pixel electrodes of any two adjacent pixel units 50 is equal, that is, a plurality of pixel units
  • the widths of the gaps 52 of the pixel electrodes of P 1 , P 2 , ..., P X are successively decreased by the same magnitude. See the example below:
  • adjacent 11 regions a, b, c, d, e, f, g, h are selected along the direction of the intermediate region D toward the two side regions C 1 and C 2 .
  • i, j, k assuming that the width of the gap 52 of the pixel electrode corresponding to the area a is 6.0, the width of the gap 52 of the pixel electrode corresponding to the area b is 6.2, and the width of the gap 52 of the pixel electrode corresponding to the area c is 6.4, the area
  • the width of the gap 52 of the pixel electrode corresponding to d is 6.6
  • the width of the gap 52 of the pixel electrode corresponding to the area e is 6.8, the width of the gap 52 of the pixel electrode corresponding to the area f is 7.0
  • the gap 52 of the pixel electrode corresponding to the area g The width of the gap 52 of the pixel electrode corresponding to the area h is 7.4, the width of the gap 52 of the pixel electrode corresponding to the
  • region a and region b, region b and region c, region c and region d, region d and region e, region e and region f, region f and region g, region g and region h, region h and region i The difference between the widths of the gaps 52 of the pixel electrodes of the adjacent pixel units in the region i, the region j, the region j and the region k is equal to 0.2 ⁇ m.
  • the first electrode pattern of the pixel electrode of the pixel unit 50 corresponding to each region is preferred in the embodiment of the present invention.
  • the structure and size of 51 and gap 52 are the same.
  • a width L of one first electrode pattern 51 of each pixel electrode is assumed to be 4 um, and a gap 52 is set in the intermediate portion.
  • the above-described partition design is preferably performed in the mask design, and the design of the embodiment of the present invention can be embodied on the pixel electrode layer of the liquid crystal display panel 20 by a conventional photolithography process.
  • the width S value of the gap 52 is increased from 2.0 um to 4.0 um, the liquid crystal efficiency ⁇ of the pixel unit 50 is decreased by 80% to 90%, that is, the transmittance of the pixel unit 50 is decreased by 80% to 90%, which can be greatly alleviated. "White on both sides" phenomenon.
  • each pixel unit 50 of the present embodiment further includes a thin film transistor that drives the pixel electrode, and the structure of the thin film transistors of the plurality of pixel units P 1 , P 2 , . . . , P X . It is exactly the same size.
  • Each of the thin film transistors includes a gate g 1 , a source s 1 , and a drain b 1 , wherein the gate g 1 is electrically connected to the corresponding scan line 60 , and the source s 1 is electrically connected to the corresponding data line 70 and the drain b 1 is electrically connected to the corresponding pixel electrode.

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  • Mathematical Physics (AREA)
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  • Crystallography & Structural Chemistry (AREA)
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Abstract

一种液晶显示面板（20）及其阵列基板。该液晶显示面板（20）的每一像素单元（50）包括一像素电极，每一像素电极包括多个条状的间隙和多个条状的第一电极图案（51），其中间隙与第一电极图案（51）交错设置，在多个像素单元（50）中，沿液晶显示面板（20）的中间区域朝向液晶显示面板（20）的两侧区域的方向第一像素单元（50）中的间隙的面积之和逐渐增大，且第一像素单元（50）中的第一电极图案（51）的面积之和不变。通过上述方式，能使液晶显示面板（20）的显示亮度均匀，减缓或消除"两侧发白"现象。

Description

液晶显示面板及其阵列基板 【技术领域】
本发明涉及液晶显示技术领域，特别是涉及一种液晶显示面板及其阵列基板。
【背景技术】
TFT-LCD(Thin Film Transistor-Liquid Crystal Display，薄膜场效应液晶显示)面板在低灰阶显示时，极易出现两侧区域亮度高、中间区域亮度低的显示不良现象，通常称为“两侧发白”现象。
产生“两侧发白”现象的原理在于：如图1所示，扫描线(Gate line)11的驱动电压是由位于液晶显示面板10的左右两侧的扫描驱动电极(Gate COF)12输入的，由于扫描线11的电阻电容延迟(RC Delay)，使得两侧正常输入的扫描驱动电压在传递至中间区域A时发生失真，即扫描线波形失真，失真的扫描驱动电压会降低中间区域A的充电率，从而降低中间区域A的显示亮度，此时两侧区域B1、B2的显示亮度相比之下变高，即产生“两侧发白”现象。在低灰阶显示时，由于人眼敏感，因此观看时“两侧发白”现象尤为明显。
【发明内容】
有鉴于此，本发明所要解决的技术问题是提供一种液晶显示面板及其阵列基板，能够使得液晶显示面板的显示亮度均匀，减缓或消除“两侧发白”现象。
为解决上述技术问题，本发明采用的一个技术方案是：提供一种液晶显示面板，包括多个像素单元，每一像素单元包括一像素电极，每一像素电极包括多个条状的间隙和多个条状的第一电极图案，间隙与第一电极图案交错设置，在多个像素单元中，沿液晶显示面板的中间区域朝向液晶显示面板的两侧区域的方向，每一像素单元中的间隙的面积之和逐渐增大，且每一像素单元中的第一电极图案的面积之和不变；沿中间区域朝向两侧区域的方向，每一像素单元中的间隙的宽度依次增大、第一电极图案的宽 度不变，且第一电极图案的宽度与间隙的宽度之和依次增大；像素单元还对应连接扫描线、数据线，像素单元还包括驱动像素电极的薄膜晶体管，薄膜晶体管的栅极、源极和漏极分别与扫描线、数据线和像素电极电连接，液晶显示面板还包括栅极驱动器和源极驱动器，栅极驱动器与扫描线连接，用于为多个像素单元提供扫描电压，源极驱动器与数据线连接，用于为多个像素单元提供驱动电压。
其中，每一像素电极包括第一区域、第二区域、第三区域和第四区域，第一区域与第二区域并列设置，第一区域与第四区域对角设置，第二区域与第三区域对角设置。
其中，第一区域的第一电极图案与第四区域的第一电极图案的电极走向相同，第二区域的第一电极图案与第三区域的第一电极图案的电极走向相同。
其中，第一区域的第一电极图案与第四区域的第一电极图案的电极走向呈第一方向，第二区域的第一电极图案与第三区域的第一电极图案的电极走向呈第二方向，且第一方向与第二方向相互垂直。
其中，每一像素电极还包括第二电极图案和第三电极图案，第二电极图案环绕第一区域、第二区域、第三区域和第四区域设置，第三电极图案用于定义第一区域、第二区域、第三区域和第四区域。
为解决上述技术问题，本发明采用的另一个技术方案是：提供一种液晶显示面板，包括多个像素单元，每一像素单元包括一像素电极，每一像素电极包括多个条状的间隙和多个条状的第一电极图案，间隙与第一电极图案交错设置，在多个像素单元中，沿液晶显示面板的中间区域朝向液晶显示面板的两侧区域的方向，每一像素单元中的间隙的面积之和逐渐增大，且每一像素单元中的第一电极图案的面积之和不变。
其中，在多个像素单元中，沿中间区域朝向两侧区域的方向，每一像素单元中的间隙的宽度依次增大、第一电极图案的宽度不变，且第一电极图案的宽度与间隙的宽度之和依次增大。
其中，每一像素电极包括第一区域、第二区域、第三区域和第四区域，第一区域与第二区域并列设置，第一区域与第四区域对角设置，第二区域与第三区域对角设置。
其中，第一区域的第一电极图案与第四区域的第一电极图案的电极走向相同，第二区域的第一电极图案与第三区域的第一电极图案的电极走向相同。
其中，第一区域的第一电极图案与第四区域的第一电极图案的电极走向呈第一方向，第二区域的第一电极图案与第三区域的第一电极图案的电极走向呈第二方向，且第一方向与第二方向相互垂直。
其中，每一像素电极还包括第二电极图案和第三电极图案，第二电极图案环绕第一区域、第二区域、第三区域和第四区域设置，第三电极图案用于定义第一区域、第二区域、第三区域和第四区域。
其中，像素单元还对应连接扫描线、数据线，像素单元还包括驱动像素电极的薄膜晶体管，薄膜晶体管的栅极、源极和漏极分别与扫描线、数据线和像素电极电连接。
其中，液晶显示面板还包括栅极驱动器和源极驱动器，栅极驱动器与扫描线连接，用于为多个像素单元提供扫描电压，源极驱动器与数据线连接，用于为多个像素单元提供驱动电压。
为解决上述技术问题，本发明采用的又一个技术方案是：提供一种阵列基板，适用于液晶显示面板，阵列基板包括多个像素单元，每一像素单元包括一像素电极，每一像素电极包括多个条状的间隙和多个条状的电极图案，间隙与电极图案交错设置，其中，在多个像素单元中，沿液晶显示面板的中间区域朝向液晶显示面板的两侧区域的方向，每一像素单元中的间隙的面积之和逐渐增大，且每一像素单元中的第一电极图案的面积之和不变。
其中，沿液晶显示面板的中间区域朝向液晶显示面板的两侧区域的方向，每一像素单元的间隙的宽度依次增大、电极图案的宽度不变，且电极图案的宽度与间隙的宽度之和依次增大。
其中，每一像素电极包括第一区域、第二区域、第三区域和第四区域，第一区域与第二区域并列设置，第一区域与第四区域对角设置，第二区域与第三区域对角设置。
其中，第一区域的第一电极图案与第四区域的第一电极图案的电极走向相同，第二区域的第一电极图案与第三区域的第一电极图案的电极走向 相同。
其中，第一区域的第一电极图案与第四区域的第一电极图案的电极走向呈第一方向，第二区域的第一电极图案与第三区域的第一电极图案的电极走向呈第二方向，且第一方向与第二方向相互垂直。
其中，每一像素电极还包括第二电极图案和第三电极图案，第二电极图案环绕第一区域、第二区域、第三区域和第四区域设置，第三电极图案用于定义第一区域、第二区域、第三区域和第四区域。
通过上述技术方案，本发明实施例产生的有益效果是：本发明实施例通过设计沿液晶显示面板的中间区域朝向两侧区域的方向，在多个像素单元中，每一像素单元的像素电极的间隙的面积之和逐渐增大且电极图案的面积之和不变，以此降低两侧区域的液晶效率，降低两侧区域的像素单元的穿透率，从而降低两侧区域的显示亮度，此时两侧区域的显示亮度与中间区域的显示亮度差距变小或消除，整个液晶显示面板的显示亮度均匀，减缓或消除“两侧发白”现象。
【附图说明】
图1是现有技术中液晶显示面板的结构俯视图；
图2是本发明优选实施例的液晶显示面板的剖视图；
图3是本发明优选实施例的液晶显示面板的俯视图；
图4是本发明优选实施例的液晶显示面板的像素结构示意图；
图5是图3所示液晶显示面板中一个像素单元的结构示意图；
图6是图3所示液晶显示面板的像素单元的开口率与像素电极的长度的对应关系示意图。
【具体实施方式】
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，本发明以下所描述的实施例仅仅是本发明的一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其它实施例，都属于本发明保护的范围。
图2和图3分别是本发明优选实施例的液晶显示面板的剖视图和俯视图，图4是该液晶显示面板的像素结构示意图。请结合图2～图4所示，液晶显示面板20包括第一基板21、第二基板22和液晶层23，其中第一基板21和第二基板22相对间隔设置，第二基板22为CF(Color Filter，彩色滤光片)彩膜基板，第一基板21为TFT(Thin Film Transistor，薄膜晶体管)阵列基板，第一基板21包括透明基体以及设置于该透明基体上的各种配线和像素电极等。具体地，
第一基板21包括多条数据线D1，D2，...，DN、沿垂直于数据线方向设置的多条扫描线G1，G2，...，GL、以及由多条扫描线G1，G2，...，GL和多条数据线D1，D2，...，DN定义的多个像素单元P1，P2，...，PX，每一个像素单元对应连接一条扫描线和一条数据线。
其中，多条扫描线G1，G2，...，GL连接于栅极驱动器31，多条数据线D1，D2，...，DN连接于源极驱动器32。栅极驱动器31用于为多个像素单元P1，P2，...，PX提供扫描电压，源极驱动器32用于为多个像素单元P1，P2，...，PX提供驱动电压。
图5是图3所示液晶显示面板20中一个像素单元的结构示意图。请结合图5所示，液晶显示面板20包括按矩阵方式排列的多个像素单元P1，P2，...，PX，每一像素单元包括一像素电极，每一像素电极对应连接一条扫描线和一条数据线，如图5所示的像素单元50包括的扫描线60和数据线70，每一像素电极包括多个条状的第一电极图案51、多个条状的(ITO)间隙52、第二电极图案53以及第三电极图案54，其中：
第二电极图案53用于限定像素单元50的开口面积，两个条状的第三电极图案54垂直以呈十字形设置，用于将每一像素电极定义为第一区域O1、第二区域O2、第三区域O3和第四区域O4。条状的第二电极图案53环绕第一区域O1、第二区域O2、第三区域O3和第四区域O4，使像素单元50的像素电极整体呈矩形设置。
在本实施例中，位于左上方的第一区域O1与位于右上方的第二区域O2在同一水平方向上并排设置，位于右下方的第四区域O4与第一区域O1对角设置，位于左下方的第三区域O3与第二区域O2对角设置，并且第一区域O1与第四区域O4的电极走向相同，例如为图中所示的第一方向D1； 第二区域O2与第三区域O3的电极走向相同，例如为图中所示的第二方向D2。其中，第一方向D1与第二方向D2相互垂直，第一方向D1例如为与水平正方向呈135°夹角的方向，第二方向D2例如为与水平正方向呈45°夹角的方向，其中水平正方向表示沿与扫描线60所在方向平行且从第一区域O1朝向第二区域O2或第三区域O3朝向第四区域O4的方向。
在每一像素单元50中，每一像素电极的第一电极图案51的宽度L相同，且每一像素电极的间隙52的宽度S相同，也就是说，同一像素电极的第一电极图案51的宽度L相同、间隙52的宽度S相同。并且，多个条状的间隙52与多个条状的第一电极图案51，在像素电极所在的平面上交错设置。
本发明实施例的主要目的是，沿液晶显示面板20的中间区域D朝向液晶显示面板20的两侧区域C1、C2的方向，即图4所示的箭头方向，在多个像素单元P1，P2，...，PX中，每一像素单元50中的间隙52的面积之和逐渐增大。具体地，每一像素单元50中的像素电极的间隙52的宽度S依次增大、每一像素单元50中的像素电极的第一电极图案51的宽度L不变，优选与现有技术中的宽度之和相同，使得每一条第一电极图案51的宽度L与每一条间隙52的宽度S之和W依次增大。
根据像素单元的穿透率＝开口率*液晶效率(即单位开口面积的穿透率)，以及间隙52仅利于第一电极图案51对应的液晶朝向预倾方向倾倒，而对穿透率没有帮助，这些液晶显示领域的公知常识。可知增大像素电极的间隙52的宽度S、保持间隙52之间的第一电极图案51的宽度L不变，能够降低像素单元50对应区域的液晶效率，从而降低两侧区域C1、C2的像素单元50的穿透率，降低两侧区域C1、C2的显示亮度，此时两侧区域C1、C2的显示亮度与中间区域D的显示亮度差距变小甚至可以消除，整个液晶显示面板20的显示亮度趋向均匀，即可减缓或消除“两侧发白”现象。
基于上述发明目的，多个像素单元P1，P2，...，PX的结构不相同，本实施例以位于液晶显示面板20的中间区域D的一个像素单元，以及位于液晶显示面板20的两侧区域(C1)的一个像素单元，为例进行说明。请参阅图4和图5所示，定义两侧区域C1的像素单元50的像素电极的第一电极图案51的宽度为LC、间隙的宽度为SC，中间区域D的像素单元50的像素 电极的第一电极图案51的宽度为LD、间隙的宽度为SD，则LC＝LD且SC＞SD且LC+SC＞LD+SD。
此外，沿中间区域D朝向两侧区域C1、C2的方向，本实施例优选任意相邻两个像素单元50的像素电极的间隙52的宽度之差相等，也就是说，多个像素单元P1，P2，...，PX的像素电极的间隙52的宽度以相同的幅值依次递减。请参阅下面举例而言：
请再次结合图4和图5所示，沿中间区域D朝向两侧区域C1、C2的方向，选取相邻的11个区域a，b，c，d，e，f，g，h，i，j，k，假设区域a对应的像素电极的间隙52的宽度为6.0，区域b对应的像素电极的间隙52的宽度为6.2，区域c对应的像素电极的间隙52的宽度为6.4，区域d对应的像素电极的间隙52的宽度为6.6，区域e对应的像素电极的间隙52的宽度为6.8，区域f对应的像素电极的间隙52的宽度为7.0，区域g对应的像素电极的间隙52的宽度为7.2，区域h对应的像素电极的间隙52的宽度为7.4，区域i对应的像素电极的间隙52的宽度为7.6，区域j对应的像素电极的间隙52的宽度为7.8，区域k对应的像素电极的间隙52的宽度为8.0，其中间隙52的宽度单位为微米um。
并且，区域a与区域b、区域b与区域c、区域c与区域d、区域d与区域e、区域e与区域f、区域f与区域g、区域g与区域h、区域h与区域i、区域i与区域j、区域j与区域k，分别对应的相邻像素单元的像素电极的间隙52的宽度之差相等，均为0.2微米。
需要说明的是，在与沿中间区域D朝向两侧区域C1、C2的方向相垂直的重力方向上，本发明实施例优选每一区域对应的像素单元50的像素电极的第一电极图案51与间隙52的结构与尺寸相同。
请进一步结合图6所示，在每一像素电极的一个第一电极图案51的宽度L不变的基础上，例如假设一个第一电极图案51的宽度L为4um，在中间区域设定间隙52的宽度S＝2um(此时每条第一电极图案51的宽度L与每条间隙52的宽度S之和W＝6um)，将液晶显示面板20的两侧区域C1、C2各均分成10个区域，每个区域的间隙52的宽度S值依次增大0.2um，因此最外侧区域的间隙52的宽度S＝4um(此时每条第一电极图案51的宽度L与每条间隙52的宽度S之和W＝8um)。本实施例优选在光罩设计时进 行上述分区设计，并且通过传统的光刻制程，即可将本发明实施例的设计体现在液晶显示面板20的像素电极层上。当间隙52的宽度S值由2.0um增大到4.0um，像素单元50的液晶效率θ会下降80％～90％，即像素单元50的穿透率下降80％～90％，可极大地减轻“两侧发白”现象。
请结合图3～图5所示，本实施例的每一像素单元50还包括驱动像素电极的薄膜晶体管，且多个像素单元P1，P2，...，PX的薄膜晶体管的结构与尺寸完全相同。每一个薄膜晶体管均包括栅极g1、源极s1、漏极b1，其中栅极g1与对应的扫描线60电连接，源极s1与对应的数据线70电连接，漏极b1与对应的像素电极电连接。
再次说明，以上所述仅为本发明的实施例，并非因此限制本发明的专利范围，凡是利用本发明说明书及附图内容所作的等效结构或等效流程变换，例如各实施例之间技术特征的相互结合，或直接或间接运用在其他相关的技术领域，均同理包括在本发明的专利保护范围内。

Claims (19)

  1. 一种液晶显示面板，包括多个像素单元，其中，每一所述像素单元包括一像素电极，每一所述像素电极包括多个条状的间隙和多个条状的第一电极图案，所述间隙与所述第一电极图案交错设置，
    在所述多个像素单元中，沿所述液晶显示面板的中间区域朝向所述液晶显示面板的两侧区域的方向，每一所述像素单元中的所述间隙的面积之和逐渐增大，且每一所述像素单元中的所述第一电极图案的面积之和不变；
    其中，沿所述中间区域朝向所述两侧区域的方向，每一所述像素单元中的所述间隙的宽度依次增大、所述第一电极图案的宽度不变，且所述第一电极图案的宽度与所述间隙的宽度之和依次增大；
    所述像素单元还对应连接扫描线、数据线，所述像素单元还包括驱动所述像素电极的薄膜晶体管，所述薄膜晶体管的栅极、源极和漏极分别与所述扫描线、所述数据线和所述像素电极电连接，所述液晶显示面板还包括栅极驱动器和源极驱动器，所述栅极驱动器与所述扫描线连接，用于为所述多个像素单元提供扫描电压，所述源极驱动器与所述数据线连接，用于为所述多个像素单元提供驱动电压。
  2. 根据权利要求1所述的液晶显示面板，其中，每一所述像素电极包括第一区域、第二区域、第三区域和第四区域，所述第一区域与所述第二区域并列设置，所述第一区域与所述第四区域对角设置，所述第二区域与所述第三区域对角设置。
  3. 根据权利要求2所述的液晶显示面板，其中，所述第一区域的所述第一电极图案与所述第四区域的所述第一电极图案的电极走向相同，所述第二区域的所述第一电极图案与所述第三区域的所述第一电极图案的电极走向相同。
  4. 根据权利要求2所述的液晶显示面板，其中，所述第一区域的所述第一电极图案与所述第四区域的所述第一电极图案的电极走向呈第一方向，所述第二区域的所述第一电极图案与所述第三区域的所述第一电极图案的电极走向呈第二方向，且所述第一方向与所述第二方向相互垂直。
  5. 根据权利要求2所述的液晶显示面板，其中，每一所述像素电极还 包括第二电极图案和第三电极图案，所述第二电极图案环绕所述第一区域、所述第二区域、所述第三区域和所述第四区域设置，所述第三电极图案用于定义所述第一区域、所述第二区域、所述第三区域和所述第四区域。
  6. 一种液晶显示面板，包括多个像素单元，其中，每一所述像素单元包括一像素电极，每一所述像素电极包括多个条状的间隙和多个条状的第一电极图案，所述间隙与所述第一电极图案交错设置，
    其中，在所述多个像素单元中，沿所述液晶显示面板的中间区域朝向所述液晶显示面板的两侧区域的方向，每一所述像素单元中的所述间隙的面积之和逐渐增大，且每一所述像素单元中的所述第一电极图案的面积之和不变。
  7. 根据权利要求6所述的液晶显示面板，其中，沿所述中间区域朝向所述两侧区域的方向，每一所述像素单元中的所述间隙的宽度依次增大、所述第一电极图案的宽度不变，且所述第一电极图案的宽度与所述间隙的宽度之和依次增大。
  8. 根据权利要求7所述的液晶显示面板，其中，每一所述像素电极包括第一区域、第二区域、第三区域和第四区域，所述第一区域与所述第二区域并列设置，所述第一区域与所述第四区域对角设置，所述第二区域与所述第三区域对角设置。
  9. 根据权利要求8所述的液晶显示面板，其中，所述第一区域的所述第一电极图案与所述第四区域的所述第一电极图案的电极走向相同，所述第二区域的所述第一电极图案与所述第三区域的所述第一电极图案的电极走向相同。
  10. 根据权利要求8所述的液晶显示面板，其中，所述第一区域的所述第一电极图案与所述第四区域的所述第一电极图案的电极走向呈第一方向，所述第二区域的所述第一电极图案与所述第三区域的所述第一电极图案的电极走向呈第二方向，且所述第一方向与所述第二方向相互垂直。
  11. 根据权利要求8所述的液晶显示面板，其中，每一所述像素电极还包括第二电极图案和第三电极图案，所述第二电极图案环绕所述第一区域、所述第二区域、所述第三区域和所述第四区域设置，所述第三电极图案用于定义所述第一区域、所述第二区域、所述第三区域和所述第四区域。
  12. 根据权利要求6所述的液晶显示面板，其中，所述像素单元还对应连接扫描线、数据线，所述像素单元还包括驱动所述像素电极的薄膜晶体管，所述薄膜晶体管的栅极、源极和漏极分别与所述扫描线、所述数据线和所述像素电极电连接。
  13. 根据权利要求12所述的液晶显示面板，其中，所述液晶显示面板还包括栅极驱动器和源极驱动器，所述栅极驱动器与所述扫描线连接，用于为所述多个像素单元提供扫描电压，所述源极驱动器与所述数据线连接，用于为所述多个像素单元提供驱动电压。
  14. 一种阵列基板，适用于液晶显示面板，其中，所述阵列基板包括多个像素单元，每一所述像素单元包括一像素电极，每一所述像素电极包括多个条状的间隙和多个条状的电极图案，所述间隙与所述电极图案交错设置，
    其中，在所述多个像素单元中，沿所述液晶显示面板的中间区域朝向所述液晶显示面板的两侧区域的方向，每一所述像素单元中的所述间隙的面积之和逐渐增大，且每一所述像素单元中的所述电极图案的面积之和不变。
  15. 根据权利要求14所述的阵列基板，其中，沿所述中间区域朝向所述两侧区域的方向，每一所述像素单元中的所述间隙的宽度依次增大、所述电极图案的宽度不变，且所述电极图案的宽度与所述间隙的宽度之和依次增大。
  16. 根据权利要求15所述的阵列基板，其中，每一所述像素电极包括第一区域、第二区域、第三区域和第四区域，所述第一区域与所述第二区域并列设置，所述第一区域与所述第四区域对角设置，所述第二区域与所述第三区域对角设置。
  17. 根据权利要求16所述的阵列基板，其中，所述第一区域的所述第一电极图案与所述第四区域的所述第一电极图案的电极走向相同，所述第二区域的所述第一电极图案与所述第三区域的所述第一电极图案的电极走向相同。
  18. 根据权利要求16所述的阵列基板，其中，所述第一区域的所述第一电极图案与所述第四区域的所述第一电极图案的电极走向呈第一方向， 所述第二区域的所述第一电极图案与所述第三区域的所述第一电极图案的电极走向呈第二方向，且所述第一方向与所述第二方向相互垂直。
  19. 根据权利要求16所述的阵列基板，其中，每一所述像素电极还包括第二电极图案和第三电极图案，所述第二电极图案环绕所述第一区域、所述第二区域、所述第三区域和所述第四区域设置，所述第三电极图案用于定义所述第一区域、所述第二区域、所述第三区域和所述第四区域。
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