WO2015131595A1 - 一种时序控制电路及方法 - Google Patents
一种时序控制电路及方法 Download PDFInfo
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- WO2015131595A1 WO2015131595A1 PCT/CN2014/093157 CN2014093157W WO2015131595A1 WO 2015131595 A1 WO2015131595 A1 WO 2015131595A1 CN 2014093157 W CN2014093157 W CN 2014093157W WO 2015131595 A1 WO2015131595 A1 WO 2015131595A1
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- Prior art keywords
- freewheeling tube
- freewheeling
- driver
- signal
- voltage
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- 238000000034 method Methods 0.000 title claims abstract description 62
- 239000003990 capacitor Substances 0.000 claims abstract description 40
- HEZMWWAKWCSUCB-PHDIDXHHSA-N (3R,4R)-3,4-dihydroxycyclohexa-1,5-diene-1-carboxylic acid Chemical compound O[C@@H]1C=CC(C(O)=O)=C[C@H]1O HEZMWWAKWCSUCB-PHDIDXHHSA-N 0.000 claims description 30
- 238000004590 computer program Methods 0.000 claims description 12
- 238000011001 backwashing Methods 0.000 claims description 2
- 230000032258 transport Effects 0.000 abstract 2
- 238000010586 diagram Methods 0.000 description 27
- 230000002262 irrigation Effects 0.000 description 5
- 238000003973 irrigation Methods 0.000 description 5
- 238000001514 detection method Methods 0.000 description 3
- 238000013461 design Methods 0.000 description 2
- 238000012545 processing Methods 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 230000003111 delayed effect Effects 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
- 238000013022 venting Methods 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/36—Means for starting or stopping converters
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of DC power input into DC power output
- H02M3/02—Conversion of DC power input into DC power output without intermediate conversion into AC
- H02M3/04—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters
- H02M3/10—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/156—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/32—Means for protecting converters other than automatic disconnection
- H02M1/322—Means for rapidly discharging a capacitor of the converter for protecting electrical components or for preventing electrical shock
Definitions
- the present invention relates to the field of timing control circuits, and in particular, to a timing control circuit and method.
- the first power-on voltage may pull the post-up voltage to a certain amplitude through the internal circuit of the chip, resulting in a pre-bias voltage for the power supply after power-on, if not
- the freewheeling MOS transistor is turned on with a relatively large duty cycle, which causes the original pre-bias voltage to be released through the output inductor and the down tube. As a result, the power-on waveform is not monotonous.
- the output capacitor and the load have a large influence on the discharge time of the power supply voltage at the time of shutdown, at some fast switching airports, the input voltage of the service chip will have a certain pre-bias voltage, if the voltage is still sufficient Large-scale, may cause business chip self-test lock or even damage business chip.
- the invention provides a timing control circuit and method, the purpose of which is to eliminate the backwash voltage on the voltage output end during power-on and to ensure that the output capacitance of each voltage when the power is off has a residual voltage release path, thereby ensuring shutdown. Timing is unaffected by output capacitance and load.
- a timing control circuit includes a freewheeling tube and an output capacitor, the drain of the freewheeling tube is connected to a voltage output end, one end of the output capacitor is connected to the voltage output end, and the other end of the output capacitor is Grounding
- the control circuit further includes a first freewheeling tube driver and a second freewheeling tube driver, a first signal output end of the first freewheeling tube driver is connected to a gate of the freewheeling tube, the second a second signal output end of the freewheeling tube driver is connected to a gate of the freewheeling tube;
- the second signal output end When the power is on, the second signal output end sends a second driving signal to the freewheeling tube to drive the freewheeling tube to operate, and the backwashing voltage on the voltage output end is discharged through the freewheeling tube;
- the second signal output end sends a second driving signal to the freewheeling tube to drive the freewheeling tube to operate, and the residual voltage on the output capacitor is discharged through the freewheeling tube.
- control circuit further includes a first resistor and a second resistor, wherein:
- the first signal output end is connected to the gate of the freewheeling tube through the first resistor
- the second signal output terminal is connected to the gate of the freewheeling tube through the second resistor.
- control circuit further includes a rectifier driver, a third resistor, a rectifier, and an inductor, wherein:
- the rectifier driver includes a third signal output terminal, and the third signal output terminal is connected to the gate of the rectifier tube through the third resistor;
- a source of the rectifier is connected to a drain of the freewheeling tube, and a drain of the rectifier is connected to the voltage input end;
- One end of the inductor is respectively connected to a drain of the freewheeling tube and a source of the rectifier, and the other end of the inductor is connected to the voltage output end.
- the first freewheeling tube driver further includes a first driving enable control end and a first driving state display end;
- the second freewheeling tube driver further includes a second driving enable control terminal, a second driving state display terminal, and a circuit enable control terminal;
- the rectifier driver includes a third driving state display end;
- the second driving enable control end is connected to the first drive enable control end, and the second drive state display end is connected to the first drive state display end and the third drive state display end.
- a timing control method is applied to a power-on process and applied to a DCDC chip with a preset bias voltage
- the DCDC chip comprises: a first freewheeling tube driver, a second freewheeling tube driver, a rectifier driver, and a freewheeling tube, wherein a first signal output end of the first freewheeling tube driver is coupled to a gate of the freewheeling tube, a second signal output end of the second freewheeling tube driver and the freewheeling
- the gates of the tubes are connected, and the third signal output end of the rectifier driver is connected to the drain of the freewheeling tube.
- the control method includes:
- the second signal output terminal outputs a second driving signal to drive the freewheeling tube to work, and the voltage output terminal is reversed from other paths through the freewheeling tube. The voltage that is poured out is released;
- the second freewheeling tube driver is turned off, and a first driving signal is output to the freewheeling tube through the first signal output end, so that The freewheeling tube starts in the normal way.
- the method further includes:
- An enable signal on the second freewheeling tube driver for receiving operation of the DCDC chip The state of the circuit enable control terminal is equivalent to the open state
- a first driving signal is output to the freewheel through the first signal output, and the freewheel is activated in a normal manner.
- the method before the step of outputting the second driving signal to drive the freewheeling tube, the method further includes:
- the second driving state display end reads the first driving state display port state of the first freewheeling tube driver.
- the method further includes:
- the second driving state display end of the second freewheeling tube driver outputs a second freewheeling tube driver operating signal to the first driving state display end.
- the step of turning off the second freewheeling tube driver and outputting the first driving signal to the freewheeling tube through the first signal output end includes:
- the first freewheeling tube driver When the state of the circuit enable control terminal is changed to the on state, the first freewheeling tube driver outputs a first drive to the second drive enable control terminal through the first drive enable control terminal after a certain time delay Enable signal
- the second signal output end stops outputting the second driving signal, and passes the second driving state display end to the first driving state display end And outputting, by the third driving state display end, the second freewheeling tube driver stop working signal;
- the end outputs a first driving signal to the freewheeling tube
- the third signal output end outputs a third driving signal to the freewheeling tube.
- a timing control method is applied to a power-off process and is applied to a DCDC chip with a preset bias voltage
- the DCDC chip comprises: a first freewheeling tube driver, a second freewheeling tube driver, a freewheeling tube, and An output capacitor, wherein the first signal output of the first freewheeling tube driver and the continuation a gate of the flow tube is connected, a second signal output end of the second freewheeling tube driver is connected to a gate of the freewheeling tube, and a voltage output end is connected to a drain of the freewheeling tube.
- One end of the output capacitor is connected to the voltage output end, and the other end is grounded.
- the control method includes:
- the second signal output terminal outputs a second driving signal to drive the freewheeling tube to work, and the residual voltage on the output capacitor is discharged through the freewheeling tube Off
- the second freewheeling tube driver stops operating if the supply voltage of the second freewheeling tube driver is as low as a voltage range in which the second freewheeling tube driver can operate normally.
- control circuit outputs an undervoltage warning signal when the voltage output terminal is powered down.
- a computer program comprising program instructions that, when executed by a computer, cause the computer to perform any of the above described timing control methods applied to the power up process.
- a carrier carrying the computer program.
- a computer program comprising program instructions that, when executed by a computer, cause the computer to perform any of the above-described methods of applying to the power-down process timing control.
- a carrier carrying the computer program.
- the first signal output end of the first freewheeling tube driver is connected to the gate of the freewheeling tube
- the second signal output end of the second freewheeling tube driver is connected to the gate of the freewheeling tube.
- the second freewheeling tube driver can drive the freewheeling tube during the power-on process, so that the backflow voltage on the voltage output end is discharged through the freewheeling tube, and the second freewheeling tube driver can drive the freewheeling tube during the power-off process. Therefore, the residual voltage on the output capacitor is discharged through the freewheeling tube, ensuring that the shutdown timing is not affected by the output capacitor and load.
- FIG. 1 is a schematic diagram showing the waveform of power-on of a commonly used BUCK circuit
- FIG. 2 is a schematic diagram showing the shutdown timing of a commonly used BUCK circuit
- Figure 3 is a diagram showing a first control circuit diagram of the timing in the embodiment of the present invention.
- FIG. 4 is a flow chart showing a control method applied to a power-on process using the first control circuit diagram of FIG. 3 in the embodiment of the present invention
- Figure 5 is a diagram showing a power-on waveform after using the first control circuit diagram of Figure 3;
- Figure 6 is a diagram showing a second control circuit diagram of the timing in the embodiment of the present invention.
- FIG. 7 is a flow chart showing a control method applied to a power-on process using the second control circuit diagram of FIG. 6 in the embodiment of the present invention.
- Figure 8 is a diagram showing a power-on waveform after using the second control circuit diagram of Figure 6;
- FIG. 9 is a flow chart showing a control method applied to a power-off process using the first control circuit diagram of FIG. 3 in the embodiment of the present invention.
- Fig. 10 is a view showing a power-down waveform after the first control circuit diagram of Fig. 3 is used.
- Embodiment 1 is a diagrammatic representation of Embodiment 1:
- a first control circuit diagram of the timing in the embodiment of the present invention includes a freewheeling tube D2, a first freewheeling tube driver M1, and a second freewheeling tube driver M2, wherein the first freewheeling tube
- the first signal output terminal M101 of the driver M1 is connected to the gate D201 of the freewheeling tube D2
- the second signal output terminal M201 of the second freewheeling tube driver M2 is connected to the gate D201 of the freewheeling tube D2.
- the second freewheeling driver M2 further includes a circuit enable control terminal M204.
- control circuit The first resistor R1 and the second resistor R2 are further included, and the first signal output terminal M101 of the first freewheeling tube driver M1 can be connected to the gate D201 of the freewheeling tube D2 through the first resistor R1, and the second freewheeling tube driver The second signal output terminal M201 of M2 can be connected to the gate D201 of the freewheeling tube D2 through the second resistor R2, and the drain D202 of the freewheeling tube D2 is also connected to the voltage output terminal Vout.
- the control circuit further includes a rectifier driver M3, a third resistor R3, a rectifier D1, an inductor L, and an output capacitor C.
- the rectifier driver M3 includes a third signal output terminal M301, and the third signal output terminal M301 passes
- the third resistor R3 is connected to the gate (not shown) of the rectifier D1, and the source of the rectifier D1 (not shown) is connected to the drain D202 of the freewheeling tube D2; the drain of the D1 (not shown) is connected to the voltage input terminal Vin; one end of the inductor L is respectively connected to the drain D202 of the freewheeling tube D2 and the source of the rectifier D1 (not shown), and the other end is connected to the voltage.
- the output terminal Vout is connected; one end of the output capacitor C is connected to the voltage output terminal Vout, and the other end is grounded.
- a flowchart of a control method applied to a power-on process using the first control circuit diagram in FIG. 3 in the embodiment of the present invention includes the following steps:
- step S101 the detection circuit enables the state of the control terminal.
- the circuit enable control terminal M204 when the DCDC chip is turned on, the circuit enable control terminal M204 is allowed to be in a closed state, and the second freewheeling transistor driver M2 detects the state of the circuit enable control terminal M204.
- Step S102 if the state of the circuit enable control terminal is off state, the second signal output terminal outputs a second drive signal to drive the freewheeling tube to work, and the freewheeling tube discharges the voltage reversed from the other path on the voltage output terminal.
- the second freewheeling tube driver M2 detects that the state of the circuit enable control terminal M204 is off
- the second freewheeling tube driver M2 is internally processed, and the second signal output terminal M201 outputs a second driver.
- the signal drives the freewheeling tube D2 to operate such that the freewheeling tube D2 bleeds off the voltage at the voltage output terminal Vout that is backflushed from the other paths.
- the second driving signal may be a square wave signal, and the second driving signal may be driven by the second resistor R2 to drive the freewheeling tube D2, and the freewheeling tube D2 and the inductor L bleeder voltage output terminal Vout are reversed from other paths. The voltage that is being pumped.
- the current When the freewheeling tube D2 is turned on, the current has a certain relationship with the output voltage of the voltage output terminal Vout, the DC resistance of the inductor L, and the on-resistance of the freewheeling tube D2.
- current limitation is required. Increase the DC resistance of the inductor L or reduce the drive of the freewheeling tube D2 within an acceptable range
- the voltage mode increases the on-resistance of the freewheeling tube D2, thereby limiting the bleeder current.
- the average value of the current on the freewheeling tube D2 has a large relationship with the conduction time of the freewheeling tube D2. Therefore, in order to ensure that the freewheeling tube D2 is not damaged by excessive current during this period of time, it can be guided.
- the pass time is limited to a range of smaller values.
- Step S103 if the state of the circuit enable control terminal is the on state, the second freewheeling tube driver is turned off, and the first driving signal is output to the freewheeling tube through the first signal output end, so that the freewheeling tube is started in a normal manner.
- the state of the circuit enable control terminal M204 of the second freewheeling tube driver M2 is in an on state, and the second signal output terminal M201 of the second freewheeling tube driver M2 is stopped.
- the second driving signal is outputted, that is, the second signal output terminal M201 is suspended, and the second freewheeling tube driver M2 is turned off.
- the first signal output terminal M101 of the first freewheeling tube driver M1 is turned to The freewheeling tube D2 outputs the first driving signal, that is, the freewheeling tube D2 is activated according to the normal starting mode of the DCDC chip, and is no longer affected by the second freewheeling tube driver M2.
- the state of the circuit enable control terminal M204 is equivalent to the open state, that is, the second freewheeling transistor driver M2 is shielded, and the DCDC chip is the same as the common common chip currently used.
- FIG. 5 it is a power-on waveform diagram after the first control circuit diagram in FIG. Comparing FIG. 5 with FIG. 1, it can be seen from FIG. 1 that the output voltage of the voltage output terminal Vout starts to be output from the start of the DCDC chip regardless of whether or not there is an enable signal, and the reverse irrigation step takes a longer time.
- the second signal output terminal M201 of the second freewheeling tube driver M2 outputs a second driving signal of the square waveform, and the voltage output terminal Vout is backfilled from other paths. The voltage is released and the time for the reverse irrigation step is shortened.
- the control circuit diagram is an improved control circuit diagram based on FIG.
- the first freewheeling tube driver M1 further includes a first driving enable control terminal M102 and a first driving state display terminal M103
- the second freewheeling tube driver M2 further includes a second driving enable control terminal M202
- the rectifier driver M3 further includes a third driving state display terminal M303, wherein the first driving state display terminal M103 and the second driving state display terminal M203 and the third driving state The state display terminal M303 is connected, and the first drive enable control terminal M102 is connected to the second drive enable control terminal M202.
- a flowchart of a control method applied to a power-on process using the second control circuit diagram of FIG. 6 in the embodiment of the present invention includes the following steps:
- step S201 the detection circuit enables the state of the control terminal.
- the circuit enable control terminal M204 when the DCDC chip is turned on, the circuit enable control terminal M204 is allowed to be in a closed state, and the second freewheeling transistor driver M2 detects the state of the circuit enable control terminal M204.
- Step S202 reading the state of the first driving state display port.
- the first signal output terminal M101 is idle, that is, the first driving signal is not output.
- the first driving state display terminal M103 reads the state of the first signal output terminal M101, and transmits the state to the second state.
- the driving state display terminal M203 reads the state by the second driving state display terminal M203.
- Step S203 if the state of the circuit enable control terminal is off state, the second signal output terminal outputs a second driving signal to drive the freewheeling tube to work, and the freewheeling tube discharges the residual voltage on the output capacitor, and the second driving state displays The end outputs a second freewheeling tube driver operating signal to the first driving state display end.
- the second freewheeling tube driver M2 detects that the state of the circuit enable control terminal M204 is the off state, and the second driving state display terminal M203 reads the state of the first driving state display terminal M103, and the second continuation
- the flow tube driver M2 is internally processed, and the second signal output terminal M201 outputs a second driving signal to drive the freewheeling tube D2 to operate, so that the freewheeling tube D2 bleeds off the voltage on the voltage output terminal Vout that is backflushed from other paths.
- the second driving state display terminal M203 reads the working signal of the second signal output terminal M201, and sends the working signal to the first driving state display terminal M103, first The drive status display terminal M103 reads the operation signal.
- step S204 the circuit enable control terminal is changed to the on state. After the first freewheeling tube driver is delayed for a certain time, the first drive enable control terminal outputs a drive enable signal to the second drive enable control terminal.
- the slave circuit enable control terminal M204 The state of the state is changed to the on state, and the first freewheeling driver M1 sends the first driving signal, and the delay time between the two is long. Therefore, after the first freewheeling tube driver M1 has a certain time delay, the first driving enables The control terminal M102 outputs a drive enable signal to the second drive enable control terminal M202, indicating that the first freewheeling tube driver M1 is ready for operation. However, since the second freewheeling tube driver M2 has not been turned off at this time, if the control circuit is normally started at this time, the rectifier tube D1 and the freewheeling tube D2 are simultaneously turned on, and therefore the control circuit cannot be normally started at this time.
- Step S205 the second driving enable control terminal receives the first driving enable signal, the second signal output terminal stops outputting the second driving signal, and the second driving state display end displays to the first driving state display end and the third driving state display end.
- the terminal outputs a second freewheeling tube driver to stop the operation signal.
- the second signal output terminal M201 immediately stops outputting the second drive signal, and the second drive state display terminal M203 reads the second The stop signal of the signal output terminal M201 is sent to the first driving state display terminal M103 and the third driving state display terminal M303, indicating that the control circuit can be normally started.
- Step S206 the first driving state display end and the third driving state display end receive the second freewheeling tube driver stop working signal, and the state of the circuit enable control end is an open state, and the first signal output end outputs to the freewheeling tube.
- a driving signal, the third signal output terminal outputs a third driving signal to the freewheeling tube.
- the first driving state display terminal M103 and the third driving state display terminal M303 receive the second freewheeling tube driver M2 to stop the operation signal, and the state of the circuit enable control terminal M204 is the open state, and the control is performed at this time.
- the circuit begins to function normally and is completely unaffected by the second freewheeling tube driver M2.
- first freewheeling tube driver M1 and the second freewheeling tube driver M2 can be used for the chip with high integration requirement and no need to adjust the resistance R2 to realize the conduction resistance adjustment of the freewheeling tube D2.
- the functions similar to those implemented by the flowchart in Fig. 7 are realized by merging and controlling similarly to the flowchart in Fig. 7.
- the power-on waveform diagram of the second control circuit diagram of FIG. 6 is used in the present invention.
- the circuit in FIG. 5 enables the state of the control terminal M204.
- the state is on
- the second signal output terminal M201 stops outputting the second driving signal, and at this time, the output voltage still has a reverse irrigation step; and in FIG. 10, when the state of the circuit enable control terminal M204 is the on state,
- the two signal output terminals M201 continue to output the second driving signal until the second signal output terminal M201 stops outputting the second driving signal when the DCDC chip starts to start, eliminating the reverse irrigation step on the output voltage.
- Embodiment 2 is a diagrammatic representation of Embodiment 1:
- a flowchart of a control method used in a power-off process using the first control circuit diagram in FIG. 3 in the embodiment of the present invention includes the following steps:
- step S301 the detection circuit enables the state of the control terminal.
- the circuit enable control terminal M204 changes from the on state to the off state within a certain period of time, and the second freewheeling transistor driver M2 detects the state of the circuit enable control terminal M204.
- Step S302 if the state of the circuit enable control terminal is off state, the second signal output terminal outputs a second drive signal to drive the freewheeling tube to operate, and the freewheeling tube discharges the residual voltage on the output capacitor.
- the second freewheeling tube driver M2 detects that the state of the circuit enable control terminal M204 is off, the second freewheeling tube driver M2 undergoes internal processing, and the second signal output terminal M201 outputs a second again.
- the drive signal drives the freewheeling tube D2 to operate such that the freewheeling tube D2 bleeds off residual voltage on the output capacitor C.
- the second driving signal is a square wave signal, and the second driving signal drives the freewheeling tube D2 to operate, and the freewheeling tube D2 and the inductor L discharge the residual voltage on the output capacitor C.
- the instantaneous current has a certain relationship with the output voltage, the DC resistance of the inductor L, and the on-resistance of the freewheeling tube D2.
- the current needs to be limited to an acceptable range.
- the conduction resistance of the freewheeling tube D2 can be increased by increasing the DC resistance of the inductance L or by lowering the driving voltage of the freewheeling tube D2, thereby limiting the bleeder current.
- the average value of the current on the freewheeling tube D2 has a large relationship with the conduction time of the freewheeling tube D2. Therefore, in order to ensure that the freewheeling tube D2 is not damaged by excessive current during this period of time, it may be The on time is limited to a small value.
- Step S303 reducing the supply voltage of the second freewheeling tube driver. If the supply voltage of the second freewheeling tube driver is low to a voltage range in which it can operate normally, the second freewheeling tube driver stops working.
- the driving voltage of the freewheeling tube D2 gradually decreases, and although the freewheeling tube D2 cannot be in a fully conducting state, the residual voltage can still be supplied.
- FIG. 10 it is a power-down waveform diagram after the first control circuit diagram in FIG. Assume that there are two output voltages in the DCDC chip shutdown process, which are the first output voltage and the second output voltage respectively.
- the first output voltage is the output voltage with small load and large output capacitor C
- the second output voltage is large load and output.
- the output voltage of capacitor C is small. Comparing FIG. 10 with FIG. 2, it can be seen from FIG. 2 that the first output voltage ratio is even if the DCDC chip is turned off completely in the desired order (the first output voltage is first powered down than the second output voltage).
- the second output voltage is powered down slowly, and the last power-off takes longer than the second output voltage, that is, the power-down sequence is greatly affected by the load and the output capacitor C.
- the broken line in FIG. 10 indicates the first output voltage power-down waveform in FIG. 2, and the solid line in FIG. 10 indicates the power-down waveform after using the first control circuit pattern in FIG.
- the second signal output terminal M201 outputs a second driving signal, and the first output voltage starts to be powered down, because the residual voltage on the output capacitor C passes through the inductor L and continues
- the flow tube D2 is vented, so the process of lowering the first output voltage is accelerated, and the timing requirement when the DCDC chip is turned off is satisfied, that is, the first output voltage is lower than the second output voltage, and the first output voltage is lower than the second output voltage. The requirement to use a shorter power-off time.
- the circuit enable control terminal M204 is turned off, the rectifier driver M3, the first freewheeling tube driver M1 are simultaneously turned off, and the second freewheeling tube driver M2 is turned on.
- the embodiment of the invention also discloses a computer program, comprising program instructions, when the program instruction is executed by a computer, enabling the computer to perform any of the above-mentioned sequence control applied to the power-on process Method of production.
- a carrier carrying the computer program carrying the computer program.
- the embodiment of the invention further discloses a computer program, comprising program instructions, when the program instruction is executed by a computer, so that the computer can perform any of the above-mentioned methods applied to the power-down process timing control.
- a carrier carrying the computer program
- the first signal output end of the first freewheeling tube driver is connected to the gate of the freewheeling tube
- the second signal output end of the second freewheeling tube driver is connected to the gate of the freewheeling tube.
- the second freewheeling tube driver can drive the freewheeling tube during the power-on process, so that the backflow voltage on the voltage output end is discharged through the freewheeling tube, and the second freewheeling tube driver can drive the freewheeling tube during the power-off process. Therefore, the residual voltage on the output capacitor is discharged through the freewheeling tube, ensuring that the shutdown timing is not affected by the output capacitor and load. Therefore, the present invention has strong industrial applicability.
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- Dc-Dc Converters (AREA)
Abstract
一种时序控制电路及方法，包括续流管（D2）和输出电容（C）。续流管的漏极与一电压输出端（Vout）连接。输出电容的一端与电压输出端连接，另一端接地。控制电路还包括第一续流管驱动器（M1）和第二续流管驱动器（M2）。第一续流管驱动器的第一信号输出端（M101）和第二续流管驱动器的第二信号输出端（M201）分别与续流管的栅极（D201）连接；上电时，第二信号输出端向续流管输送第二驱动信号，驱动续流管工作，电压输出端上的反灌电压通过续流管进行泄放；下电时，第二信号输出端向续流管输送第二驱动信号，驱动续流管工作，输出电容上的残余电压通过续流管进行泄放。该电路及方法消除了上电时电压输出端的反灌电压以及保证了下电时输出电容上的残余电压具有泄放途径。
Description
本发明涉及时序控制电路技术领域，尤其是涉及一种时序控制电路及方法。
目前很多业务芯片都有不同输入电压的供电需求，且为保证芯片正常工作，会对不同的输入电压有一定的时序要求。然而，对于某些芯片，先上电的电压可能会通过芯片的内部电路将后上电的电压拉高至一定幅值的电压，从而导致后上电的电源有一个预偏置电压，若不做处理，在电源BUCK电路(如图1所示)启动过程中，续流MOS管以一个比较大的占空比打开，会导致原有的预偏置电压通过输出电感与下管释放掉，从而导致上电波形不单调。现在不少芯片都有预偏置功能，即在开机过程中，输出电压未达到预偏置电压时，不打开或者以一个比较小的占空比打开下管，直到输出电压大于预偏置电压，从而实现输出电压单调上升，该方案虽然解决了输出电压上升不单调的问题，但是，在实际应用中，如果该电压有其它用途(如时序控制等)，由于上电中有平台电压的存在(如图1所示)，如果该平台电压足够大，则可能会导致电路无法达到预期设计(如时序混乱)。
其次，很多芯片都有掉电时序要求，虽然额外增加电路可以实现DCDC芯片以一定的顺序关断，然而各路电压的电流需求不一样，则产生该电压的DCDC芯片就有差别，输出电容也不同，则在关机时，由于负载不同，输出电容不同，负载小，输出电容大的电压放电很慢，而负载大，输出电容小的放电比较快，即使完全按照所需的顺序关闭DCDC芯片，其掉电时序仍会受到输出电容与负载的较大影响(如图2所示)，因此，目前无法实现关机时序的设计。
再者，由于输出电容与负载对关机时电源电压的放电时间有较大影响，则在某些快速开关机场合，业务芯片的输入电压会有一定的预偏置电压，如果该电压还在足够大的范围内，可能会导致业务芯片自检锁死甚至损坏业务
芯片。
所以，如何消除上电时的反灌台阶以消除台阶引起的各种问题，如何在下电时尽快泄放掉输出电容上的残余电压以能够实现快速开关机以及使关机时序成为可能，是目前需要解决的问题。
发明内容
本发明提供了一种时序控制电路及方法，目的在于消除上电时电压输出端上的反灌电压以及保证下电时各路电压的输出电容都有一个残余电压的泄放途径，从而保证关机时序不受输出电容和负载的影响。
为了实现上述目的，采用如下技术方案：
一种时序控制电路，包括续流管和输出电容，所述续流管的漏极与一电压输出端相连接，所述输出电容的一端与电压输出端相连接，所述输出电容的另一端接地；
所述控制电路还包括第一续流管驱动器和第二续流管驱动器，所述第一续流管驱动器的第一信号输出端与所述续流管的栅极相连接，所述第二续流管驱动器的第二信号输出端与所述续流管的栅极相连接；其中，
上电时，所述第二信号输出端向所述续流管输送第二驱动信号，驱动所述续流管工作，所述电压输出端上的反灌电压通过续流管进行泄放；
下电时，所述第二信号输出端向所述续流管输送第二驱动信号，驱动所述续流管工作，所述输出电容上的残余电压通过续流管进行泄放。
可选地，所述控制电路还包括第一电阻和第二电阻，其中：
所述第一信号输出端通过所述第一电阻与所述续流管的栅极相连接；
所述第二信号输出端通过所述第二电阻与所述续流管的栅极相连接。
可选地，所述控制电路还包括整流管驱动器、第三电阻、整流管和电感，其中：
所述整流管驱动器包括第三信号输出端，所述第三信号输出端通过所述第三电阻与所述整流管的栅极相连接；
所述整流管的源极与所述续流管的漏极相连接，所述整流管的漏极与所述电压输入端相连接；
所述电感的一端分别与所述续流管的漏极和所述整流管的源极相连接，所述电感的另一端与所述电压输出端相连。
可选地，所述第一续流管驱动器还包括第一驱动使能控制端和第一驱动状态显示端；
所述第二续流管驱动器还包括第二驱动使能控制端、第二驱动状态显示端和电路使能控制端；
所述整流管驱动器包括第三驱动状态显示端；其中，
所述第二驱动使能控制端与所述第一驱动使能控制端相连接，所述第二驱动状态显示端与所述第一驱动状态显示端和第三驱动状态显示端相连接。
一种时序控制方法，应用于上电过程，且应用于带预置偏压的DCDC芯片，其中，所述DCDC芯片包括：第一续流管驱动器、第二续流管驱动器、整流管驱动器和续流管，其中所述第一续流管驱动器的第一信号输出端与所述续流管的栅极相连接，所述第二续流管驱动器的第二信号输出端与所述续流管的栅极相连接，所述整流管驱动器的第三信号输出端与所述续流管的漏极相连接，所述控制方法包括：
检测第二续流管驱动器上的用于接收允许DCDC芯片正常工作的使能信号的电路使能控制端的状态；
若所述电路使能控制端的状态为关闭状态，则所述第二信号输出端输出第二驱动信号驱动所述续流管工作，并通过所述续流管将电压输出端上从其他路径反灌过来的电压泄放掉；
若所述电路使能控制端的状态更改为开启状态，则将所述第二续流管驱动器关闭，并通过所述第一信号输出端向所述续流管输出第一驱动信号，使得所述续流管以正常方式启动。
可选地，该方法还包括：
将所述第二续流管驱动器上的用于接收允许DCDC芯片工作的使能信号
的电路使能控制端的状态等效于开启状态；
通过所述第一信号输出端向所述续流管输出第一驱动信号，所述续流管以正常方式启动。
可选地，所述第二信号输出端输出第二驱动信号驱动所述续流管工作的步骤之前，该方法还包括：
第二驱动状态显示端读取第一续流管驱动器的第一驱动状态显示端端口状态。
可选地，所述第二信号输出端输出第二驱动信号驱动所述续流管工作的步骤之后，该方法还包括：
所述第二续流管驱动器的第二驱动状态显示端向所述第一驱动状态显示端输出第二续流管驱动器工作信号。
可选地，所述将所述第二续流管驱动器关闭，并通过所述第一信号输出端向所述续流管输出第一驱动信号的步骤包括：
将所述电路使能控制端的状态更改为开启状态时，所述第一续流管驱动器经过一定时间延迟后通过第一驱动使能控制端向所述第二驱动使能控制端输出第一驱动使能信号；
通过所述第二驱动使能控制端接收到第一驱动使能信号，所述第二信号输出端停止输出第二驱动信号，并通过第二驱动状态显示端向所述第一驱动状态显示端和第三驱动状态显示端输出所述第二续流管驱动器停止工作信号；
通过所述第一驱动状态显示端和第三驱动状态显示端接收到所述第二续流管驱动器停止工作信号，且所述电路使能控制端的状态为开启状态时，所述第一信号输出端向所述续流管输出第一驱动信号，所述第三信号输出端向所述续流管输出第三驱动信号。
一种时序控制方法，应用于下电过程，且应用于带预置偏压的DCDC芯片，其中，所述DCDC芯片包括：第一续流管驱动器、第二续流管驱动器、续流管和输出电容，其中所述第一续流管驱动器的第一信号输出端与所述续
流管的栅极相连接，所述第二续流管驱动器的第二信号输出端与所述续流管的栅极相连接，一电压输出端与所述续流管的漏极相连接，所述输出电容的一端与电压输出端相连接，另一端接地，所述控制方法包括：
检测第二续流管驱动器上的用于接收允许DCDC芯片工作的使能信号的电路使能控制端的状态；
若所述电路使能控制端的状态为关闭状态，则所述第二信号输出端输出第二驱动信号驱动所述续流管工作，并通过所述续流管将输出电容上的残余电压泄放掉；
降低所述第二续流管驱动器的供电电压；
若所述第二续流管驱动器的供电电压低至所述第二续流管驱动器能正常工作的电压范围时，所述第二续流管驱动器停止工作。
可选地，当所述电压输出端掉电时，所述控制电路输出欠压告警信号。
一种计算机程序，包括程序指令，当该程序指令被计算机执行时，使得该计算机可执行上述任意的应用于上电过程的时序控制方法。一种载有该计算机程序的载体。
一种计算机程序，包括程序指令，当该程序指令被计算机执行时，使得该计算机可执行上述任意的应用于下电过程时序控制方法。一种载有该计算机程序的载体。
本发明技术方案的有益效果是：
本发明技术方案通过将第一续流管驱动器的第一信号输出端与续流管的栅极相连接，第二续流管驱动器的第二信号输出端与续流管的栅极相连接，实现了上电过程中第二续流管驱动器能够驱动续流管，从而电压输出端上的反灌电压通过续流管泄放掉，下电过程中第二续流管驱动器能够驱动续流管，从而输出电容上的残余电压通过续流管泄放掉，保证了关机时序不受输出电容和负载的影响。
附图概述
图1表示目前常用BUCK电路上电波形示意图；
图2表示目前常用BUCK电路关机时序示意图；
图3表示本发明的实施例中时序的第一种控制电路图；
图4表示本发明的实施例中使用图3中的第一种控制电路图，应用于上电过程的控制方法的流程图；
图5表示使用图3中的第一种控制电路图后的上电波形图；
图6表示本发明的实施例中时序的第二种控制电路图；
图7表示本发明的实施例中使用图6中的第二种控制电路图，应用于上电过程的控制方法的流程图；
图8表示使用图6中的第二种控制电路图后的上电波形图；
图9表示本发明的实施例中使用图3中的第一种控制电路图，应用于下电过程中的控制方法的流程图；以及
图10表示使用图3中的第一种控制电路图后的下电波形图。
本发明的较佳实施方式
下面将参照附图更详细地描述本公开的示例性实施例。虽然附图中显示了本公开的示例性实施例，然而应当理解，可以以各种形式实现本公开而不应被这里阐述的实施例所限制。相反，提供这些实施例是为了能够更透彻地理解本公开，并且能够将本公开的范围完整的传达给本领域的技术人员。
实施例一：
如图3所示，为本发明的实施例中时序的第一种控制电路图，包括续流管D2、第一续流管驱动器M1和第二续流管驱动器M2，其中，第一续流管驱动器M1的第一信号输出端M101与续流管D2的栅极D201相连接，第二续流管驱动器M2的第二信号输出端M201与续流管D2的栅极D201相连接，所述第二续流管驱动器M2还包括电路使能控制端M204。可选地，控制电路
还包括第一电阻R1和第二电阻R2，第一续流管驱动器M1的第一信号输出端M101可以通过第一电阻R1与续流管D2的栅极D201相连接，第二续流管驱动器M2的第二信号输出端M201可以通过第二电阻R2与续流管D2的栅极D201相连接，所述续流管D2的漏极D202还与电压输出端Vout相连接。可选地，控制电路还包括整流管驱动器M3、第三电阻R3、整流管D1、电感L、输出电容C，其中，整流管驱动器M3包括第三信号输出端M301，第三信号输出端M301通过第三电阻R3与整流管D1的栅极(图中未示出)相连接，整流管D1的源极(图中未示出)与续流管D2的漏极D202相连接；D1的漏极(图中未示出)与电压输入端Vin相连接；电感L的一端分别与续流管D2的漏极D202和整流管D1的源极(图中未示出)相连接，另一端与电压输出端Vout相连；输出电容C的一端与电压输出端Vout相连，另一端接地。
如图4所示，为本发明的实施例中使用图3中的第一种控制电路图，应用于上电过程的控制方法的流程图，包括如下步骤：
步骤S101，检测电路使能控制端的状态。
在本实施例中，在DCDC芯片开机时，允许电路使能控制端M204处于关闭状态，第二续流管驱动器M2检测电路使能控制端M204的状态。
步骤S102，若电路使能控制端的状态为关闭状态，则第二信号输出端输出第二驱动信号驱动续流管工作，续流管将电压输出端上从其他路径反灌过来的电压泄放掉。
在本实施例中，第二续流管驱动器M2检测到电路使能控制端M204的状态为关闭状态后，第二续流管驱动器M2经过内部处理，第二信号输出端M201输出一个第二驱动信号且驱动续流管D2工作，使得续流管D2将电压输出端Vout上从其他路径反灌来的电压泄放掉。可选的，第二驱动信号可以为方波信号，第二驱动信号可以经过第二电阻R2后驱动续流管D2工作，续流管D2和电感L泄放电压输出端Vout上从其他路径反灌来的电压。当续流管D2导通时，电流与电压输出端Vout的输出电压、电感L的直流电阻及续流管D2的导通阻抗有一定的关系，为了不损坏续流管D2，需要将电流限制在可接受的范围内，通过增大电感L的直流电阻或者降低续流管D2的驱动
电压的方式将续流管D2的导通阻抗增大，从而限制住泄放电流。另一方面，续流管D2上的电流平均值与续流管D2的导通时间有较大关系，因此为了保证续流管D2在这段时间内不因电流过大而损坏，可以将导通时间限制在一个较小值的范围内。
步骤S103，若电路使能控制端的状态为开启状态，则关闭第二续流管驱动器，并通过第一信号输出端向续流管输出第一驱动信号，使得续流管以正常方式启动。
在本实施例中，当DCDC芯片需要正常工作时，第二续流管驱动器M2的电路使能控制端M204的状态为开启状态，则第二续流管驱动器M2的第二信号输出端M201停止输出第二驱动信号，即第二信号输出端M201悬空，第二续流管驱动器M2关闭，当第二续流管驱动器M2关闭后，第一续流管驱动器M1的第一信号输出端M101向续流管D2输出第一驱动信号，即续流管D2按照DCDC芯片正常的启动方式启动，不再受第二续流管驱动器M2的影响。
可选的，还可以将电路使能控制端M204的状态等效于开启的状态，即相当于屏蔽掉第二续流管驱动器M2，此时DCDC芯片与目前常用的普通芯片相同。
如图5所示，为使用图3中的第一种控制电路图后的上电波形图。将图5与图1进行比较，由图1中可以看出，无论是否有使能信号，电压输出端Vout的输出电压从DCDC芯片开始启动时就开始输出，且反灌台阶出现的时间较长。由图5中可以看出，当无使能信号时，第二续流管驱动器M2的第二信号输出端M201输出方波形的第二驱动信号，电压输出端Vout上从其他路径反灌来的电压被泄放，反灌台阶出现的时间缩短。
如图6所示，为本发明的实施例中时序的第二种控制电路图，该控制电路图是在图3的基础上做出改进后的控制电路图。由图中可以看出，第一续流管驱动器M1还包括第一驱动使能控制端M102和第一驱动状态显示端M103，第二续流管驱动器M2还包括第二驱动使能控制端M202和第二驱动状态显示端M203，整流管驱动器M3还包括第三驱动状态显示端M303，其中，第一驱动状态显示端M103与第二驱动状态显示端M203和第三驱动状
态显示端M303相连接，第一驱动使能控制端M102与第二驱动使能控制端M202相连接。
如图7所示，为本发明的实施例中使用图6中的第二种控制电路图，应用于上电过程的控制方法的流程图，包括如下步骤：
步骤S201，检测电路使能控制端的状态。
在本实施例中，在DCDC芯片开机时，允许电路使能控制端M204处于关闭状态，第二续流管驱动器M2检测电路使能控制端M204的状态。
步骤S202，读取第一驱动状态显示端端口状态。
在本实施例中，第一信号输出端M101闲置，即不输出第一驱动信号，此时第一驱动状态显示端M103读取第一信号输出端M101的状态，并将该状态输送至第二驱动状态显示端M203，第二驱动状态显示端M203读取该状态。
步骤S203，若电路使能控制端的状态为关闭状态，则第二信号输出端输出第二驱动信号驱动续流管工作，续流管将输出电容上的残余电压泄放掉，第二驱动状态显示端向第一驱动状态显示端输出第二续流管驱动器工作信号。
在本实施例中，第二续流管驱动器M2检测到电路使能控制端M204的状态为关闭状态，第二驱动状态显示端M203读取第一驱动状态显示端M103的状态后，第二续流管驱动器M2经过内部处理，第二信号输出端M201输出一个第二驱动信号驱动续流管D2工作，使得续流管D2将电压输出端Vout上从其他路径反灌来的电压泄放掉。在第二信号输出端M201输出第二驱动信号时，第二驱动状态显示端M203读取第二信号输出端M201的工作信号，并将该工作信号输送至第一驱动状态显示端M103，第一驱动状态显示端M103读取该工作信号。
步骤S204，电路使能控制端更改为开启状态，第一续流管驱动器经过一定时间延迟后，第一驱动使能控制端向第二驱动使能控制端输出驱动使能信号。
在本实施例中，对于某些类型的DCDC芯片，从电路使能控制端M204
的状态更改为开启状态，到第一续流管驱动器M1送出第一驱动信号，两者之间的延迟时间较长，因此在第一续流管驱动器M1经过一定时间延迟后，第一驱动使能控制端M102向第二驱动使能控制端M202输出驱动使能信号，表示第一续流管驱动器M1已经做好了工作准备。但是由于此时还未关闭第二续流管驱动器M2，如果此时正常启动控制电路，则整流管D1与续流管D2会同时导通，因此此时还不能正常启动控制电路。
步骤S205，第二驱动使能控制端接收到第一驱动使能信号，第二信号输出端停止输出第二驱动信号，第二驱动状态显示端向第一驱动状态显示端和第三驱动状态显示端输出第二续流管驱动器停止工作信号。
在本实施例中，当第二驱动使能控制端M202接收到第一驱动使能信号后，第二信号输出端M201立即停止输出第二驱动信号，第二驱动状态显示端M203读取第二信号输出端M201的停止工作信号，并将该停止工作信号输送给第一驱动状态显示端M103和第三驱动状态显示端M303，表明该控制电路可以正常启动。
步骤S206，第一驱动状态显示端和第三驱动状态显示端接收到第二续流管驱动器停止工作信号，且电路使能控制端的状态为开启状态，第一信号输出端向续流管输出第一驱动信号，第三信号输出端向续流管输出第三驱动信号。
在本实施例中，第一驱动状态显示端M103和第三驱动状态显示端M303接收到第二续流管驱动器M2停止工作信号，且电路使能控制端M204的状态为开启状态，此时控制电路开始正常工作，且完全不受第二续流管驱动器M2的影响。
在此需要说明的是，对集成度要求比较高而且不需要靠调节电阻R2来实现续流管D2导通阻抗调节的芯片，可以将第一续流管驱动器M1和第二续流管驱动器M2合并，并通过与图7中的流程图类似的控制，实现与图7中的流程图所实现的功能类似的功能。
如图8所示，为本发明使用图6中的第二种控制电路图后的上电波形图。
将图8与图5中的波形相比较，图5中的电路使能控制端M204的状态
为开启状态时，第二信号输出端M201停止输出第二驱动信号，此时输出电压仍有一个反灌台阶的出现；而图10中，电路使能控制端M204的状态为开启状态时，第二信号输出端M201还在继续输出第二驱动信号，直到DCDC芯片开始启动时第二信号输出端M201停止输出第二驱动信号，消除了输出电压上的反灌台阶。
实施例二：
如图9所示，为本发明的实施例中使用图3中的第一种控制电路图，应用于下电过程中的控制方法的流程图，包括如下步骤：
步骤S301，检测电路使能控制端的状态。
在本实施例中，当DCDC芯片开始启动关机程序时，电路使能控制端M204会在一定时间内由开启状态变为关闭状态，第二续流管驱动器M2检测电路使能控制端M204的状态。
步骤S302，若电路使能控制端的状态为关闭状态，则第二信号输出端输出第二驱动信号驱动续流管工作，续流管将输出电容上的残余电压泄放掉。
在本实施例中，第二续流管驱动器M2检测到电路使能控制端M204的状态为关闭状态后，第二续流管驱动器M2经过内部处理，第二信号输出端M201再次输出一个第二驱动信号驱动续流管D2工作，使得续流管D2将输出电容C上的残余电压泄放掉。可选的，第二驱动信号为方波信号，第二驱动信号驱动续流管D2工作，续流管D2和电感L将输出电容C上的残余电压泄放掉。当续流管D2导通时，瞬时电流与输出电压、电感L的直流电阻以及续流管D2的导通阻抗有一定的关系，为了不损坏续流管D2，需要将电流限制在可接受范围。通过增大电感L的直流电阻或者降低续流管D2的驱动电压的方式可以将续流管D2的导通阻抗增大，从而限制住泄放电流。另一方面，续流管D2上的电流平均值与续流管D2的导通时间有较大关系，因此，为保证续流管D2在这段时间内不因电流过大而损坏，可以将导通时间限制在一个较小值。
步骤S303，降低第二续流管驱动器的供电电压，若第二续流管驱动器的供电电压低至其能正常工作的电压范围时，第二续流管驱动器停止工作。
在本实施例中，在第二续流管驱动器M2的供电电压下降过程中，续流管D2的驱动电压会逐渐下降，虽然续流管D2不能处于完全导通状态，但是仍能够提供残余电压的泄放路径。由于输出电容C上的残压能量比较低，因此输出电容C上的残余电压能否泄放完全，则取决于第二续流管驱动器M2的供电电压所能够维持的时间以及泄放路径中各器件的参数。
当第二续流管驱动器M2的供电电压低至第二续流管驱动器M2能正常工作的电压范围时，第二续流管驱动器M2停止工作。
如图10所示，为使用图3中的第一种控制电路图后的下电波形图。假设DCDC芯片关机过程中有两路输出电压，分别为第一输出电压和第二输出电压，第一输出电压为负载小、输出电容C较大的输出电压，第二输出电压为负载大、输出电容C小的输出电压。将图10与图2进行比较，由图2中可以看出，，即使完全按照所需的顺序关闭DCDC芯片(第一输出电压比第二输出电压先进行下电)，但第一输出电压比第二输出电压下电缓慢，最后下电所用时间比第二输出电压所用时间长，即下电时序会受到负载和输出电容C的较大影响。
由图10中可以看出，图10中的虚线表示图2中的第一输出电压下电波形，图10中的实线表示在使用图3中的第一种控制电路图后的下电波形，当电路使能控制端M204的状态变为关闭状态时，第二信号输出端M201输出第二驱动信号，第一输出电压开始进行下电过程，由于输出电容C上的残余电压通过电感L和续流管D2进行泄放，因此第一输出电压下降的过程加快，满足了DCDC芯片关机时的时序要求，即第一输出电压比第二输出电压先下电，第一输出电压比第二输出电压所用下电时间较短的要求。
可选的，在输出电压下电过程中，电路使能控制端M204变为关闭状态，整流管驱动器M3、第一续流管驱动器M1同时关闭，而第二续流管驱动器M2开启。
本发明实施例的所有装置和方法均可用于带预置偏压的DCDC芯片开关机的时序控制，也可以应用于其他可以应用的时序控制，在此不再赘述。
本发明实施例还公开了一种计算机程序，包括程序指令，当该程序指令被计算机执行时，使得该计算机可执行上述任意的应用于上电过程的时序控
制方法。一种载有该计算机程序的载体。
本发明实施例还公开了一种计算机程序，包括程序指令，当该程序指令被计算机执行时，使得该计算机可执行上述任意的应用于下电过程时序控制方法。一种载有该计算机程序的载体。
显然，本领域的技术人员应该明白，上述的本发明的各步骤可以用数字控制芯片实现，从而，可以更方便、更精确地实现控制电路与常用BUCK电路正常工作电路的独立工作，在保证控制电路安全的基础上降低二者之间的切换时间。
以上所述的是本发明的可选实施方式，应当指出对于本技术领域的普通人员来说，在不脱离本发明所述的原理前提下还可以作出若干改进和润饰，这些改进和润饰也在本发明的保护范围内。
本发明技术方案通过将第一续流管驱动器的第一信号输出端与续流管的栅极相连接，第二续流管驱动器的第二信号输出端与续流管的栅极相连接，实现了上电过程中第二续流管驱动器能够驱动续流管，从而电压输出端上的反灌电压通过续流管泄放掉，下电过程中第二续流管驱动器能够驱动续流管，从而输出电容上的残余电压通过续流管泄放掉，保证了关机时序不受输出电容和负载的影响。因此本发明具有很强的工业实用性。
Claims (15)
- 一种时序控制电路，包括续流管和输出电容，所述续流管的漏极与一电压输出端相连接，所述输出电容的一端与电压输出端相连接，所述输出电容的另一端接地；所述控制电路还包括第一续流管驱动器和第二续流管驱动器，所述第一续流管驱动器的第一信号输出端与所述续流管的栅极相连接，所述第二续流管驱动器的第二信号输出端与所述续流管的栅极相连接；其中，上电时，所述第二信号输出端向所述续流管输送第二驱动信号，驱动所述续流管工作，所述电压输出端上的反灌电压通过续流管进行泄放；下电时，所述第二信号输出端向所述续流管输送第二驱动信号，驱动所述续流管工作，所述输出电容上的残余电压通过续流管进行泄放。
- 根据权利要求1所述的时序控制电路，所述控制电路还包括第一电阻和第二电阻，其中：所述第一信号输出端通过所述第一电阻与所述续流管的栅极相连接；所述第二信号输出端通过所述第二电阻与所述续流管的栅极相连接。
- 根据权利要求2所述的时序控制电路，所述控制电路还包括整流管驱动器、第三电阻、整流管和电感，其中：所述整流管驱动器包括第三信号输出端，所述第三信号输出端通过所述第三电阻与所述整流管的栅极相连接；所述整流管的源极与所述续流管的漏极相连接，所述整流管的漏极与所述电压输入端相连接；所述电感的一端分别与所述续流管的漏极和所述整流管的源极相连接，所述电感的另一端与所述电压输出端相连。
- 根据权利要求3所述的时序控制电路，其中：所述第一续流管驱动器还包括第一驱动使能控制端和第一驱动状态显示端；所述第二续流管驱动器还包括第二驱动使能控制端、第二驱动状态显示端和电路使能控制端；所述整流管驱动器包括第三驱动状态显示端；其中，所述第二驱动使能控制端与所述第一驱动使能控制端相连接，所述第二驱动状态显示端与所述第一驱动状态显示端和第三驱动状态显示端相连接。
- 一种时序控制方法，应用于上电过程，且应用于带预置偏压的DCDC芯片，其中，所述DCDC芯片包括：第一续流管驱动器、第二续流管驱动器、整流管驱动器和续流管，其中所述第一续流管驱动器的第一信号输出端与所述续流管的栅极相连接，所述第二续流管驱动器的第二信号输出端与所述续流管的栅极相连接，所述整流管驱动器的第三信号输出端与所述续流管的漏极相连接，所述控制方法包括：检测第二续流管驱动器上的用于接收允许DCDC芯片正常工作的使能信号的电路使能控制端的状态；若所述电路使能控制端的状态为关闭状态，则所述第二信号输出端输出第二驱动信号驱动所述续流管工作，并通过所述续流管将电压输出端上从其他路径反灌过来的电压泄放掉；若所述电路使能控制端的状态更改为开启状态，则将所述第二续流管驱动器关闭，并通过所述第一信号输出端向所述续流管输出第一驱动信号，使得所述续流管以正常方式启动。
- 根据权利要求5所述的时序控制方法，该方法还包括：将所述第二续流管驱动器上的用于接收允许DCDC芯片工作的使能信号的电路使能控制端的状态等效于开启状态；通过所述第一信号输出端向所述续流管输出第一驱动信号，所述续流管以正常方式启动。
- 根据权利要求5所述的时序控制方法，其中，所述第二信号输出端输出第二驱动信号驱动所述续流管工作的步骤之前，该方法还包括：第二驱动状态显示端读取第一续流管驱动器的第一驱动状态显示端端口状态。
- 根据权利要求5所述的时序控制方法，其中，所述第二信号输出端输出第二驱动信号驱动所述续流管工作的步骤之后，该方法还包括：所述第二续流管驱动器的第二驱动状态显示端向所述第一驱动状态显示 端输出第二续流管驱动器工作信号。
- 根据权利要求5所述的时序控制方法，其中，所述将所述第二续流管驱动器关闭，并通过所述第一信号输出端向所述续流管输出第一驱动信号的步骤包括：将所述电路使能控制端的状态更改为开启状态时，所述第一续流管驱动器经过一定时间延迟后通过第一驱动使能控制端向所述第二驱动使能控制端输出第一驱动使能信号；通过所述第二驱动使能控制端接收到第一驱动使能信号，所述第二信号输出端停止输出第二驱动信号，并通过第二驱动状态显示端向所述第一驱动状态显示端和第三驱动状态显示端输出所述第二续流管驱动器停止工作信号；通过所述第一驱动状态显示端和第三驱动状态显示端接收到所述第二续流管驱动器停止工作信号，且所述电路使能控制端的状态为开启状态时，所述第一信号输出端向所述续流管输出第一驱动信号，所述第三信号输出端向所述续流管输出第三驱动信号。
- 一种时序控制方法，应用于下电过程，且应用于带预置偏压的DCDC芯片，其中，所述DCDC芯片包括：第一续流管驱动器、第二续流管驱动器、续流管和输出电容，其中所述第一续流管驱动器的第一信号输出端与所述续流管的栅极相连接，所述第二续流管驱动器的第二信号输出端与所述续流管的栅极相连接，一电压输出端与所述续流管的漏极相连接，所述输出电容的一端与电压输出端相连接，另一端接地，所述控制方法包括：检测第二续流管驱动器上的用于接收允许DCDC芯片工作的使能信号的电路使能控制端的状态；若所述电路使能控制端的状态为关闭状态，则所述第二信号输出端输出第二驱动信号驱动所述续流管工作，并通过所述续流管将输出电容上的残余电压泄放掉；降低所述第二续流管驱动器的供电电压；若所述第二续流管驱动器的供电电压低至所述第二续流管驱动器能正常工作的电压范围时，所述第二续流管驱动器停止工作。
- 根据权利要求10所述的时序控制方法，该方法还包括：当所述电压输出端掉电时，所述控制电路输出欠压告警信号。
- 一种计算机程序，包括程序指令，当该程序指令被计算机执行时，使得该计算机可执行权利要求4-9中任一项所述的应用于上电过程的时序控制方法。
- 一种载有权利要求12所述计算机程序的载体。
- 一种计算机程序，包括程序指令，当该程序指令被计算机执行时，使得该计算机可执行权利要求10-11中任一项所述的应用于下电过程时序控制方法。
- 一种载有权利要求14所述计算机程序的载体。
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