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WO2014146340A1 - 像素电路及其驱动方法、显示装置 - Google Patents

像素电路及其驱动方法、显示装置 Download PDF

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Publication number
WO2014146340A1
WO2014146340A1 PCT/CN2013/075161 CN2013075161W WO2014146340A1 WO 2014146340 A1 WO2014146340 A1 WO 2014146340A1 CN 2013075161 W CN2013075161 W CN 2013075161W WO 2014146340 A1 WO2014146340 A1 WO 2014146340A1
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WO
WIPO (PCT)
Prior art keywords
switching transistor
transistor
driving
drain
pixel circuit
Prior art date
Application number
PCT/CN2013/075161
Other languages
English (en)
French (fr)
Inventor
李天马
李宏伟
韩静
Original Assignee
京东方科技集团股份有限公司
成都京东方光电科技有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 京东方科技集团股份有限公司, 成都京东方光电科技有限公司 filed Critical 京东方科技集团股份有限公司
Priority to US14/345,480 priority Critical patent/US9508287B2/en
Publication of WO2014146340A1 publication Critical patent/WO2014146340A1/zh

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Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3258—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the voltage across the light-emitting element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0819—Several active elements per pixel in active matrix panels used for counteracting undesired variations, e.g. feedback or autozeroing
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G09G2300/0852—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor being a dynamic memory with more than one capacitor
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G09G2300/0861—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0233—Improving the luminance or brightness uniformity across the screen
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/06—Adjustment of display parameters
    • G09G2320/0626—Adjustment of display parameters for control of overall brightness
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/02—Details of power systems and of start or stop of display operation
    • G09G2330/021—Power management, e.g. power saving

Definitions

  • the present invention relates to the field of display manufacturing, and in particular, to a pixel circuit, a driving method thereof, and a display device. Background technique
  • AMOLED Active Matrix Organic Light Emitting Diode
  • TFT field effect thin film transistor
  • LCD liquid crystal display
  • the ability of the AMOLED to emit light is driven by the current generated when the TFT is driven to saturation. Because the same gray voltage is input, different threshold voltages will produce different drive currents, resulting in poor current consistency and consistent brightness uniformity.
  • the circuit includes only two TFTs, T1 is a switching transistor, and DTFT is a driving transistor of a pixel circuit.
  • the scan line Scan turns on the switching transistor T1
  • the data voltage Data charges and discharges the storage capacitor C.
  • the switching transistor T1 is turned off, and the stored voltage on the capacitor keeps the driving transistor DTFT turned on, and the conduction current causes the OLED to emit light.
  • the advantage of the voltage control circuit is that the structure is simple and the charging speed of the capacitor is fast, but the disadvantage is that the linear control of the driving current is difficult.
  • the threshold voltage of the driving transistor is very poor due to the process, the luminance of the driving light-emitting circuit is poor and the brightness is attenuated, and the pixel circuit, the driving method thereof, and the display device are provided.
  • the drive transistor is provided by compensating the threshold voltage of the drive transistor The drive current is not affected by the threshold voltage.
  • a pixel circuit comprising:
  • a light emitting device wherein the first end of the light emitting device is connected to a power voltage terminal;
  • a driving transistor for driving the light emitting device to emit light, the source of the driving transistor being connected to a common connection end;
  • a gate of the first switching transistor receives a first scan signal, a source of the first switching transistor is connected to a gate of the driving transistor, and a drain of the first switching transistor a drain connection of the driving transistor;
  • a drain of the third switching transistor is connected to another end of the light emitting device, a source of the third switching transistor is connected to a drain of the driving transistor, and a gate of the third switching transistor Connecting control signals;
  • a storage capacitor a first end of the storage capacitor is connected to a gate of the driving transistor; a second switching transistor, a drain of the second switching transistor is connected to a second end of the storage capacitor, the second a source of the switching transistor is connected to the common connection end;
  • a gate of the fourth switching transistor is connected to a first scan signal, and a source of the fourth switching transistor is connected to a second end of the storage capacitor;
  • a gate of the fifth switching transistor is connected to the control signal, a drain of the fifth switching transistor is connected to a data signal end, and a source of the fifth switching transistor is connected to a drain of a fourth switching transistor Extremely
  • a first capacitor a first end of the first capacitor is coupled to a source of the fifth switching transistor, and a second end of the first capacitor is coupled to the common connection terminal.
  • the first switching transistor, the second switching transistor, the third switching transistor, the fourth switching transistor, the fifth switching transistor, and the driving transistor are all thin film field effect transistors.
  • the first switching transistor, the second switching transistor, the third switching transistor, and the driving transistor have the same channel type, and the channels of the fourth switching transistor and the fifth switching transistor The type is opposite to the channel type of the first switching transistor, the second switching transistor, and the third switching transistor.
  • the first switching transistor, the second switching transistor, the third switching transistor, and the driving transistor are N-type thin film field effect transistors, and the fourth switching transistor and the fifth opening
  • the turn-off transistor is a P-type thin film field effect transistor.
  • the common connection end is a ground end.
  • the light emitting device is an organic light emitting diode.
  • a display device including the above-described pixel circuit is provided.
  • a driving method of the above pixel circuit includes:
  • the first switching transistor, the second switching transistor, and the fifth switching transistor are turned on, the third switching transistor and the fourth switching transistor are turned off, and a gate of the driving transistor a drain and a drain are turned on, the driving transistor is saturated, and the storage capacitor is discharged through the first end;
  • the first switching transistor, the second switching transistor, and the third switching transistor are turned off, the fourth switching transistor and the fifth switching transistor are turned on, the storage capacitor and the a capacitor is charged, the voltage of the second end of the storage capacitor is increased, and the driving transistor is turned on;
  • the first switching transistor, the second switching transistor, and the fifth switching transistor are turned off, the third switching transistor and the fourth switching transistor are turned on, and the first capacitor remains The storage capacitor first terminal voltage while the driving transistor continues to be in an on state, and the power supply voltage signal drives the light emitting device to emit light through the driving transistor.
  • the beneficial effects of the embodiments of the present invention are: by compensating the threshold voltage of the driving transistor, the driving current provided by the driving transistor is not affected by the threshold voltage, thereby improving the uniformity of the driving current, improving the brightness uniformity of the driving circuit and reducing the brightness attenuation.
  • FIG. 1 shows a schematic diagram of a prior art 2T1C pixel driving circuit
  • FIG. 2 is a circuit diagram showing a pixel circuit of an exemplary embodiment of the present invention.
  • Figure 3 shows a timing diagram of the circuit shown in Figure 2.
  • T1-first switching transistor T2-second switching transistor, T3-third switching transistor, T4-four switching transistor, T5-fifth switching transistor, DTFT-driving transistor, Cst-storage capacitor, C1- First capacitor, VDD- supply voltage terminal, VSS-common connection, Vdata-data signal terminal, Vscanl - first scan signal, EM-control signal.
  • a pixel circuit in an embodiment of the present invention, includes: a light emitting device, one end of the light emitting device is connected to a power voltage terminal; a driving transistor for driving the light emitting device to emit light, and a source of the driving transistor Connected to a common connection terminal; a first switching transistor having a gate receiving a first scan signal, a source connected to a gate of the driving transistor, and a drain connected to a drain of the driving transistor; and a third switching transistor having a drain connected to the light emitting At the other end of the device, the source is connected to the drain of the driving transistor, and the gate is connected to the control signal; the storage capacitor has a first end connected to the gate of the driving transistor; and a second switching transistor having a drain and a second end of the storage capacitor Connected, the source of the second switching transistor is connected to the common connection terminal; the fourth switching transistor has a gate connected to the first scan signal, a source connected to the second end of the storage capacitor, and a fifth
  • the pixel driving circuit operates in three stages.
  • the fifth switching transistor is turned on, the third switching transistor and the fourth switching transistor are turned off; the first switching transistor is turned on to connect the gate and the drain of the driving transistor; and the second switching transistor is turned on, so that The second end of the storage capacitor is in communication with the common connection terminal; the driving transistor enters a saturation state, and the storage capacitor is discharged until the voltage across the driving transistor is equal to the threshold voltage of the driving transistor, and the voltage of the data signal terminal is introduced into the driving circuit.
  • the first switching transistor, the second switching transistor, and the third switching transistor are turned off, and the fourth switching transistor and the fifth switching transistor are turned on.
  • the driving transistor gate and the drain are connected, and the fourth switching transistor and the fifth switching transistor are turned on to connect the second end of the storage capacitor to the data signal end, and the second end of the storage capacitor is charged to the data signal terminal voltage, to be stored
  • the capacitor voltage is maintained at the threshold voltage of the drive transistor, and the first end of the storage capacitor jumps to a corresponding value including the threshold voltage of the drive transistor and the voltage of the data signal terminal.
  • the first switching transistor, the second switching transistor, and the fifth switching transistor are turned off, the third switching transistor and the fourth switching transistor are turned on; and the conducting of the third switching transistor is turning on the power and driving the transistor
  • the driving transistor enters a saturated state, and the light emitting device starts to emit light.
  • the storage capacitor compensates for the threshold voltage of the driving transistor, and the current flowing through the driving transistor and the light emitting device is no longer driven.
  • the effect of the transistor threshold voltage improves the driving current consistency of the pixel circuit driving transistor, and improves the brightness unevenness and brightness attenuation of different pixel unit circuits caused by the poor uniformity of the driving transistor process.
  • a pixel circuit in accordance with an aspect of the invention includes five switching transistors and a driver transistor.
  • the five switching transistors and the driving transistors are all thin film type field effect transistors.
  • the first switching transistor, the second switching transistor, the third switching transistor, and the driving transistor have the same channel type, and the fourth switching transistor and the fifth switching transistor have the same channel type.
  • the first switching transistor, the second switching transistor, the third switching transistor, and the driving transistor have a channel type opposite to that of the fourth switching transistor and the fifth switching transistor.
  • the gates of the first, second and fourth switching transistors are connected to the first scan signal as an on or off signal, and the gates of the third and fifth switching transistors are connected to the control signal as a turn-on or turn-off signal.
  • a third switching transistor is connected in series between the light emitting device and the drain of the driving transistor, and the light emitting device is connected in series between the third switching transistor and the power source.
  • the light emitting device is selected to be light-emitting, the positive electrode of the light-emitting device is connected to the voltage terminal of the power supply, and the negative electrode of the light-emitting device is connected to the drain of the third switching transistor.
  • the light-emitting device can also select the lower light-emitting mode, but the upper light-emitting mode It has a higher aperture ratio than the lower illumination method.
  • the source of the driving transistor is connected to the common connection terminal, the common connection terminal is the ground terminal, and the driving transistor is connected by a constant current type.
  • FIG. 2 is a schematic diagram of a pixel circuit according to an exemplary embodiment of the present invention. A specific analysis of an embodiment of a pixel circuit will be described below with reference to FIG.
  • the drain of the first switching transistor T1 is connected to the drain of the driving transistor DTFT, the source of the first switching transistor T1 is connected to the gate of the driving transistor DTFT, and the first switching transistor T1 is used for disconnection or The connection between the drain and the gate of the driving transistor DTFT is turned on; the drain of the second switching transistor T2 is connected to the second terminal (P terminal) of the storage capacitor Cst, and the source of the second switching transistor T2 and the driving transistor DTFT The source is connected to the common ground terminal VSS, and the second switching transistor T2 is used to open or turn on the connection between the second terminal (P terminal) of the storage capacitor Cst and the common connection terminal VSS; the drain of the third switching transistor T3 Connected to the negative terminal of the light emitting device, the source of the third switching transistor T3 is connected to the drain of the driving transistor DTFT, and the third switching transistor T3 is used for disconnection.
  • the fourth switching transistor T4 and the fifth switching transistor T5 are disposed in series between the data signal terminal Vdata and the second end (P terminal) of the memory capacitor Cst;
  • the first end of the first capacitor C1 is connected to the source of the driving transistor DTFT, and the second end is connected to the connection point of the drain of the fourth switching transistor T4 and the source of the fifth switching transistor T5;
  • the fourth switching transistor T4 is used Disconnecting or turning on the connection between the second end (P terminal) of the storage capacitor Cst and the first capacitor C1;
  • the fifth switching transistor T5 is for disconnecting or turning on between the data signal terminal Vdata and the first capacitor C1 Connection.
  • the pixel circuit of this embodiment includes five switching transistors, one driving transistor, and two capacitors.
  • the fourth switching transistor T4 and the fifth switching transistor T5 are P-type tubes, and the first switching transistor T1, the second switching transistor ⁇ 2, the third switching transistor ⁇ 3, and the driving transistor are ⁇ -shaped tubes.
  • the level signal input from the two signal lines of the first scan signal Vscan1 and the control signal EM serves as a signal for controlling the switching transistor to be turned off or on, and the common connection terminal VSS is the ground terminal.
  • the fourth switching transistor T4 and the fifth switching transistor T5 may be N-type tubes, and the first switching transistor T1, the second switching transistor T2, and the third switching transistor ⁇ 3 may be ⁇ -type tubes, but the control switching transistors are turned on. Or the signal that is turned off needs to be adjusted.
  • an organic light emitting diode is connected in series between the power supply and the drain of the driving transistor DTFT as a light emitting device, and the control signal EM received by the gate of the third switching transistor T3 controls the power supply and the drain of the driving transistor DTFT. Or shut down.
  • the OLED can adopt an upper illuminating mode, which has a higher aperture ratio than the lower illuminating mode.
  • the first switching transistor T1 is connected between the gate and the drain of the driving transistor DTFT, and is connected to the gate of the first switching transistor T1 by the first scanning signal Vscan1 to control its on or off.
  • the source of the driving transistor DTFT is connected to the common ground terminal VSS, and is a constant current type connection.
  • the gate of the driving transistor DTFT is connected to the first end (G terminal) of the storage capacitor Cst, and the second end (P terminal) of the storage capacitor Cst is passed.
  • the second switching transistor T2 is connected to the common ground terminal VSS, and the second switching transistor T2 is connected to the first scan signal Vscan1.
  • the second end (P terminal) of the storage capacitor Cst is connected to the second end of the first capacitor C1 through the fourth switching transistor T4, and the gate of the fourth switching transistor T4 is connected to the first scan signal Vscan1.
  • the first end of the first capacitor C1 and the source of the driving transistor DTFT are commonly connected to the common ground VSS.
  • the second end of the first capacitor C1 is connected to the data signal terminal Vdata through the fifth switching transistor T5, and the control signal EM controls the on or off of the fifth switching transistor T5.
  • the gate of the third switching transistor T3 receives the control signal EM, turning off or turning on the driving crystal
  • the connection between the DTFT and the OLED provides access to or breaks the illumination of the OLED.
  • a driving method of driving the above pixel circuit there is further provided a driving method of driving the above pixel circuit.
  • the working states and functions of the components of the pixel circuit shown in Fig. 2 at various stages are described in detail below with reference to the timing chart shown in Fig. 3.
  • the first phase is the DATA pre-write phase.
  • the level of the first scan signal Vscan1 is a high level
  • the level of the control signal EM is a low level
  • the first switching transistor T1, the second switching transistor ⁇ 2, and the fifth switching transistor ⁇ 5 are turned on.
  • the third switching transistor ⁇ 3 and the fourth switching transistor ⁇ 4 are turned off.
  • the gate and drain of the driving transistor DTFT are turned on, the second end (P terminal) of the storage capacitor Cst is commonly grounded with the first end of the first capacitor C1, and the second end of the first capacitor C1 is in communication with the data signal terminal Vdata.
  • the driving transistor DTFT enters a saturated state, which is actually a diode.
  • the second phase is the DATA write phase.
  • the levels of the first scan signal Vscan1 and the control signal EM are at a low level, and the fourth switch transistor T4 and the fifth switching transistor T5 are turned on, the first switching transistor T1, the second switching transistor ⁇ 2, and The third switching transistor ⁇ 3 is turned off.
  • the second end (P terminal) of the storage capacitor Cst and the second end of the first capacitor C1 are commonly connected to the data signal terminal Vdata, and the first terminal of the first capacitor C1 is grounded.
  • the third stage is the lighting stage.
  • the level of the control signal EM is at a high level
  • the level of the first scan signal Vscan1 is at a low level. Therefore, the first switching transistor T1, the second switching transistor ⁇ 2, and the fifth switching transistor ⁇ 5 are turned off, and the third switching transistor ⁇ 3 and the fourth switching transistor ⁇ 4 are turned on.
  • the second end (P terminal) of the storage capacitor Cst is in communication with the second end of the first capacitor C1, the first end of the first capacitor C1 is grounded, the drain of the driving transistor DTFT, the OLED and the power supply voltage terminal VDD are connected in series, and the driving transistor is driven DTFT is turned on.
  • VDD is much larger than the voltage V G of the gate of the driving transistor (G terminal of Cst), and the driving transistor DTFT enters a saturated state, at which time the current I flowing through the driving transistor DTFT and the OLED is:
  • the current I flowing through the driving transistor DTFT and the OLED is not affected by the threshold voltage Vth of the driving transistor DTFT, so that the threshold voltage Vth of the driving transistor DTFT caused by the process can be improved.
  • the uneven phenomenon improves the uniformity of the current and makes the OLED reach uniform brightness.
  • each OLED light emitting unit of the display device compensates for a threshold voltage of the OLED driving transistor DTFT to achieve uniformity of current of the OLED circuit, Problems such as uneven brightness of the display panel and attenuation of brightness.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Electroluminescent Light Sources (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

一种像素电路及其驱动方法、显示装置，像素电路包括：发光器件；驱动管（DTFT）；第一开关管（T1），源极与驱动管（DTFT）栅极连接，漏极与驱动管（DTFT）漏极连接；第三开关管（T3），漏极连接发光器件，源极连接驱动管（DTFT）的漏极；存储电容器（Cst），第一端（G）与驱动管（DTFT）栅极连接；第二开关管（T2），漏极与存储电容器（Cst）的第二端（P）连接，源极与公共连接端（VSS）连接；第四开关管（T4），源极连接存储电容器（Cst）的第二端（P）；第五开关管（T3），漏极连接数据信号端（Vdata），源极连接第四开关管（T4）漏极；第一电容器（C1），第一端连接第五开关管（T5）源极，第二端连接公共连接端（VSS）。上述像素电路通过对驱动管补偿，使流过驱动管及发光器件的电流不受驱动管阈值电压的影响，使发光器件亮度均匀。

Description

像素电路及其驱动方法、 显示装置 技术领域
本发明涉及显示器制造领域， 尤其涉及一种像素电路及其驱动方法、显示 装置。 背景技术
有源矩阵有机发光二极管（ AMOLED, Active Matrix Organic Light Emitting Diode ) 显示作为新型的显示技术， 与场效应薄膜晶体管 （TFT, Thin Film Transistor )液晶显示器（LCD, Liquid Crystal Display )相比， AMOLED不管 在视角范围、 画质、 效能及成本上都有很多优势， 在显示器制造领域有巨大的 发展潜力。
AMOLED能够发光是由驱动 TFT在饱和状态时产生的电流所驱动。 因为 输入相同的灰阶电压时， 不同的临界电压会产生不同的驱动电流，造成电流的 一致性很差， 亮度均匀性一直很差。
如图 1所示的传统的 2T1C电路， 该电路只包含两个 TFT, T1为开关晶 体管， DTFT为像素电路的驱动晶体管。 扫描线 Scan开启开关晶体管 T1 , 数 据电压 Data对存储电容器 C充放电， 发光期间开关晶体管 T1关闭， 电容器 上的存储的电压使驱动晶体管 DTFT保持导通， 导通电流使 OLED发光。 要 实现稳定显示， 就要为 OLED提供稳定电流。 电压控制电路的优点是结构筒 单、 电容器充电速度快， 但是缺点是驱动电流的线性控制困难， 原因是采用低 温多晶硅制程上使 DTFT的阈值电压的均匀性非常差，同时阈值电压也有漂移, 即便是同样工艺参数制造出来的不同 TFT的阈值电压也有较大差异， 造成驱 动发光电路的发光亮度均匀性很差和亮度衰减的问题。 发明内容
为解决因制程上使得驱动晶体管的阈值电压均勾性非常差，导致驱动发光 电路的发光亮度均勾性很差和亮度衰减的技术问题，在此提供一种像素电路及 其驱动方法、 显示装置。 通过补偿驱动晶体管的阈值电压， 使驱动晶体管提供 的驱动电流不受阈值电压的影响。
按照本发明的一个方面， 提供一种像素电路， 该像素电路包括：
发光器件， 所述发光器件的第一端与电源电压端相连；
用于驱动所述发光器件发光的驱动晶体管，所述驱动晶体管的源极与公共 连接端连接；
第一开关晶体管， 所述第一开关晶体管的栅极接收第一扫描信号， 所述第 一开关晶体管的源极与所述驱动晶体管的栅极连接，所述第一开关晶体管的漏 极与所述驱动晶体管的漏极连接；
第三开关晶体管，所述第三开关晶体管的漏极连接所述发光器件的另一端, 所述第三开关晶体管的源极连接所述驱动晶体管的漏极，所述第三开关晶体管 的栅极连接控制信号；
存储电容器， 所述存储电容器的第一端与所述驱动晶体管的栅极连接； 第二开关晶体管，所述第二开关晶体管的漏极与所述存储电容器的第二端 连接， 所述第二开关晶体管的源极与所述公共连接端连接；
第四开关晶体管， 所述第四开关晶体管的栅极连接第一扫描信号， 所述第 四开关晶体管的源极连接所述存储电容器的第二端；
第五开关晶体管， 所述第五开关晶体管的栅极连接所述控制信号， 所述第 五开关晶体管的漏极连接数据信号端，所述第五开关晶体管的源极连接第四开 关晶体管的漏极；
第一电容器， 所述第一电容器的第一端连接第五开关晶体管的源极， 所述 第一电容器的第二端连接公共连接端。
具体来说， 所述第一开关晶体管、 第二开关晶体管、 第三开关晶体管、 第 四开关晶体管、 第五开关晶体管和驱动晶体管均为薄膜场效应管。
可选择地， 所述第一开关晶体管、 所述第二开关晶体管、 所述第三开关晶 体管和驱动晶体管具有相同的沟道类型，所述第四开关晶体管和所述第五开关 晶体管的沟道类型与所述第一开关晶体管、所述第二开关晶体管和所述第三开 关晶体管具有的沟道类型相反。
可选择地， 所述第一开关晶体管、 所述第二开关晶体管、 所述第三开关晶 体管和驱动晶体管为 N型薄膜场效应管， 所述第四开关晶体管和所述第五开 关晶体管为 P型薄膜场效应管。
可选择地， 所述公共连接端为接地端。
可选择地， 所述发光器件为有机发光二极管。
按照本发明的另一方面， 提供一种显示装置， 包括上述的像素电路。
按照本发明的另一方面，提供一种上述像素电路的驱动方法， 所述驱动方 法包括：
在第一阶段， 所述第一开关晶体管、所述第二开关晶体管和所述第五开关 晶体管导通， 所述第三开关晶体管和所述第四开关晶体管断开， 所述驱动晶体 管的栅极和漏极导通， 所述驱动晶体管饱和，且所述存储电容器通过第一端放 电；
在第二阶段， 所述第一开关晶体管、所述第二开关晶体管和所述第三开关 晶体管断开， 所述第四开关晶体管和所述第五开关晶体管导通， 所述存储电容 器和第一电容器充电， 所述存储电容器第二端的电压随之升高， 开启所述驱动 晶体管；
在第三阶段， 所述第一开关晶体管、所述第二开关晶体管和所述第五开关 晶体管断开， 所述第三开关晶体管和所述第四开关晶体管导通， 所述第一电容 器保持所述存储电容器第一端电压， 同时所述驱动晶体管继续保持导通状态， 所述电源电压信号通过所述驱动晶体管驱动所述发光器件发光。
本发明实施例的有益效果是： 通过补偿驱动晶体管的阈值电压，使驱动晶 体管提供的驱动电流不受阈值电压的影响， 以提高驱动电流一致性， 改善驱动 电路亮度均匀性并减小亮度衰减。 附图说明
图 1表示现有技术 2T1C像素驱动电路示意图；
图 2表示本发明示例性实施例的像素电路的电路图；
图 3表示图 2所示电路的时序图。
图中： T1-第一开关晶体管， T2-第二开关晶体管， T3-第三开关晶体管， T4-第四开关晶体管， T5-第五开关晶体管， DTFT-驱动晶体管， Cst-存储电容 器， C1-第一电容器， VDD-电源电压端， VSS-公共连接端， Vdata-数据信号端， Vscanl-第一扫描信号， EM-控制信号。 具体实施方式
在本发明的一个实施例中， 提供一种像素电路， 该像素电路包括： 发光器 件，该发光器件一端与电源电压端相连；用于驱动发光器件发光的驱动晶体管， 所述驱动晶体管的源极与公共连接端连接； 第一开关晶体管， 其栅极接收第一 扫描信号， 源极与驱动晶体管的栅极连接， 漏极与驱动晶体管的漏极连接； 第 三开关晶体管，其漏极连接发光器件的另一端，源极连接到驱动晶体管的漏极， 栅极连接控制信号； 存储电容器， 第一端与驱动晶体管的栅极连接； 第二开关 晶体管， 其漏极与存储电容器的第二端连接， 第二开关晶体管的源极与公共连 接端连接； 第四开关晶体管， 其栅极连接第一扫描信号， 源极连接到存储电容 器的第二端；第五开关晶体管，其栅极连接控制信号，漏极连接到数据信号端， 源极连接到第四开关晶体管的漏极； 第一电容器， 其第一端连接到第五开关晶 体管的源极， 第二端连接到公共连接端。
根据本发明实施例的像素驱动电路分三个阶段进行工作。在第一阶段， 第 五开关晶体管导通， 第三开关晶体管和第四开关晶体管断开； 第一开关晶体管 导通， 使得驱动晶体管的栅极和漏极连通； 第二开关晶体管导通， 使得存储电 容器第二端与公共连接端连通； 驱动晶体管进入饱和状态，存储电容器放电直 至其两端电压等于驱动晶体管阈值电压，数据信号端的电压导入驱动电路。在 第二阶段， 第一开关晶体管、 第二开关晶体管和第三开关晶体管断开， 第四开 关晶体管和第五开关晶体管导通。驱动晶体管栅极和漏极连通， 第四开关晶体 管和第五开关晶体管导通使得存储电容器第二端连接到数据信号端，存储电容 器第二端电平充电为数据信号端电压，若要将存储电容器电压维持在驱动晶体 管阈值电压不变，则存储电容器第一端跃升至包括驱动晶体管阈值电压和数据 信号端电压的一个相应值。 在第三阶段， 第一开关晶体管、 第二开关晶体管和 第五开关晶体管断开， 第三开关晶体管和第四开关晶体管导通； 第三开关晶体 管的导通为发光器件接通电源和驱动晶体管的漏极，由于电源电压远大于存储 电容器第一端电压， 驱动晶体管进入饱和状态， 发光器件开始发光， 此时存储 电容器补偿驱动晶体管阈值电压，流过驱动晶体管及发光器件的电流不再受驱 动晶体管阈值电压的影响。 本发明提高像素电路驱动晶体管驱动电流一致性， 改善了驱动晶体管制程上的均匀性很差导致的不同像素单元电路亮度不均匀、 亮度衰减等问题。
可选地，按照本发明的一个方面的像素电路包括五个开关晶体管和驱动晶 体管。 五个开关晶体管和驱动晶体管均为薄膜型场效应管。 第一开关晶体管、 第二开关晶体管、第三开关晶体管和驱动晶体管具有相同的沟道类型， 第四开 关晶体管和第五开关晶体管具有相同的沟道类型。 第一开关晶体管、第二开关 晶体管、第三开关晶体管和驱动晶体管具有的沟道类型与第四开关晶体管和第 五开关晶体管的沟道类型相反。 第一、二和四开关晶体管的栅极连接第一扫描 信号作为导通或关断信号，第三和五开关晶体管的栅极连接控制信号作为导通 或关断信号。 通过选择两种开关信号， 筒化了电路和电路驱动方法。 也可以根 据实际需要增加开关信号的选择，或设定不同的开关晶体管对应不同的开关信 号。
可选地，发光器件和驱动晶体管漏极之间串联第三开关晶体管，发光器件 串联在第三开关晶体管和电源之间。发光器件选用上发光的方式，发光器件的 正极与所述电源电压端相连， 发光器件的负极与第三开关晶体管的漏极相连， 当然相应地发光器件也可选择下发光方式，但是上发光方式比下发光方式有更 高开口率。 驱动晶体管的源极与公共连接端相连， 公共连接端为接地端， 驱动 晶体管采用恒流型接法。
图 2为本发明示例性实施例的像素电路原理图， 下面结合图 2, 对像素电 路的实施例进行具体分析。
参照图 2所示， 第一开关晶体管 T1的漏极与驱动晶体管 DTFT的漏极连 接， 第一开关晶体管 T1的源极与驱动晶体管 DTFT的栅极连接， 第一开关晶 体管 T1用于断开或导通驱动晶体管 DTFT的漏极和栅极之间的连接； 第二开 关晶体管 T2的漏极与存储电容器 Cst的第二端 （P端）连接， 第二开关晶体 管 T2的源极与驱动晶体管 DTFT的源极接公共接地端 VSS, 第二开关晶体管 T2用于断开或导通存储电容器 Cst的第二端 （ P端）与公共连接端 VSS之间 的连接； 第三开关晶体管 T3的漏极与发光器件的负极端连接， 第三开关晶体 管 T3的源极与驱动晶体管 DTFT的漏极连接， 第三开关晶体管 T3用于断开 或导通发光器件与驱动晶体管 DTFT的漏极之间的连接； 第四开关晶体管 T4 和第五开关晶体管 T5 串联设置于数据信号端 Vdata与存储器电容 Cst的第二 端 （P端）之间； 第一电容器 C1的第一端与驱动晶体管 DTFT的源极连接， 第二端与第四开关晶体管 T4的漏极和第五开关晶体管 T5的源极的连接点相 连；其中第四开关晶体管 T4用于断开或导通存储电容器 Cst的第二端（ P端） 与第一电容器 C1之间的连接； 第五开关晶体管 T5用于断开或导通数据信号 端 Vdata和第一电容器 C1之间的连接。
本实施例的像素电路包含 5个开关晶体管、 1个驱动晶体管和 2个电容器。 其中第四开关晶体管 T4和第五开关晶体管 T5为 P型管，第一开关晶体管 Tl、 第二开关晶体管 Τ2、 第三开关晶体管 Τ3和驱动晶体管为 Ν型管。 第一扫描 信号 Vscanl和控制信号 EM两条信号线输入的电平信号作为控制开关晶体管 断开或导通的信号， 公共连接端 VSS为接地端。 可选地， 第四开关晶体管 T4 和第五开关晶体管 T5可为 N型管，第一开关晶体管 T1、第二开关晶体管 T2、 第三开关晶体管 Τ3可为 Ν型管，但是控制开关晶体管导通或关断的信号需要 做调整。
示例性地，在电源和驱动晶体管 DTFT漏极之间串联一个有机发光二极管 ( OLED )作为发光器件， 并由第三开关晶体管 T3栅极接收的控制信号 EM 控制电源和驱动晶体管 DTFT漏极导通或关断。 OLED可采用上发光的方式， 其比下发光的方式有更高开口率。驱动晶体管 DTFT栅极和漏极之间连接第一 开关晶体管 T1 , 通过第一扫描信号 Vscanl连接第一开关晶体管 T1栅极控制 其导通或关断。 驱动晶体管 DTFT源极接公共接地端 VSS, 为恒流型接法， 驱 动晶体管 DTFT栅极连接到存储电容器 Cst的第一端（ G端）， 存储电容器 Cst 的第二端（ P端）通过第二开关晶体管 T2与公共接地端 VSS连接， 第二开关 晶体管 T2栅极连接第一扫描信号 Vscanl。 存储电容器 Cst的第二端 （ P端） 通过第四开关晶体管 T4与第一电容器 C1的第二端连接， 第四开关晶体管 T4 栅极连接第一扫描信号 Vscanl。 第一电容器 C1的第一端与驱动晶体管 DTFT 的源极共同连接公共接地端 VSS。 第一电容器 C1的第二端通过第五开关晶体 管 T5连接到数据信号端 Vdata,控制信号 EM控制第五开关晶体管 T5的导通 或关断。 第三开关晶体管 T3的栅极接收控制信号 EM, 关断或导通驱动晶体 管 DTFT和 OLED的连接， 为 OLED的发光提供通路或断开此通路。
根据本发明示例性实施例，还提供一种驱动上述像素电路的驱动方法。 下 面结合图 3所示的时序图来对图 2所示像素电路的各组成部件在各阶段的工作 状态和功能进行详细介绍。
( 1 )第一阶段为 DATA预写入阶段。在第一阶段中，第一扫描信号 Vscanl 的电平为高电平， 控制信号 EM的电平为低电平， 第一开关晶体管 Tl、 第二 开关晶体管 Τ2和第五开关晶体管 Τ5导通，第三开关晶体管 Τ3和第四开关晶 体管 Τ4关断。 驱动晶体管 DTFT的栅极和漏极导通， 存储电容器 Cst的第二 端 （P端）和第一电容器 C1的第一端共同接地， 第一电容器 C1的第二端与 数据信号端 Vdata连通。 此时， 驱动晶体管 DTFT进入饱和状态， 实际上为一 个二极体。 存储电容器 Cst放电， 此时存储电容器 Cst的第一端 （G端）和存 储电容器 Cst的第二端（P端） 的电压差与驱动晶体管 DTFT阈值电压 Vth相 等， Vcst=Vc- VP=Vth; 第一电容器 C1被充电， 第一电容器 C1 两端的电压 Vc 1= Vdata。
( 2 )第二阶段为 DATA写入阶段。 在第二阶段中， 第一扫描信号 Vscanl 和控制信号 EM的电平为低电平， 第四开关器管 T4和第五开关晶体管 T5导 通， 第一开关晶体管 Tl、 第二开关晶体管 Τ2和第三开关晶体管 Τ3关断。 存 储电容器 Cst的第二端 （P端）和第一电容器 C1的第二端共同连接到数据信 号端 Vdata, 第一电容器 C1的第一端接地。 此时存储电容器 Cst的第二端（ P 端） 与第一电容器 C1第一端连接， 此时存储电容器 Cst的第二端 （P端） 的 电压充电到 Vdata, 存储电容器 Cst两端的电压如果要保持在 Vth, 则存储电 容器 Cst的第一端 （ G端） 的电压跳变到 VG=Vth+Vdata。
( 3 ) 第三阶段为发光阶段。 在第三阶段中， 控制信号 EM的电平为高电 平， 第一扫描信号 Vscanl的电平为低电平。 因此， 第一开关晶体管 Tl、 第二 开关晶体管 Τ2和第五开关晶体管 Τ5关断，第三开关晶体管 Τ3和第四开关晶 体管 Τ4导通。 存储电容器 Cst的第二端（P端）和第一电容器 C1的第二端连 通， 第一电容器 C1的第一端接地， 驱动晶体管 DTFT的漏极、 OLED和电源 电压端 VDD串联， 并且驱动晶体管 DTFT导通。 第一电容器 C1保持存储电 容器 Cst第一端 （G端） 电压 VG=Vth+ Vdata, 同时驱动晶体管继续保持导通 状态， 电源电压信号通过驱动晶体管驱动所述发光器件发光。 由于电源电压
VDD远远大于驱动晶体管栅极（ Cst的 G端）的电压 VG,则驱动晶体管 DTFT 进入饱和状态， 此时流过驱动晶体管 DTFT及 OLED的电流 I为：
I=K(VGS-Vth)A2=K(Vdata+Vth-Vth)A2=K ( Vdata ) Λ2。
如步骤（3 ) 中所做出的分析， 此时流过驱动晶体管 DTFT及 OLED的电 流 I不受驱动晶体管 DTFT阈值电压 Vth的影响，这样就可以改善因为制程上 导致的驱动晶体管 DTFT阈值电压 Vth不均匀的现象， 改善了电流的均匀性， 使 OLED达到了亮度的均匀。
根据本发明的示例性实施例还提供了一种包括上述像素电路的显示装置， 该显示装置的每个 OLED发光单元通过补偿 OLED驱动晶体管 DTFT的阈值 电压， 达到 OLED 电路的电流的一致性， 解决显示装置面板亮度不均匀和亮 度的衰减等问题。
以上所描述的是本发明的优选实施方式，应当指出对于本技术领域的普通 技术人员来说，在不脱离本发明原理前提下还可以作出若干改进和润饰， 这些 改进和润饰也在本发明的保护范围内。

Claims

权 利 要 求 书
1.一种像素电路， 包括：
发光器件， 其一端与电源电压端相连；
用于驱动所述发光器件发光的驱动晶体管， 其源极与公共连接端连接； 第一开关晶体管， 其栅极接收第一扫描信号， 源极与所述驱动晶体管的栅 极连接， 漏极与所述驱动晶体管的漏极连接；
第三开关晶体管， 其漏极连接所述发光器件的另一端， 源极连接所述驱动 晶体管的漏极， 栅极连接控制信号；
存储电容器， 第一端与所述驱动晶体管的栅极连接；
第二开关晶体管， 其漏极与所述存储电容器的第二端连接， 源极与所述公 共连接端连接；
第四开关晶体管， 其栅极连接第一扫描信号， 源极连接所述存储电容器的 第二端；
第五开关晶体管， 其栅极连接所述控制信号， 漏极连接数据信号端， 源极 连接第四开关晶体管的漏极；
第一电容器， 第一端连接到第五开关晶体管的源极， 第二端连接到公共连 接端。
2. 如权利要求 1 所述的像素电路， 其中所述第一开关晶体管、 第二开关 晶体管、 第三开关晶体管、 第四开关晶体管、 第五开关晶体管和驱动晶体管均 为薄膜场效应管。
3. 如权利要求 2所述的像素电路， 其中， 所述第一开关晶体管、 所述第 二开关晶体管、 所述第三开关晶体管和所述驱动晶体管具有相同的沟道类型， 所述第四开关晶体管和所述第五开关晶体管的沟道类型与所述第一开关晶体 管、所述第二开关晶体管、所述第三开关晶体管和所述驱动晶体管的沟道类型 相反。
4. 如权利要求 3所述的像素电路， 其中， 所述第一开关晶体管、 所述第 二开关晶体管、 所述第三开关晶体管和驱动晶体管为 N型薄膜场效应管， 所 述第四开关晶体管和所述第五开关晶体管为 P型薄膜场效应管。
5. 如权利要求 1所述的像素电路， 其中， 所述公共连接端为接地端。
6. 如权利要求 1 所述的像素电路， 其中， 所述发光器件为有机发光二极 管。
7. 一种显示装置， 包括如权利要求 1至 6任一项所述的像素电路。
8. 一种如权利要求 1所述像素电路的驱动方法， 包括下列步骤： 在第一阶段， 将所述第一开关晶体管、所述第二开关晶体管和所述第五开 关晶体管导通，将所述第三开关晶体管和所述第四开关晶体管断开， 所述驱动 晶体管的栅极和漏极导通， 所述驱动晶体管饱和， 且所述存储电容器通过第一 端放电；
在第二阶段， 将所述第一开关晶体管、所述第二开关晶体管和所述第三开 关晶体管断开，将所述第四开关晶体管和所述第五开关晶体管导通，将所述存 储电容器和第一电容器充电， 所述存储电容器第二端的电压随之升高， 开启所 述驱动晶体管；
在第三阶段， 将所述第一开关晶体管、所述第二开关晶体管和所述第五开 关晶体管断开，将所述第三开关晶体管和所述第四开关晶体管导通， 所述第一 电容器保持所述存储电容器第一端电压，同时所述驱动晶体管继续保持导通状 态， 所述电源电压信号通过所述驱动晶体管驱动所述发光器件发光。
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