WO2011053344A1

WO2011053344A1 - Crystalline silicon solar cell and manufacturing process

Info

Publication number: WO2011053344A1
Application number: PCT/US2010/002778
Authority: WO
Inventors: Narayanan Srinivasamohan
Original assignee: Narayanan Srinivasamohan
Priority date: 2009-10-26
Filing date: 2010-10-19
Publication date: 2011-05-05

Abstract

The disclosure provides a solar cell device. A method of preparing a solar cell device is disclosed. A crystalline silicon wafer, a crystalline silicon cell, a method of manufacturing the crystalline silicon wafer and method of manufacture of the crystalline silicon solar cell are provided. A method for improving the electronic quality of crystalline silicon wafers is provided. The disclosure relates to processing of the wafers in to solar cells to increase the cell performance and use of thinner wafers. The disclosure further relates to processing of wafers from monocrystalline and multicrystalline ingots, silicon wafers from ribbon growth, epitaxial deposition etc. into high efficiency solar cells. The disclosure also relates to improving electronic quality of silicon wafers.

Description

INVENTOR: Srinivasamohan Narayanan Crystalline Silicon solar cell and manufacturing process

FIELD

[1] This disclosure relates to a crystalline silicon wafer, a crystalline silicon cell, a method of manufacturing the crystalline silicon wafer and method of manufacture of the crystalline silicon solar cell. The disclosure further relates to improving the electronic quality of crystalline silicon wafers. The disclosure relates to processing of the wafers in to solar cells to increase the cell performance and use of thinner wafers. The disclosure further relates to processing of substrates from monocrystalline and multicrystalline ingots, silicon substrates from ribbon growth, epitaxial deposition etc. into high efficiency solar cells.

BACKGROUND

[2] In this section, we discuss several aspects of related work, including background and conventional technologies.

[3] Solar cells convert sunlight into electricity via Photovoltaic effect. The photovoltaic (PV) effect was first reported in 1839 by Becquerel when he observed a light dependent voltage between electrodes immersed in an electrolyte. A century later, silicon photovoltaic cells as a power source were demonstrated. Photovoltaic industry has since grown from producing a few kilo watts to a multi GW production per year. More than 80% of solar cells manufactured are based on crystalline silicon (single crystalline or multicrystalline) substrate.

[4] Incident sun light, falling on the solar cell, is absorbed in the

photovoltaic cell. The absorbed photon energy is transferred to the silicon material and a photovoltage is generated. The solar cell has a p/n junction with a large-area diode with metal contacts on either side.

[5] High purity polysilicon is converted into silicon wafers by processes, such as, casting, ribbon growth or single crystal growing followed by a wire sawing process. The silicon wafer obtained from this process is converted into solar cells using technologies based on semiconductor device processing and surface mount technology (SMT). The individual solar cells are connected and assembled into finished product PV Modules. The modules are integrated with system components, inverters, charge conditioners, batteries etc., and then installed at the site.

[6] The crystalline silicon wafer accounts for about 40% of the cost of PV module. There have been ongoing efforts to reduce the cost of preparation of PV modules by various methods including using thinner silicon substrates to save the cost of silicon used, device research to increase conversion efficiency of the module, etc. The current practice is to use wafers up to 180 micrometer in thickness on 156* 156 mm wafers (up to 140 microns on 125 mm pseudo-square mono wafers). Though

Crystalline Solar cells can be made on silicon wafers that are about 50 micrometers, but due to the limitation of the high volume manufacturing process for handing the ultrathin silicon wafers, the thickness of silicon wafers are kept much higher.

Increasing the conversion efficiency, use of less expensive feed stock and use of thinner wafers are the major areas several research institutions and PV companies are working on since 90 's to decrease the cost of the crystalline silicon photovoltaic modules. Incorporation of a back surface field, silicon nitride passivation steps in the commercial solar cell sequences has resulted in significant increase in the efficiency of solar cells. The reduction of wafer thickness from 250 microns to 180 microns has reduced significantly the cost of silicon wafer per watt. The use of upgraded metallurgical silicon is also being commercialized to reduce the cost of the substrate. However, there is still need to reduce the cost of solar modules significantly to enable rapid expansion of PV.

There is a critical need to reduce the cost of the Photovoltaic cells (also referred to as solar cells) to accelerate the use of the solar energy as an alternate form of energy. There is a huge addressable demand for PV products. However, the high cost of the PV devices is the major road block to a rapid expansion of PV market. A substantial reduction in cost of PV devices will increase the demand by many folds. Due to the abundance of silicon in earth, silicon based solar cells are most suited to meet the demand in a sustainable manner. Hence any decrease in the cost of PV device based on crystalline silicon will be very desirable. Silicon wafer cost is one of the dominating costs of PV devices. Hence approaches to use less silicon wafer, thinner wafer will help in the reduction of the cost of the PV devices. The process of this invention provides such a silicon wafer, photovoltaic cell and process.

[9] Generally, a solar cell sequence includes saw damage removal and texturing, followed by emitter diffusion, followed by phosphorous glass removal, followed by silicon nitride anti reflection coating deposition, followed by metallization printing and sintering, followed by junction isolation. (Dirk -Holger Nuehaus and Adolf Munzer , Industrial Silicon wafer solar cells, Advances in Optoelecronics, Vol 2007, article ID 24521)

[10] As described in Figures 1 and 2, a p type crystalline silicon wafer (10), typically about 200 micrometers thick and 156* 156 mm in size, is used as the base substrate. After cleaning and or texturing surfaces (1 1), an n- type emitter (12) is formed on the surfaces by diffusion, having a junction depth of about 0.3 micrometers. A thin layer of phosphorus glass formed during the diffusion process on the wafer surfaces is removed. For preventing shorting, the front and back surfaces are isolated by plasma or chemical etching. Alternatively, the etching can be preformed by laser scribing at the end of the cell process. An anti reflection coating (13) composed of Silicon nitride is deposited using Plasma enhanced chemical vapor, low pressure chemical vapor deposition or physical vapor deposition tools. The anti-reflective (AR) coating is applied to about 75 nm thickness and a refractive index of about 2.10. In most of the commercial solar cell sequences, metallization of front and rear contact is carried out by cofiring the Silver and Aluminum pastes deposited (after the AR coating step) by screen printing technology.

During the cofiring step, an Al BSF and front contact sintering is achieved. The completed cells are then tested and classified according to the cell parameters. The commercial cell efficiencies of solar cell based on multi and mono crystalline silicon have been in the range 14.5-16.5% and 16.0- 18.0% respectively. (Dirk -Holger Nuehaus and Adolf Munzer , Industrial Silicon wafer solar cells, Advances in Optoelecronics, Vol 2007, article ID 24521) Figure 3 shows that metallization pastes containing predominantly silver were printed at the front (in a grid pattern) and rear of the cell (18). (Dirk -Holger Nuehaus and Adolf Munzer , Industrial Silicon wafer solar cells, Advances in Optoelecronics, Vol 2007, article ID 24521)

[12] In the front, silver containing paste is printed over the silicon nitride (not shown) and in the rear the silver containing pads/ busbars (19) are printed on the silicon. The Aluminum paste (17) is screen printed on the entire wafer (except for a small border along the edges) and with a slight overlap with the rear silver paste. The wafer is then sintered at temperature greater than 700 °C during which the Al paste forms a BSF and the front and rear metal paste make good electrical contacts. This step is referred as co firing of the contacts. The cofiring steps are optimized to ensure the metal firing through silicon nitride and forming low resistivity and stable contacts. The composition of the Al BSF pate is formulated to ensure they are compatible with the co fire process condition. In addition, the rear Al paste layer has many purposes - minority carrier reflector (providing a back surface filed for electrical confinement), a low resistance contact, an optical confinement area by being a reflector and non absorber of the light. In addition it has been widely known that aluminum is a getting agent and it improves the electronic quality of the base material. (B. Sopori, et.al., Studies on Backside Al-Contact Formation in Si Solar Cells: Fundamental Mechanisms Conf proceedings, the Materials Research Society (MRS) Fall Meeting 2008, Boston, MA, December 1-5, 2008; G. Hahn, P. Geiger, G. Schubert , Influence of BSF thickness and Al- gettering on IQE and cell parameters in MC Si solar cells, conf proceedings EC PVSEC Paris, 2004)

[13] Each of these components has varying degree of impact on the solar cell depending on the cell design, substrate material and thickness.

Because of the trade off with the front paste firing requirement, optimum back contact performance can not realized in the cofire sequence. Indeed, it has been established that in the commercial solar sequence, the performance of the back contact is suboptimal.

[14] In Figure 4, during the sintering step, the aluminum in the paste

becomes molten and dissolves the silicon in the rear of the wafer forming an alloy of Si- Al. During the cooling, an Al doped region silicon region grows epitaxialy on the silicon surface. The waviness of the interface will be determined by the topography of textured silicon surface in the rear. This layer, about 10-20 micrometers, is called the back surface field (BSF) layer, and it facilitates the electronic confinement of the photo generated carriers. On further cooling, the molten Al freezes from the outside, resulting in a formation of an Al-Si eutectic alloyed region. The outmost layer consists of the excess free Al in a matrix of glass. (B. Sopori, et.al. Studies on Backside Al-Contact Formation in Si Solar Cells: Fundamental Mechanisms Conf proceedings, the Materials Research Society (MRS) Fall Meeting 2008, Boston, MA, December 1-5, 2008)

[15] Due to the difference in the thermal expansion coefficient between silicon and aluminum, the wafers get bowed after the contact firing step. This bowing effect becomes very significant as the wafer thickness decrease and renders further processing of the cells and making into solar module very difficult. Any reduction in the thickness of the wafers beyond about 180 microns is impeded by the bowing effect. It has been found that the bowing can be removed if the outer layer is etched off, however this is not compatible with the commercial sequences. (Ingrid Romijn, Ilkay Cesar, Martien Koppes, Eric Kossen and Arthur Weeber, Pasha, A new industrial process technology enabling high efficiencies on thin and large MS-Si wafers, Conference proceedings of IEEE Photovoltaic Specialists Conference, San Diego, USA, May 1 1-15 2008; Michel Rose , Richard Young, US Pat. Appl. No. 2007/0079868 Al ; B. Bunkenburg et al Enabling thin wafers for today's high efficiency silicon solar cells,

' Proceedings of EU PVSEC, Hamburg 2009)

[16] Current Aluminum BSF (AL BSF) processes have another limitation affecting the cell performance of solar cells especially thin cells < 180 micrometer. To improve the efficiency of thinner solar cells (<180 microns) the rear surface passivation needs to be improved. Al BSF does not provide very efficient passivation. To address this, several sequences have been developed to provide localized Al BSF or by substituting Al with boron. Examples include, Laser fired contact developed by

Fraunhofer Institute for Solar Energy Systems, Freiburg, Germany, and passivated emitter rear localized developed by University of New South Wales, Australia, (UNSW). Both the techniques require capital intensive equipment, high temperature furnace steps, photolithography etc.

[17] Further the electronic quality of the wafer (life time) is reduced by any presence of contamination. Many high efficiency process steps involve high temperature oxidation and especially multi crystalline wafers suffer deterioration of life time when subjected to high temperature processing. Due this effect, high efficiency process steps are difficult to commercialize.

[18] The substrates made by faster growing techniques like ribbon or

substrates made with upgraded metallurgical or low quality silicon feed stock, or wafers from the top regions of a cast multi crystalline ingot have lower electronic quality (life time) compared to the commercial mono or multi crystalline substrates. Consequently the solar cells fabricated on these substrates have lower performance.

[19] A Standard Cell process is described in detail below. [20] Surface damage removal and texturing:

[21] In this step, the surface damage on the wafers caused during the sawing operation are etched off by placing the wafers, in hot concentrated (10- 30%) sodium hydroxide solution. Many other chemicals, such as, hydrogen peroxide, potassium hydroxide can also be used.

Approximately 10 micrometers of silicon is removed during the process. The process takes place in about 20-90 sec. About 200 wafers are loaded into a cassette and etched in a wet chemistry equipment. Monocrystalline silicon substrates are subsequently textured using a low concentrated etch containing 2% sodium hydroxide or potassium hydroxide and isopropyl alcohol. Tiny pyramids of about 3-5 micrometer are formed on the surfaces of the wafer. This process removes an additional 10 micrometers of silicon.

[22] An acid based etching technique, iso-chemical texturing, has been

commercialized for saw damage removal and texturing for wafers especially muticrystalline wafers. The process involves use of an acid based etch solution (hydrofluoric and nitric acid) maintained at a constant temperature range. Only about 10 micrometers of silicon is removed, resulting in a substantial saving in raw material. Texturing of

multicrystalline silicon wafer increases the conversion efficiency of the cell by reducing the reflection and enabling better of the cell design parameters. A special feature of the process is that it can be performed as an in-line process hence enabling the use of thinner silicon substrates. This process can be adapted for etching monocrysalline wafers also. Though the texturing is beneficial to reduce the reflection in the front surface, due to nature of the texturing process rear surface also gets textured. The textured rear surface is not optimum for back surface field benefit. (G. Hahn, P. Geiger, G. Schubert , Influence of BSF thickness and Al- gettering on IQE and cell parameters in MC Si solar cells, conf proceedings EC PVSEC Paris, 2004)

[23] Emitter formation: The semiconductor junction is formed by

phosphorus diffusion across the entire front surface. The process is carried out in a tube furnace using POC13 as the dopant source at about

temperature > 850 C. The semiconductor junction of the majority of commercial solar cells is about 0.3 to 0.5 micrometers and the surface concentration is about 5E20 cm³. The sheet resistivity (a measure of lateral resistance in the n type doped layer) of the commercial cells is about 50 Ω/square.

[24] Excess phosphorus beyond the solid solubility limit is precipitated as inactive phosphorus in silicon region called "dead layer." In this region the minority carrier life time is significantly reduced or the generated carriers get recombined instantly. The high surface concentration of phosphorus and low sheet resistivity are not optimum conditions for maximizing the generation of carriers. However, wide spread use of this approach is due its compatibility with high volume manufacturing tools like screen printing metallization practiced in surface mounted assembly industry. Attempts are being made to enhance the performance of solar cells by reducing the dead layer and developing screen printing paste compatible for higher sheet resistivity and lower surface concentration of phosphorus.

[25] Junction Isolation: During the diffusion step, the edge and the rear of the wafers also get diffused. Hence to prevent leakage paths, the front and the rear need to be isolated. There are several techniques used to achieve this in commercial solar cell manufacturing. One of the widely used techniques is a plasma etching by which the edges of coins stacked wafers are etched. Due to the textured surface of the wafer, some active area of the cell in the front surface is also get etched. Another technique involves use of a laser system, where the edges of the wafers (front or rear) are trenched or cleaved at the end of cell process.

[26] Phosphors Glass removal: In this step, the phosphorus glass formed during the diffusion step is removed using dilute hydrofluoric acid etch. The glass is very thick (20-40 nanometers) and affects the effectiveness of anti reflection layer (which is subsequently deposited.). This step can be done as a batch or in line process.

[27] Anti reflective coating deposition: A thin layer of coating is provided to minimize the reflection of the incident light thereby increasing PV effect. By texturing the surface the reflection can be reduced to 10%. In order further decrease the reflectance, an anti reflection (AR) coating is applied to the solar cells. By selecting the appropriate film thickness and refractive index (RI) of the AR coating, the reflection can be reduced below 4%. Apart from ability to reduce the refection, AR coating must be transparent; should not absorb the incident sunlight.

[28] The most widely used antireflection coating is silicon nitride film

(about 75nm and about 2.10 R.I.), deposited by plasma enhanced chemical vapor deposition technique In addition to providing the anti reflective properties, the silicon nitride deposition process introduces hydrogen which diffuses into silicon bulk. The hydrogenation improves the electronic quality by surface and bulk silicon by means of passivation.

[29] Metallization and contact sintering: In this step, both top and rear

contacts are printed and sintered. Most widely used technique to deposit metal paste is screen printing. The top contact is a paste containing silver, organic and glass binders. In the rear, an aluminum paste is printed in all area except where silver paste is applied to make contacts for the external circuit. The aluminum paste after sintering provides a p+ surface (back surface field) and additional gettering of impurities in the bulk silicon. The pastes are applied sequentially with a drying step in between each printing step. The printed wafers are then fired to make contact with the silicon. The front paste fires through the silicon nitride layer and makes contact to the n- type layer. This step determines many of the cell parameters and long term performance of the solar cell.

[30] Testing and Binning: In this last step the solar cell is measured using a sun simulator at standard testing conditions (STC) - (irradiance of 1000W/m2, an air mass 1.5 spectrum (AM 1.5) at 25 °C. STC is selected as it is easy to reproduce in the laboratory. The cell is tested against a calibrated cell. The cells are sorted and binned according to the electrical performance and into various mechanical and visual defects such cosmetics, color non-uniformity, edge chips etc. The finished cells are packed for further processing into modules.

[31] High efficiency sequence :

[32] Many of the high efficiency sequence are yet to be commercialized in large volume. A few sequences are being evaluated are preproduction stage. A typical high efficiency sequence popularly knows as selective emitter is shown in Figure 5. The steps include:

[33] saw damage removal and texturing;

[34] Masking oxide growth;

[35] Opening slots to expose the silicon;

[36] Heavy phoshorous diffusion;

[37] Phosphorous glass removal and mask removal;

[38] emitter diffusion;

[39] phosphorous glass removal and junction isolation;

[40] Passivating oxide growth;

[41] Silicon Nitride (SiN) anti reflection coating deposition; and,

[42] Metallization printing and sintering.

SUMMARY

[43] Disclosure provides a method of preparing a solar cell device. In one embodiment, the method of preparing a solar cell device includes (a) performing saw damage removal on a silicon wafer; (b) texturing the product of step (a) using a first etchant; (c) etching the rear surface of the product of step (b) by treating with a second etchant at the rear surface of the product of step (b); (d) depositing Al paste onto the rear surface of the product of step (c); (e) sintering Al paste onto the rear surface of the product of step (d); (f) etching the product of step (e) with a third etchant and a substrate cleaning solution to obtain a clean silicon substrate textured in front and having a smooth p+ region in the rear of the p doped substrate; (g) performing emitter diffusion of the product of step (f); (h) performing rear junction isolation and phosphorous glass removal of the product of step (g); (i) performing silicon nitride (SiN) anti reflection coating deposition on the product of step (h); and, (j) performing metal contact printing and sintering on the product of step (i) to obtain the solar cell device. In some embodiments, the method of preparing the solar cell device includes (k) forming silicon dioxide on the surface of product of step (h); (1) performing silicon nitride (SiN) anti reflection coating deposition on the product of step (k); and, (m) performing metal contact printing and sintering on the product of step (1) to obtain the solar cell device.

[44] Some embodiments disclose a method of preparing a solar cell device, wherein the method includes (a) performing saw damage removal on a silicon wafer; (b) texturing the product of step (a) using a first etchant; (c) etching the rear surface of the product of step (b) by treating with a second etchant at the rear surface of the product of step (b); (d) depositing Al paste onto the rear surface of the product of step (c); (e) sintering Al paste onto the rear surface of the product of step (d); (f) etching the product of step (e) with a third etchant and substrate cleaning solutions to remove the Al-Si eutectic region and Al in a matrix of glass of formed during step (e) to obtain a clean silicon substrate textured in front and having a smooth p+ region in the rear of the p doped substrate; (g) performing emitter diffusion in the range of about 80 to about 150 ohms per square on the product of step (f); (h) performing rear junction removal and phosphorous glass removal on the product of step (g); (i) forming masking oxide on the product of step (h); (j) opening slots in the oxide to expose emitter in the product of step (i); (k) performing heavy phosphorus diffusion in the range of about 30 to about 60 ohms per square on the product of step (j); (1) performing phosphorous glass removal and masking oxide removal on the product of step (k); (m) passivating silicon dioxide growth on the product of step (1); (n) depositing SiN anti reflection coating on the product of step (m); (o) printing two front contact silver pastes (one to fire through the Silicon nitride to make contact to silicon and the other to make contact with SiN and electrical contact to the first silver paste) and performing rear pad paste printing and sintering on the product of step (n); and, (p) forming a metal contact connecting the BSF and rear pads in the product of step (m) to obtain the solar cell device.

[45] Some embodiments disclose a method of improving the electronic quality of a low life time silicon wafer. The method includes (a) performing saw damage removal on a silicon wafer; (b) texturing the product of step (a) using a first etchant; (c) etching the rear surface of the product of step (b) by treating with a second etchant at the rear surface of the product of step (b); (d) depositing Al paste by screen printing onto the rear surface of the product of step (c); (e) sintering Al paste onto the rear surface of the product of step (d); (f) etching the product of step (e) with a third etchant and substrate cleaning solutions to remove the Al-Si eutectic region and Al in a matrix of glass of formed during step (e) to obtain a clean silicon substrate textured in front and having a smooth p+ region in the rear of the p doped substrate. Subsequent to step (f), methods disclosed in other embodiments can be performed to obtain a silicon wafer having improved electronic quality.

BRIEF DESCRIPTION OF THE DRAWINGS

[46] The above objectives and advantages of the disclosed teachings will become more apparent by describing in detail preferred embodiments thereof with reference to the attached drawings in which: [47] Figure 1 is a flow chart of a standard cell process as per the conventional method. [48] Figure 2 cross section of a solar cell. [49] Figure 3 details of the metallization of standard solar cell. [50] Figure 4 is a cross section of a wafer after the Al paste firing. [51] Figure 5 is a flow chart of the selective emitter cell making process as per the conventional method. [52] Figure 6 is a flow chart of the cell making process provided in one embodiment.

[53] Figure 7 flow chart of the cell making process provided in one embodiment.

[54] Figure 8 a- g provides a view of the cell process sequence of the second embodiment.

[55] Figure 9 flow chart of the cell making process as per the third embodiment.

[56] Figure 10 is a method of improving electronic quality of a silicon wafer used in making a solar cell device.

DETAILED DESCRIPTION

[57] Embodiments of processes for making a photovoltaic cell and the photovoltaic product are disclosed that over come the forgoing limitations and disadvantages of inherent in the conventional cell process and the low quality substrates.

[58] The incorporation of a surface passivation layer as shown in Figure 5 will enhance the beneficial effects of the higher emitter sheet resistivity cells and thin cells. In addition, the cells (less than 150 micrometers) require a back surface field which does not bow the cells as the Aluminum paste based sequence.

[59] The high efficiency processing sequence (Figure 5) involves high

temperature processing for masking oxide or passivating oxide formation. During this high temperature step the electronic quality of the substrate degrades due to contamination or internal reorganization of impurities, especially for multi-crystalline substrates. Hence the electronic quality of the wafers should be high when they are subjected to the high temperature steps.

[60] In one embodiment, an optimum Back Surface Field (BSF) is produced by decoupling the BSF process step from the cofiring constraints and by gettering the impurities in the wafers prior to a high temperature steps like oxidation. Some embodiments provide for the manufacturing of ultrathin silicon wafers having less than 200 micrometer of a range of surface area.

[61] Instead doing the Al BSF paste printing and sintering, in some

embodiments, the Al BSF step is done after the saw damage and texturing step. In some embodiments, the BSF formation, gettering are decoupled from the cofire and low resistive back contact formation.

[62] In some embodiments, the effectiveness of the Aluminum BSF is

maximized by decoupling the BSF formation and the back contact formation. In some embodiments, the Al BSF and the Al getting effect are maximized so that they enhance the electronic quality of the substrates and improve the electronic confinement of the photo generated carriers.

[63] The benefits of the process include applicability to lower quality

substrates or improving the performance of the commercial wafers. For example, improved gettering can be applied to the wafers from the top and bottom regions of the cast multicrystalline or monocrystalline ingot, wafers from low quality silicon feed stock, which contain higher level of metallic impurities.

[64] Other benefits of some embodiments of the process include decrease in bowing and fabrication of thinner wafers because etching off of the rear Aluminum layer and the eutectic layer resulting in a solar cell device having higher yield and better performance.

[65] In addition, due to the interaction of the BSF effect and the thickness of the wafers, with an effective BSF even on thinner and lower quality wafers can be used. [66] In some embodiments, a solar cell device is provided with a smoother rear surface for effective BSF. Non uniform interface that occurs due to texturing is reduced by rounding off or smoothening the textured rear surface prior to the Al BSF step. It is well documented that a smooth rear surface is more amenable to BSF effect. This is accomplished by incorporating an additional etch bath in the commercial equipment.

[67] Another potential benefit is that because of the enhancement of the material quality, the wafers can be subjected to high temperature processing steps like thermal oxidation without any significant reduction in the life time. The high temperature steps are part of high efficiency process sequences. Some embodiments will enable the commercialization of the high efficiency sequences or improve the performance of the high efficiency sequences. The life time of the wafers will be increased after the Al treatment; hence, during any subsequent step any reduction in life time will not be significant.

[68] Other potential benefits in high volume manufacturing are: a) decreased chance of contamination of Al paste contamination of the front surface; b) during co-fire large quantity of organics are evaporated from the rear Aluminum paste, which leads to constant tune up of the equipment exhaust system to ensure proper firing of the front contacts. [69] One embodiment of the method incorporates the innovative BSF process (as described above) into a innovative select emitter sequence. This sequence provides very low front recombination in addition to the low rear recombination.

[70] One embodiment of the process is provided in Figure 6. The sequence of the method includes saw damage removal, texturing and rear surface smoothening; followed by Aluminum paste printing and sintering; followed by rear surface etch clean up; followed by emitter diffusion; followed by phosphorous glass removal and junction isolation; optionally followed by Silicon dioxide formation on the surface; followed by SiN anti reflection coating deposition; followed by metal contact printing and sintering;

followed by cell testing and Binning.

[71] In one embodiment, the method of preparing a solar cell device

includes (a) performing saw damage removal on a silicon wafer; (b) texturing the product of step (a) using a first etchant; (c) etching the rear surface of the product of step (b) by treating with a second etchant at the rear surface of the product of step (b); (d) depositing Al paste onto the rear surface of the product of step (c); (e) sintering Al paste onto the rear surface of the product of step (d); (f) etching the product of step (e) with a third etchant and substrate cleaning solutions to remove the Al-Si eutectic region and Al in a matrix of glass of formed during step (e) to obtain a clean silicon substrate textured in front and having a smooth p+ region in the rear of the p doped substrate; (g) performing emitter diffusion of the product of step (f); (h) performing rear junction isolation and phosphorous glass removal of the product of step (g); (i) performing silicon nitride (SiN) anti reflection coating deposition on the product of step (h); and, (j) performing metal contact printing and sintering on the product of step (i) to obtain the solar cell device. In some embodiments, the method of preparing the solar cell device includes (k) forming silicon dioxide on the surface of product of step (h); (1) performing silicon nitride (SiN) anti reflection coating deposition on the product of step (k); and, (m) performing metal contact printing and sintering on the product of step (1) to obtain the solar cell device. Alternate methods for depositing Al paste include ink jet , spray printing, evaporation , sputtering, vapor deposition etc. Some embodiments provide a solar cell device prepared by the disclosed methods.

[72] In one embodiment, the wafer after saw damage and texturing etch will be undergo a rear etch step to smoothen the texture. This additional etching can be done in the same equipment with suitable modification. The Al paste is screen printed/ (or by other dispensing method) in a grid pattern or Full field on the rear of the wafer. The wafers are sintered to form the BSF. The firing profile is optimized to ensure formation of a smooth p+ region. The Aluminum BSF region is formed along with the Al rich outer layer. The firing can be carried out in the belt furnaces or tube furnaces. The wafers are then transported to wet etch station where HC1 containing etch removes eutectic region and the outer layer in the rear of the wafer without removing the Aluminum doped p+ layer. The wafer is then cleaned and dried to prepare for the next high temperature step.

[73] An emitter is formed by diffusion of phosphorus, on the front of the cleaned wafer with the BSF on the rear surface. The next step the phosphorus containing glass, formed as a byproduct during the diffusion step, is removed followed by a rear etch step to remove the phosphorus diffusion junction. An optional Silicon dioxide is grown over the front and rear surface thickness 4 to 12 nanometers. An antireflection coating is deposited on the front surface of the cleaned wafer. The front contact (finger and bus bar) and rear busbar containing silver are printed and sintered. The silver is plated on to the rear p+ region or a low temperature Ag based contact is printed and sintered. The cells are then tested for electrical performance and binned.

[74] One embodiment of the method is provided in Figure 7, which

combines the concepts of localized BSF obtained by first embodiment and adds further concepts to improve the cell efficiency. The foregoing is a summary containing simplifications, generalization and omission of detail is illustrative only and not intended to be in any way limiting, but should be clear to those conversant with the art. The innovative sequence decreases the loss in efficiency by providing reduced metal contact with the silicon hence lowering the emitter and surface recombination. It still provides low contact resistance and low lateral ohmic contact. This innovation will reduce the cost of selective emitter sequence and increase the cell efficiency beyond the traditional selective emitter.

[75] In one embodiment, the method includes (a) performing saw damage removal on a silicon wafer. Next, texturing the product of step (a) using a first etchant. Then (c) etching the rear surface of the product of step (b) by treating with a second etchant at the rear surface of the product of step (b); (d) depositing Al paste onto the rear surface of the product of step (c); (e) sintering Al paste onto the rear surface of the product of step (d); (f) etching the product of step (e) with a third etchant and substrate cleaning solutions to remove the Al-Si eutectic region and Al in a matrix of glass of formed during step (e) to obtain a clean silicon substrate textured in front and having a smooth p+ region in the rear of the p doped substrate; (g) performing emitter diffusion in the range of about 80 to about 150 ohms per square on the product of step (f); (h) performing rear junction removal and phosphorous glass removal on the product of step (g); (i) forming masking oxide on the product of step (h); (j) opening slots in the oxide to expose emitter in the product of step (i); (k) performing heavy phosphorus diffusion in the range of about 30 to about 60 ohms per square on the product of step (j); (1) performing phosphorous glass removal and masking oxide removal on the product of step (k); (m) passivating silicon dioxide growth on the product of step (1); (n) depositing SiN anti reflection coating on the product of step (m); (o) printing two front contact silver pastes (one to fire through the Silicon nitride to make contact to silicon and the other to make contact with SiN and electrical contact to the first silver paste) and performing rear pad paste printing and sintering on the product of step (n); and, (p) forming a metal contact connecting the BSF and rear pads in the product of step (m) to obtain the solar cell device.

[76] In one embodiment, the innovative Selective emitter sequence includes saw damage removal, texturing and rear surface smoothening;

[77] Aluminum paste printing and sintering;

[78] Rear surface etch clean up;

[79] Emitter diffusion 80-150 ohms per sq;

[80] Phosphorous glass removal and rear etch;

[81] Masking oxide formation;

[82] Opening slots in the oxide to expose emitter;

[83] Heavy phosphorus diffusion- inline or tube 30-60 ohms per sq;

[84] Phosphorous glass removal and masing oxide removal; [85] Passivating oxide growth;

[86] SiN anti reflection coating deposition;

[87] Open slots in SiN to expose the heavy phosphorous diffused regions;

[88] Front contact paste and rear pad paste printing and sintering;

[89] Metal contact connecting the BSF and rear pads; and,

[90] Cell testing and Binning to obtain the photovoltaic device.

[91] In one embodiment, provided in Figure 8 a- g, the wafer after saw

damage and texturing etch will undergo a rear etch step to smoothen the texture. This additional etching can be done in the same equipment with suitable modification. The Al paste is screen printed/ (or by other dispensing method) in a grid pattern or entire rear (Full field) on the rear of the wafer. The wafers are sintered to form the BSF. The firing profile is optimized to ensure formation of a smooth p+ region. The Aluminum BSF region is formed along with the Al rich outer layer. The firing can be carried out in the belt furnaces or tube furnaces. The wafers are then transported to wet etch station where HCl containing etch removes eutectic region and the outer layer in the rear of the wafer. The wafer 80 with the Aluminum BSF p+ (81) is then cleaned and dried to prepare for the next high temperature step.

[92] The wafers are loaded in to tube diffusion furnace to form an emitter diffusion (82) (n+) of about 70-120 ohms per square for optimal current generation. The wafers are then unloaded and the phosphorus containing glass, by product during diffusion and the rear n+ layer (junction) are removed. Instead of the rear etch the junction isolation step can be carried out by laser scribing before the final testing of the completed solar cells. The wafers are loaded in to tube furnaces to grow (82) silicon dioxide to about 100 - 200 nm. Slots (84) are opened in the oxide by etching the oxide. The oxide thickness will be such that phosphorus will not diffuse through the oxide. The areas which are free from oxide will be heavily diffused during a subsequent diffusion. The wafers are then loaded in a diffusion furnace, tube or in line to form a heavy diffusion in the open areas. The sheet resistivity range in the heavy diffused areas (85) n++ will be about 40 to about 50 ohms per square for minimizing resistive losses. In the next step, the phosphorus containing glass, formed as a byproduct, is removed and the masking oxide on the front and rear. Silicon dioxide (86) is grown over the front and rear surface thickness to about 4 nanometers to about 12 nanometers. An Antireflection coating Silicon Nitride (87) is deposited on the front surface of the silicon dioxide layer of the wafer. With precise alignment slots (88) are opened in the SiN layer, these opening will align with highly diffused areas on the front surface. The front contact (finger and bus bar) containing silver are printed. The front paste is selected to ensure that during the sintering step, the silver paste makes contact with the heavily diffused silicon and the rest of the front contact makes a mechanical contact with the silicon nitride layer. An optional plating step can be introduced to improve the conductivity of the contacts. In stead of screen printing ink jet, spray, or plating can be used to form the contact. The silver is plated on to the rear p+ region or a low temperature Ag based contact is printed and sintered.

[93] One embodiment provides a method of preparing a solar cell device.

The method is applicable for substrates with initial low life time, such as, ribbon, wafers from the top and bottom of the ingot, wafers made by low quality silicon or upgraded metallurgical silicon. The method includes saw damage removal, texturing and rear surface smoothening; followed by aluminum paste printing and sintering; followed by rear surface etch clean up; followed by emitter diffusion; followed by phosphorous glass removal and junction isolation; followed by SiN anti reflection coating deposition; followed by metal contact printing and sintering; followed by cell testing and binning. The sequence is provided in Figure 9.

[94] The wafer after saw damage and texturing etch will be undergo a rear etch step to smoothen the texture. This additional etching can be done in the same equipment with suitable modification. The Al paste is screen printed/ (or by other dispensing method) in a grid pattern or Full field on the rear of the wafer. The wafers are sintered to form the BSF. The firing profile is optimized to ensure formation of a large p+ region. The

Aluminum BSF region is formed along with the Al rich outer layer. The firing can be carried out in the belt furnaces or tube furnaces. The wafers are then transported to wet etch station where HC1 containing etch removes eutectic region and the outer layer in the fear of the wafer. The wafer is then cleaned and dried to prepare for the next high temperature step.

Further steps can be carried out as the standard sequence described in the prior art or as per embodiment 1.

[95] One embodiment provides a method of making a solar cell device from a substrate doped by a p type dopant. The method includes

[96] (a) performing saw damage removal on a Si substrate;

[97] (b) texturing the product of step (a) to form a textured Si substrate on both sides using etchant 1 ;

[98] (c) etching textured the rear surface of the product of step (b) by

treating with a second etchant at the rear surface of the product of step (b) to obtain a Si substrate with a smoothened rear surface (the wafers will float and move slowly guided by a roller);

[99] (d) depositing Al paste by screen printing onto the rear surface of the product of step (c); [100] (e) sintering Al paste onto the rear surface of the product of step to obtain a p+ Si region in the rear of the substrate whose rear surface is smoothly doped with Al;

[101] (f) etching the product of step (e) with a third etchant and substrate cleaning solutions to remove the Al-Si eutectic region and Al in a matrix of glass of formed during step (e) to obtain a clean silicon substrate textured in front and having a smooth p+ region in the rear of the p doped substrate;

[102] (g) subjecting the product of step (f) to emitter diffusion with

Phosphorous dopant to form a Si substrate doped on the front, edge(s) and rear surface with Phosphorous;

[103] (h) etching the rear surface of the product of step (g) with a fourth etchant to remove phosphorous doped n layer from the rear surface of the Si substrate and removing by a fifth etchant the phosphorus doped glass formed during step (g);

[104] (i) depositing a silicon nitride anti-reflective coating over the front surface of the product of step (h) to obtain a Si substrate whose front surface is less reflective,

[105] (j) depositing Ag pastes (different composition) on the front surface and the rear surface of the product of step (i) and sintering obtain metal contacts on the front and rear surface of the Si substrate, [106] (k) depositing an metal paste on the rear surface of the product of step (j) followed to connect to the silver contacts on the rear by low temperature sintering obtain the solar cell device.

[107] The rear etch step can be substituted by another step involving laser scribing after the completion of the cell. In some embodiments, the junction isolation can be accomplished by either etching the rear surface of the substrate or by putting a trench on front or back of a completed cell by laser. The object is to have a break in the continuous n+ region from back to rear through the edges.

[108] Some embodiments of the process are applicable for all quality of substrates and all standard thickness greater than 180 micrometers. The methods will have more impact on lower quality of substrate and very thin substrates. This will help to make use of these lower quality substrates obtained due to limitation of the crystal growth process or use of lower quality feed stock.

[109] In some embodiments, a device with low silicon to metal contact area in front, localized BSF, passivated surfaces is provided.

[1 10] In some embodiments, a photovoltaic device (solar cell) is provided having a crystalline Silicon substrate doped with a p- type of dopant. The crystalline silicon substrate has a front and a rear surface. The solar cell includes a layer at the front surface comprising of an n- type dopant to form the p-n junction; a surface coating formed over the layer on the front surface; a layer of p+ doped with aluminum in the rear surface; metal contacts in the rear connecting the p+ regions. In some embodiments, the front surface of the photovoltaic device is textured. In some embodiments, a photovoltaic device is provided with the back surface is free from the second dopant. In some embodiments, the photovoltaic device includes a back surface field formed by a second layer comprising of Aluminum alloyed with the substrate. In some embodiments, the surface coating of the photovoltaic device includes silicon nitride. In some embodiments of the photovoltaic device, the texturing on the rear surface is smoothened.l] In some embodiments of the photovoltaic device, the substrate doped p type is textured on the front surface and rear surface. In some

embodiments, a p+ layer is formed into the rear surface. The p+ layer is about 6-20 micron into the substrate, following the rear surface topography. In some embodiments, an n type layer is diffused about 0.1 to 0.5 micrometers into the front surface the substrate. The n-type diffused region follows the topography of the front textured surface. In some embodiments, an anti reflection layer is deposited over the n+ layer on the front surface. In some embodiments, a metallization paste is placed over the

antireflection layer. During sintering of the paste, the paste penetrates through the anti reflective layer and makes contact to the n+ layer on the front side of the substrate. A back contact is formed connecting the rear p+ areas.

[112] In some embodiments, Aluminum paste and sintering includes:

[113] a. The paste preferably made with higher quality of Al powder and other constituents to reduce the impurities.

[1 14] b. As the eutectic region and the Al matrix is to be removed, the constraints of "avoiding loose Al dust" on the finished cells can be relaxed.

[1 15] c. The sintering profile can be optimized for the dissolution of Si and diffusion of Al into silicon during cooling, without taking into the front contact formation.

[1 16] In some embodiments, include the following oxide growth process, for example, in Figures 6 and 7. Special feature of providing p+ in the rear is the ability of growing oxide much faster than the other commercial sequences which have only p rear surface.

[1 17] A. During the rear etch the n+ diffusion in the rear will be etched off along with 0.5-2 micron of p+.

[1 18] B. The passivating oxide will grow of the n+ on the front and on the p+ on the rear. The rate of oxide growth on p+ will be much faster than growing oxide on base p on the prior art sequence.

[1 19] C. Laser fired Contact (LFC) Sequence of International Solar Center

(FhG) requires wet oxide as the growth will be slow. [120] 3. Metallization for selective emitter (see Figure 7).

[121] Option 1 : The silver paste of a specific composition is screen printed.

During sintering paste on the n+ regions (which are free from Si02 and

SiN) contacts to the silicon but on the rest of the fingers are making mechanical contact on sin and connectivity to the Ag.

[122] Option 2: Similar to option 1 but the width of the finger is 5 micron less and using light induced palting the cross section of the fingers will be increased.

[123] Option 3 : A seed layer is deposited and Ag plain is plated by electric or electroless techniques.

[124] Figure 10 provides a method of improving the electronic quality of a silicon wafer used in the solar cell device. The steps include saw damage removal of a silicon wafer that has a low initial life time, texturing and rear surface smoothening, aluminum paste printing and sintering, rear surface etch clean up followed by processes as described in other embodiments herein to obtain the solar cell device.

[125] Some embodiments provide a method for improving electronic quality of a silicon wafer by treating a silicon wafer having a initial low life time. The method includes (a) performing saw damage removal on a silicon wafer; (b) texturing the product of step (a) using a first etchant; (c) etching the rear surface of the product of step (b) by treating with a second etchant at the rear surface of the product of step (b); (d) depositing Al paste by screen printing onto the rear surface of the product of step (c); (e) sintering Al paste onto the rear surface of the product of step (d); (f) etching the product of step (e) with a third etchant and a substrate cleaning solution to obtain a clean silicon substrate textured in front and having a smooth p+ region in the rear of the p doped substrate. In some embodiments, the method includes (g) performing emitter diffusion on the product of step (f); (h) performing rear junction isolation and phosphorous glass removal on the product of step (g); (i) performing silicon nitride (SiN) anti reflection coating deposition on the product of step (h); and, (j) performing metal contact printing and sintering on the product of step (i) to obtain the solar cell device. In some embodiments the method includes (k) forming silicon dioxide on the surface of product of step (h); (1) performing silicon nitride (SiN) anti reflection coating deposition on the product of step (k); and, (m) performing metal contact printing and sintering on the product of step (1) to obtain the solar cell device. Some embodiments provide a solar cell device prepared by the disclosed methods.

[126] It will be readily understood by the skilled artisan that numerous

alterations may be made to the examples and instructions given herein.

[127] Other modifications and variations to the invention will be apparent to those skilled in the art from the foregoing disclosure and teachings. Thus, while only certain embodiments of the invention have been specifically described herein, it will be apparent that numerous modifications may be made thereto without departing from the spirit and scope of the invention.

Claims

What is claimed is:

1. A method of preparing a solar cell device, the method comprising:

(a) performing saw damage removal on a silicon wafer;

(b) texturing the product of step (a) using a first etchant;

(c) etching the rear surface of the product of step (b) by treating with a second etchant at the rear surface of the product of step (b);

(d) depositing Al paste onto the rear surface of the product of step (c);

(e) sintering Al paste onto the rear surface of the product of step (d) ;

(f) etching the product of step (e) with a third etchant and substrate cleaning solutions to obtain a clean silicon substrate textured in front and having a smooth p+ region in the rear of the p doped substrate;

(g) performing emitter diffusion on the product of step (f);

(h) performing rear junction isolation and phosphorous glass removal on the product of step (g);

(i) performing silicon nitride (SiN) anti reflection coating deposition on the product of step (h); and,

(j) performing metal contact printing and sintering on the product of step (i) to obtain the solar cell device.

2. The method of preparing the solar cell device of claim 1 , wherein the method comprises: (k) forming silicon dioxide on the surface of product of step (h);

(1) performing silicon nitride (SiN) anti reflection coating deposition on the product of step (k); and,

(m) performing metal contact printing and sintering on the product of step (1) to obtain the solar cell device.

3. A solar cell device prepared by the method of claim 1.

4. A solar cell device prepared by the method of claim 2.

5. A method of preparing a solar cell device, the method comprising:

(a) performing saw damage removal on a silicon wafer;

(b) texturing the product of step (a) using a first etchant;

(d) depositing Al paste onto the rear surface of the product of step (c);

(e) sintering Al paste onto the rear surface of the product of step (d);

(f) etching the product of step (e) with a third etchant and substrate cleaning solutions to remove the Al-Si eutectic region and Al in a matrix of glass of formed during step (e) to obtain a clean silicon substrate textured in front and having a smooth p+ region in the rear of the p doped substrate; (g) performing emitter diffusion in the range of about 80 to about 150 ohms per square on the product of step (f);

(h) performing rear junction removal and phosphorous glass removal on the product of step (g);

(i) forming masking oxide on the product of step (h);

(j) opening slots in the oxide to expose emitter in the product of step

0);

(k) performing heavy phosphorus diffusion in the range of about 30 to about 60 ohms per square on the product of step (j);

(1) performing phosphorous glass removal and masking oxide removal on the product of step (k);

(m) passivating silicon dioxide growth on the product of step (1);

(n) depositing SiN anti reflection coating on the product of step (m);

(o) printing two front contact silver pastes (one to fire through the Silicon nitride to make contact to silicon and the other to make contact with SiN and electrical contact to the first silver paste) and performing rear pad paste printing and sintering on the product of step (n); and,

(p) forming a metal contact connecting the BSF and rear pads in the product of step (m) to obtain the solar cell device.

6. A solar cell device made by the method of claim 5.

7. A method of improving electronic quality of a silicon wafer, the method comprising:

(a) performing saw damage removal on a silicon wafer;

(b) texturing the product of step (a) using a first etchant;

(d) depositing Al paste by screen printing onto the rear surface of the product of step (c);

(e) sintering Al paste onto the rear surface of the product of step (d);

(f) etching the product of step (e) with a third etchant and a substrate cleaning solution to obtain a clean silicon substrate textured in front and having a smooth p+ region in the rear of the p doped substrate.

8. The method of claim 7, further comprising:

(g) performing emitter diffusion on the product of step (f);

9. The method of claim 8, further comprising:

(k) forming silicon dioxide on the surface of product of step (h);

10. The method of claim 7, further comprising:

(g) performing emitter diffusion in the range of about 80 to about 150 ohms per square on the product of step (f);

(i) forming masking oxide on the product of step (h);

(j) opening slots in the oxide to expose emitter in the product of step

(i);

(m) passivating silicon dioxide growth on the product of step (1);

(n) depositing SiN anti reflection coating on the product of step (m); (o) printing two front contact silver pastes (one to fire through the Silicon nitride to make contact to silicon and the other to make contact with SiN and electrical contact to the first silver paste) and performing rear pad paste printing and sintering on the product of step (n); and,

1 1. A silicon wafer for solar cell device made by the method of claim 7.