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WO2010008984A3 - Method and system for using shared memory with optimized data flow to improve input/output throughput and latency - Google Patents

Method and system for using shared memory with optimized data flow to improve input/output throughput and latency Download PDF

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Publication number
WO2010008984A3
WO2010008984A3 PCT/US2009/049963 US2009049963W WO2010008984A3 WO 2010008984 A3 WO2010008984 A3 WO 2010008984A3 US 2009049963 W US2009049963 W US 2009049963W WO 2010008984 A3 WO2010008984 A3 WO 2010008984A3
Authority
WO
WIPO (PCT)
Prior art keywords
data
clients
module
storage system
shared memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/US2009/049963
Other languages
French (fr)
Other versions
WO2010008984A2 (en
Inventor
Jeffrey S. Kimmel
Steve C. Miller
Ashish Prakash
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NetApp Inc
Original Assignee
NetApp Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NetApp Inc filed Critical NetApp Inc
Publication of WO2010008984A2 publication Critical patent/WO2010008984A2/en
Publication of WO2010008984A3 publication Critical patent/WO2010008984A3/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0866Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches for peripheral storage systems, e.g. disk cache
    • G06F12/0868Data transfer between cache memory and other subsystems, e.g. storage devices or host systems
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806Multiuser, multiprocessor or multiprocessing cache systems
    • G06F12/084Multiuser, multiprocessor or multiprocessing cache systems with a shared cache
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/26Using a specific storage system architecture
    • G06F2212/263Network storage, e.g. SAN or NAS
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/28Using a specific disk cache architecture
    • G06F2212/283Plural cache memories
    • G06F2212/284Plural cache memories being distributed
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0668Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/067Distributed or networked storage systems, e.g. storage area networks [SAN], network attached storage [NAS]
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L67/00Network arrangements or protocols for supporting network services or applications
    • H04L67/01Protocols
    • H04L67/10Protocols in which an application is distributed across nodes in the network
    • H04L67/1097Protocols in which an application is distributed across nodes in the network for distributed storage of data in networks, e.g. transport arrangements for network file system [NFS], storage area networks [SAN] or network attached storage [NAS]

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Information Retrieval, Db Structures And Fs Structures Therefor (AREA)
  • Multi Processors (AREA)

Abstract

The data path in a network storage system is streamlined by sharing a memory among multiple functional modules (e.g., N-module and D-module) of a storage server that facilitates symmetric access to data from multiple clients. The shared memory stores data from clients or storage devices to facilitate communication of data between clients and storage devices and/or between functional modules, and reduces redundant copies necessary for data transport. It reduces latency and improves throughput efficiencies by minimizing data copies and using hardware assisted mechanisms such as DMA directly from host bus adapters over an interconnection, e.g. switched PCI-e "network". This scheme is well suited for a "SAN array" architecture, but also can be applied to NAS protocols or in a unified protocol-agnostic storage system. The storage system can provide a range of configurations ranging from dual module to many modules with redundant switched fabrics for I/O, CPU, memory, and disk connectivity.
PCT/US2009/049963 2008-07-17 2009-07-08 Method and system for using shared memory with optimized data flow to improve input/output throughput and latency Ceased WO2010008984A2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US12/175,426 2008-07-17
US12/175,426 US8478835B2 (en) 2008-07-17 2008-07-17 Method and system for using shared memory with optimized data flow to improve input/output throughout and latency

Publications (2)

Publication Number Publication Date
WO2010008984A2 WO2010008984A2 (en) 2010-01-21
WO2010008984A3 true WO2010008984A3 (en) 2010-05-06

Family

ID=41531246

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2009/049963 Ceased WO2010008984A2 (en) 2008-07-17 2009-07-08 Method and system for using shared memory with optimized data flow to improve input/output throughput and latency

Country Status (2)

Country Link
US (1) US8478835B2 (en)
WO (1) WO2010008984A2 (en)

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US9063939B2 (en) * 2011-11-03 2015-06-23 Zettaset, Inc. Distributed storage medium management for heterogeneous storage media in high availability clusters
US8732381B2 (en) 2011-11-09 2014-05-20 Hewlett-Packard Development Company, L.P. SAS expander for communication between drivers
US8819353B2 (en) * 2012-06-15 2014-08-26 Lsi Corporation Host bus adapters with shared memory and battery backup
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US10031820B2 (en) * 2013-01-17 2018-07-24 Lenovo Enterprise Solutions (Singapore) Pte. Ltd. Mirroring high performance and high availablity applications across server computers
US9825913B2 (en) 2014-06-04 2017-11-21 Nicira, Inc. Use of stateless marking to speed up stateful firewall rule processing
US9692698B2 (en) 2014-06-30 2017-06-27 Nicira, Inc. Methods and systems to offload overlay network packet encapsulation to hardware
FR3023620B1 (en) * 2014-07-09 2016-07-29 Stmicroelectronics (Grenoble 2) Sas METHOD FOR MANAGING THE OPERATION OF A TEST MODE OF A LOGIC COMPONENT WITH RESTORATION OF THE STATE PRECEDING THE TEST
US9838477B2 (en) * 2014-10-30 2017-12-05 Netapp, Inc. Techniques for storing and distributing metadata among nodes in a storage cluster system
US11068420B2 (en) * 2015-05-12 2021-07-20 Hewlett Packard Enterprise Development Lp Scalable software stack
US11038845B2 (en) 2016-02-23 2021-06-15 Nicira, Inc. Firewall in a virtualized computing environment using physical network interface controller (PNIC) level firewall rules
CN107015767B (en) * 2017-04-06 2020-06-23 南京三宝弘正视觉科技有限公司 NAS device, distributed processing system and method
KR102818037B1 (en) * 2020-01-20 2025-06-10 에스케이하이닉스 주식회사 System including a storage device for providing data to an application processor
US12068979B2 (en) * 2020-05-01 2024-08-20 EMC IP Holding Company, LLC System and method for dividing a physical ethernet port
US11962518B2 (en) 2020-06-02 2024-04-16 VMware LLC Hardware acceleration techniques using flow selection
TW202216293A (en) 2020-09-01 2022-05-01 荷蘭商蜆殼國際研究公司 A heavy hydrocarbon hydroprocessing catalyst and methods of making and using thereof
US11636053B2 (en) 2020-09-28 2023-04-25 Vmware, Inc. Emulating a local storage by accessing an external storage through a shared port of a NIC
US11736566B2 (en) 2020-09-28 2023-08-22 Vmware, Inc. Using a NIC as a network accelerator to allow VM access to an external storage via a PF module, bus, and VF module
US11593278B2 (en) 2020-09-28 2023-02-28 Vmware, Inc. Using machine executing on a NIC to access a third party storage not supported by a NIC or host
US11792134B2 (en) 2020-09-28 2023-10-17 Vmware, Inc. Configuring PNIC to perform flow processing offload using virtual port identifiers
US12021759B2 (en) 2020-09-28 2024-06-25 VMware LLC Packet processing with hardware offload units
US11829793B2 (en) 2020-09-28 2023-11-28 Vmware, Inc. Unified management of virtual machines and bare metal computers
US11995024B2 (en) 2021-12-22 2024-05-28 VMware LLC State sharing between smart NICs
US12229578B2 (en) 2021-12-22 2025-02-18 VMware LLC Teaming of smart NICs
US11863376B2 (en) 2021-12-22 2024-01-02 Vmware, Inc. Smart NIC leader election
US20230214265A1 (en) * 2022-01-05 2023-07-06 International Business Machines Corporation High availability scheduler event tracking
US12373237B2 (en) 2022-05-27 2025-07-29 VMware LLC Logical memory addressing by smart NIC across multiple devices
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Also Published As

Publication number Publication date
US8478835B2 (en) 2013-07-02
US20100017496A1 (en) 2010-01-21
WO2010008984A2 (en) 2010-01-21

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