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WO2009152739A1 - 获取跨导滤波器校准电容值的方法、装置和系统 - Google Patents

获取跨导滤波器校准电容值的方法、装置和系统 Download PDF

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Publication number
WO2009152739A1
WO2009152739A1 PCT/CN2009/072224 CN2009072224W WO2009152739A1 WO 2009152739 A1 WO2009152739 A1 WO 2009152739A1 CN 2009072224 W CN2009072224 W CN 2009072224W WO 2009152739 A1 WO2009152739 A1 WO 2009152739A1
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WIPO (PCT)
Prior art keywords
unit
value
capacitor
calibration
transconductance
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PCT/CN2009/072224
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English (en)
French (fr)
Inventor
诸小胜
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华为技术有限公司
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Application filed by 华为技术有限公司 filed Critical 华为技术有限公司
Publication of WO2009152739A1 publication Critical patent/WO2009152739A1/zh
Priority to US12/882,734 priority Critical patent/US8013670B2/en

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Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H11/00Networks using active elements
    • H03H11/02Multiple-port networks
    • H03H11/04Frequency selective two-port networks
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H11/00Networks using active elements
    • H03H11/02Multiple-port networks
    • H03H11/04Frequency selective two-port networks
    • H03H11/12Frequency selective two-port networks using amplifiers with feedback
    • H03H11/1291Current or voltage controlled filters

Definitions

  • Embodiments of the present invention relate to the field of mobile communications technologies, and in particular, to a method, apparatus, and system for acquiring a cross-guide filter calibration capacitance value. Background of the invention
  • Transconductance capacitor filter (Gm-C, gm-C filter) is one of the most common filter structures. It features low power consumption and high bandwidth, and can be used in a variety of wireless or wired technologies.
  • the integrated capacitor and resistor have a large process correlation, which often causes the filter's cutoff frequency to deviate greatly from the design value, affecting the filter performance, so it is accompanied by on-chip integrated filtering.
  • the appearance of the filter, the filter calibration circuit is essential.
  • the transconductance capacitor filter structure in order to achieve filter frequency calibration (sometimes the quality factor Q of the filter is also calibrated), it is generally implemented by means of transconductance calibration. Since the cutoff frequency of the filter is proportional to ⁇ , when the filter frequency calibration is performed, it is often realized by changing the value of the transconductance (Gm).
  • the PLL is used to adjust the tail current for filter frequency calibration.
  • a PLL is integrated on-chip, and the PLL realizes the frequency by using an oscillator (VC0, Voltage Control Oscillator) composed of the same structure as the filter. Control, by adjustment
  • the tail current of VC0 is used to determine the frequency control of the oscillator.
  • the frequency calibration achieved by changing the tail current of VC0 will cause the linearity of the filter to change with the tail current of VC0, thus affecting the performance of the transconductance filter.
  • Embodiments of the present invention provide a method, apparatus, and system for acquiring a calibration capacitance value of a transconductance filter, which can improve the accuracy of the transconductance filter calibration without affecting the performance of the transconductance filter.
  • a method for obtaining a cross-guide filter calibration capacitance value comprising:
  • the analog capacitor is integrated by a current for a predetermined time, and the analog capacitor is used to simulate a capacitance of a transconductance filter that is set as a uniform hook capacitor array;
  • the analog capacitor Comparing the integrated voltage value obtained by the integration process with a set voltage value, and by successively approximating the value of the analog capacitor that makes the integrated voltage value equal to the set voltage value by adjusting the control code, the analog capacitor is The value is used as the calibration capacitor value.
  • a device for obtaining a transconductance filter calibration capacitance value comprising:
  • a current supply unit for charging the integrator unit by current
  • a comparator unit configured to compare the integrated voltage value obtained by integrating the analog capacitor with a set voltage value; and a controller unit configured to successively search for an integrated voltage value and a set voltage value by adjusting a control code
  • the value of the analog capacitor is equal to the value of the analog capacitor as the calibration capacitor value.
  • a transconductance filter calibration system includes:
  • Finding an analog capacitor value such that the integrated voltage value is equal to the set voltage value using the analog capacitor value as a calibration capacitor value, storing a control code corresponding to the calibration capacitor value, and providing the transconductance filter to calibrate the cross The capacitance value of the filter;
  • a transconductance filter a control code for a device for obtaining a capacitance value for calibrating a transconductance filter, the portion of the capacitance in the transconductance unit being calibrated to a calibration capacitance value corresponding to the control code.
  • the calibration method provided by the embodiment of the invention is a linear discrete manner, which does not change the linearity of the transconductance filter with the change of the tail current of the VC0, and improves the performance of the transconductance filter without affecting the performance of the transconductance filter. The performance of the transconductance filter.
  • 1 is a schematic structural view of two basic transconductance units
  • FIG. 2 is a schematic diagram of a prior art using a PLL to adjust a tail current for filter frequency calibration
  • FIG. 3 is a schematic structural diagram of a transconductance filter calibration system according to an embodiment of the present invention.
  • FIG. 4 is a schematic structural diagram of a first embodiment of a device for acquiring a calibration capacitance value of a transconductance filter according to an embodiment of the present invention
  • FIG. 5 is a second embodiment of an apparatus for acquiring a calibration capacitance value of a transconductance filter according to an embodiment of the present invention
  • FIG. 6 is a schematic structural diagram of a controller unit in an apparatus for acquiring a calibration capacitance value of a transconductance filter according to an embodiment of the present invention
  • FIG. 7 is a schematic diagram of a 5-bit binary control code control calibration process
  • FIG. 8 is a schematic structural diagram of an integrator unit in an apparatus for acquiring a calibration capacitance value of a transconductance filter according to an embodiment of the present invention
  • FIG. 9 is a schematic diagram of operation of an integrator unit according to an embodiment of the present invention.
  • FIG. 10 is a schematic diagram of an automatic zero return of an integrator unit according to an embodiment of the present invention.
  • FIG. 11 is a schematic diagram of accurate voltage subtraction and amplification of a voltage comparator in a comparator unit according to an embodiment of the present invention
  • FIG. 12 is a timing chart of apparatus control for acquiring a calibration capacitance value of a transconductance filter according to an embodiment of the present invention
  • FIG. 13 is a schematic structural diagram of a third embodiment of an apparatus for acquiring a transconductance filter calibration capacitance value according to an embodiment of the present invention
  • FIG. 14 is a first embodiment of a method for acquiring a transconductance filter calibration capacitance value according to an embodiment of the present invention
  • FIG. 15 is a schematic flowchart of a second embodiment of a method for obtaining a calibration capacitance value of a transconductance filter according to an embodiment of the present invention
  • FIG. 16 is a schematic diagram of the capacitor for a predetermined time according to an embodiment of the present invention.
  • 17 is a flow chart showing a successive approximation search for a calibration capacitance value such that an integrated voltage value is equal to a set voltage value according to an embodiment of the present invention
  • FIG. 18 is a schematic flowchart diagram of a third embodiment of a method for acquiring a calibration capacitance value of a transconductance filter according to an embodiment of the present invention. Mode for carrying out the invention
  • Embodiments of the present invention provide a method for obtaining a calibration capacitance value of a transconductance filter and a device for obtaining a calibration capacitance value of a transconductance filter, which can improve the calibration of the transconductance filter without affecting the performance of the transconductance filter. accuracy.
  • FIG. 3 it is a schematic diagram of a configuration of a transconductance filter calibration system according to an embodiment of the present invention.
  • the filter calibration system includes:
  • Obtaining a device for calibrating the capacitance value of the transconductance filter which is used to integrate the analog capacitor to obtain an integrated voltage value, and successively approximating the control code to find a calibration capacitor value that makes the integrated voltage value equal to the set voltage value, and uses
  • the calibration capacitor value corresponding to the control code calibrates the capacitance value of the transconductance filter; it should be noted that the analog capacitor is a capacitor that simulates the transconductance filter 2 of the capacitor array set to be uniformly hooked.
  • Transconductance filter 2 a control code for means 1 for calibrating the capacitance value of the transconductance filter, the capacitance portion of the transconductance unit being calibrated to a calibration capacitance value corresponding to the control code.
  • the capacitance of the transconductance filter 2 is previously set to a uniformly packed capacitor array.
  • the calibration mode between the device 1 for acquiring the transconductance filter calibration capacitance value and the transconductance filter 2 is a master-slave mode, and the calibration mode is a linear discrete capacitance approximation, thereby avoiding the calibration process because of the transconductance filter.
  • the linearity affects the performance of the transconductance filter as the tail current changes, ultimately improving the correctness of the transconductance filter calibration.
  • FIG. 4 is a schematic structural diagram of a first embodiment of an apparatus for acquiring a calibration capacitance value of a transconductance filter according to an embodiment of the present invention.
  • the apparatus for obtaining a transconductance filter calibration capacitance value as shown in FIG. 4 includes:
  • a current supply unit 10 for generating a current to charge the integrator unit 11;
  • the integrator unit 11 is configured to perform integration processing on the analog capacitor in a predetermined time under charging, and the analog capacitor simulation is preset to be a capacitance of a transconductance filter of the uniform hook capacitor array;
  • the comparator unit 12 is configured to compare the integrated voltage value obtained by integrating the analog capacitor with a set voltage value.
  • the controller unit 13 is configured to, by adjusting the control code, successively find a value of the analog capacitor that makes the integrated voltage value equal to the set voltage value as the calibration capacitance value;
  • the current supply unit 10 may be a transconductance unit that simulates the structure of the transconductance unit in the calibrated transconductance filter; the current supply unit 10 may also be a differential current source. Embodiments in which the current supply unit is a transconductance unit and a differential current source will be separately explained in the following embodiments.
  • FIG. 5 is a schematic structural diagram of a second embodiment of an apparatus for acquiring a calibration capacitance value of a transconductance filter according to an embodiment of the present invention.
  • the current supply unit is a transconductance unit 10 when implemented, and the transconductance unit 10 is a transconductance unit simulating the same structure of the calibrated transconductance filter.
  • the capacitance of the transconductance filter that is previously set to the uniform-hook capacitor array is simulated by the analog capacitor 115 in the integrator unit 11 to avoid the influence of the linearity of the transconductance unit of the transconductance filter on the calibration accuracy.
  • the capacitance of the transconductance filter is first set to some smaller uniform-hook capacitor array.
  • the 2pF capacitor is expressed as the sum of 20 100fF capacitors.
  • the capacitor is set to the fixed capacitor and the calibration capacitor, and the size of the capacitor array, co c ⁇ , where ⁇ ⁇ is a fixed number
  • the unit capacitance of the quantity; ( ⁇ is a configurable unit capacitance.
  • the frequency of calibration is determined by the ratio of C / K and .
  • the capacitor array of the transconductance filter is simulated by the variable capacitor 115 in the integrator unit 11, and the current is generated by the transconductance unit 10 to integrate the variable capacitor 115 in a predetermined time, and the obtained integral is obtained.
  • the voltage value is compared with the set voltage value until the analog capacitor value of the optimal analog capacitor 115 (ie, the variable capacitor 115) is found, so that when the integrated voltage value is equal to the set voltage value, the calibration ends.
  • the value of the analog capacitor is the value of the calibration capacitor.
  • the apparatus for acquiring a transconductance filter calibration capacitance value includes:
  • Transconductance unit 10 its positive output terminal 100 is connected to the positive input terminal 110 of the integrator unit 11, the negative output terminal 101 is connected to the negative input terminal 111 of the integrator unit 11, and the output current is charged to the integrator unit 11;
  • the integrator unit 11 is connected to the positive output terminal 100 of the transconductance unit 10 through its positive input terminal 110, and the negative input terminal 111 of the integrator unit 11 is connected to the negative output terminal 101 of the transconductance unit 10, Or the positive input terminal 110 is connected to the negative output terminal 101 of the transconductance unit 10, the negative input terminal m of the integrator unit 11 is connected to the positive output terminal wo of the transconductance unit 10; and one of the integrator units 11
  • the output terminal 112 is connected to the positive input terminal 120 of the comparator unit 12, and the other output terminal 113 is connected to the negative input terminal 121 of the comparator unit 12, and the input terminal 110 and the input terminal 111 are also respectively connected with a variable capacitor 115.
  • the output terminal 1150 of the variable capacitor 115 is connected to the common mode reference level VCM; the variable capacitor 115 is integrated by the operational amplifier 114 under the action of the control code of the controller unit 13 within a predetermined time to obtain Integrated voltage value;
  • the device for obtaining the transconductance filter calibration capacitance value shown in FIG. 5 further includes:
  • the comparator unit 12 includes a comparator 123 and a voltage amplifier 124.
  • the positive input 120 of the comparator unit 12 is connected to the output 112 of the integrator unit 11, and the negative input 121 of the comparator unit 12 is connected to the integrator unit.
  • the output terminal 113 of the comparator unit 12 and the output terminal 126 of the comparator unit 12 are connected to a comparator 123.
  • the voltage amplifier 124 realizes voltage amplification and subtraction through two phase switching capacitors, and the comparator 123 is configured to The integral voltage value obtained by integrating the integrator unit 11 is compared with the set voltage value; the output end 122 of the comparator unit 11 is connected to the input end 130 of the controller unit 13 to output the comparison result to the controller unit 13;
  • the apparatus for obtaining a transconductance filter calibration capacitance value shown in FIG. 5 further includes:
  • the controller unit 13 is configured to provide a control code to the integrator unit 11 through its output terminal 131, control the integrator unit 11 to integrate the variable capacitor 115, and according to the comparison result of the comparator unit 12
  • the control code is adjusted successively to find a capacitance value whose integrated voltage value is the same as the set voltage value, and the capacitance value is used as a calibration capacitance value.
  • the control code output by the controller unit 13 may be a binary control code of N bit, and the adjustment range is (0 ⁇ ; 2"" _ 1 ) configurable unit power
  • N is a natural number.
  • N is a natural number.
  • the controller unit 13 includes:
  • the control code output subunit 130 is configured to output a Nbit binary control code to the integrator unit 11, wherein N is a natural number; and the controller adjustment subunit 131 is configured to sequentially change the binary control code to obtain an integral.
  • the value of the analog capacitor whose voltage value is equal to the set voltage value is used as the calibration capacitor value.
  • the integrator unit 11 is charged by the transconductance unit 10, and the integrator unit 11 obtains an integrated voltage value.
  • Gm is the transconductance value
  • Vref is the set voltage value
  • At is the specified integration time
  • C int is the capacitance value actually used for calibration
  • the capacitance value is output by the control code output subunit 130 of the controller unit 13
  • the integrator unit 11 obtains an integrated voltage value V.
  • the integrated voltage value V is again used by the comparator unit 12.
  • ut with the set voltage value Vref comparison determining whether the size of Gm / C is equal to 1, until the control of the controller unit 13, comparator unit 12 compares the integrated voltage value V.
  • stars Ut is equal to the set voltage value Vref, that is, when the size of Gm/C is equal to 1, C int at this time is the calibration capacitance value.
  • controller unit 13 controls the capacitance value through the binary control code of the N bit.
  • the device for obtaining the value of the transconductance filter calibration capacitor shown in FIG. 5 further includes:
  • the detecting unit 14 starts to find the calibration capacitor value when detecting that the calibration control signal is valid
  • the memory unit 15 is configured to store a control code corresponding to the calibration capacitance value when the calibration is completed, and provide the control code to the transconductance filter to calibrate the capacitance value of the transconductance filter.
  • the controller unit 13 automatically sets the 5-bit binary control code to 10000, and the corresponding analog capacitor of the corresponding integrator integrated analog capacitor is:
  • the controller unit 13 changes the binary control code to 11000, so that
  • Ut The value of the analog capacitor equal to the set voltage value Vref.
  • the value of the analog capacitor is the value of the calibration capacitor. The last determined binary control code will be provided for use by the transconductance filter.
  • the transconductance unit 10 Since the input offset of the operational amplifier unit 114 (Op-amp) in the transconductance unit 10 and the integrator unit 11 affects the calibration accuracy, especially the transconductance unit 10, in the integration process, the transconductance unit is required. 10 operating in the high linear region, the reference voltage of the input of the transconductance unit 10 can not be very high, usually in the range of several tens of millivolts to several hundred millivolts, because the transconductance unit 10 will have a DC offset of several millivolts or more. The current output from the transconductance unit 10 is greatly affected, thereby affecting the final output of the integrator unit 11.
  • the integrator unit 11 includes: a molecular unit 110 for time, for dividing the integration time At into two equal times ⁇ ;
  • a first integration sub-unit 111 configured to positively integrate the analog capacitor during the first integration time to obtain a first integral
  • a second value sub-unit 112 configured to inversely integrate the analog capacitor during a second integration time to obtain a second integral
  • the integrated voltage value accumulating unit 113 is configured to accumulate the first integrated voltage value and the second integrated voltage value to obtain a final integrated voltage value, to eliminate DC offset generated by the transconductance unit or the differential current source shift.
  • the molecular unit 110 divides the time At which the integrator unit 11 integrates the capacitor array into two equal times ⁇ ;
  • the first integration sub-unit 111 positively integrates the analog capacitance during the first ⁇ integration time, specifically, as shown in part (a) of Figure 9.
  • a forward reference voltage Vref is input to the transconductance unit 10, and then the positive output terminal 100 of the transconductance unit 10 and the positive input terminal 110 of the integrator unit 11 are connected, and the negative electrode of the transconductance unit 10 is connected.
  • the output terminal 101 is connected to the negative input terminal 11 of the integrator unit 11 to obtain a first integrated voltage value; the second integrating sub-unit 112 reversely integrates the analog capacitor during the second integral time, specifically , as shown in Figure 9 (b)
  • a reverse reference voltage Vref is first input to the transconductance unit 10, and then the positive output terminal 100 of the transconductance unit 10 and the negative input terminal 111 of the integrator unit 11 are connected, and the negative electrode of the transconductance unit 10 is connected.
  • the output terminal 101 is connected to the positive input terminal 110 of the integrator unit 11 to obtain a second integrated voltage value;
  • the integrated voltage value accumulating unit 113 is configured to cancel the accumulation of the first integrated voltage value and the second integrated voltage value by the DC offset generated by the transconductance unit 10 itself.
  • an embodiment of the present invention provides an auto-zero technique to eliminate the input DC present in the operational amplifier 114 (Op-amp) Offset
  • the offset of Op-amp 114 is passed through the discharge period (a), the self-calibration period (b), and the output period (c). The period is eliminated, so that the final output integrated voltage value ⁇ f ' is only related to Gm, C int and At.
  • the output terminals 1150 of the two variable capacitors 115 are respectively connected to the common mode reference level VCM, and the input terminal 110 and the output terminal 112 of the operational amplifier 114 are shorted, and the input terminal 111 and the output terminal 113 are connected. Shorted, used to memorize the inherent DC offset of the operational amplifier 114;
  • the input terminal 110 and the output terminal 112 of the operational amplifier 114 and the shorting switch of the input terminal 111 and the output terminal 113 are disconnected, and the two variable capacitor 115 output terminals 1150 are respectively connected to the operational amplifier 114.
  • the output terminal 112 and the output terminal 113, the transconductance unit 10 integrates the integrator unit 11 during the period;
  • the embodiment of the present invention achieves accurate voltage subtraction amplification by a two-phase switched capacitor technique, as shown in FIG.
  • the input terminal 120 and the output terminal 125 of the voltage comparator 124 are shorted, the input terminal 121 and the output terminal 126 are shorted, and the input signal and the reference signal simultaneously charge the variable capacitor 115;
  • FIG. 12 a device control timing diagram for acquiring a cross-guide filter calibration capacitance value according to an embodiment of the present invention is provided.
  • the detecting module 14 of the device for obtaining the transconductance filter calibration capacitance value provided by the embodiment of the present invention detects that the calibration control control signal is valid, and the internal calibration valid signal (TUN_enable) is low level, and the calibration is started. TUN-enabled After being set to valid, the calibration is completed, the memory unit 15 updates the value of the previously stored control code, and turns off the TUN_enable signal. This mode supports calibration at any time, and can well track the influence of external conditions on the filter frequency.
  • the device for obtaining a calibration capacitance value of a transconductance filter is provided by an embodiment of the present invention, and the capacitance of the transconductance filter is simulated by an analog capacitor, and the capacitance of the transconductance filter is preset to be a capacitor array of the hook, and the cross is obtained.
  • the device for calibrating the capacitance value of the filter also simulates a current generated by the transconductance unit of the transconductance filter, integrates the integrated voltage value obtained by integrating the analog capacitor, compares the voltage value with the set voltage value, and successively approximates Finding a calibration capacitor value that makes the integrated voltage value equal to the set voltage value.
  • This calibration method is a linear discrete method that does not cause the linearity of the transconductance filter to change with the change of the tail current, and also
  • the capacitor array performs forward integration and reverse integration, eliminating the DC offset generated by the transconductance unit and improving the performance of the transconductance filter without affecting the performance of the transconductance filter.
  • FIG. 13 is a schematic structural diagram of a third embodiment of an apparatus for acquiring a calibration capacitance value of a transconductance filter according to an embodiment of the present invention.
  • a complete active R, C calibration circuit is obtained by appropriately transforming the Gm unit. Specifically, the Gm unit is directly changed into a differential current output unit (or a differential current source), and the transconductance is obtained after modification.
  • the device structure diagram of the filter calibration capacitance value is shown in FIG. 11, and is composed of a differential current output unit (or differential current source) 10 (reference current source), an integrator 11 (integrator), a comparator 12 (Comparator), and a control unit 14.
  • the inverse ratio is proportional to the set voltage value Vref.
  • Vref is the set voltage value
  • At is the specified integration time
  • C int is the capacitance value actually used for calibration.
  • the voltage comparator 124 of the comparator unit 12 passes the two-phase switched capacitor technique to V. Ut achieves voltage subtraction and amplification, and then passes through comparator 123 of comparator unit 12, which will be V. Ut is compared with Vref, and by successive control of the control code of the controller unit 13, the V is found. ut equal to the value Vref C int and the corresponding control code, this time, C int is the calibration capacitance value corresponding to the control code supplied to the transconductance filter.
  • the device for obtaining a calibration capacitance value of a transconductance filter is provided by an embodiment of the present invention, and the capacitance of the transconductance filter is simulated by an analog capacitor, and the capacitance of the transconductance filter is preset to be a capacitor array of the hook, and the cross is obtained.
  • the device for guiding the filter to calibrate the capacitance value generates a current through the differential current source, and integrates the integrated voltage value obtained by integrating the capacitor array, compares the voltage value with the set voltage value, and successively approximates and obtains the integrated voltage value.
  • the calibration capacitor value equal to the set voltage value.
  • This calibration method is a linear discrete method that does not cause the linearity of the transconductance filter to change with the tail current, and also performs positive integration on the capacitor array. And the inverse integration eliminates the DC offset generated by the transconductance unit and improves the performance of the transconductance filter without affecting the performance of the transconductance filter.
  • FIG. 14 is a schematic flowchart diagram of a first embodiment of a method for acquiring a calibration capacitance value of a transconductance filter according to an embodiment of the present invention.
  • a method for obtaining a calibration capacitance value of a transconductance filter according to an embodiment of the present invention includes:
  • step 100 the capacitance of the transconductance filter is simulated by using an analog capacitor; the transconductance filter capacitor is preset to be a capacitor array of a uniform hook;
  • step 101 generating a current to integrate the analog capacitor in a predetermined time
  • step 102 the integrated voltage value obtained by integrating the analog capacitor is compared with the set voltage value; determining whether the integrated voltage value and the set voltage value are equal; if not, proceeding to step 103; If they are equal, go to step 104;
  • the calibration capacitance value such that the integrated voltage value is equal to the set voltage value is successively approximated by adjusting the control code; at step 104, the calibration capacitance value and the corresponding control code are obtained.
  • FIG. 15 is a schematic flowchart diagram of a second embodiment of a method for acquiring a calibration capacitance value of a transconductance filter according to an embodiment of the present invention.
  • the capacitance of the transconductance filter is simulated by using an analog capacitor.
  • the calibration frequency range of the transconductance filter capacitance is determined by the ratio of C / K sum.
  • step 201 a transconductance unit of the transconductance filter is simulated to generate a current; in step 202, the integrator is charged by the current, and the analog capacitor is integrated in a predetermined time to obtain a credit value. : v y Vref x
  • Gm is the transconductance value
  • Vref is the set voltage value
  • At is the specified integration time
  • C int is the capacitance value actually used for calibration.
  • the integrated voltage value V obtained by integrating the analog capacitor is obtained.
  • Ut is compared with the set voltage value Vref, and the integrated voltage value V is made by successively approximating by adjusting the control code.
  • Ut is the value of the analog capacitor equal to the set voltage value Vref as the calibration capacitor value.
  • the integrated voltage value V can be obtained.
  • C int is the calibration capacitance value, and the corresponding binary control code is the binary control code obtained by calibration; 203. Save the binary control code, and provide the binary control code to the transconductance filter for use.
  • the integrator is charged by the current, and the analog capacitor is integrated in a predetermined time.
  • the step 201 of obtaining the integrated voltage value specifically includes: at step 2010, dividing the integration time At For two equal times;
  • step 2012 in the second ⁇ integration time, the analog capacitor is inversely integrated to obtain a second integrated voltage value
  • the accumulation of the first integrated voltage value and the second integrated voltage value results in a final integrated voltage value to cancel the DC offset generated by the transconductance unit.
  • Fig. 17 is a flow chart for successively approximating the value of the calibration capacitor so that the integrated voltage value is equal to the set voltage value.
  • the step 202 of comparing the integrated voltage value obtained by integrating the analog capacitor with the set voltage value, and sequentially finding the calibration capacitor value that makes the integrated voltage value equal to the set voltage value by adjusting the control code includes:
  • step 2020 the binary control code is adjusted such that the initial analog capacitance of the analog capacitor simulation of the integrator integration is:
  • step 2022 the integrated voltage value V is determined. Whether ut is greater than the set voltage value Vref; if yes, then proceeds to step 2023, and if not, proceeds to step 2024;
  • a value C int of the analog capacitor is found to cause the integrated voltage value V.
  • Ut is equal to the set voltage value Vref, and the value of the analog capacitor C int is the calibration capacitance value; the binary control code corresponding thereto is supplied to the transconductance filter.
  • a method for obtaining a calibration capacitance value of a transconductance filter simulating a filter capacitor that is preset as a capacitor array by simulating a capacitance, and generating a current through an analog transconductance unit, and integrating the pair of analog capacitors Obtaining the integrated voltage value, comparing the voltage value with the set voltage value, and successively finding the value of the analog capacitor that makes the integrated voltage value equal to the set voltage value as the calibration capacitance value, the calibration method is linear dispersion The way, the linearity of the transconductance filter does not change with the change of the tail current, and the DC offset generated by the transconductance unit is eliminated by forward integration and reverse integration of the capacitor array. The performance of the transconductance filter is improved under the premise of affecting the performance of the transconductance filter.
  • FIG. 18 is a schematic flowchart diagram of a third embodiment of a method for acquiring a calibration capacitance value of a transconductance filter according to an embodiment of the present invention.
  • the capacitance of the filter is simulated by a capacitor.
  • the capacitance of the transconductance filter is preset to a capacitor array of a uniform hook, and is set as a fixed capacitor and a calibration capacitor, that is, a capacitor array.
  • Capacitor size, . is a capacitor array of a uniform hook, and is set as a fixed capacitor and a calibration capacitor, that is, a capacitor array.
  • the calibration frequency range of the transconductance filter capacitor is determined by the ratio to C toiumble g .
  • step 301 a current is generated by the differential current source
  • C int of the N bit binary code control the adjustment range (0 ⁇ ; 1) configurable unit capacitance C toi) 3 ⁇ 4, where, N is a natural number.
  • the integrated voltage value V obtained by integrating the analog capacitor is obtained.
  • Ut is compared with the set voltage value Vref, and the integrated voltage value V is made by successively approximating by adjusting the control code.
  • Ut is the value of the analog capacitor equal to the set voltage value Vref as the calibration capacitor value.
  • the integrated voltage value V can be obtained by judging whether the magnitude of l/RC int is equal to one. Whether ut is equal to the set voltage value Vref, that is, the size of l/RC int is equal to 1, the calibration ends, C int is the calibration capacitance value, and the corresponding binary control code is the binary control code obtained by calibration. ;
  • the binary control code is saved and provided to the transconductance filter for use.
  • the method for obtaining a calibration capacitance value of a transconductance filter uses a capacitor to simulate a capacitance of a transconductance filter, and generates a current through a differential current source, and integrates the integrated voltage value obtained by integrating the analog capacitor. Comparing the voltage value with the set voltage value, and successively finding the value of the analog capacitor that makes the integrated voltage value equal to the set voltage value as the calibration capacitance value, the calibration method is a linear discrete manner, and does not cause The linearity of the transconductance filter varies with the tail current and is also positive for the capacitor array. Integral and inverse integration eliminates the DC offset generated by the transconductance unit and improves the performance of the transconductance filter without affecting the performance of the transconductance filter.
  • the present invention can be implemented by hardware, or can be implemented by means of software plus necessary general hardware platform, and the technical solution of the present invention. It may be embodied in the form of a software product, which may be stored in a computer readable storage medium (which may be a CD-ROM, a USB flash drive, a mobile hard disk, etc.), including a number of instructions for making a computer device (may be A personal computer, server, or network device, etc., performs the methods described in various embodiments of the present invention.
  • a computer readable storage medium which may be a CD-ROM, a USB flash drive, a mobile hard disk, etc.
  • a computer device may be A personal computer, server, or network device, etc., performs the methods described in various embodiments of the present invention.

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Description

获取跨导滤波器校准电容值的方法、 装置和系统
本申请要求了 2008年 6月 16日提交的、 申请号为 200810028801. 3、 发明名称为 "获取跨导滤波器校 准电容值的方法、 装置和系统" 的中国申请的优先权, 其全部内容通过引用结合在本申请中。
技术领域
本发明实施例涉及移动通信技术领域,尤其涉及一种获取跨导滤波器校准电容值的方法、装置和系统。 发明背景
跨导电容滤波器 (Gm-C, gm-C filter) 作为最常见的滤波器结构之一, 其特点是低功耗, 高带宽, 可以运用于多种无线或有线技术领域。
而对于片上集成滤波器, 一个最突出的缺点就是集成电容、 电阻具有很大的工艺相关性, 往往导致滤 波器的截止频率与设计值偏差较大, 影响滤波器性能, 因此伴随着片上集成滤波器的出现, 滤波器校准电 路是必不可少的。 而在跨导电容滤波器结构中, 为了实现滤波器频率校准(有时滤波器的品质因子 Q也要 校准) , 一般用跨导校准的方式实现。 由于滤波器的截止频率跟^成正比, 因此在进行滤波器频率校准时, 往往通过改变跨导(Gm) 的值 来实现的, 常见的两种 Gm单元, M0S管输入(或双级管输入)和退化电阻输入级的结构示意图如图 1所示。 上述两种 Gm单元一个显著的特点就是 Gm值的大小和电流或电阻不是成绝对的关系, 因此很难去用离散的 电流去控制滤波器的截止频率, 因此数字式锁相环 (PLL, Phase -Locked Loop ) 结构的校准变得非常流 行。
利用 PLL来调节尾电流进行滤波器频率校准如图 2所示, 通过片上集成一个 PLL, 而 PLL利用与滤波 器相同结构的 Gm-C单元组成的振荡器 (VC0, Voltage Control Oscillator) 来实现频率控制, 通过调节
VC0的尾电流来确定振荡器的频率控制。
在实施本发明的过程中, 发明人发现现有的滤波器频率校准技术存在如下缺点:
通过改变 VC0的尾电流的方式实现的频率校准, 会使得滤波器的线性度随着 VC0的尾电流的变化而变 化, 从而影响跨导滤波器的性能。
发明内容
本发明实施例提供一种获取跨导滤波器校准电容值的方法、 装置和系统, 可在不影响跨导滤波器性能 的前提下, 提高跨导滤波器校准的准确性。
本发明的目的是通过以下技术方案实现的:
一种获取跨导滤波器校准电容值的方法, 包括:
通过电流在规定的时间内对模拟电容进行积分处理, 所述模拟电容用于模拟被设置成为均勾电容阵列 的跨导滤波器的电容;
将所述积分处理得到的积分电压值与设定电压值进行比较, 通过调节控制码, 逐次逼近査找使得所述 积分电压值与设定电压值相等的模拟电容的值, 将所述模拟电容的值作为校准电容值。
一种获取跨导滤波器校准电容值的装置, 包括:
电流供给单元, 用于通过电流对积分器单元进行充电;
积分器单元, 用于在充电情况下, 在规定的时间内对模拟电容进行积分处理, 所述模拟电容用于模拟 被设置为均勾电容阵列的跨导滤波器电容;
比较器单元, 用于将所述对模拟电容进行积分得到的积分电压值与设定电压值进行比较; 控制器单元,用于通过调节控制码,逐次逼近査找使得积分电压值与设定电压值相等的模拟电容的值, 将所述模拟电容的值作为校准电容值。
一种跨导滤波器校准系统, 包括:
获取跨导滤波器校准电容值的装置, 用于通过对模拟电容进行积分得到积分电压值, 所述模拟电容模 拟被设置成均勾电容阵列的跨导滤波器电容, 并通过调节控制码逐次逼近査找使得积分电压值与设定电压 值相等的模拟电容值, 将所述模拟电容值作为校准电容值, 存储与所述校准电容值相应的控制码, 提供给 跨导滤波器以校准所述跨导滤波器的电容值;
跨导滤波器, 用于根据获取跨导滤波器校准电容值的装置提供的控制码, 其跨导单元中的电容部分被 校准为与所述控制码相应的校准电容值。 本发明实施例提供的校准方式是线性离散的方式, 不会使得跨导 滤波器的线性度随着 VC0的尾电流的变化而变化, 在不影响跨导滤波器的性能的前提下, 提高了跨导滤波 器的性能。 附图简要说明
图 1是现有的两种基本的跨导单元的结构示意图;
图 2是现有技术利用 PLL来调节尾电流进行滤波器频率校准的示意图;
图 3是本发明实施例提供的跨导滤波器校准系统的组成示意图;
图 4是本发明实施例提供的获取跨导滤波器校准电容值的装置第一实施例的结构示意图; 图 5是本发明实施例提供的获取跨导滤波器校准电容值的装置第二实施例的结构示意图; 图 6是本发明实施例提供的获取跨导滤波器校准电容值的装置中的控制器单元的结构示意图; 图 7是 5bit的二进制控制码控制校准过程的示意图;
图 8是本发明实施例提供的获取跨导滤波器校准电容值的装置中的积分器单元的结构示意图; 图 9是本发明实施例提供的积分器单元工作示意图;
图 10是本发明实施例提供的积分器单元自动归零示意图;
图 11是本发明实施例提供的比较器单元中电压比较器实现精确的电压相减并放大示意图; 图 12是本发明实施例提供的获取跨导滤波器校准电容值的装置控制时序图;
图 13是本发明实施例提供的获取跨导滤波器校准电容值的装置的第三实施例的结构示意图; 图 14是本发明实施例提供的获取跨导滤波器校准电容值的方法第一实施例的流程示意图; 图 15是本发明实施例提供的获取跨导滤波器校准电容值的方法第二实施例的流程示意图; 图 16是本发明实施例提供的在规定的时间内对所述电容阵列进行积分, 得到的积分电压值的流程示 意图;
图 17是本发明实施例提供的逐次逼近査找使得积分电压值与设定电压值相等的校准电容值的流程示 意图;
图 18是本发明实施例提供的获取跨导滤波器校准电容值的方法第三实施例的流程示意图。 实施本发明的方式
下面将参考附图详细说明本发明实施例。
本发明实施例提供了一种获取跨导滤波器校准电容值的方法和获取跨导滤波器校准电容值的装置, 可 在不影响跨导滤波器性能的前提下, 提高跨导滤波器校准的准确性。
参见图 3, 是本发明实施例提供的跨导滤波器校准系统的组成示意图。
如图 3所示, 该滤波器校准系统包括:
获取跨导滤波器校准电容值的装置 1, 用于通过模拟电容进行积分得到积分电压值, 通过调节控制码 逐次逼近, 査找使得积分电压值与设定电压值相等的校准电容值, 并利用与所述校准电容值相应的控制码 校准所述跨导滤波器的电容值; 需要说明的是, 所述模拟电容是模拟被设置成均勾的电容阵列的跨导滤波 器 2的电容。
跨导滤波器 2, 用于根据获取跨导滤波器校准电容值的装置 1提供的控制码, 其跨导单元中的电容部 分被校准为与所述控制码相应的校准电容值。 所述跨导滤波器 2的电容被预先设置为均勾的电容阵列。
所述获取跨导滤波器校准电容值的装置 1和跨导滤波器 2之间的校准模式是主从模式, 校准方式是线 性离散电容逼近, 从而避免在校准过程中, 因为跨导滤波器的线性度随着尾电流变化而影响跨导滤波器的 性能, 最终提高跨导滤波器校准的正确性。
参见图 4, 是本发明实施例提供的获取跨导滤波器校准电容值的装置第一实施例的结构示意图。 图 4所示的获取跨导滤波器校准电容值的装置, 包括:
电流供给单元 10, 用于产生一电流对积分器单元 11进行充电;
积分器单元 11, 用于在充电情况下, 在规定的时间内对模拟电容进行积分处理, 所述模拟电容模拟被 预先设置成均勾电容阵列的跨导滤波器的电容;
比较器单元 12, 用于将所述对模拟电容进行积分处理得到的积分电压值与设定电压值进行比较。 控制器单元 13,用于通过调节控制码, 逐次逼近査找使得积分电压值与设定电压值相等的模拟电容的 值作为校准电容值;
需要说明的是, 所述电流供给单元 10可以为跨导单元, 所述跨导单元模拟被校准的跨导滤波器中跨 导单元的结构; 所述电流供给单元 10还可以为差分电流源。 在后面的实施例中将分别阐述电流供给单元 是跨导单元和差分电流源的实施例。
参见图 5, 为本发明实施例提供的获取跨导滤波器校准电容值的装置第二实施例的结构示意图。 图 5所示的获取跨导滤波器校准电容值的装置中, 电流供给单元在具体实现的时候为跨导单元 10, 该 跨导单元 10为模拟被校准跨导滤波器相同结构的跨导单元, 并且由积分器单元 11中的模拟电容 115模拟 被预先设置成均勾电容阵列的跨导滤波器的电容, 以避免跨导滤波器的跨导单元的线性度对校准精度的影 响。
需要说明的是, 通过电容校准跨导滤波器频率截至的方式, 首先将跨导滤波器的电容设置成一些较小 的均勾电容阵列。 例如, 把 2pF的电容表示为 20个 100fF的电容之和, 根据工艺导致的频率偏差范围, 将电容设置为固定电容和校准电容两部分, 及电容阵列的大小, co c^ , 其中, <^^为固定数 量的单位电容; (^^为可配置的单位电容。 校准的频率由 C/K和 的比值决定。
然后再用积分器单元 11中的可变电容 115模拟所述跨导滤波器的电容阵列, 通过所述跨导单元 10产 生电流在规定的时间内对可变电容器 115进行积分, 将得到的积分电压值与设定的电压值进行比较, 直到 找到最佳的模拟电容 115 (即可变电容器 115 ) 的模拟电容值, 使得上述积分电压值与设定电压值相等时, 校准结束, 此时上述模拟电容的值即为校准电容值。 具体地, 如图 5所示, 所述获取跨导滤波器校准电容 值的装置包括:
跨导单元 10, 它的正极输出端 100与积分器单元 11的正极输入端 110连接, 负极输出端 101与积分 器单元 11的负极输入端 111连接, 输出电流为积分器单元 11充电;
积分器单元 11, 通过它的正极输入端 110与所述跨导单元 10的正极输出端 100连接, 积分器单元 11 的负极输入端 111与所述跨导单元 10的负极输出端 101相连接, 或者正极输入端 110与所述跨导单元 10 的负极输出端 101连接, 积分器单元 11的负极输入端 m与所述跨导单元 10的正极输出端 wo相连接; 而积分器单元 11的一个输出端 112与比较器单元 12的正极输入端 120连接, 另一个输出端 113与比 较器单元 12的负极输入端 121相连接,所述输入端 110和输入端 111还各自连接有可变电容器 115, 该可 变电容器 115的输出端 1150连接到共模参考电平 VCM; 在规定时间内, 在控制器单元 13的控制码的作用 下, 通过运算放大器 114对可变电容器 115进行积分处理, 获得积分电压值;
图 5所示的获取跨导滤波器校准电容值的装置还包括:
比较器单元 12, 包括比较器 123和电压放大器 124, 比较器单元 12的正极输入端 120连接所述积分 器单元 11的输出端 112, 比较器单元 12的负极输入端 121连接所述积分器单元 11的输出端 113, 比较器 单元 12的输出端 125和输出端 126连接比较器 123,所述电压放大器 124通过两相位开关电容实现电压放 大并相减, 所述比较器 123用于将所述积分器单元 11积分获得的积分电压值与设定电压值进行比较; 所 述比较器单元 11的输出端 122与控制器单元 13的输入端 130连接, 以将比较结果输出给控制器单元 13; 图 5所示的获取跨导滤波器校准电容值的装置还包括:
控制器单元 13, 用于通过它的输出端 131提供控制码给所述积分器单元 11, 控制所述积分器单元 11 对可变电容器 115进行积分, 并根据所述比较器单元 12的比较结果, 逐次调节所述控制码, 以査找到积 分电压值与设定电压值相同的电容值, 将该电容值作为校准电容值。 需要说明的是, 本发明实施例中, 控 制器单元 13输出的控制码可以为 N bit的二进制控制码, 其调节范围为 (0〜; 2"" _ 1 ) 个可配置的单位电
^ C ng , 其中, N是自然数。 例如, 5bit的二进制控制码, 其调节范围为 (0〜31 )个可配置的单位电容
C . 。
参见图 6, 所述控制器单元 13包括:
控制码输出子单元 130, 用于向所述积分器单元 11输出 Nbit的二进制控制码, 其中, N是自然数; 控制器调节子单元 131, 用于逐次改变改二进制控制码, 以査找到得到积分电压值与设定电压值相等 的模拟电容的值作为校准电容值。
具体地, 通过跨导单元 10 为积分器单元 11 进行充电, 所述积分器单元 11 获得一个积分电压值 , 其中 Gm是跨导值, Vref是设定电压值, At是规定的积分时间, Cint是校准实际 用到的电容值, 该电容值受控制器单元 13的控制码输出子单元 130输出的二进制控制码的控制, 积分器 单元 11获得一个积分电压值 V。ut后, 再由比较器单元 12将所述积分电压值 V。ut与设定电压值 Vref进行比 较, 判断 Gm/C的大小是否等于 1, 直到在控制器单元 13的控制下, 比较器单元 12比较得出积分电压值 V。ut与设定电压值 Vref相等, 也即 Gm/C的大小等于 1时, 此时的 Cint则是校准电容值。
具体地, 控制器单元 13通过 N bit的二进制控制码控制电容值的方式如下:
控制器单元 13的控制器调节子单元 131 二进制控制码, 使得积分器单元 11进行积分的模拟电容 模拟的起始模拟电容值为: C = Cfe +
Figure imgf000007_0001
将所述起始模拟电容值 = <^ Ά +— 2N ~― \ Cft tunin„s。进行积分, 得到积分电压值, 若所述积分电压值大于
2N~l + 2N~2
设定电压值, 则改变所述二进制控制码, 使得模拟电容值为: c = cflx + n ctuning 若所述积分电压值小于设定电压值, 则改变所述二进制控制码, 使得模拟电容值为: N- — j N-2
C - C + - ― C .
fix 2N _ tuning,
重复以上步骤, 通过改变二进制控制码, 逐次逼近査找使得积分电压值 V。ut与设定电压值 Vref相等的 模拟电容的值, 该模拟电容的值即校准电容值。
如图 5所示的获取跨导滤波器校准电容值的装置中, 还包括:
检测单元 14, 在检测到校准控制信号有效, 启动査找校准电容值的;
存储器单元 15, 用于在校准完毕时, 存储与所述校准电容值相应的控制码, 将该控制码提供给跨导滤 波器以校准所述跨导滤波器的电容值。
参见图 7, 是 5bit的二进制控制码控制校准过程的示意图。
以 5bit的二进制控制码为例, 首先控制器单元 13自动设置该 5bit的二进制控制码为 10000, 则对应 的积分器积分的模拟电容模拟的起始模拟电容值为:
16
C ^ fix + C tuning, 将所述起始模拟电容值 = Cfix + 进行积分, 得到积分电压
Figure imgf000007_0002
值, 若所述积分电压值 V。ut大于设定电压值 Vref, 则控制器单元 13改变所述二进制控制码为 11000, 使得
?4
模拟电容值为: 二 ^ + ^ ^ , 若所述积分电压值 Vout小于设定电压值 Vref, 则控制器单元 13改变所述二进制控制码为 01000, 使 得模拟电容值为: c = c + ^ Ctuning 重复以上步骤, 通过改变二进制控制码, 逐次逼近査找使得积分电压值 V。ut与设定电压值 Vref相等的 模拟电容的值, 该模拟电容的值即校准电容值。 最后确定的二进制控制码将提供给跨导滤波器使用。
由于跨导单元 10和积分器单元 11中的运算放大器单元 114 (Op-amp)存在的输入偏移会对校准精度 造成影响, 尤其是跨导单元 10, 在积分过程中, 需要让跨导单元 10工作在高线性区, 则跨导单元 10的输 入的参考电压不能很高, 通常就在几十毫伏到几百毫伏, 因为跨导单元 10几毫伏甚至更大的直流偏移会 对跨导单元 10输出的电流造成较大的影响, 从而影响积分器单元 11最终的输出结果。
为了解决上述问题, 参见本发明实施例提供的积分器单元 11参见图 8所述积分器单元 11包括: 时间等分子单元 110, 用于将积分时间 At分为两个相等的时间^ ;
2 第一积分子单元 111, 用于在第一个^积分时间内, 对所述模拟电容进行正向积分, 得到第一个积分
2
电压值; 第二积分子单元 112, 用于在第二个^积分时间内, 对所述模拟电容进行反向积分, 得到第二个积分
2
电压值;
积分电压值累加单元 113, 用于将所述第一个积分电压值和第二个积分电压值累加得到最终的积分电 压值, 以消除由所述跨导单元或差分电流源所产生的直流偏移。
积分器单元 11工作示意图参见图 9, 时间等分子单元 110将所述积分器单元 11对电容阵列进行积分 的时间 At分为两个相等的时间 ^;
2 第一积分子单元 111在第一个^积分时间内, 对模拟电容进行正向积分, 具体地, 如图 9中 (a)部
2
分所示, 首先将一个正向的参考电压 Vref输入到跨导单元 10, 然后将跨导单元 10的正极输出端 100和积 分器单元 11的正极输入端 110连接, 将跨导单元 10的负极输出端 101和积分器单元 11的负极输入端 11 连接, 得到第一个积分电压值; 第二积分子单元 112在第二个^积分时间内,对所述模拟电容进行反向积分,具体地,如图 9中(b)
2
部分所示, 首先将一个反向的参考电压 Vref输入到跨导单元 10, 然后将跨导单元 10的正极输出端 100和 积分器单元 11的负极输入端 111连接, 将跨导单元 10的负极输出端 101和积分器单元 11的正极输入端 110连接, 得到第二个积分电压值;
积分电压值累加单元 113用于将所述第一个积分电压值和第二个积分电压值的累加以消除由所述跨导 单元 10本身产生的 DC offset
对于积分器单元 11中的运算放大器单元 114 (Op-amp) 存在的输入 DC off set, 本发明实施例提供了 一种自动归零技术以消除该运算放大器 114 (Op-amp) 存在的输入 DC offset
如图 10所示, 将 Op-amp 114的 offset通过放电周期 (a), 自校准周期 (b), 以及输出周期 (c ) 三 个周期消除, 使得最后输出的积分电压值 ∞f '只跟 Gm、 Cint以及 At有关。 在 (a) 自校准周期, 将两个可变电容器 115的输出端 1150分别接到共模参考电平 VCM, 运算放大器 114的输入端 110和输出端 112短接, 输入端 111和输出端 113短接, 用来记忆运算放大器 114自身固有 DC offset ;
在 (b) 充电周期, 将运算放大器 114的输入端 110和输出端 112以及输入端 111和输出端 113的短 接开关断开,将两个可变电容器 115输出端 1150分别接到运算放大器 114的输出端 112和输出端 113,跨 导单元 10在该周期对积分器单元 11进行积分;
在 (c )输出周期: 在将运算放大器 114的输入端 110和输入端 111短接, 输出积分电压。
对于比较器单元 12中的电压比较器 124,本发明实施例通过两相位开关电容技术实现精确的电压相减 放大, 具体如图 11所示。
在 (a) 自校准充电周期, 将电压比较器 124的输入端 120和输出端 125短接, 输入端 121和输出端 126短接, 输入信号和参考信号同时对可变电容器 115进行充电;
在 (b)将电压比较器 124的输入端 120和输出端 125断开, 输入端 121和输出端 126断开, 充电的 可变电容器 115断开接到共模电平 VCM, 此时的输出为比较结果。
参见图 12, 本发明实施例提供的获取跨导滤波器校准电容值的装置控制时序图。
本发明实施例提供的获取跨导滤波器校准电容值的装置的检测模块 14在检测到校准控制控制信号有 效, 且内部校准有效信号 (TUN— enable ) 为低电平时, 启动校准将 TUN— enable置为有效, 校准完毕, 存 储器单元 15更新原先存储的控制码的值, 并关闭 TUN— enable信号, 该模式支持任意时刻校准, 能够很好 的跟踪外界条件对滤波器频率造成的影响。
本发明实施例提供的获取跨导滤波器校准电容值的装置, 通过模拟电容模拟所述跨导滤波器的电容, 所述跨导滤波器的电容被预先设置成为均勾的电容阵列, 获取跨导滤波器校准电容值的装置还模拟跨导滤 波器的跨导单元产生电流, 对所述对模拟电容进行积分得到的积分电压值, 将所述电压值与设定电压值进 行比较, 逐次逼近査找得到使得积分电压值与设定电压值相等的校准电容值, 这种校准方式是线性离散的 方式, 不会使得跨导滤波器的线性度随着尾电流的变化而变化, 并且还通过对电容阵列进行正向积分和反 向积分, 消除了跨导单元产生的直流偏移, 在不影响跨导滤波器的性能的前提下, 提高了跨导滤波器的性 能。
参见图 13, 为本发明实施例提供的获取跨导滤波器校准电容值的装置的第三实施例的结构示意图。 本发明实施例通过对 Gm单元进行适当的变换, 得到一个完整的有源 R, C校准电路, 具体地, 将 Gm 单元直接改为差分电流输出单元(或差分电流源) , 修改后获取跨导滤波器校准电容值的装置结构图如图 11所示,由差分电流输出单元(或差分电流源) 10 (reference current source ),积分器 11 ( integrator), 比较器 12 (Comparator) , 控制单元 14 (Control ) 以及检测单元 14和存储器单元 15组成, 其连接方式 和内部结构方式和第一实施例相同, 在此不再赘述。 该差分电流源 10输出的电流 /。 = ^跟电阻 R成
R
反比, 跟设定电压值 Vref 成正比, 利用本发明第一实施例中控制方式, 首先对电容阵列进行积分, 得到 积分电压值: = ix At。 其中, Vref 是设定电压值, At是规定的积分时间, Cint是校准实际用到的电容值。 首先比较器单元 12的电压比较器 124通过两相位的开关电容技术对 V。ut实现电压相减并放大, 然后再通过比较器单元 12 的比较器 123, 将 V。ut与 Vref进行比较, 通过控制器单元 13的控制码的控制, 逐次逼近, 査找到使得 V。ut 与 Vref 相等的 Cint的值以及对应的控制码, 此时, Cint就是校准电容值, 对应的控制码将提供给跨导滤波 器使用。
本发明实施例提供的获取跨导滤波器校准电容值的装置, 通过模拟电容模拟所述跨导滤波器的电容, 所述跨导滤波器的电容被预先设置成为均勾的电容阵列, 获取跨导滤波器校准电容值的装置通过差分电流 源产生电流, 对所述对电容阵列进行积分得到的积分电压值, 将所述电压值与设定电压值进行比较, 逐次 逼近査找得到使得积分电压值与设定电压值相等的校准电容值, 这种校准方式是线性离散的方式, 不会使 得跨导滤波器的线性度随着尾电流的变化而变化, 并且还通过对电容阵列进行正向积分和反向积分, 消除 了跨导单元产生的直流偏移, 在不影响跨导滤波器的性能的前提下, 提高了跨导滤波器的性能。
参见图 14, 为本发明实施例提供的获取跨导滤波器校准电容值的方法第一实施例的流程示意图。 本发明实施例提供的一种获取跨导滤波器校准电容值的方法, 包括:
首先在步骤 100, 用模拟电容模拟跨导滤波器的电容; 所述跨导滤波器电容被预先设置成均勾的电容 阵列;
在步骤 101, 产生一电流在规定的时间内对所述模拟电容进行积分处理;
在步骤 102, 将所述对模拟电容进行积分处理得到的积分电压值与设定电压值进行比较; 判断上述积 分电压值与设定电压值是否相等; 若不等, 则转入步骤 103; 若相等, 则转入步骤 104;
在步骤 103, 通过调节控制码逐次逼近査找使得积分电压值与设定电压值相等的校准电容值; 在步骤 104, 得到校准电容值和对应的控制码。
参见图 15, 为本发明实施例提供的获取跨导滤波器校准电容值的方法第二实施例的流程示意图。 首先在步骤 200, 用模拟电容模拟跨导滤波器的电容, 所述跨导滤波器的电容被预先设置成均勾的电 容阵列, 并且设置为固定电容和校准电容两部分, 即电容阵列的电容大小, 。 = 其中, Cfa 为固定数量的单位电容; 为可配置的单位电容。所述跨导滤波器电容的校准频率范围由 C/K和 的比值确定。
在步骤 201, 模拟跨导滤波器的跨导单元, 产生一电流; 在步骤 202, 用所述电流对积分器进行充电, 在规定的时间内对所述模拟电容进行积分, 得到的积分 帳值: vy Vref x
其中 Gm是跨导值, Vref是设定电压值, At是规定的积分时间, Cint是校准实际用到的电容值。 所述 Cint由 N bit的二进制码控制, 其调节范围为 (0〜; 2"" - 1 ) 个可配置的单位电容 C^^ , 其中, N是自然 数。
在步骤 202, 将所述对模拟电容进行积分得到的积分电压值 V。ut与设定电压值 Vref进行比较, 通过调 节控制码逐次逼近査找使得积分电压值 V。ut与设定电压值 Vref相等的模拟电容的值作为校准电容值。具体 地,通过判断 Gm/Cint的大小是否等于 1,可以得出积分电压值 V。ut与设定电压值 Vref是否相等,也即 Gm/Cint 的大小等于 1时, 此时的 Cint则是校准电容值, 与其对应的二进制控制码则为校准得到的二进制控制码; 在步骤 203, 保存所述二进制控制码, 并将该二进制控制码提供给跨导滤波器使用。
具体地, 参见图 16, 用所述电流对积分器进行充电, 在规定的时间内对模拟电容进行积分, 得到的积 分电压值的步骤 201具体包括: 在步骤 2010, 将所述积分时间 At分为两个相等的时间 ;
2 在步骤 2011, 在第一个^积分时间内, 对所述模拟电容进行正向积分, 得到第一个积分电压值;
2 在步骤 2012, 在第二个^积分时间内, 对所述模拟电容进行反向积分, 得到第二个积分电压值;
2
在步骤 2013,所述第一个积分电压值和第二个积分电压值的累加得到最终的积分电压值, 以消除由所 述跨导单元所产生的直流偏移 (DC offset)。
参见图 17, 是逐次逼近査找使得积分电压值与设定电压值相等的校准电容值的流程示意图。
将所述对模拟电容进行积分得到的积分电压值与设定电压值进行比较, 通过调节控制码逐次逼近査找 使得积分电压值与设定电压值相等的校准电容值的步骤 202, 包括:
在步骤 2020, 调节二进制控制码, 使得积分器积分的模拟电容模拟的起始模拟电容值为:
C - C +— C
2Ν _ tunins 在步骤 2021, 将所述起始模拟电容值 C C^ + ^^C^ 用公式 Vout = Gm Vref At进行积分, 得到积分电压值¥。^ 在步骤 2022, 判断所述积分电压值 V。ut是否大于所述设定电压值 Vref; 若是则转入步骤 2023, 若否, 则转入步骤 2024;
在步骤 2023, 所述积分电压值 V。ut大于设定电压值 Vref, 则改变所述二进制控制码, 使得模拟电容值 为: c = cflx + _ ι ~ tuning; 在步骤 2024, 所述积分电压值 V。ut小于设定电压值 Vref, 则改变所述二进制控制码, 使得模拟电容值
2 _ 2N~2
为: C = Cfa H 2N - I " C 重复以上步骤, 通过改变二进制控制码, 逐次逼近査找使得积分电压值 V。ut与设定电压值 Vref相等的 模拟电容的值 Cint;
最后, 在步骤 2025, 査找到一个模拟电容的值 Cint使得积分电压值 V。ut与设定电压值 Vref相等, 该模 拟电容的值 Cint即校准电容值; 与它对应的二进制控制码将提供给跨导滤波器使用。
本发明实施例提供的获取跨导滤波器校准电容值的方法, 通过模拟电容来模拟被预先设置成电容阵列 的滤波器电容, 并通过模拟跨导单元产生电流, 对所述对模拟电容进行积分得到的积分电压值, 将所述电 压值与设定电压值进行比较, 逐次逼近査找得到使得积分电压值与设定电压值相等的模拟电容的值作为校 准电容值, 这种校准方式是线性离散的方式, 不会使得跨导滤波器的线性度随着尾电流的变化而变化, 并 且还通过对电容阵列进行正向积分和反向积分, 消除了跨导单元产生的直流偏移, 在不影响跨导滤波器的 性能的前提下, 提高了跨导滤波器的性能。
参见图 18, 为本发明实施例提供的获取跨导滤波器校准电容值的方法第三实施例的流程示意图。 首先在步骤 300, 用一电容模拟所述滤波器的电容, 所述跨导滤波器的电容被预先设置为均勾的电容 阵列, 并被设置为固定电容和校准电容两部分, 即电容阵列的电容大小, 。 =
其中, c 为固定数量的单位电容; (^^为可配置的单位电容。 所述跨导滤波器电容的校准频率范 围由 和 Ctoig的比值确定。
在步骤 301, 通过差分电流源产生一电流;
在步骤 202, 用所述电流对积分器进行充电, 在规定的时间内对所述模拟电容进行积分, 得到的积分 电压值: Vout = ^ At , 其中, /Q = ^, Io是差分电流源产生的电流值, Vref是设定电压值, At是规定的积分时间, Cint ° R
是校准实际用到的模拟电容的值。 所述 Cint由 N bit的二进制码控制, 其调节范围为 (0〜; 1 )个可配 置的单位电容 Ctoi)¾, 其中, N是自然数。
在步骤 302, 将所述对模拟电容进行积分得到的积分电压值 V。ut与设定电压值 Vref进行比较, 通过调 节控制码逐次逼近査找使得积分电压值 V。ut与设定电压值 Vref相等的模拟电容的值作为校准电容值。具体 地,通过判断 l/RCint的大小是否等于 1,可以得出积分电压值 V。ut与设定电压值 Vref是否相等,也即 l/RCint 的大小等于 1时, 校准结束, 此时的 Cint则是校准电容值, 与其对应的二进制控制码则为校准得到的二进 制控制码;
在步骤 303, 保存所述二进制控制码, 并将该二进制控制码提供给跨导滤波器使用。
本发明实施例提供的获取跨导滤波器校准电容值的方法, 用一电容模拟跨导滤波器的电容, 并通过差 分电流源产生电流,对所述对模拟电容进行积分得到的积分电压值,将所述电压值与设定电压值进行比较, 逐次逼近査找得到使得积分电压值与设定电压值相等的模拟电容的值作为校准电容值, 这种校准方式是线 性离散的方式, 不会使得跨导滤波器的线性度随着尾电流的变化而变化, 并且还通过对电容阵列进行正向 积分和反向积分, 消除了跨导单元产生的直流偏移, 在不影响跨导滤波器的性能的前提下, 提高了跨导滤 波器的性能。
通过以上的实施方式的描述, 本领域的技术人员可以清楚地了解到本发明可以通过硬件实现, 也可以 可借助软件加必要的通用硬件平台的方式来实现基于这样的理解, 本发明的技术方案可以以软件产品的形 式体现出来, 该软件产品可以存储在一个计算机可读存储介质 (可以是 CD-ROM, U盘, 移动硬盘等) 中, 包括若干指令用以使得一台计算机设备(可以是个人计算机, 服务器, 或者网络设备等)执行本发明各个 实施例所述的方法。
以上所述, 仅为本发明较佳的具体实施方式, 但本发明的保护范围并不局限于此, 任何熟悉本技术领 域的技术人员在本发明揭露的技术范围内,可轻易想到的变化或替换,都应涵盖在本发明的保护范围之内。 因此, 本发明的保护范围应该以权利要求的保护范围为准。

Claims

权利要求
1、 一种获取跨导滤波器校准电容值的方法, 其特征在于, 包括:
通过电流在规定的时间内对模拟电容进行积分处理, 所述模拟电容用于模拟被设置成为均勾电容阵列 的跨导滤波器的电容;
将所述积分处理得到的积分电压值与设定电压值进行比较, 通过调节控制码, 逐次逼近査找使得所述 积分电压值与设定电压值相等的模拟电容的值, 将所述模拟电容的值作为校准电容值。
2、 如权利要求 1所述的获取跨导滤波器校准电容值的方法, 其特征在于, 所述方法还包括: 获取与所述校准电容值相应的控制码, 将该控制码提供给跨导滤波器以校准所述跨导滤波器的电容 值。
3、 如权利要求 2所述的获取跨导滤波器校准电容值的方法, 其特征在于, 所述通过电流在规定的时 间内对所述模拟电容进行积分处理, 包括:
模拟跨导滤波器的跨导单元, 产生一电流;
用所述电流对积分器进行充电, 在规定的时间内对所述模拟电容进行积分。
4、 如权利要求 3所述的获取跨导滤波器校准电容值的方法, 其特征在于, 所述对模拟电容进行积分 包括:采用公式 。„, = Gmx xAt对模拟电容进行积分,得到积分电压值¥。^,其中 Gm是跨导值, Vref
Figure imgf000014_0001
是设定电压值, At是规定的积分时间, Cint是校准实际用到的模拟电容的值。
5、 如权利要求 2所述的获取跨导滤波器校准电容值的方法, 其特征在于, 所述通过电流在规定的时 间内对所述模拟电容进行积分处理, 包括:
通过差分电流源产生一电流;
用所述电流对积分器进行充电, 在规定的时间内对所述模拟电容进行积分。
6、 如权利要求 5所述的获取跨导滤波器校准电容值的方法, 其特征在于, 所述对模拟电容进行积分 包括: 采用公式 Γ。„, = x At对模拟电容进行积分, 得到积分电压 V。ut, 其中, 70 = l^L , j。是差
Cm- t R 分电流源产生的电流值, Vref 是设定电压值, At是规定的积分时间, Cint是校准实际用到的模拟电容的 值。
7、 如权利要求 4或 6所述的获取跨导滤波器校准电容值的方法, 其特征在于, 所述方法还包括: 将所述积分时间 At分为两个相等的时间 ^;
2 在第一个^积分时间内, 对所述模拟电容进行正向积分, 得到第一个积分电压值;
2 在第二个^积分时间内, 对所述模拟电容进行反向积分, 得到第二个积分电压值;
2
将所述第一个积分电压值和第二个积分电压值累加得到最终的积分电压值, 采用所述最终的积分电压 值消除由所述跨导单元或差分电流源所产生的直流偏移。
8、 如权利要求 4或 6所述的获取跨导滤波器校准电容值的方法, 其特征在于, 所述方法还包括: 通过自动归零技术消除积分器产生的直流偏移。
9、 如权利要求 4或 6所述的获取跨导滤波器校准电容值的方法, 其特征在于, 所述方法还包括: 将所述跨导滤波器的电容阵列设置为固定电容和校准电容两部分, 使电容阵列 C = C/tt + Ct irig, 其 中, C/K为固定数量的单位电容; <^„;?¾为可配置的单位电容;所述跨导滤波器电容的校准频率范围由 C/K 和 的比值确定。
10、 如权利要求 9所述的获取跨导滤波器校准电容值的方法, 其特征在于, 所述校准电容由 N bit的 二进制码控制, 其调节范围为 0〜; 2 - 1个可配置的单位电容 ς^ , 其中, Ν是自然数。
11、 如权利要求 10所述的获取跨导滤波器校准电容值的方法, 其特征在于, 所述将所述对积分处理 得到的积分电压值与设定电压值进行比较, 通过调节控制码, 逐次逼近査找使得积分电压值与设定电压值 相等的模拟电容的值, 将所述模拟电容的值作为校准电容值, 包括: 调节二进制控制码, 使得积分器积分的起始模拟电容值为: c = c fiflxT + 2N ~— i t„uning,
» N-1
将所述起始模拟电容值 c = c + Γ C—进行积分, 得到积分电压值; 若所述积分电压值大于设定电压值, 则改变所述二进制控制码, 使得模拟电容值为:
2Ν~ + 2Ν-2
c = C fix + - 2N― _ J c tuning . '
若所述积分电压值小于设定电压值, 则改变所述二进制控制码, 使得模拟电容值为: C - C fix λ — c tuning ·,
重复以上步骤, 通过改变二进制控制码, 逐次逼近査找使得积分电压值与设定电压值相等的模拟电容 值, 该模拟电容值即校准电容值。
12、 如权利要求 11所述的获取跨导滤波器校准电容值的方法, 其特征在于, 所述方法还包括: 在检测到校准控制信号有效时, 执行产生一电流在规定的时间内对模拟电容进行积分处理的步骤; 在査找到校准电容值后, 存储与所述校准电容值相应的二进制的控制码。
13、 一种获取跨导滤波器校准电容值的装置, 其特征在于, 包括:
电流供给单元, 用于通过电流对积分器单元进行充电;
积分器单元, 用于在充电情况下, 在规定的时间内对模拟电容进行积分处理, 所述模拟电容用于模拟 被设置为均勾电容阵列的跨导滤波器电容;
比较器单元, 用于将所述对模拟电容进行积分得到的积分电压值与设定电压值进行比较; 控制器单元,用于通过调节控制码,逐次逼近査找使得积分电压值与设定电压值相等的模拟电容的值, 将所述模拟电容的值作为校准电容值。
14、 如权利要求 13所述的获取跨导滤波器校准电容值的装置, 其特征在于, 所述电流供给单元为跨 导单元, 用于模拟被校准的跨导滤波器中跨导单元的结构。
15、 如权利要求 14所述的获取跨导滤波器校准电容值的装置, 其特征在于,
所述跨导单元的正极输出端与积分器单元的正极输入端连接, 负极输出端与积分器单元的负极输入端 连接, 输入电流为积分器单元充电;
所述积分器单元, 其正极输入端与所述跨导单元的正极输出端连接, 负极输入端与所述跨导单元的负 极输出端相连接, 或者其正极输入端与所述跨导单元的负极输出端连接, 其负极输入端与所述跨导单元的 正极输出端相连接;
积分器单元的第一输出端与比较器单元的正极输入端连接, 第二输出端与比较器单元的负极输入端相 连接, 所述第一输入端和第二输入端还各自连接有作为模拟电容的可变电容器, 该可变电容器的输出端连 接到共模参考电平 VCM; 在规定时间内, 在控制器单元的控制码的作用下, 通过运算放大器对可变电容器 进行积分, 获得积分电压值;
所述比较器单元, 包括比较器和电压放大器, 比较器单元的正极输入端连接所述积分器单元的第一输 出端, 比较器单元的负极输入端连接所述积分器单元的第二输出端, 比较器单元的第一输出端和第二输出 端连接比较器, 所述比较器单元的输出端与控制器单元的输入端连接, 以将比较结果输出给控制器单元; 所述控制器单元, 用于通过它的输出端提供控制码给所述积分器单元, 控制所述积分器单元对可变电 容器进行积分, 并根据所述比较器单元的比较结果, 逐次调节所述控制码, 以査找到积分电压值与设定电 压值相同的电容值作为校准电容值。
16、 如权利要求 13所述的获取跨导滤波器校准电容值的装置, 其特征在于, 所述电流供给单元为差 分电流源。
17、 如权利要求 16所述的获取跨导滤波器校准电容值的装置, 其特征在于,
所述差分电流源的正极输出端与积分器单元的正极输入端连接, 负极输出端与积分器单元的负极输入 端连接, 输入电流为积分器单元充电;
所述积分器单元, 其正极输入端与所述差分电流源的正极输出端连接, 负极输入端与所述跨导单元的 负极输出端相连接, 或者其正极输入端与所述差分电流源的负极输出端连接, 其负极输入端与所述差分电 流源的正极输出端相连接;
积分器单元的第一输出端与比较器单元的正极输入端连接, 第二输出端与比较器单元的负极输入端相 连接, 所述第一输入端和第二输入端还各自连接有作为模拟电容的可变电容器, 该可变电容器的输出端连 接到共模参考电平 VCM; 在规定时间内, 在控制器单元的控制码的作用下, 通过运算放大器对可变电容器 进行积分, 获得积分电压值;
所述比较器单元, 包括比较器和电压放大器, 比较器单元的正极输入端连接所述积分器单元的第一输 出端, 比较器单元的负极输入端连接所述积分器单元的第二输出端, 比较器单元的第一输出端和第二输出 端连接比较器, 所述比较器单元的输出端与控制器单元的输入端连接, 以将比较结果输出给控制器单元; 所述控制器单元, 用于通过它的输出端提供控制码给所述积分器单元, 控制所述积分器单元对可变电 容器进行积分, 并根据所述比较器单元的比较结果, 逐次调节所述控制码, 以査找到积分电压值与设定电 压值相同的电容值作为校准电容值。
18、 如权利要求 14或 16所述的获取跨导滤波器校准电容值的装置, 其特征在于, 所述积分器单元包 括: 时间等分子单元, 用于将积分时间 At分为两个相等的时间 ^;
2 第一积分子单元, 用于在第一个^积分时间内, 对所述模拟电容进行正向积分, 得到第一个积分电
2
压值; 第二积分子单元, 用于在第二个^积分时间内, 对所述模拟电容进行反向积分, 得到第二个积分电
2
压值;
积分电压值累加单元, 用于将所述第一个积分电压值和第二个积分电压值累加得到最终的积分电压 值, 以消除由所述跨导单元或差分电流源所产生的直流偏移。
19、 如权利要求 14或 16所述的获取跨导滤波器校准电容值的装置, 其特征在于, 所述控制器单元包 括:
控制码输出子单元, 用于向所述积分器单元输出 N bit的二进制控制码, 其中, N是自然数; 控制器调节子单元, 用于逐次改变改二进制控制码, 以査找到得到积分电压值与设定电压值相等的模 拟电容的值作为校准电容值。
20、 如权利要求 21所述的获取跨导滤波器校准电容值的装置, 其特征在于, 所述装置还包括: 检测单元, 在检测到校准控制信号有效, 启动校准, 得到校准电容值;
存储器单元, 用于在校准完毕时, 存储与所述校准电容值相应的控制码, 提供给跨导滤波器以校准所 述跨导滤波器的电容值。
21、 一种跨导滤波器校准系统, 其特征在于, 包括:
获取跨导滤波器校准电容值的装置, 用于通过对模拟电容进行积分得到积分电压值, 所述模拟电容模 拟被设置成均勾电容阵列的跨导滤波器电容, 并通过调节控制码逐次逼近査找使得积分电压值与设定电压 值相等的模拟电容值, 将所述模拟电容值作为校准电容值, 存储与所述校准电容值相应的控制码, 提供给 跨导滤波器以校准所述跨导滤波器的电容值;
跨导滤波器, 用于根据获取跨导滤波器校准电容值的装置提供的控制码, 其跨导单元中的电容部分被 校准为与所述控制码相应的校准电容值。
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