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WO2009066759A1 - Process for producing multilayered printed wiring board - Google Patents

Process for producing multilayered printed wiring board Download PDF

Info

Publication number
WO2009066759A1
WO2009066759A1 PCT/JP2008/071219 JP2008071219W WO2009066759A1 WO 2009066759 A1 WO2009066759 A1 WO 2009066759A1 JP 2008071219 W JP2008071219 W JP 2008071219W WO 2009066759 A1 WO2009066759 A1 WO 2009066759A1
Authority
WO
WIPO (PCT)
Prior art keywords
wiring board
printed wiring
multilayered printed
insulating layer
producing
Prior art date
Application number
PCT/JP2008/071219
Other languages
French (fr)
Japanese (ja)
Inventor
Shigeo Nakamura
Tadahiko Yokota
Original Assignee
Ajinomoto Co., Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ajinomoto Co., Inc. filed Critical Ajinomoto Co., Inc.
Priority to JP2009542598A priority Critical patent/JP5588683B2/en
Priority to KR1020167002041A priority patent/KR101841523B1/en
Priority to KR1020187007458A priority patent/KR101960247B1/en
Publication of WO2009066759A1 publication Critical patent/WO2009066759A1/en

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0011—Working of insulating substrates or insulating layers
    • H05K3/0017—Etching of the substrate by chemical or physical means
    • H05K3/0026—Etching of the substrate by chemical or physical means by laser ablation
    • H05K3/0032—Etching of the substrate by chemical or physical means by laser ablation of organic insulating material
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/0313—Organic insulating material
    • H05K1/0353—Organic insulating material consisting of two or more materials, e.g. two or more polymers, polymer + filler, + reinforcement
    • H05K1/0373—Organic insulating material consisting of two or more materials, e.g. two or more polymers, polymer + filler, + reinforcement containing additives, e.g. fillers
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0011—Working of insulating substrates or insulating layers
    • H05K3/0017—Etching of the substrate by chemical or physical means
    • H05K3/0026—Etching of the substrate by chemical or physical means by laser ablation
    • H05K3/0032—Etching of the substrate by chemical or physical means by laser ablation of organic insulating material
    • H05K3/0035—Etching of the substrate by chemical or physical means by laser ablation of organic insulating material of blind holes, i.e. having a metal layer at the bottom
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/02—Fillers; Particles; Fibers; Reinforcement materials
    • H05K2201/0203—Fillers and particles
    • H05K2201/0206—Materials
    • H05K2201/0209—Inorganic, non-metallic particles
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/13—Moulding and encapsulation; Deposition techniques; Protective layers
    • H05K2203/1377—Protective layers
    • H05K2203/1383—Temporary protective insulating layer

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Laser Beam Processing (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Laminated Bodies (AREA)

Abstract

A process for producing a multilayered printed wiring board in which a blind via having a satisfactory hole shape with a small difference in diameter between the bottom and the top can be formed in an insulating layer containing at least 35 mass% inorganic filler with high productivity without causing large irregularities on the insulating-layer surface around the via. The process for producing a multilayered printed wiring board is characterized by including a step in which an insulating layer formed on each or one side of a circuit substrate and containing at least 35 mass% inorganic filler is irradiated with the light of a carbon dioxide gas laser through a plastic film disposed in close contact with the surface of the insulating layer to thereby form a blind via having a top diameter of 100 µm or smaller.
PCT/JP2008/071219 2007-11-22 2008-11-21 Process for producing multilayered printed wiring board WO2009066759A1 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2009542598A JP5588683B2 (en) 2007-11-22 2008-11-21 Manufacturing method of multilayer printed wiring board
KR1020167002041A KR101841523B1 (en) 2007-11-22 2008-11-21 Process for producing multilayered printed wiring board
KR1020187007458A KR101960247B1 (en) 2007-11-22 2008-11-21 Process for producing multilayered printed wiring board

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2007-302831 2007-11-22
JP2007302831 2007-11-22

Publications (1)

Publication Number Publication Date
WO2009066759A1 true WO2009066759A1 (en) 2009-05-28

Family

ID=40667581

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2008/071219 WO2009066759A1 (en) 2007-11-22 2008-11-21 Process for producing multilayered printed wiring board

Country Status (4)

Country Link
JP (4) JP5588683B2 (en)
KR (3) KR101841523B1 (en)
TW (1) TWI432122B (en)
WO (1) WO2009066759A1 (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2013161527A1 (en) * 2012-04-26 2013-10-31 日本特殊陶業株式会社 Multilayer wiring substrate and manufacturing method thereof
KR20130135106A (en) * 2012-05-31 2013-12-10 아지노모토 가부시키가이샤 Method for manufacturing multilayered printed wiring board
JP2014017301A (en) * 2012-07-06 2014-01-30 Ajinomoto Co Inc Insulation resin sheet
KR20170012228A (en) 2014-06-03 2017-02-02 미츠비시 가스 가가쿠 가부시키가이샤 Printed circuit board resin laminate for forming fine via hole, and multilayer printed circuit board having fine via hole in resin insulating layer and method for manufacturing same
JP2017050561A (en) * 2016-11-16 2017-03-09 味の素株式会社 Insulation resin sheet
CN107027246A (en) * 2015-10-20 2017-08-08 日本航空电子工业株式会社 Fixed structure and fixing means
JPWO2016084375A1 (en) * 2014-11-28 2017-09-07 日本ゼオン株式会社 Manufacturing method of multilayer printed wiring board

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7288321B2 (en) * 2018-03-22 2023-06-07 積水化学工業株式会社 laminated film
JP2022070723A (en) * 2020-10-27 2022-05-13 味の素株式会社 Printed wiring board and its manufacturing method
KR20220074373A (en) * 2020-11-27 2022-06-03 엘지이노텍 주식회사 Circuit board and method for manufacturing the same

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10200264A (en) * 1997-01-06 1998-07-31 Ibiden Co Ltd Multilayer printed wiring board and manufacture thereof
JP2000349437A (en) * 1999-03-30 2000-12-15 Kyocera Corp Multilayer wiring board and method of manufacturing the same
JP2001308536A (en) * 2000-04-27 2001-11-02 Kyocera Corp Multilayer wiring board and method of manufacturing the same

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3899544B2 (en) 1996-03-06 2007-03-28 日立化成工業株式会社 Manufacturing method of multilayer wiring board
JPH11145626A (en) * 1997-11-12 1999-05-28 Kansai Paint Co Ltd Multilayer printed wiring board
WO1999059761A1 (en) * 1998-05-21 1999-11-25 Mitsubishi Denki Kabushiki Kaisha Laser machining method
JP3670487B2 (en) * 1998-06-30 2005-07-13 京セラ株式会社 Wiring board manufacturing method
JP2000232268A (en) * 1999-02-09 2000-08-22 Ibiden Co Ltd Single-sided circuit board and manufacture thereof
JP4300687B2 (en) * 1999-10-28 2009-07-22 味の素株式会社 Manufacturing method of multilayer printed wiring board using adhesive film
JP4683758B2 (en) * 2001-04-26 2011-05-18 京セラ株式会社 Wiring board manufacturing method
JP2005088401A (en) * 2003-09-18 2005-04-07 Du Pont Toray Co Ltd Film carrier, manufacturing method thereof, and metal-clad plate
JP4470499B2 (en) * 2004-01-21 2010-06-02 凸版印刷株式会社 Multilayer wiring board manufacturing method and multilayer wiring board
JP4501492B2 (en) * 2004-03-30 2010-07-14 住友ベークライト株式会社 Manufacturing method of multilayer printed wiring board
JP2005298670A (en) * 2004-04-12 2005-10-27 Kaneka Corp Insulating adhesive film, printed wiring board
JP2007273165A (en) * 2006-03-30 2007-10-18 Mitsubishi Electric Corp Circular lamp retention device and lighting fixture
JP5029093B2 (en) * 2006-03-30 2012-09-19 味の素株式会社 Resin composition

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10200264A (en) * 1997-01-06 1998-07-31 Ibiden Co Ltd Multilayer printed wiring board and manufacture thereof
JP2000349437A (en) * 1999-03-30 2000-12-15 Kyocera Corp Multilayer wiring board and method of manufacturing the same
JP2001308536A (en) * 2000-04-27 2001-11-02 Kyocera Corp Multilayer wiring board and method of manufacturing the same

Cited By (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2013161527A1 (en) * 2012-04-26 2013-10-31 日本特殊陶業株式会社 Multilayer wiring substrate and manufacturing method thereof
JPWO2013161527A1 (en) * 2012-04-26 2015-12-24 日本特殊陶業株式会社 Multilayer wiring board and manufacturing method thereof
KR20130135106A (en) * 2012-05-31 2013-12-10 아지노모토 가부시키가이샤 Method for manufacturing multilayered printed wiring board
JP2014007403A (en) * 2012-05-31 2014-01-16 Ajinomoto Co Inc Method for manufacturing multilayer printed wiring board
KR102039193B1 (en) * 2012-05-31 2019-10-31 아지노모토 가부시키가이샤 Method for manufacturing multilayered printed wiring board
JP2014017301A (en) * 2012-07-06 2014-01-30 Ajinomoto Co Inc Insulation resin sheet
KR20170012228A (en) 2014-06-03 2017-02-02 미츠비시 가스 가가쿠 가부시키가이샤 Printed circuit board resin laminate for forming fine via hole, and multilayer printed circuit board having fine via hole in resin insulating layer and method for manufacturing same
CN107251667A (en) * 2014-11-28 2017-10-13 英特尔公司 The manufacture method of multilayer printed-wiring board
JPWO2016084375A1 (en) * 2014-11-28 2017-09-07 日本ゼオン株式会社 Manufacturing method of multilayer printed wiring board
US10568212B2 (en) 2014-11-28 2020-02-18 Intel Corporation Manufacturing method for multi-layer printed circuit board
CN107027246A (en) * 2015-10-20 2017-08-08 日本航空电子工业株式会社 Fixed structure and fixing means
CN107027246B (en) * 2015-10-20 2019-12-17 日本航空电子工业株式会社 Fixing structure and fixing method
JP2017050561A (en) * 2016-11-16 2017-03-09 味の素株式会社 Insulation resin sheet

Also Published As

Publication number Publication date
JP5588683B2 (en) 2014-09-10
JP5975011B2 (en) 2016-08-23
KR20100094995A (en) 2010-08-27
JP2018129548A (en) 2018-08-16
KR101601645B1 (en) 2016-03-09
TW200934348A (en) 2009-08-01
TWI432122B (en) 2014-03-21
KR101841523B1 (en) 2018-03-23
KR20160015398A (en) 2016-02-12
JP2016181731A (en) 2016-10-13
KR101960247B1 (en) 2019-03-21
JPWO2009066759A1 (en) 2011-04-07
KR20180030946A (en) 2018-03-26
JP6337927B2 (en) 2018-06-06
JP2014039068A (en) 2014-02-27

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