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WO2009028658A1 - Ｉｇｂｔ用のシリコン単結晶ウェーハ及びｉｇｂｔ用のシリコン単結晶ウェーハの製造方法、ｉｇｂｔ用シリコン単結晶ウェーハの抵抗率保証方法 - Google Patents

Ｉｇｂｔ用のシリコン単結晶ウェーハ及びｉｇｂｔ用のシリコン単結晶ウェーハの製造方法、ｉｇｂｔ用シリコン単結晶ウェーハの抵抗率保証方法 Download PDF

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Publication number
WO2009028658A1
WO2009028658A1 PCT/JP2008/065522 JP2008065522W WO2009028658A1 WO 2009028658 A1 WO2009028658 A1 WO 2009028658A1 JP 2008065522 W JP2008065522 W JP 2008065522W WO 2009028658 A1 WO2009028658 A1 WO 2009028658A1
Authority
WO
WIPO (PCT)
Prior art keywords
igbt
single crystal
silicon single
wafer
crystal wafer
Prior art date
Application number
PCT/JP2008/065522
Other languages
English (en)
French (fr)
Inventor
Wataru Sugimura
Masataka Hourai
Shigeru Umeno
Toshiaki Ono
Wataru Ito
Original Assignee
Sumco Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sumco Corporation filed Critical Sumco Corporation
Priority to JP2009530203A priority Critical patent/JP5278324B2/ja
Publication of WO2009028658A1 publication Critical patent/WO2009028658A1/ja

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Classifications

    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B15/00—Single-crystal growth by pulling from a melt, e.g. Czochralski method
    • C30B15/20—Controlling or regulating
    • C30B15/203—Controlling or regulating the relationship of pull rate (v) to axial thermal gradient (G)
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/02—Elements
    • C30B29/06—Silicon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/322—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
    • H01L21/3221—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering
    • H01L21/3225—Thermally inducing defects using oxygen present in the silicon body for intrinsic gettering
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D12/00—Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
    • H10D12/01—Manufacture or treatment
    • H10D12/031—Manufacture or treatment of IGBTs
    • H10D12/032—Manufacture or treatment of IGBTs of vertical IGBTs
    • H10D12/038—Manufacture or treatment of IGBTs of vertical IGBTs having a recessed gate, e.g. trench-gate IGBTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D12/00—Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
    • H10D12/411—Insulated-gate bipolar transistors [IGBT]
    • H10D12/441—Vertical IGBTs
    • H10D12/461—Vertical IGBTs having non-planar surfaces, e.g. having trenches, recesses or pillars in the surfaces of the emitter, base or collector regions
    • H10D12/481—Vertical IGBTs having non-planar surfaces, e.g. having trenches, recesses or pillars in the surfaces of the emitter, base or collector regions having gate structures on slanted surfaces, on vertical surfaces, or in grooves, e.g. trench gate IGBTs

Landscapes

  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)

Abstract

チョクラルスキー法によって育成されたシリコン単結晶からなるＩＧＢＴ用のシリコン単結晶ウェーハであって、引き上げ速度マージンを拡大することが可能で、ＥＧ処理が必要でなく、ＩＧＢＴ用ウェーハとしての充分な厚さのＤＺ層を有しかつＩＧ能を有するとともに、抵抗率のバラツキが小さく、　前記ウェーハ全面に設けられ表面側にＩＧＢＴ用デバイスの形成されるデバイス領域と、該デバイス領域よりも裏面側に位置しデバイス形成後に除去されるゲッタリング領域とを有し、前記デバイス領域の厚さ方向寸法が１００～２００μｍとされ、結晶径方向全域においてＣＯＰ欠陥および転位クラスタが排除されており、格子間酸素濃度が８．５×１０１７ａｔｏｍｓ／ｃｍ３以下であり、ウェーハ面内における抵抗率のばらつきが５％以下である。
PCT/JP2008/065522 2007-08-29 2008-08-29 Ｉｇｂｔ用のシリコン単結晶ウェーハ及びｉｇｂｔ用のシリコン単結晶ウェーハの製造方法、ｉｇｂｔ用シリコン単結晶ウェーハの抵抗率保証方法 WO2009028658A1 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2009530203A JP5278324B2 (ja) 2007-08-29 2008-08-29 Ｉｇｂｔ用シリコン単結晶ウェーハの製造方法

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2007-223065 2007-08-29
JP2007223065 2007-08-29

Publications (1)

Publication Number Publication Date
WO2009028658A1 true WO2009028658A1 (ja) 2009-03-05

Family

ID=40387368

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2008/065522 WO2009028658A1 (ja) 2007-08-29 2008-08-29 Ｉｇｂｔ用のシリコン単結晶ウェーハ及びｉｇｂｔ用のシリコン単結晶ウェーハの製造方法、ｉｇｂｔ用シリコン単結晶ウェーハの抵抗率保証方法

Country Status (2)

Country Link
JP (1) JP5278324B2 (ja)
WO (1) WO2009028658A1 (ja)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013129564A (ja) * 2011-12-21 2013-07-04 Siltronic Ag シリコン単結晶基板およびその製造方法
DE112012000306T5 (de) 2011-01-24 2013-09-26 Shin-Etsu Handotai Co., Ltd. Verfahren zum Herstellen eines Silizium-Einkristallwafers und eines thermisch behandelten Wafers
JP2015040142A (ja) * 2013-08-21 2015-03-02 信越半導体株式会社 シリコン単結晶材料の製造方法及びシリコン単結晶材料
JP2020074381A (ja) * 2014-05-28 2020-05-14 インフィネオン テクノロジーズ アーゲーＩｎｆｉｎｅｏｎ Ｔｅｃｈｎｏｌｏｇｉｅｓ Ａｇ 半導体素子、シリコンウエハ、及びシリコンインゴット
EP4151782A1 (de) * 2021-09-16 2023-03-22 Siltronic AG Verfahren zur herstellung einer halbleiterscheibe aus einkristallinem silizium und halbleiterscheibe aus einkristallinem silizium

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002057159A (ja) * 2000-08-07 2002-02-22 Sumitomo Metal Ind Ltd シリコンウェーハおよびその製造方法
JP2006261632A (ja) * 2005-02-18 2006-09-28 Sumco Corp シリコンウェーハの熱処理方法
US20070193501A1 (en) * 2006-02-21 2007-08-23 Sumco Corporation Silicon single crystal wafer for IGBT and method for manufacturing silicon single crystal wafer for IGBT

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002057159A (ja) * 2000-08-07 2002-02-22 Sumitomo Metal Ind Ltd シリコンウェーハおよびその製造方法
JP2006261632A (ja) * 2005-02-18 2006-09-28 Sumco Corp シリコンウェーハの熱処理方法
US20070193501A1 (en) * 2006-02-21 2007-08-23 Sumco Corporation Silicon single crystal wafer for IGBT and method for manufacturing silicon single crystal wafer for IGBT

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE112012000306T5 (de) 2011-01-24 2013-09-26 Shin-Etsu Handotai Co., Ltd. Verfahren zum Herstellen eines Silizium-Einkristallwafers und eines thermisch behandelten Wafers
US8916953B2 (en) 2011-01-24 2014-12-23 Shin-Etsu Handotai Co., Ltd. Method for manufacturing silicon single crystal wafer and annealed wafer
JP2013129564A (ja) * 2011-12-21 2013-07-04 Siltronic Ag シリコン単結晶基板およびその製造方法
JP2015040142A (ja) * 2013-08-21 2015-03-02 信越半導体株式会社 シリコン単結晶材料の製造方法及びシリコン単結晶材料
JP2020074381A (ja) * 2014-05-28 2020-05-14 インフィネオン テクノロジーズ アーゲーＩｎｆｉｎｅｏｎ Ｔｅｃｈｎｏｌｏｇｉｅｓ Ａｇ 半導体素子、シリコンウエハ、及びシリコンインゴット
EP4151782A1 (de) * 2021-09-16 2023-03-22 Siltronic AG Verfahren zur herstellung einer halbleiterscheibe aus einkristallinem silizium und halbleiterscheibe aus einkristallinem silizium
WO2023041359A1 (de) * 2021-09-16 2023-03-23 Siltronic Ag Verfahren zur herstellung einer halbleiterscheibe aus einkristallinem silizium und halbleiterscheibe aus einkristallinem silizium

Also Published As

Publication number Publication date
JP5278324B2 (ja) 2013-09-04
JPWO2009028658A1 (ja) 2010-12-02

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