WO2008132971A1 - 半導体メモリ - Google Patents
半導体メモリ Download PDFInfo
- Publication number
- WO2008132971A1 WO2008132971A1 PCT/JP2008/056854 JP2008056854W WO2008132971A1 WO 2008132971 A1 WO2008132971 A1 WO 2008132971A1 JP 2008056854 W JP2008056854 W JP 2008056854W WO 2008132971 A1 WO2008132971 A1 WO 2008132971A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- current
- bit line
- memory cell
- drain
- voltage
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title abstract 3
Classifications
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
- G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0004—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements comprising amorphous/crystalline phase transition cells
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0021—Auxiliary circuits
- G11C13/004—Reading or sensing circuits or methods
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0021—Auxiliary circuits
- G11C13/004—Reading or sensing circuits or methods
- G11C2013/0054—Read is performed on a reference element, e.g. cell, and the reference sensed value is used to compare the sensed value of the selected cell
Landscapes
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Read Only Memory (AREA)
Abstract
クランプ用トランジスタのソース電圧とドレイン電圧が定常状態になるまでの時間を短縮可能な半導体メモリを提供する。 半導体メモリは、記憶情報によって抵抗値が変化する記憶素子11bを含むメモリセル11と、メモリセル11と接続するビット線2と、ビット線2に任意の電位を印加してメモリセル11に電流を流しその電流を検出する電流検出手段4を含み、電流検出手段4は、ビット線2の電位を反転増幅する反転増幅手段41、電源と接続された検出用負荷手段42、ゲートが反転増幅手段41の出力を受けドレインが電源から検出用負荷手段42を介して電流を受けソースがビット線2に任意の電位を印加しメモリセル11に電流を供給するクランプ用トランジスタM1、及びクランプ用トランジスタM1のソースの電圧とドレインの電圧が定常状態になるまでドレインに補助電流を供給し、定常状態になった場合に補助電流の供給を停止する電流供給手段M2を含む。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2007-115751 | 2007-04-25 | ||
JP2007115751 | 2007-04-25 |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2008132971A1 true WO2008132971A1 (ja) | 2008-11-06 |
Family
ID=39925430
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/JP2008/056854 WO2008132971A1 (ja) | 2007-04-25 | 2008-04-07 | 半導体メモリ |
Country Status (1)
Country | Link |
---|---|
WO (1) | WO2008132971A1 (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2013145733A1 (ja) * | 2012-03-29 | 2013-10-03 | パナソニック株式会社 | クロスポイント型抵抗変化不揮発性記憶装置 |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63253598A (ja) * | 1987-04-10 | 1988-10-20 | Nec Ic Microcomput Syst Ltd | Rom装置 |
JPS63313397A (ja) * | 1987-06-16 | 1988-12-21 | Ricoh Co Ltd | 記憶装置のセンスアンプ回路装置 |
JPH07169290A (ja) * | 1993-12-14 | 1995-07-04 | Nec Corp | 半導体記憶装置 |
JPH11120783A (ja) * | 1997-10-09 | 1999-04-30 | Nec Corp | 半導体記憶装置 |
JP2004071067A (ja) * | 2002-08-07 | 2004-03-04 | Sharp Corp | メモリセル情報の読み出し回路および半導体記憶装置 |
WO2006085459A1 (ja) * | 2005-02-08 | 2006-08-17 | Nec Corporation | 半導体記憶装置及び半導体記憶装置の読み出し方法 |
-
2008
- 2008-04-07 WO PCT/JP2008/056854 patent/WO2008132971A1/ja active Application Filing
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63253598A (ja) * | 1987-04-10 | 1988-10-20 | Nec Ic Microcomput Syst Ltd | Rom装置 |
JPS63313397A (ja) * | 1987-06-16 | 1988-12-21 | Ricoh Co Ltd | 記憶装置のセンスアンプ回路装置 |
JPH07169290A (ja) * | 1993-12-14 | 1995-07-04 | Nec Corp | 半導体記憶装置 |
JPH11120783A (ja) * | 1997-10-09 | 1999-04-30 | Nec Corp | 半導体記憶装置 |
JP2004071067A (ja) * | 2002-08-07 | 2004-03-04 | Sharp Corp | メモリセル情報の読み出し回路および半導体記憶装置 |
WO2006085459A1 (ja) * | 2005-02-08 | 2006-08-17 | Nec Corporation | 半導体記憶装置及び半導体記憶装置の読み出し方法 |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2013145733A1 (ja) * | 2012-03-29 | 2013-10-03 | パナソニック株式会社 | クロスポイント型抵抗変化不揮発性記憶装置 |
JP5379337B1 (ja) * | 2012-03-29 | 2013-12-25 | パナソニック株式会社 | クロスポイント型抵抗変化不揮発性記憶装置 |
US9053788B2 (en) | 2012-03-29 | 2015-06-09 | Panasonic Intellectual Property Management Co., Ltd. | Cross-point variable resistance nonvolatile memory device |
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