WO2006137744A1

WO2006137744A1 - Control method and device for a converter using a three-state switching cell

Info

Publication number: WO2006137744A1
Application number: PCT/NO2006/000235
Authority: WO
Inventors: Grover Victor TORRICO-BASCOPÉ; Nils BÄCKMAN
Original assignee: Eltek Energy As
Priority date: 2005-06-24
Filing date: 2006-06-21
Publication date: 2006-12-28
Also published as: NO323385B1; NO20053122L; NO20053122D0

Abstract

The present invention relates to a control method and device for a converter using a three-state switching cell (TSSC) connected between an input voltage and a load. The control device comprises measuring devices measuring an inductor current, an input voltage and an output voltage. Further it comprises a control circuit providing a control voltage based on the measured values and an output voltage reference value, where the control circuit comprises a pulse width modulation device (110, 112) for controlling the switching states of switches (Q1, Q2) in the three-state switching cell. Moreover, switch current measuring devices is measuring the switch current through switches (Q1, Q2) and/or the switch current through diodes (D1, D2) in the three-state switching cell; where the pulse width modulation device (110, 112) controls the switching states dependent on the measured currents through the switches and/or diodes.

Description

CONTROL METHOD AND DEVICE FOR A CONVERTER USING A THREE- STATE SWITCHING CELL

TECHNICAL FIELD

The present invention relates to a control method and device for a converter using a three-state switching cell (TSSC).

BACKGROUND OF THE INVENTION

In many applications a DC/DC converter is used to convert an unregulated dc input into a controlled dc output at a desired voltage level. Such DC/DC converters can for example be a buck converter, boost converter, buck-boost converter and a full bridge converter. These converters are commonly applied like pre-regulators to obtain active power factor correction. Power supplies for telecommunication equipment are required to deliver a DC voltage of for example -48 V. The power supplies are powered by the AC -mains, where the voltage is rectified by means of a rectifying circuit such as a bridge rectifier, etc. Power supplies have several requirements. First, the output must be held controlled within a specified range. Further, the power supply should not inject conducted EMI in the AC utility distribution lines, such as low frequency harmonic distortion to the input current, and high frequency radio frequency disturbances. The input power stage is often designed to keep the harmonic distortion in input current low by active Power Factor Correction, PFC. A PFC circuit can be achieved by using a boost converter with a feedback control circuit designed to control the input current to be sinusoidal, or have the same shape as the input voltage, which is supposed to be sinusoidal. Moreover, the output is often required to be electrically insulated from the input by means of an insulation transformer device. The insulation protects personnel working with the telecommunication equipment from the mains voltage. In many applications, the transformer is located in the DC/DC converter.

In every practical circuit including a transformer, there is a risk for un-equal volt- second products for the positive and negative voltages over the transformer, so that the net result will become a small DC-voltage over the transformer. In switched mode power supplies, the insulation between primary and secondary side of the transformer is usually implemented with a high frequency power transformer, transforming a high frequency square- wave AC. In a practical circuit the square wave voltage on the primary is formed by one or more controlled semi-conductor switches. In the cases where there are more than one switch, such as in the family buck-derived DC/DC bridge converters including the full-bridge and half-bridge converters, a perfect AC can only be achieved if the on and off time of the switches can be perfectly controlled in such a manner that the volt-second product for the positive voltage and the negative voltage over the transformer's primary winding exactly match, so that there will be no DC-component present. There are many practical reasons for not achieving perfect control, one is noise coming into the feedback loop, another are different types of un-symmetries in the circuit, such as different delays of the signals controlling the on/off-states of the switches or unequal impedances in series with different switch currents causing unequal voltage drops.

So, in many practical circuits there is a need to have an arrangement for controlling the volt-second product for the positive and the negative voltages over the transformer. As an example, in the well-known "full-bridge DC/DC converter" (for example described in chapter 7.7 page 188 in "Power Electronics", 2. ed, 1995, by Mohan, Undeland and Robbins), it is common practice to block the small DC- component with a capacitance in series with the transformer.

The three-state switching cell (TSSC) has been suggested as a topology related to different types of DC/DC converters, to reduce input ripple and DC-link current ripple. The TSSC is known from Torrico-Bascope, Grover V.; and Ivo Barbi. "A Single Phase PFC SkW Converter Using a Three-State Switching Three-State Cells", Proc. Power Electronics Specialists Conference, PESC'04, Aachen- Germany, 2004. pp. 4037-404. This publication is hereby incorporated by reference in its entirety.

In fig. 1 of the present application, a power factor correction circuit using a TSSC boost converter configuration is shown. The TSSC is indicated with a dashed box. The transistors Ql, Q2 are controlled by a control circuit. There are several advantages related to the TSSC boost converter: - The transistor current is reduced to less than half of the input current compared with a common single transistor boost converter.

The current stress through of the switches is less compared with a classic interleave boost converter.

The inductor voltage V_L3 is significantly reduced compared with a common boost converter and at certain operating conditions cancelled completely.

Consequently, the input ripple current is significantly reduced and at certain operating conditions cancelled completely.

Practical testing and theoretical simulations have revealed a problem relating to the control of the TSSC. Namely that the circuit have had a tendency to be unbalanced, with respect to the current through the switches, which has caused a need for components with larger nominal values than expected, i.e. the circuit has not proved to handle the power that it was expected to when designed. The unbalance originates from unbalanced volt-second products on the TSSC-transformer windings causing a DC magnetizing current which adds to one of the diode/transistor pairs and subtracts from the other. There is also a risk for saturation of the TSSC- transformer.

Further examples of the TSSC has been presented in papers like: "Generation of a Family of the Non-Isolated DC-DC PWM Converters Using New Three-State Switching Cells", by Torrico-Bascope, Grover V.; and Ivo Barbi, Proc. Power Electronics Specialists Conference, PESC'OO, Galey Ireland, 2000. pp. 858-863. Yet another publication describing TSSC is "Nova Familia de Conversores CC-CC

PWM nao Isolados Utilizando Celulas de Comutacao de Tres Estados" by Grover Victor Torrico-Bascope, Florianόpolis, SC-Brazil, 2001.

None of these publications show a solution to the problems regarding the unbalance of the TSSC. The object of the present invention is to provide a single phase power factor correction circuit with a three-state switching cell and a method for controlling the three-state switching cell where the current in each branch are controlled to avoid the disadvantages mentioned above. Consequently smaller components, i.e. transformer, transistors, diodes, can be used, thereby achieving a smaller and less expensive converter. The object is also to reduce or avoid the risk for saturating the TSSC-transformer. Another effect, rather than reducing the components, the power transfer can be increased with the same components as before.

SUMMARY OF THE INVENTION

According to the invention it is provided a method for controlling a converter comprising a three-state switching cell (TSSC) on a first side connected to a rectifying device via an input inductor and on a second side connected to an output filter capacitor, where the method comprises the following steps: a) measuring values for an input current, an input voltage and an output voltage of the three-state switching cell; b) using the measured values and an output voltage reference value for providing a control signal to a pulse width modulation device for controlling the switching states of switches in the three-state switching cell; c) measuring a switch current through switches and/or a diode current through diodes in the three-state switching cell; d) providing a signal proportional to the switch current and/or the diode current as an input to the pulse width modulation device to control the switching states dependent on the measured currents through the switches and/or diodes.

According to the invention it is also provided a control device for a converter comprising a three-state switching cell (TSSC) on a first side connected to a rectifying device via an input inductor and on a second side connected to an output filter capacitor, comprising: measuring devices arranged for measuring an inductor current, an input voltage and an output voltage of the three-state switching cell; - a control circuit arranged for providing a control signal based on the measured values and an output voltage reference value, where the control circuit comprises a pulse width modulation device arranged for controlling the switching states of switches in the three-state switching cell; switch current measuring devices arranged for measuring a switch current through switches and/or a diode current through diodes in the three-state switching cell; where the pulse width modulation device is arranged for controlling the switching states dependent on the measured switch current through the switches and/or the measured diode current through the diodes.

Preferred embodiments of the invention are defined in the dependent claims.

DETAILED DESCRIPTION

A preferred embodiment of the present invention will now be described in detail with reference to the enclosed drawings:

Fig. 1 shows a prior art power factor correction (PFC) circuit where a boost converter is implemented as a three-state switching cell (TSSC). Fig. 2 shows the circuit in fig 1 where the transformer is shown as an ideal transformer with a magnetizing inductance Lm.

Figs. 3 - 5 illustrate the unbalance of the circuit in fig. 2.

Fig. 6 shows an embodiment of the converter with TSSC and control circuit according to the invention. Fig. 7 shows an embodiment of the control circuit. Fig. 8 shows the pulse width modulator of fig. 7.

Fig 9 shows a simulation of the current through the input inductor at a first input voltage level. Fig. 10 and 11 show simulations of the magnetizing current without and with using the switch currents as input to the control circuit respectively, at the first input voltage level.

Fig. 12 shows a simulation of the current through the input inductor at a second input voltage level.

Fig. 13 and 14 show simulations of the magnetizing current without and with using the switch currents as input to the control circuit respectively, at the second input voltage level.

The prior art PFC converter circuit using a TSSC boost is shown in fig. 1. The circuit comprises a bridge rectifier supplied with an AC input and an input inductor L3 connected to the TSSC indicated with a dashed box. The TSSC comprises an autotransformer Tl connected to diodes Dl, D2 and to switches Ql, Q2. The converter circuit further comprises an output filter capacitor Co. The principle of the TSSC is that the current is divided in the two branches of the transformer Tl, which is described in detail in the PESC'04 publication by Torrico-Bascope et al.

The switches are here field effect transistors FET, but other suitable switches could also be used. .

The unbalance in the TSSC will be briefly described with reference to fig. 2 - 5. In fig. 2 the autotransformer Tl from fig. 1 is shown as an ideal transformer with a magnetizing inductance Lm, as is known for a man skilled in the art.

In fig. 3 a first switching step is illustrated, where the first switch Ql is on. The input current I_L3 is shown with solid-drawn (red) line; the DC magnetizing current I_m is shown with thin solid (blue) line. The input current I_L3 is as expected divided into the I_L1 and I_L2 in the respective first and second branches of the transformer comprising first diode Dl or first switch Ql and second diode D2 or second switch Q2 respectively. In fig. 3 the input current I_L3 is distributed between the second diode D2 and the first switch Ql. However, half of the output voltage Vo will appear over each of the windings of the transformer as shown in fig. 3, with opposite sign. Consequently, a magnetizing current I_ml is added in the first branch with the first switch Ql and a magnetizing current I_m2 (equal to I_ml) is subtracted from the second branch with the second diode D2.

In fig. 4 a second switching step is illustrated, where the first and second switches Ql, Q2 are both off. The input current I_L3 will be distributed between the first diode Dl and the second diode D2. Here, the magnetizing inductor Lm will discharge its power leading to an increase in the current (shown as I_ml) of the first diode Dl and to a decrease in the current (shown as I_m2) of the second diode D2. In fig. 5 a third switching step is illustrated, where the second switch Q2 is on. The input current will be distributed as I_L1 and I_L2 between the first diode D 1 and the second switch Q2. As in fig. 3 above, half of the output voltage Vo will again appear over each of the windings of the transformer as shown in fig. 5, with opposite sign, leading to an increase in the current (shown as I_ml) of the first diode Dl and a decrease (shown as I_ml) in the current of the second switch Q2.

The disadvantages of this unbalance are mentioned above.

A control circuit for the converter using the TSSC according to the invention is shown in fig. 6, and details regarding the control circuit are shown in fig. 7. Current measuring devices and voltage measuring devices are connected to the converter to achieve the input to the control circuit. The input to the control circuit is the input voltage Vj_n, the input current Ij_n, and the output voltage V_out. In addition, the first and second switch current I_Q1, I_Q2 of the switches Ql, Q2 are input to the control circuit. In the preferred embodiment of the invention, the control method for controlling the input current in a power factor correction circuit is based on the average current mode control. This method is described in the "Application Note U- 159" with title "Boost power factor corrector design -with the UC3853 " by Philip C. Todd, issued by Unitrode Corporation, which is hereby incorporated by reference. In addition, the peak current mode control method including ramp compensation is used in the preferred embodiment of the invention for controlling the current to be equal in the two switches in the TSSC, as will be described in detail below. The peak current mode control including ramp compensation method is commonly used for other circuits, for example as described in the product description for the LM3477 MOSFET switching regulator controller from National Semiconductor (can be downloaded from http://www.national.com/pf/LM/LM3477.html).

The control circuit comprises a first comparator 100 that compares the output voltage Vout with the output voltage Vref. The compared signal is supplied to a voltage compensator 102 which provides an error signal B. The error signal B is supplied to a computing unit 104. The computing unit 104 is also supplied with a signal A equal to input voltage V;_n multiplied with an amplifying constant Kl A further input to the computing unit 104 is a signal C equal to a squared and filtered output voltage Vi_n. The computing unit 104 provides a current reference Iref equal to signal A multiplied with signal B divided on signal C.

A comparator 106 compares the current reference Iref and the measured input current Ij_n. The difference between Iref and Ij_n is supplied to a current compensator 108 which provides a control voltage Vc. The control circuit is further comprising a first pulse width modulator (PWMl) 110 and a second pulse width modulator (PWM2) 112 for controlling the first and second switches Ql and Q2 respectively. The PWMl and PWM2 are each supplied with the control voltage Vc. Further the PWMl and PWM2 are supplied with first and second switch current signals I_Q1, I_Q2 respectively, as shown in fig. 7. It shall be noted that the switch current signals I_Q1, I_Q2 actually are voltages from current measuring devices that are proportional to the switch current signals I_Q1, I_Q2. The output of the PWMl and PWM2 are switch control signals S_Q1 and S_Q2 respectively.

The PWM (PWMl or PWM2 above) is shown in detail in fig. 8. The PWM comprises a ramp signal generator 120 producing a ramp signal. The ramp signal is added to the switch current I_Q in an adding device 122, in order to achieve slope compensation, and the added signal is inputted to a comparator 124. The other input of the comparator 124 is supplied with the control voltage Vc. The comparator 124 produces a reset signal supplied to a reset terminal R of a flip-flop device 126. The flip-flop device 122 further comprises a set terminal S which is supplied with a pulse signal generated by a pulse signal generator 128. The output of the flip-flop device 126 is a switch control signal S_Q which controls the on/off state of the switch Q (switch Ql or switch Q2 above).

In the following, the simulation results shown in fig. 9 — 13 will be described to illustrate the achievements of the present invention. The simulations show the differences between using a control circuit not using the first and second switch current I_Q1, I_Q2 as input, and using a control circuit which is using the first and second switch current I_Q1, I_Q2 as input. The simulation software PSpice is used for the simulations. Fig. 9 — 11 show simulations where a first input voltage level of 90 V AC is used. The output voltage is considered to be a DC voltage of 400 V.

Fig. 12 and 13 show simulations where a second input voltage of 230 V AC. The same output voltage as above is used.

Fig. 9 shows the current through the input inductor L3 and shows a half periodic sinusoidal curve of the 50 Hz input voltage. The extreme value is 30 A. This simulation is equal for the converters using a control circuit with and without using the first and second switch current I_Q1, I_Q2 as input.

Fig. 10 shows the magnetizing current through the magnetizing inductor Lm when the first and second switch current I_Q1, I_Q2 are not used as input to the control circuit. The result is a magnetizing current with an extreme value of near 6,0 A. Fig. 11 shows the magnetizing current through the magnetizing inductor Lm when the first and second switch current I_Q1, I_Q2 are used as input to the control circuit. The result is a magnetizing current with extreme values between +0,5 A and - 0,8 A, which is a considerable reduction compared with fig. 10. Fig. 12 shows the current through the input inductor L3 at the second voltage level, resulting in an extreme value of 12 A. At two points the input current ripple is reduced to zero, since the input voltage here is half of the output voltage.

It shall be noted that ripple cancellation is one advantage of the TSSC boost converter compared with a conventional boost converter. The same input ripple can be obtained in an interleaved boost converter. However, in the interleaved boost, the physical ripple current is not cancelled, because each one of the paralleled boost converters does not have ripple cancellation. It is only the sum that goes to zero at half input voltage. So, although the input current looks the same the true ripple is very much different in a TSSC-boost compared with two interleaved boost converters. This will affect an efficiency comparison to favour the TSSC-boost.

Fig. 13 shows the magnetizing current through the magnetizing inductor Lm when the first and second switch current I_Q1, I_Q2 are used as input to the control circuit. The second input voltage level is applied. The result is a magnetizing current with extreme values between +0,9 A and - 1,1 A. Fig. 14 shows the magnetizing current through the magnetizing inductor Lm when the first and second switch current I_Q1, I_Q2 are not used as input to the control circuit. Again, the second input voltage level is applied. The result is a magnetizing current with an extreme value of near 4,4 A.

As can be seen from the above simulations, the consequence is that components with smaller nominal values can be used without the risk of saturation, overheating etc. This again reduces the costs of the circuit. Moreover, not only the cost is reduced, the risk for failures due to excessive heat or excessive currents or voltages is eliminated.

Further modifications and variations will be obvious for a skilled man when reading the description above. The converter in the description above is a boost converter, but the invention can also be used for other types of converters using the TSSC. Note that the input inductor L3 in a buck converter configuration will be considered as an output inductor, as will be appreciated by a man skilled in the art.

It should be noted that the diode current through diodes Dl, D2 of the TSSC could also be used as input to the control circuit instead of or in addition to the switch current through switches Ql, Q2. It is of course possible to use a digital signal processing (DSP) unit to perform the method according to the invention, and the control device according to the invention can be designed as a DSP-unit.

The scope of the invention will appear from the following claims and their equivalents.

Claims

1. Method for controlling a converter comprising a three-state switching cell (TSSC) on a first side connected to a rectifying device via an input inductor (L3) and on a second side connected to an output filter capacitor (Co), where the method comprises the following steps: a) measuring values for an input current, an input voltage and an output voltage of the TSSC; b) using the measured values and an output voltage reference value for providing a control signal to a pulse width modulation device for controlling the switching states of switches (Ql, Q2) in the three-state switching cell; c) measuring a switch current through switches (Ql, Q2) and/or a diode current through diodes (D1,D2) in the three-state switching cell; d) providing a signal proportional to the switch current and/or the diode current as an input to the pulse width modulation device to control the switching states dependent on the measured currents through the switches (Ql, Q2) and/or diodes (D1.D2).

2. Method according to claim 1, wherein the average current mode control method is used to provide the control voltage in step b).

3. Method according to claim 1, wherein step d) comprises adding the measured switch current and the control voltage and providing the added signal as a switch control signal to the switches.

4. Method according to claim 3, where a ramp signal is added to the measured switch current before adding the measured switch current and the control voltage.

5. Control device for a converter comprising a three-state switching cell (TSSC) on a first side connected to a rectifying device via an input inductor (L3) and on a second side connected to an output filter capacitor (Co), comprising: measuring devices arranged for measuring an inductor current, an input voltage and an output voltage; a control circuit arranged for providing a control signal based on the measured values and an output voltage reference value, where the control circuit comprises a pulse width modulation device (110, 112) arranged for controlling the switching states of switches (Ql, Q2) in the three-state switching cell; switch current measuring devices arranged for measuring a switch current through switches (Ql, Q2) and/or a diode current through diodes (Dl, D2) in the three-state switching cell; where the pulse width modulation device (110, 112) is arranged for controlling the switching states dependent on the measured switch current through the switches (Ql, Q2) and/or the measured diode current through the diodes (Dl, D2).

6. Control device according to any of claims 5, where the control device is a digital signal processing unit.

7. Control device according to any of claims 5, where the control device is a mixed analogue and digital electronic device.

8. Control device according to any of claims 5, where the converter is a buck converter, boost converter, buck-boost converter, and insulated buck converter, and insulated buck-boost converter or an insulated boost converter.