WO2006123532A1 - Display apparatus driving circuit and driving method - Google Patents
Display apparatus driving circuit and driving method Download PDFInfo
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- WO2006123532A1 WO2006123532A1 PCT/JP2006/308947 JP2006308947W WO2006123532A1 WO 2006123532 A1 WO2006123532 A1 WO 2006123532A1 JP 2006308947 W JP2006308947 W JP 2006308947W WO 2006123532 A1 WO2006123532 A1 WO 2006123532A1
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- 238000000034 method Methods 0.000 title claims description 26
- 230000008859 change Effects 0.000 claims description 91
- 239000003990 capacitor Substances 0.000 claims description 36
- 238000001514 detection method Methods 0.000 claims description 33
- 230000001052 transient effect Effects 0.000 claims description 3
- 239000004973 liquid crystal related substance Substances 0.000 abstract description 74
- 230000015556 catabolic process Effects 0.000 abstract 1
- 238000006731 degradation reaction Methods 0.000 abstract 1
- 239000000758 substrate Substances 0.000 description 30
- 238000010586 diagram Methods 0.000 description 28
- 238000004088 simulation Methods 0.000 description 13
- 238000006243 chemical reaction Methods 0.000 description 10
- 230000008878 coupling Effects 0.000 description 10
- 238000010168 coupling process Methods 0.000 description 10
- 238000005859 coupling reaction Methods 0.000 description 10
- 230000006866 deterioration Effects 0.000 description 9
- 238000004364 calculation method Methods 0.000 description 7
- 230000004913 activation Effects 0.000 description 6
- 230000000694 effects Effects 0.000 description 4
- 230000008569 process Effects 0.000 description 4
- 239000011521 glass Substances 0.000 description 3
- 239000011159 matrix material Substances 0.000 description 3
- 239000000470 constituent Substances 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 238000004904 shortening Methods 0.000 description 2
- 101100489577 Solanum lycopersicum TFT10 gene Proteins 0.000 description 1
- 230000000747 cardiac effect Effects 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 239000010408 film Substances 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
- 238000002834 transmittance Methods 0.000 description 1
Classifications
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3648—Control of matrices with row and column drivers using an active matrix
- G09G3/3655—Details of drivers for counter electrodes, e.g. common electrodes for pixel capacitors or supplementary storage capacitors
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3614—Control of polarity reversal in general
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/02—Improving the quality of display appearance
- G09G2320/0247—Flicker reduction other than flicker reduction circuits used for single beam cathode-ray tubes
Definitions
- the present invention relates to a display device such as a liquid crystal display device that displays an image by applying a voltage between a plurality of pixel electrodes and a common electrode opposed to the plurality of pixel electrodes. Display configured so that the value of the counter voltage to be applied to the electrode switches alternately between two voltage values in a predetermined cycle, and the counter voltage (the center voltage) is changed according to the change of the display mode, etc.
- the present invention relates to a driving circuit of the device.
- TFT-LCD device an active matrix liquid crystal display device (hereinafter referred to as “TFT-LCD device”) using a thin film transistor (TFT) is widely used.
- a liquid crystal panel (hereinafter referred to as “TFT—LCD panel”) in a TFT-LCD device has a pair of substrates (hereinafter referred to as “first and second substrates”) facing each other. These substrates are fixed by being separated by a predetermined distance, and a liquid crystal material is filled between these substrates to form a liquid crystal layer. At least one of these substrates is transparent, and when performing transmissive display, both substrates must be transparent.
- a plurality of scanning signal lines parallel to each other and a plurality of data signal lines intersecting at right angles to the scanning signal lines are provided on the first substrate!
- a pixel electrode and a pixel TFT which is a switching element for electrically connecting the pixel electrode to the data signal line are provided.
- the gate terminal of the pixel TFT is connected to the scanning signal line, the source terminal is connected to the data signal line, and the drain terminal is connected to the pixel electrode.
- a common electrode as a counter electrode is provided on the entire surface.
- An appropriate voltage is applied to the common electrode by the common electrode driving unit. Therefore, a voltage corresponding to the potential difference between the pixel electrode and the common electrode is applied to the liquid crystal layer. Since the light transmittance of the liquid crystal layer can be controlled by this applied voltage, the data signal is transmitted. Line force A desired pixel display can be performed by applying an appropriate voltage to each pixel electrode.
- TFT As a method of alternating current drive for liquid crystal panels such as LCD panels, the polarity of the voltage applied to the liquid crystal is reversed every frame period in order to prevent deterioration of display quality due to flickering force, etc.
- a driving method called a line inversion driving method in which the polarity is inverted every one or a predetermined number of scanning lines.
- the potential of the common electrode that is, the value of the counter voltage is changed according to the AC driving (hereinafter referred to as “ It is common to use the “opposite AC drive system”.
- the polarity of the data signal applied to each data signal line (based on the relative voltage)
- the opposite voltage value is 1 between a predetermined high voltage value and low voltage value in conjunction with the polarity inversion of each data signal. It is switched every horizontal period.
- an operational amplifier (operational amplifier) 53 and a counter voltage waveform generation circuit 51 are used in order to switch the counter voltage to be applied to the common electrode between a plurality of types of optimal counter voltages.
- a circuit as shown in (A) is used. According to such a circuit using the operational amplifier 53, the rectangular wave voltage VCOMin applied to the non-inverting input terminal of the operational amplifier 53 is switched as shown by the dotted line in FIG. Counter voltage VCOMout can be changed.
- a bias voltage generation circuit 61 configured by combining the first and second resistance elements Rl and R2 as shown in FIG. 15A is also used.
- a rectangular wave voltage Vpp as shown in FIG.
- Patent Document 1 Japanese Unexamined Patent Publication No. 2005-3962
- Patent Document 2 Japanese Unexamined Patent Publication No. 10-268258
- Patent Document 3 Japanese Patent Laid-Open No. 10-214066
- the resistance value of the resistance elements Rl and R2 to which the bias voltage Vba is applied is large and the power consumption is small.
- the above switching period is determined by the product of the capacitance value of the coupling capacitor C1 and the resistance values of the resistance elements Rl and R2, and the conventional CC bias circuit requires a switching period of about 0.5 seconds, for example. (Refer to the dotted circle in Fig. 15 (C)). Therefore, during this time, a non-optimal counter voltage is applied to the common electrode, and there is a problem that the deterioration of display quality during the switching period is visually recognized.
- the present invention provides a drive circuit and a drive method for a display device that can suppress a decrease in display quality due to a change in bias voltage for switching the opposite voltage while keeping power consumption in the opposed AC drive low.
- the purpose is to do.
- the plurality of individual electrodes respectively corresponding to the unit images constituting the image to be displayed and the common electrode provided to face the plurality of individual electrodes.
- a driving circuit of a display device that displays the image by applying a voltage according to the image,
- An individual electrode driver that applies a voltage corresponding to the image to the plurality of individual electrodes; and outputs a counter voltage to be applied to the common electrode, and sets the value of the counter voltage to a predetermined high voltage
- a common electrode driver that alternately switches between a pressure value and a predetermined low voltage value at a predetermined cycle
- the common electrode driving unit includes:
- a resistor string including two resistive elements connected in series with each other;
- a DC voltage generating circuit for applying a DC voltage between both ends of the resistor string
- a rectangular wave voltage generating circuit connected to a connection point between the two resistance elements via the capacitor and outputting a rectangular wave voltage corresponding to the waveform of the counter voltage;
- a bias control unit that changes a DC component of the voltage at the connection point by changing a value of the DC voltage
- the common electrode driving unit applies the voltage at the connection point to the common electrode as the counter voltage
- the bias control unit is characterized in that when changing the DC component of the counter voltage, the value of the DC voltage is changed transiently larger than the change necessary for changing the DC component.
- a second aspect of the present invention is the first aspect of the present invention.
- the bias control unit When changing the DC component of the counter voltage, the bias control unit changes the value of the DC voltage to be larger than the change necessary for changing the DC component for a predetermined period immediately after the change of the DC component. It is characterized by that.
- a third aspect of the present invention is the first aspect of the present invention.
- the bias control unit causes the value of the DC voltage to be included in the voltage at the connection point when the display device starts the display, and the DC voltage that the counter voltage should have for display on the display device. It is characterized by a change that is transiently larger than the change required for
- a fourth aspect of the present invention is the first aspect of the present invention.
- a voltage detector for detecting a voltage at the connection point
- the bias controller is configured to determine a voltage value at the connection point determined based on a set value determined in advance as a value after the change of the direct current component of the counter voltage and a detection result of the voltage detector.
- the value of the DC voltage is determined so that the difference from the detected value, which is the value of the DC component, is canceled out.
- the bias control unit includes:
- a predetermined maximum value is determined as the value of the DC voltage
- a predetermined minimum value is determined as the value of the DC voltage
- the set value is determined as the value of the DC voltage.
- a plurality of individual electrodes respectively corresponding to unit images constituting an image to be displayed are provided between the common electrode provided so as to face the plurality of individual electrodes.
- a driving circuit of a display device that displays the image by applying a voltage according to the image,
- An individual electrode driving unit that applies a voltage according to the image to the plurality of individual electrodes, and outputs a counter voltage to be applied to the common electrode, and the value of the counter voltage is set to a predetermined high voltage value and a predetermined low voltage value.
- a common electrode driving unit that alternately switches between and with a predetermined cycle,
- the common electrode driving unit includes:
- a DC voltage is applied across the resistor string including two resistance elements connected in series with each other,
- a rectangular wave voltage corresponding to the waveform of the counter voltage is applied to a connection point between the two resistance elements through a predetermined capacitor
- the value of the DC voltage is changed transiently to be larger than the change necessary for changing the DC component.
- a seventh aspect of the present invention is a display device
- a drive circuit according to any one of the first to sixth aspects of the present invention is provided. To do.
- the plurality of individual electrodes respectively corresponding to the unit images constituting the image to be displayed and the common electrode provided so as to face the plurality of individual electrodes.
- An individual electrode driving step for applying a voltage corresponding to the image to the plurality of individual electrodes; and a counter voltage to be applied to the common electrode is output, and the value of the counter voltage is set to a predetermined high voltage value and a predetermined low voltage value.
- the common electrode driving step includes:
- a ninth aspect of the present invention is the eighth aspect of the present invention.
- the DC voltage causes the voltage at the connection point to have a DC component that the counter voltage should have for display on the display device. It is characterized by a change that is transiently larger than the change required for this.
- a tenth aspect of the present invention is the eighth aspect of the present invention.
- the pressure value is determined.
- the DC component of the counter voltage is changed in the common electrode drive unit using the CC bias circuit including the resistor string having the first and second resistance element forces and the capacitor.
- the value of the DC voltage applied to the resistor string changes transiently larger than the change necessary to change the DC component.
- the counter voltage switching period and the bias start-up period are shortened compared to the conventional case. Therefore, in a liquid crystal display device or the like that performs counter AC drive, the power consumption for driving the common electrode is kept low while the counter voltage is reduced. It is possible to suppress deterioration in display quality associated with switching and bias activation at the start of display.
- the resistor string constituting the CC bias circuit as the common electrode drive unit only for a predetermined period immediately after the change of the DC component.
- the switching period of the counter voltage is shortened compared to the conventional case.
- the direct current applied to the resistor string composed of the first and second resistance elements at the start of display on the display device including the CC bias circuit as the common electrode driving unit.
- the voltage value changes transiently larger than the change necessary to obtain the DC component that the counter voltage should have for display on the display device.
- the bias start-up period at the start of display is shortened compared to the conventional case, so that it is possible to suppress deterioration in display quality when the bias voltage is raised at the start of display.
- the first and second resistance element forces in the CC bias circuit as the common electrode driving unit are also applied to the resistor string.
- a set value that is predetermined as the changed value of the DC component and the voltage The DC voltage is adjusted so that the difference between the detected value, which is the DC component value of the voltage at the connection point between the first resistance element and the second resistance element, determined based on the detection result of the detector is canceled out. The value of is determined.
- the set value predetermined as the value after the change of the DC component of the counter voltage, the first resistance element determined based on the detection result of the voltage detector When the difference between the detected value, which is the DC component value of the voltage at the connection point with the second resistance element, is larger than the allowable value, the first and second resistance element forces are also given to the resistance string.
- the value of the DC voltage is a predetermined maximum value or minimum value. Therefore, it is substantially unnecessary to determine how much the DC voltage value should be increased transiently in order to shorten the counter voltage switching period and the bias starting period.
- FIG. 1 is a block diagram showing a configuration of a liquid crystal display device according to a first embodiment of the present invention.
- FIG. 2 is a circuit diagram showing an equivalent circuit of the liquid crystal panel in the first embodiment.
- FIG. 3 is a block diagram functionally showing the configuration of a common electrode driving section in the first embodiment.
- FIG. 4 is a circuit diagram showing a configuration example of a bias voltage generating circuit constituting the common electrode driving unit in the first embodiment.
- FIG. 5 is a voltage waveform diagram (A, B) showing the operation of the common electrode driving section in the first embodiment.
- FIG. 6 is a voltage waveform diagram for explaining the effect of the first embodiment.
- FIG. 7 is a circuit diagram showing a circuit model used for the simulation of the common electrode driving unit in the first embodiment.
- FIG. 8 A voltage waveform diagram (A) showing the change of the first example of the bias voltage in which the variable voltage source force is also applied to one end of the first resistance element in the simulation, and the second example of the bias voltage. It is a voltage waveform diagram (B) showing a change.
- FIG. 9 Waveform diagram showing the bias voltage of the first example and the second example in the simulation (A), the counter voltage obtained at the output point when the bias voltage of the first example is given, and the corresponding second voltage
- FIG. 4 is a waveform diagram (B) schematically showing a counter voltage obtained at an output point when an example bias voltage is applied, and a waveform diagram (C) showing the counter voltage in detail.
- FIG. 10 is a waveform diagram showing a change in bias voltage at the start of display of the common electrode driver in the first embodiment (A).
- FIG. 11 is a block diagram functionally showing the configuration of the common electrode driving unit in the second embodiment of the present invention.
- FIG. 12 is a flowchart showing an operation of a control calculation unit constituting the common electrode driving unit in the second embodiment.
- FIG. 14 is a block diagram (A) showing a configuration of a first conventional example of a common electrode driving unit in a liquid crystal display device, and a voltage waveform diagram (B) showing an operation of the first conventional example.
- FIG. 15 is a block diagram (A) showing a configuration of a second conventional example of a common electrode driving unit in a liquid crystal display device, and voltage waveform diagrams (B, C) showing the operation of the second conventional example. .
- Gate driver Individual electrode driver
- VHi High voltage value that is the maximum value in each cycle of the counter voltage
- VLi Low voltage value that is the minimum value in each cycle of the counter voltage
- Vc Center voltage (opposite voltage)
- FIG. 1 is a block diagram showing the configuration of the liquid crystal display device according to the first embodiment of the present invention.
- This liquid crystal display device is a TFT-LCD device that adopts a line inversion driving method and performs opposed AC driving, and includes a liquid crystal panel 100 and a source driver 120 as a data signal line driving circuit mounted on the liquid crystal panel 100. And a gate driver 130 as a scanning signal line drive circuit, a controller 200 as a display control circuit, a DCZDC converter 300 as a power supply circuit, and a first resistance element R1 as a component of the common electrode drive unit And a second resistance element R2 and a capacitor C1.
- the liquid crystal panel 100 includes a pair of substrates 102 and 104 that sandwich a liquid crystal layer, and a polarizing plate is attached to the outer surface of each substrate.
- One of this pair of substrates 102 is called a TFT substrate.
- a plurality of source lines Ls as data signal lines and a plurality of gate lines Lg as scanning signal lines cross each other on an insulating substrate such as glass.
- a plurality of pixel circuits are formed in a matrix form corresponding to the intersections of the plurality of source lines Ls and the plurality of gate lines Lg (hereinafter, formed in a matrix form in this manner).
- each pixel circuit includes a pixel capacitor Cp having a liquid crystal capacitive force formed by a pixel electrode as an individual electrode formed on the TFT substrate 102 and a counter electrode Ec described later, and a switching element.
- TFT10 The gate terminal and the source terminal of the TFT 10 are respectively connected to the gate line Lg and the source line Ls passing through the intersection corresponding to the pixel circuit, and the drain terminal of the TFT 10 is connected to the pixel electrode.
- the other substrate 104 of the pair of substrates is called a counter substrate, and a common electrode Ec and an alignment film as a counter electrode are sequentially stacked over a transparent insulating substrate such as glass. ing.
- a liquid crystal layer sandwiched between the counter substrate 104 and the TFT substrate 102 so as to be sandwiched between the liquid crystal layer and each pixel electrode disposed so as to sandwich the liquid crystal layer.
- the liquid crystal capacitance is formed as the pixel capacitance Cp by the common electrode Ec.
- an auxiliary capacitor is provided in parallel with the liquid crystal capacitor that should surely hold the voltage in the pixel capacitor Cp.
- the auxiliary capacitor is not directly related to the present invention, its description and illustration are omitted.
- the common electrode Ec as the counter electrode is supplied with the counter voltage Vcom by the common electrode driving unit, and each pixel electrode has a voltage corresponding to the image to be displayed.
- the voltage is provided by the source driver 120 and the gate driver 130.
- a voltage corresponding to the potential difference between the electrodes is applied to the liquid crystal layer sandwiched between each pixel electrode and the common electrode Ec.
- image display is realized by optically modulating each part of the liquid crystal layer.
- the source driver 120 and the gate driver 130 constitute a drive unit that applies a voltage corresponding to the image to a pixel electrode as an individual electrode corresponding to a unit image constituting an image to be displayed, that is, an individual electrode drive unit.
- the controller 200 is a drive control signal (a voltage corresponding to a pixel value is applied to each pixel electrode) for operating the source driver 120 based on an image signal and a control signal to which an external signal source (not shown) is also applied. Ssdv) and a drive control signal Sgdv for operating the gate driver 130 are generated.
- the controller 200 also includes a DZA conversion circuit 210 as a bias voltage generation circuit that outputs a bias voltage Vba for driving the common electrode Ec.
- the DCZDC converter 300 is based on a control signal Sig from the controller 200 and is supplied by another power source (for example, a power source (not shown) of an electronic device such as a mobile phone including the liquid crystal display device). From this, a DC voltage V01 is generated as a power supply voltage for the controller 200, the source driver 120, and the like. In addition to this, the DCZDC converter 300 outputs a rectangular wave voltage Vpp and a reference voltage V00, which will be described later, for driving the common electrode Ec.
- a control signal Sig from the controller 200 and is supplied by another power source (for example, a power source (not shown) of an electronic device such as a mobile phone including the liquid crystal display device). From this, a DC voltage V01 is generated as a power supply voltage for the controller 200, the source driver 120, and the like. In addition to this, the DCZDC converter 300 outputs a rectangular wave voltage Vpp and a reference voltage V00, which will be described later, for driving the common electrode Ec.
- the bias voltage Vba output from the DZA conversion circuit 210 in the controller 200 is applied to one end of the first resistance element R1, and the other end of the first resistance element R1 is connected to the second resistance element R2. Connected to one end.
- the other end of the second resistance element R2 is supplied with the reference voltage V00 output from the DCZDC comparator 300, whereby the other end of the second resistance element R2 is grounded, and the first and first resistance elements R2 are grounded.
- a bias voltage Vba as a direct current voltage is applied between both ends of the resistor string composed of the two resistance elements Rl and R2.
- a capacitor C1 is connected to a connection point Nout between the first resistor element R1 and the second resistor element R2, and a rectangular wave output from the DCZDC converter 300 is connected to the other end of the capacitor C1.
- the voltage Vpp is given.
- the first resistor element R1 and the second resistor element R2 form a resistor string for dividing the noise voltage Vba, and the capacitor C1 generates a rectangular wave voltage Vpp within the resistor string. It functions as a coupling capacitor to give to the connection point Nout.
- the DZA conversion circuit 210 in the controller 200, the DCZDC converter 300, the first and second resistance elements Rl and R2, and the capacitor C1 constitute a common electrode drive unit, and the first resistance
- the connection point between the element R1 and the second resistance element R2 (hereinafter referred to as “output point” t) is applied to the common electrode Ec of the liquid crystal panel 100 as the counter voltage Vcom.
- the source driver 120 is connected to each source line Ls in the liquid crystal panel 100.
- a data signal to be applied to each source line Ls is generated based on the drive control signal Ssdv from the controller 200.
- the gate driver 130 is connected to each gate line Lg in the liquid crystal panel 100, and generates a scanning signal to be applied to each gate line Lg.
- the gate driver 130 displays an image by applying a scanning signal to each gate line Lg in order to write a data signal applied from the source driver 120 to each source line Ls to each pixel forming portion (pixel capacitance Cp).
- the gate line Lg in the liquid crystal panel 100 is sequentially selected by approximately one horizontal period.
- the source driver 120 and the gate driver 130 are mounted on the TFT substrate 102.
- the present invention is not limited to this mounting mode.
- the source driver 120 and the TFT substrate 102 are connected via a flexible substrate.
- the upper wiring may be connected.
- a so-called driver monolithic liquid crystal display device or a partial driver monolithic liquid crystal display device in which one or both of the source driver 120 and the gate driver 130 are integrally formed with a pixel circuit on a glass substrate may be used.
- the line inversion driving method since the line inversion driving method is adopted as described above, the polarity of the data signal applied to each source line Ls from the source driver 120 (as the potential of the common electrode Ec) The polarity of the counter voltage (Vcom) is reversed every horizontal period. Further, in the present embodiment, the value of the counter voltage Vcom output from the common electrode driving unit configured as described above that performs counter AC driving is set so that the amplitude of the data signal is reduced. Interlocking with the polarity inversion of the data signal, it switches between two predetermined voltage values every horizontal period (details will be described later).
- FIG. 3 is a block diagram functionally showing the configuration of the common electrode driving unit in the present embodiment.
- the common electrode drive unit 410 in the present embodiment functionally includes the bias voltage generation circuit 11, the rectangular wave voltage generation circuit 13, and the bias voltage control unit 15, which are connected as described above. It consists of two resistive elements Rl, R2 and a capacitor C1, and is configured as a CC bias circuit.
- the symbol “C1” also represents the capacitance value of the capacitor C1
- the symbols “R1” and “R2” respectively represent the resistance values of the first and second resistance elements Rl and R2. It shall represent.
- FIG. 4 is a circuit diagram showing a configuration example of the DZA conversion circuit 210.
- the DZA conversion circuit 210 according to this configuration example includes a resistor string composed of five resistor elements Ral to Ra5 connected in series, a ground voltage and a voltage Vref of a predetermined reference power supply (hereinafter referred to as “reference voltage Vref”).
- the resistor elements Rbl to Rb4, the voltage setting register 21, and the voltage hollow 23 are connected to each other, and both ends of the resistor string are grounded, and the connection point between the resistor elements Ra4 and Ra5 is
- the voltage holo 23 is connected to the non-inverting input terminal of the operational amplifier.
- the switching switches SW1 to SW4 are controlled by data Dba as a voltage setting value written in the voltage setting register 21.
- the data Dba is written to the voltage setting register 21 based on the function of the controller 200.
- the part of the controller 200 that writes the data Dba to the voltage setting register 21 is
- the bias voltage control unit 15 is configured.
- the bias voltage control unit 15 realized in the controller 200 writes the data Dba (voltage setting value) to the voltage setting register 21, the voltage corresponding to the voltage setting register 21 is changed to the voltage hologram. It is input to 23, converted to voltage and impedance, and output as a bias voltage Vba. In this manner, by writing the data Dba as a digital value in the voltage setting register 21, an analog voltage corresponding to the data Dba can be output as the bias voltage Vba.
- the rectangular wave voltage generation circuit 13 generates a rectangular wave voltage Vpp having the same amplitude, period and phase as the counter voltage Vcom to be applied to the common electrode Ec.
- the counter voltage Vcom to be applied to the common electrode Ec is 1 between a predetermined high voltage value and a low voltage value in conjunction with the polarity inversion of the data signal applied to each source line Ls. This is a voltage whose value changes every horizontal period (1H).
- the rectangular wave voltage Vpp is a rectangular wave (pulse waveform with a duty ratio of 1Z2) as shown in Fig. 5 (A). Voltage.
- Such a rectangular wave voltage Vpp is output via the coupling capacitor C1. Force point (connection point between the first resistance element Rl and the second resistance element R2) is given to Nout.
- the capacitance value of the coupling capacitor C1 and the resistance values of the first and second resistance elements Rl and R2 are determined by the time constant (C1 X R1 -R2 / (Rl + R2)) is a rectangular wave voltage Vpp Is set to be sufficiently larger than one horizontal period (1H) corresponding to the pulse width (1Z2 of the pulse repetition period) (see Fig. 7).
- the rectangular wave voltage Vpp is applied to the output point Nout after the DC component is cut off by the coupling capacitor C1, and the output point Nout has the same amplitude, phase, and cycle as the rectangular wave voltage Vpp.
- the center voltage Vc of the counter voltage Vcom is given by the following equation based on the bias voltage Vba and the resistance values of the first and second resistance elements R 1 and R2.
- Vc ⁇ R2 / (R1 + R2) ⁇ X Vba
- the bias voltage Vba is controlled so that the change in the noise voltage Vba becomes transiently (temporarily) larger than the change necessary to change the center voltage Vc to the value after switching. Is done. That is, the bias voltage Vba is controlled so that the change in the noise voltage Vba for changing the center voltage Vc to the value after switching is transiently (temporarily) expanded.
- Vt ⁇ R2 / (Rl + R2) ⁇ X Vba...
- the value of the noise voltage Vba is changed as follows.
- the center voltage value after the change is The bias voltage Vba is changed so that the center voltage Vc changes toward the third center voltage value Vc3 smaller than the center voltage value Vc2 of 2. That is, from the above equation (1), the bias voltage Vba is
- Vba3 ⁇ (Rl + R2) / R2 ⁇ X Vc3 ⁇ ' ⁇ (2)
- the bias voltage control unit 15 writes the voltage setting value Dba3 corresponding to the bias voltage Vba3 given by the above equation (2) into the voltage setting register 21 in the DZA conversion circuit 210. This means that the center voltage target value Vt is changed from the first center voltage value Vcl to the third center voltage value Vc3.
- the bias voltage Vba is changed so that the center voltage Vc is directed to the second center voltage value Vc2. That is, the voltage setting value Dba2 corresponding to the bias voltage value Vba2 given by the following equation is written in the voltage setting register 21 of the noise voltage control unit 15 DZA conversion circuit 210. This means that the center voltage target value Vt is changed from the third center voltage value Vc3 to the second center voltage value Vc2.
- Vba2 ⁇ (Rl + R2) / R2 ⁇ X Vc2 ⁇ ' ⁇ (3)
- the counter voltage Vcom changes as indicated by a solid line in FIG. That is, the counter voltage V com is switched every horizontal period (1H) between the first high voltage value VHil and the first low voltage value VLol in the period before the switching start time tl. It is a rectangular wave voltage, and the voltage value switches between the second high voltage value VHi2 and the second low voltage value VLo2 every horizontal period (1H) at a predetermined time near the time t2 after the time t2. It becomes a square wave voltage.
- the counter voltage V com is switched every horizontal period (1H) between the first high voltage value VHil and the first low voltage value VLol in the period before the switching start time tl. It is a rectangular wave voltage, and the voltage value switches between the second high voltage value VHi2 and the second low voltage value VLo2 every horizontal period (1H) at a predetermined time near the time t2 after the time t2. It becomes a square wave voltage.
- Vcl (VHil + VLol) / 2 '' (5)
- Vc2 (VHi2 + VLo2) / 2
- the change of the center voltage target value Vt for switching the counter voltage Vcom is transiently expanded, that is, the bias voltage Vba is a direct current of the counter voltage Vcom.
- the bias voltage Vba is changed so that it changes transiently and larger than the change necessary to change the center voltage Vc as a component (the value of the bias voltage Vba is Vba3 only during the period up to t2). Be controlled.
- the time required for switching the counter voltage Vcom switching period
- This point will be described below with reference to FIG.
- the bias voltage Vba changes to the first bias voltage value Vbal force to the third bias voltage value Vba3 (formula (2)) at time tl, and at time t2.
- the third bias voltage value Vba3 changes to the second negative voltage value Vba2 (Equation (3)) (hereinafter, the change of the bias voltage Vba is expressed as “Vbal ⁇ Vba3 ⁇ Vba2”).
- the high voltage value VHi that is the maximum value in each cycle of the counter voltage Vcom as a rectangular wave voltage is as shown by the solid line in FIG. Change.
- the high voltage value VHi is substantially equal to the changed high voltage value (second high voltage value) VHi2 at the time ta in the vicinity of the time t2 after the time t2 (the changed high voltage value VHi2
- the value of the bias voltage Vba is changed from the first Roh Iasu voltage value Vbal to the second bias voltage value V ba2 (the conventional case) at the time tl, the high voltage VHi, the In FIG.
- the common electrode Ec when the common electrode Ec is driven using the CC bias circuit, switching of the counter voltage Vcom (change of the center voltage Vc as a DC component) is performed. Further, the time required for the switching, that is, the switching period can be greatly shortened.
- how much the switching period can be shortened depends on the third noise voltage value Vba3 and the time from time tl to time t2. That is, the force that transiently expands the change in the bias voltage Vba compared to the change necessary to change the center voltage Vc of the counter voltage Vcom and the change in the noisy voltage Vba to the center voltage Vc.
- the transient change of the bias voltage Vba (change from Vbal to Vba3 above) for changing the DC component (center voltage Vc) at the counter voltage Vcom is increased as much as possible. It is preferable that the time point t2 of this time be close to the time point tl.
- the bias voltage Vba is controlled from the time point tl to the time point t2 so that the center voltage Vc changes toward a value Vc4 that is larger than the center voltage value Vc2 after switching, and the time point t2 Thereafter, the bias voltage Vba is controlled so that the center voltage Vc changes toward the center voltage value Vc2 after switching.
- the center voltage target value Vt is also changed to Vc4 (> Vc2) at time tl and Vc4 is also changed to Vc2 at time t2.
- the switching period can be shortened even when the counter voltage Vcom is switched so that the center voltage Vc becomes high.
- the bias voltage Vba is controlled so that the change in the bias voltage Vba for switching the counter voltage Vcom (the center voltage Vc) is transiently expanded, and thus the switching period is changed. Is shortened.
- the inventor of the present application uses this In order to confirm the effect of shortening the switching period as described above, the operation of the common electrode driver 410 was simulated by numerical calculation. Hereinafter, this simulation will be described with reference to FIGS.
- FIG. 7 is a circuit diagram showing a circuit model used for simulation of the CC bias circuit as the common electrode driving unit 410 in the liquid crystal display device.
- the common electrode driver controls the power supply corresponding to the rectangular wave voltage generation circuit 13 (hereinafter referred to as “rectangular wave voltage source” V) and the voltage value corresponding to the bias voltage generation circuit 11.
- a possible DC voltage source (hereinafter referred to as “variable voltage source”) E2 and a 180 k ⁇ resistance element corresponding to the first resistance element R1 (also referred to as “first resistance element”) ) Rls, 120 k ⁇ resistance element corresponding to the second resistance element R2 (also referred to as “second resistance element”) R2s, and a capacitor Cls corresponding to the coupling capacitor C1 .
- first resistance element also referred to as “first resistance element”
- second resistance element also referred to as “second resistance element”
- capacitor Cls corresponding to the coupling capacitor C1 .
- the other end is grounded, and the output terminal of the rectangular wave voltage source E1 is connected to an output point Nout, which is a connection point between the first resistance element Rls and the second resistance element R2, via the capacitor Cls.
- the negative electrode of variable voltage source E2 is grounded.
- FIG. 8A shows a change in the first example of the bias voltage Vba applied from the variable voltage source E2 to one end of the first resistance element Rls in the above simulation (corresponding to the change in the bias voltage Vba in this embodiment).
- 8 (B) shows the change in the second example of the noise voltage V ba given to one end of the first resistance element Rls from the variable voltage source E2 in the above simulation (conventional bias).
- FIG. 6 is a voltage waveform diagram showing a change in voltage Vba).
- the bias voltage Vba is 4 V at the start of the simulation (hereinafter simply referred to as “start time”), and changes from 4 V to ⁇ 12 V when 0.03 seconds have elapsed from the start time.
- the bias voltage Vba is 4V at the start time, and when 0.03 seconds have elapsed from the start time, the 4V force also changes to 0V, and thereafter is maintained at 0V.
- FIGS. 9 (A) to 9 (C) show the simulation results of the bias voltage of the first example and the second example. It is a voltage wave form diagram shown with pressure Vba.
- Fig. 9 (A) shows the bias voltage Vba of the first and second examples together
- Fig. 9 (B) shows the output point Nout when the bias voltage Vba of the first example is given.
- the waveform of the counter voltage Vcom obtained is shown by a solid line
- the waveform of the counter voltage Vcom obtained at the output point Nout when the bias voltage Vba of the second example is given is shown by a dotted line.
- the counter voltage Vcom is a rectangular wave voltage with a very short period compared to the switching period (or compared to the time constant determined by the capacitor Cls and the resistance elements Rls and R2s), as shown in FIG. 9 (C). Therefore, Fig. 9 (B) shows the change of the counter voltage Vcom between the high voltage value VHi which is the maximum value in each cycle of the counter voltage Vcom as a rectangular wave voltage and the low voltage value VLo which is the minimum value. . That is, in FIG. 9B, the change of the rectangular wave is represented by the upper envelope CHi and the lower envelope CLo of the rectangular wave indicating the counter voltage Vcom (see FIG. 9C).
- bias start-up period the relevant period at the start of display
- the noise voltage control unit 15 writes the data Dba to the voltage setting register 21 so that it becomes transiently larger at the display start time than the change necessary for this.
- the bias voltage Vba is a predetermined bias voltage value Vba 1 that gives the center voltage value Vc 1 of the optimum counter voltage Vcom from 0 at the display start time tOl, that is, a predetermined value that is larger than the original bias voltage value Vbal.
- the bias voltage value is changed to VbaO, and then at the time t02, the voltage value VbaO is changed to the original bias voltage value Vbal.
- FIG. 10 (C) shows that according to the present embodiment, the bias activation period at the start of display is greatly shortened compared to the conventional case.
- the display voltage is deteriorated because the counter voltage Vcom (the center voltage Vc) is not the original value, that is, the optimum state.
- Vcom the center voltage Vc
- the switching period and bias start-up period described above are The period is relatively long depending on the time constant determined by the first and second resistance elements Rl and R2 having a large resistance value. Therefore, in the conventional common electrode driving unit using the CC bias circuit, there has been a problem of t ⁇ ⁇ ⁇ that the deterioration of display quality during the switching period and the bias starting period is perceived by humans.
- the counter voltage Vcom (the center voltage Vc) is switched.
- the bias voltage is controlled so that the change in the bias voltage Vba is transiently expanded, which greatly shortens the switching period compared to the conventional method (Fig. 6).
- the bias voltage Vba for raising the center voltage Vc of the counter voltage Vcom to the original center voltage value Vc 1 is set.
- the bias voltage Vba is controlled so that the change is expanded transiently, which significantly shortens the bias start-up period compared to the conventional method (Fig.
- the switching of the counter voltage Vcom switching of the center voltage Vc
- the power consumption for driving the common electrode are kept low. It is possible to suppress the deterioration of display quality when the bias voltage is raised at the start of display.
- liquid crystal display device has the same overall configuration as that of the first embodiment and is as shown in FIG. 1 and FIG. 2, the same parts are denoted by the same reference numerals and detailed description thereof is omitted. To do. Further, the overall operation of the liquid crystal display device is the same as that of the first embodiment, and thus the description thereof is omitted. Below, it demonstrates centering around the structure and operation
- FIG. 11 is a block diagram functionally showing the configuration of the common electrode driving unit in the present embodiment.
- the common electrode driver 420 in the present embodiment includes a bias voltage generation circuit 11, a rectangular wave voltage generation circuit 13, and first and second resistance elements R1, R2. R2 and a capacitor CI are provided, and these components are connected in the same manner as in the first embodiment to constitute a CC bias circuit.
- the common electrode driving unit 420 further includes a voltage detection circuit 17 for detecting the voltage at the output point (connection point between the first resistance element R1 and the second resistance element R2) Nout, and bias control means.
- a control calculation unit 19 is provided instead of the bias voltage control unit.
- the control calculation unit 19 controls the bias voltage Vba by writing data Dba to the voltage setting register 21 (see FIG. 4) in the bias voltage generation circuit 11 based on the processing described later shown in FIG. This is realized based on the functions of the controller 200.
- the voltage detection circuit 17 detects the maximum value Vdmax and the minimum value Vdmin of the voltage at the output point Nout (this voltage is applied to the common electrode Ec as the counter voltage Vcom) and controls these. This is given to the arithmetic unit 19. Based on the maximum value Vdmax and the minimum value Vdmin, the control calculation unit 19 writes the data D ba into the voltage setting register 21 in the bias voltage generation circuit 11 according to the process shown in the flowchart of FIG. That is, the control calculation unit 19 operates as follows.
- step S12 it is determined whether or not the counter voltage Vcom is to be switched. If there is no change in the center voltage set value Vst as a result of this determination, the bias voltage value Dst corresponding to the center voltage set value Vst, that is, the bias voltage value Dst for applying the center voltage Vc of the set value Vst is set to the voltage. As the set value Dba (step S26), the process proceeds to step S28.
- step S12 If the result of determination in step S12 is that the center voltage set value Vst has changed, the center voltage set value Vst is updated to the changed value (step S14). Next, based on the maximum value Vdmax and the minimum value Vdmin of the voltage at the output point Nout given from the voltage detection circuit 17, the DC component of the voltage at the output point Nout is calculated as the center voltage detection value Vd by the following equation: (Step S16).
- Vd (Vdmax + Vdmin) / 2 (7)
- the center voltage detection value Vd be considered practically equal to the center voltage setting value Vst?
- the difference I Vt ⁇ Vd I between the center voltage setting value Vst and the center voltage detection value Vd is determined whether it is smaller than a predetermined small positive value ⁇ (step S18).
- the center voltage detection value Vd can be regarded as practically equivalent to the center voltage setting value Vst, and corresponds to the center voltage setting value Vst.
- the bias voltage value Dst is set to the voltage setting value Dba (step S26), and the process proceeds to step S28.
- Step S20 If the difference I Vt ⁇ Vd I is greater than or equal to the positive value ⁇ as a result of the determination in step S18, it is determined whether or not the center voltage set value Vst is greater than the center voltage detection value Vd (Ste S20). As a result of this determination, if the center voltage setting value Vst is larger than the center voltage detection value Vd, the maximum value that can be set in the voltage setting register 21 (hereinafter, “maximum value that can be set”) Dmax is set. Set to the voltage setting value Dba (step S22), and proceed to step S28.
- step S20 determines whether the center voltage setting value Vst is smaller than the center voltage detection value Vd.
- a predetermined value hereinafter “setting” is set as the minimum value that can be set in the voltage setting register 21.
- Minimum possible value Set Dmin to the voltage setting value Dba (step S24), and proceed to step S28.
- step S28 the voltage setting value Dba determined as described above is written into the voltage setting register 21 in the bias voltage generating circuit 11. Thereafter, the process returns to step S12, and the subsequent steps are repeatedly executed.
- the noise voltage generation circuit 11 generates an analog voltage corresponding to the voltage setting value Dba, which is data written in the internal voltage setting register 21, as the bias voltage Vba. To do.
- This bias voltage Vba is applied to one end of the first resistance element R1, and the center voltage Vc corresponding to the DC component of the counter voltage Vcom obtained at the output point Nout is as follows based on this bias voltage Vba. .
- Vc ⁇ R2 / (R1 + R2) ⁇ X Vba
- the control calculation unit 19 in the controller 200 The center voltage detection value Vd (this is calculated from the maximum value Vdmax and minimum value Vdmin of the output point Nout detected by the voltage detection circuit 17 is determined that the cardiac voltage set value Vst has been changed (Step SI 2).
- the maximum value that can be set if Vst> Vd The value Dmax is set as the voltage setting value Dba, and if Vst is Vd, the minimum setting value Dmin is written as the voltage setting value Dba in the voltage setting register 21 (steps S20 to S24). This is because the difference between the center voltage setting value Vst corresponding to the DC component that the counter voltage Vcom after switching should have and the detected value Vd of the DC component of the voltage actually obtained as the counter voltage Vcom at the output point Nout. This means that the voltage setting value Dba is determined so that it is turned off.
- the value of the center voltage Vc is changed to the center voltage setting value Vst.
- the maximum settable value Dmax or the minimum settable value Dmin is set according to the magnitude relationship between the center voltage setting value Vst and the center voltage detection value Vd so that the change in the bias voltage Vba It is written to the voltage setting register 21 as the value Dba.
- the common electrode drive unit 420 using the CC bias circuit is connected to the common voltage drive unit 420! /, And the counter voltage Vcom (the center voltage Vc).
- the change of the bias voltage Vba for switching The switching period and the bias activation period are shortened. For this reason, in a liquid crystal display device that is driven by opposed AC, the power consumption for driving the common electrode Ec is kept low, while switching of the opposed voltage Vcom (change of the center voltage Vc) and the rise of the bias voltage at the start of display. It is possible to suppress the deterioration of display quality due to the increase.
- the bias voltage value Dst corresponding to the center voltage setting value Vst becomes the voltage setting value. It is written to the voltage setting register 21 as Dba. That is, feedback control is performed on the center voltage Vc of the counter voltage Vcom. For this reason, it is not necessary to determine in advance how long the change of the bias voltage value Vba is to be transiently expanded in order to shorten the switching period or the like. If there is a practical problem between the center voltage setting value Vst and the center voltage detection value Vd, the bias voltage Vba is the difference between the center voltage Vc setting value Vst and the detection value Vd.
- the maximum outputable value (bias voltage value corresponding to the maximum settable value Dmax) or output is possible so that the difference is canceled out and the change of the bias voltage Vba for changing the center voltage Vc is expanded Minimum value (bias voltage value corresponding to the minimum value Dmin that can be set). For this reason, it is substantially unnecessary to determine how much the change in the bias voltage value Vba is to be temporarily expanded in order to shorten the switching period.
- the voltage when there is a practically problematic difference between the center voltage setting value Vst and the center voltage detection value Vd, the voltage is applied as in steps S20 to S24 above.
- Force that determines the set value Dba It is not limited to such a determination method.
- the voltage setting value Dba is set so that the change of the bias voltage Vba after switching with respect to the bias voltage Vba before switching of the counter voltage Vcom is adjusted according to the difference between the center voltage setting value Vst and the center voltage detection value Vd. You can decide ⁇ .
- the negative voltage generation circuit 11 that generates the bias voltage Vba in the common electrode driving units 410 and 420 is realized as the DZA conversion circuit 210 as shown in FIG. Force bias voltage generator circuit 11
- the configuration is not limited, and any configuration that can control the value of the noise voltage Vba may be used, and the configuration may be provided outside the controller 200.
- the force described by taking the liquid crystal panel in which the pixel electrode and the common electrode are formed on different substrates as an example.
- These electrode structures are not limited, for example.
- a pixel electrode and a common electrode may be formed on the same substrate as in the IPS (In Plane Switching) method.
- the liquid crystal display device of the line inversion driving method in which the polarity of the voltage applied to the liquid crystal is inverted for each horizontal scanning line has been described as an example.
- the present invention is not limited to this, and can be applied to other inversion drive type display devices in which opposed AC drive is performed.
- the present invention can be applied to an n-line inversion driving type liquid crystal display device (n ⁇ 2) or a frame inversion driving type liquid crystal display device in which the polar force of the voltage applied to the liquid crystal is inverted for each horizontal scanning line.
- the same technique as that of the present invention can be applied to a liquid crystal display device that does not perform opposed AC drive, that is, a liquid crystal display device that performs opposed DC drive.
- the coupling capacitor C1 in the configuration of FIG. 3 does not exist, but the connection point of the first resistance element R1 and the second resistance element R2, that is, the output point, is a liquid crystal panel as a capacitive load. A common electrode is connected.
- the present invention is applicable regardless of whether the liquid crystal panel is driven in a line-sequential manner.
- the present invention can be applied to a liquid crystal display device in which a plurality of data signal lines are driven in a time division manner within each horizontal period by providing a switching switch between the output terminal of the source driver and the source line of the liquid crystal panel.
- the present invention is also effective in shortening the noise activation period at the start of display. Therefore, the present invention can be applied to a liquid crystal display device having only a single optimum counter voltage. Industrial applicability
- the present invention provides a display device that displays an image by applying a voltage between a plurality of pixel electrodes and a common electrode facing the pixel electrode, and the value of the counter voltage to be applied to the common electrode is two in a predetermined cycle.
- This is applied to a so-called counter AC drive type display device that alternately switches between voltage values, and is suitable for a counter AC drive type liquid crystal display device in which the counter voltage is changed according to switching of the display mode or the like.
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Abstract
To reduce the power consumption in an opposed AC drive and suppress the degradation of the display quality caused by switching the opposed voltages or the like. In a common electrode driving part using a CC bias circuit to perform an opposed AC drive, if opposed voltages are to be switched such that the center voltage is varied from Vc1 to Vc2 (where Vc1 > Vc2), the bias voltage is varied such that the target value of the center voltage at a time point (t1) of starting the switching is a value Vc3 that is smaller than the value Vc2 as varied (where Vc2 > Vc3), and then the bias voltage is varied such that the target value of the center voltage is Vc2 at a predetermined later time point (t2). In this way, the bias voltage is controlled such that the variation of the bias voltage used for varying the center voltage (DC component) of the opposed voltage is transiently magnified, whereby the time period in which to switch the opposed voltages can be shortened. The present invention is suitable for a liquid crystal display apparatus of opposed AC driving system in which the opposed voltages are changed in accordance with the switching of the display modes or the like.
Description
明 細 書 Specification
表示装置の駆動回路および駆動方法 Display device drive circuit and drive method
技術分野 Technical field
[0001] 本発明は、複数の画素電極とそれに対向する共通電極との間に電圧を印加するこ とによって画像を表示する液晶表示装置等の表示装置に関するものであり、更に詳 しくは、共通電極に印加すべき対向電圧の値が所定周期で 2つの電圧値の間で交 互に切り替わりかつ対向電圧(の中心電圧)が表示モード等の変更に応じて変更さ れるように構成された表示装置の駆動回路に関する。 TECHNICAL FIELD [0001] The present invention relates to a display device such as a liquid crystal display device that displays an image by applying a voltage between a plurality of pixel electrodes and a common electrode opposed to the plurality of pixel electrodes. Display configured so that the value of the counter voltage to be applied to the electrode switches alternately between two voltage values in a predetermined cycle, and the counter voltage (the center voltage) is changed according to the change of the display mode, etc. The present invention relates to a driving circuit of the device.
背景技術 Background art
[0002] 現在、平面型表示装置として、薄膜トランジスタ(TFT: Thin Film Transistor)による アクティブマトリクス型液晶表示装置(以下「TFT— LCD装置」という)が広く使用され ている。 At present, as a flat display device, an active matrix liquid crystal display device (hereinafter referred to as “TFT-LCD device”) using a thin film transistor (TFT) is widely used.
[0003] TFT— LCD装置における液晶パネル(以下「TFT— LCDパネル」という)は、互い に対向する一対の基板 (以下「第 1および第 2の基板」 、う)を有して 、る。これらの 基板は、所定の距離だけ離されて固定されており、液晶材料がこれらの基板間に充 填されて液晶層が形成されている。これらの基板のうち少なくとも一方は透明であり、 透過型表示を行う場合には、両基板は共に透明であることが必要である。 TFT-LC D装置において、第 1の基板上には互いに平行する複数の走査信号線と、走査信号 線に対して直交するように交差する複数のデータ信号線とが設けられて!/、る。走査信 号線とデータ信号線との各交差部には、画素電極と、当該画素電極をデータ信号線 に電気的に接続するためのスイッチング素子である画素 TFTとが設けられている。こ の画素 TFTのゲート端子は走査信号線に接続され、ソース端子はデータ信号線に 接続され、ドレイン端子は上記画素電極に接続されて 、る。 A liquid crystal panel (hereinafter referred to as “TFT—LCD panel”) in a TFT-LCD device has a pair of substrates (hereinafter referred to as “first and second substrates”) facing each other. These substrates are fixed by being separated by a predetermined distance, and a liquid crystal material is filled between these substrates to form a liquid crystal layer. At least one of these substrates is transparent, and when performing transmissive display, both substrates must be transparent. In the TFT-LCD device, a plurality of scanning signal lines parallel to each other and a plurality of data signal lines intersecting at right angles to the scanning signal lines are provided on the first substrate! / At each intersection of the scanning signal line and the data signal line, a pixel electrode and a pixel TFT which is a switching element for electrically connecting the pixel electrode to the data signal line are provided. The gate terminal of the pixel TFT is connected to the scanning signal line, the source terminal is connected to the data signal line, and the drain terminal is connected to the pixel electrode.
[0004] 上記第 1の基板に対向する第 2の基板上には、全面に対向電極としての共通電極 が設けられている。この共通電極には共通電極駆動部により適切な電圧が与えられ る。従って、液晶層には画素電極と共通電極との電位差に相当する電圧が印加され る。この印加電圧によって液晶層の光透過率を制御することができるので、データ信
号線力 各画素電極に適切な電圧が印加されることにより所望の画素表示を行うこと ができる。 [0004] On the second substrate facing the first substrate, a common electrode as a counter electrode is provided on the entire surface. An appropriate voltage is applied to the common electrode by the common electrode driving unit. Therefore, a voltage corresponding to the potential difference between the pixel electrode and the common electrode is applied to the liquid crystal layer. Since the light transmittance of the liquid crystal layer can be controlled by this applied voltage, the data signal is transmitted. Line force A desired pixel display can be performed by applying an appropriate voltage to each pixel electrode.
[0005] 液晶表示装置では、液晶材料の劣化を防止するために液晶への印加電圧が交流 化されるように液晶パネルを駆動する必要がある。 TFT— LCDパネル等の液晶パネ ルの交流駆動の方法として、フリツ力等による表示品位の低下防止のために液晶へ の印加電圧の極性を 1フレーム期間毎に反転させることにカ卩えて各フレームにおいて 1または所定数の走査線毎に当該極性を反転させる駆動方式すなわちライン反転駆 動と呼ばれる駆動方式が知られて 、る。 In a liquid crystal display device, it is necessary to drive the liquid crystal panel so that the voltage applied to the liquid crystal is AC in order to prevent deterioration of the liquid crystal material. TFT— As a method of alternating current drive for liquid crystal panels such as LCD panels, the polarity of the voltage applied to the liquid crystal is reversed every frame period in order to prevent deterioration of display quality due to flickering force, etc. There is known a driving method called a line inversion driving method in which the polarity is inverted every one or a predetermined number of scanning lines.
[0006] ライン反転駆動方式の液晶表示装置では、データ信号線の電圧の振幅を抑えるた めに上記交流化駆動に応じて共通電極の電位すなわち対向電圧の値を変化させる 、う手法 (以下「対向 AC駆動方式」 、う)が使用されるのが一般的である。各フレ ームにおいて 1水平走査線毎に液晶への印加電圧の極性を反転させるライン反転駆 動方式の液晶表示装置では、各データ信号線に印加されるデータ信号の極性 (対 向電圧を基準とする電圧極性)が 1水平期間毎に反転し、対向 AC駆動を行うために 、各データ信号の極性反転に連動して対向電圧の値が所定の高電圧値と低電圧値 の間で 1水平期間毎に切り替えられる。 In the liquid crystal display device of the line inversion driving method, in order to suppress the amplitude of the voltage of the data signal line, the potential of the common electrode, that is, the value of the counter voltage is changed according to the AC driving (hereinafter referred to as “ It is common to use the “opposite AC drive system”. In a line inversion drive type liquid crystal display device that inverts the polarity of the voltage applied to the liquid crystal for each horizontal scanning line in each frame, the polarity of the data signal applied to each data signal line (based on the relative voltage) In order to perform opposite AC drive every 1 horizontal period, the opposite voltage value is 1 between a predetermined high voltage value and low voltage value in conjunction with the polarity inversion of each data signal. It is switched every horizontal period.
[0007] ところで、液晶表示装置によっては、最適な対向電圧が複数種類存在し、共通電 極に与えるべき対向電圧をそれら複数種類の最適対向電圧の間での切り替えること が必要となる場合がある。例えば下記の特許文献 1 (日本の特開 2004— 206089号 公報)に記載されているように、複数の反射領域と複数の透過領域とを有する液晶表 示装置では、液晶への印加電圧が同一であっても透過領域と反射領域とで表示に おける彩度が異なる。このような問題に対処するために、例えば透過表示と反射表示 の双方が可能な液晶表示装置の場合、反射表示のときと透過表示のときとで対向電 圧を変更することが必要となる。具体的には、図 13に示すように、或る動作モード (例 えば反射表示のモード)では、予め決められた第 1の高電圧値 VHilと第 1の低電圧 値 VLolとの間で値が 1水平期間毎に切り替わる第 1タイプの対向電圧 Vcomlを最 適な対向電圧として共通電極に与え、別の動作モード (例えば透過表示のモード)で は、予め決められた第 2の高電圧値 VHi2と第 2の低電圧値 VLo2との間で値が 1水
平期間毎に切り替わる第 2タイプの対向電圧 Vcom2を最適な対向電圧として共通電 極に与えることが必要となる。なお、通常、第 1タイプの対向電圧 Vcomlの振幅 (第 1 の高電圧と第 1の低電圧との差 VHil -VLol)と第 2タイプの対向電圧 Vcom2の振 幅(第 2の高電圧と第 2の低電圧との差 VHi2— VLo2)とは同一としてよいので、対 向電圧の直流成分に相当する中心電圧を変更することにより、対向電圧が第 1タイプ の対向電圧 Vcomlと第 2タイプの対向電圧 Vcom2との間で切り替えられる。 [0007] By the way, depending on the liquid crystal display device, there are a plurality of types of optimal counter voltages, and it may be necessary to switch the counter voltages to be applied to the common electrode between the plurality of types of optimal counter voltages. . For example, as described in the following Patent Document 1 (Japanese Unexamined Patent Publication No. 2004-206089), in a liquid crystal display device having a plurality of reflective regions and a plurality of transmissive regions, the voltage applied to the liquid crystal is the same. Even so, the saturation in the display differs between the transmissive region and the reflective region. In order to cope with such a problem, for example, in the case of a liquid crystal display device capable of both transmissive display and reflective display, it is necessary to change the counter voltage between the reflective display and the transmissive display. Specifically, as shown in FIG. 13, in a certain operation mode (eg, reflective display mode), a value between a predetermined first high voltage value VHil and a first low voltage value VLol is obtained. Is applied to the common electrode as the optimum counter voltage, which is switched every horizontal period.In another operation mode (e.g., transmissive display mode), the predetermined second high voltage value is applied. 1 value between VHi2 and second low voltage value VLo2 It is necessary to apply the second type of counter voltage Vcom2, which switches every flat period, to the common electrode as the optimal counter voltage. Normally, the amplitude of the first type counter voltage Vcoml (difference between the first high voltage and the first low voltage VHil -VLol) and the amplitude of the second type counter voltage Vcom2 (second high voltage and The difference from the second low voltage (VHi2-VLo2) can be the same, so by changing the center voltage corresponding to the DC component of the counter voltage, the counter voltage becomes the first type counter voltage Vcoml and the second type. Is switched between the opposite voltage Vcom2.
[0008] 上記のように、共通電極に与えるべき対向電圧を複数種類の最適対向電圧の間で の切り替えるために、例えばオペアンプ (演算増幅器) 53と対向電圧波形発生回路 5 1を使用した図 14 (A)に示すような回路が使用されている。このようなオペアンプ 53 を使用した回路によれば、当該オペアンプ 53の非反転入力端子に与える矩形波電 圧 VCOMinを図 14 (B)において点線で示すように切り替えることにより、共通電極に 与えるべき最適な対向電圧 VCOMoutを変更することができる。 [0008] As described above, for example, an operational amplifier (operational amplifier) 53 and a counter voltage waveform generation circuit 51 are used in order to switch the counter voltage to be applied to the common electrode between a plurality of types of optimal counter voltages. A circuit as shown in (A) is used. According to such a circuit using the operational amplifier 53, the rectangular wave voltage VCOMin applied to the non-inverting input terminal of the operational amplifier 53 is switched as shown by the dotted line in FIG. Counter voltage VCOMout can be changed.
[0009] また、共通電極に与えるべき対向電圧を複数種類の最適対向電圧の間での切り替 えるために、バイアス電圧発生回路 61と、矩形波電圧発生回路 63と、結合コンデン サ C1と、第 1および第 2の抵抗素子 Rl, R2とを組み合わせて図 15 (A)に示すように 構成された回路(以下「CCバイアス回路」と 、う)も使用されて 、る。この CCバイアス 回路では、図 15 (B)に示すような矩形波電圧 Vppが結合コンデンサ C1を介して第 1 の抵抗素子 R1と第 2の抵抗素子との接続点 Noutに与えられるとともに、第 1の抵抗 素子 R1の一端にバイアス電圧発生回路 61からのバイアス電圧 Vbaが与えられ、上 記接続点 Noutの電圧が対向電圧 VCOMoutとして出力される。このような CCバイ ァス回路では、図 15 (C)において 1点鎖線で示すように対向電圧の中心電圧 Vc (直 流成分に相当)が変化するようにバイアス電圧 Vbaを変更することにより、共通電極 に与えるべき最適な対向電圧を切り替えることができる。 [0009] In addition, in order to switch the counter voltage to be applied to the common electrode between a plurality of types of optimum counter voltages, a bias voltage generation circuit 61, a rectangular wave voltage generation circuit 63, a coupling capacitor C1, A circuit (hereinafter referred to as “CC bias circuit”) configured by combining the first and second resistance elements Rl and R2 as shown in FIG. 15A is also used. In this CC bias circuit, a rectangular wave voltage Vpp as shown in FIG. 15 (B) is applied to the connection point Nout between the first resistance element R1 and the second resistance element via the coupling capacitor C1, and the first The bias voltage Vba from the bias voltage generating circuit 61 is applied to one end of the resistance element R1, and the voltage at the connection point Nout is output as the counter voltage VCOMout. In such a CC bias circuit, by changing the bias voltage Vba so that the center voltage Vc (corresponding to the direct current component) of the counter voltage changes as shown by the one-dot chain line in FIG. The optimum counter voltage to be applied to the common electrode can be switched.
特許文献 1 :日本の特開 2005— 3962号公報 Patent Document 1: Japanese Unexamined Patent Publication No. 2005-3962
特許文献 2 :日本の特開平 10— 268258号公報 Patent Document 2: Japanese Unexamined Patent Publication No. 10-268258
特許文献 3 :日本の特開平 10— 214066号公報 Patent Document 3: Japanese Patent Laid-Open No. 10-214066
発明の開示 Disclosure of the invention
発明が解決しょうとする課題
[0010] 上記のように、共通電極に与えるべき対向電圧を複数種類の最適対向電圧の間で の切り替える場合、最適対向電圧の切替が開始されてから当該切替が完了するまで の間(以下「切替期間」 t ヽぅ)は、共通電極に与えられて!/ヽる対向電圧は最適なもの ではない。したがって、この切替期間が長いとフリツ力の発生等によって表示品位が 低下する。 Problems to be solved by the invention [0010] As described above, when the counter voltage to be applied to the common electrode is switched between a plurality of types of optimum counter voltages, the period from the start of the switching of the optimum counter voltage to the completion of the switching (hereinafter referred to as " The switching period “t ヽ ぅ) is given to the common electrode! / The opposing voltage is not optimal. Therefore, if this switching period is long, the display quality is degraded due to the generation of flick force and the like.
[0011] これに対し、オペアンプを使用した図 14 (A)に示すような回路を使用した場合には 、共通電極に与えるべき最適な対向電圧はオペアンプ力 直接に出力されるので、 上記の切替期間はほとんど無視できる程度であり、最適対向電圧の切替に伴う表示 品位の低下は問題とはならない。しかし、図 14 (A)に示した回路は、オペアンプの動 作電流による消費電力が大きぐ低消費電力化に対する要求が強い携帯情報機器 等で使用される液晶表示装置には適さない。 On the other hand, when a circuit such as that shown in FIG. 14A using an operational amplifier is used, the optimum counter voltage to be applied to the common electrode is directly output from the operational amplifier force. The period is almost negligible, and the deterioration of display quality due to switching of the optimum counter voltage is not a problem. However, the circuit shown in FIG. 14 (A) is not suitable for a liquid crystal display device used in portable information devices, etc., where the power consumption due to the operational current of the operational amplifier is large and there is a strong demand for low power consumption.
[0012] 一方、図 15 (A)に示した CCバイアス回路を使用した場合には、バイアス電圧 Vba の与えられる抵抗素子 Rl, R2の抵抗値が大きぐ消費電力は小さくなる。しかし、上 記の切替期間が結合コンデンサ C 1の容量値と上記抵抗素子 Rl , R2の抵抗値との 積によって決まり、従来の CCバイアス回路は例えば 0. 5秒程度の切替期間を必要と していた(図 15 (C)における点線の円内参照)。したがって、この間は、最適でない 対向電圧が共通電極に与えられることになり、切替期間における表示品位の低下が 視認されてしまうという問題があった。 On the other hand, when the CC bias circuit shown in FIG. 15A is used, the resistance value of the resistance elements Rl and R2 to which the bias voltage Vba is applied is large and the power consumption is small. However, the above switching period is determined by the product of the capacitance value of the coupling capacitor C1 and the resistance values of the resistance elements Rl and R2, and the conventional CC bias circuit requires a switching period of about 0.5 seconds, for example. (Refer to the dotted circle in Fig. 15 (C)). Therefore, during this time, a non-optimal counter voltage is applied to the common electrode, and there is a problem that the deterioration of display quality during the switching period is visually recognized.
[0013] そこで本発明は、対向 AC駆動における消費電力を低く抑えつつ対向電圧の切替 等のためのバイアス電圧の変更に伴う表示品位の低下を抑制できる表示装置の駆 動回路および駆動方法を提供することを目的とする。 [0013] Therefore, the present invention provides a drive circuit and a drive method for a display device that can suppress a decrease in display quality due to a change in bias voltage for switching the opposite voltage while keeping power consumption in the opposed AC drive low. The purpose is to do.
課題を解決するための手段 Means for solving the problem
[0014] 本発明の第 1の局面は、表示すべき画像を構成する単位画像にそれぞれ対応する 複数の個別電極と当該複数の個別電極に対向するように設けられた共通電極との間 に前記画像に応じて電圧を印加することにより前記画像を表示する表示装置の駆動 回路であって、 [0014] In a first aspect of the present invention, the plurality of individual electrodes respectively corresponding to the unit images constituting the image to be displayed and the common electrode provided to face the plurality of individual electrodes. A driving circuit of a display device that displays the image by applying a voltage according to the image,
前記画像に応じた電圧を前記複数の個別電極に与える個別電極駆動部と、 前記共通電極に与えるべき対向電圧を出力し、当該対向電圧の値を所定の高電
圧値と所定の低電圧値との間で所定周期で交互に切り替える共通電極駆動部とを 備え、 An individual electrode driver that applies a voltage corresponding to the image to the plurality of individual electrodes; and outputs a counter voltage to be applied to the common electrode, and sets the value of the counter voltage to a predetermined high voltage A common electrode driver that alternately switches between a pressure value and a predetermined low voltage value at a predetermined cycle,
前記共通電極駆動部は、 The common electrode driving unit includes:
互いに直列に接続された 2つの抵抗素子を含む抵抗列と、 A resistor string including two resistive elements connected in series with each other;
前記抵抗列の両端間に直流電圧を与える直流電圧発生回路と、 A DC voltage generating circuit for applying a DC voltage between both ends of the resistor string;
所定のコンデンサと、 With a given capacitor,
前記コンデンサを介して前記 2つの抵抗素子の間の接続点に接続され、前記対 向電圧の波形に対応する矩形波電圧を出力する矩形波電圧発生回路と、 A rectangular wave voltage generating circuit connected to a connection point between the two resistance elements via the capacitor and outputting a rectangular wave voltage corresponding to the waveform of the counter voltage;
前記直流電圧の値を変化させることにより前記接続点の電圧の直流成分を変更 するバイアス制御部とを含み、 A bias control unit that changes a DC component of the voltage at the connection point by changing a value of the DC voltage,
前記共通電極駆動部は、前記接続点の電圧を前記対向電圧として前記共通電極 に与え、 The common electrode driving unit applies the voltage at the connection point to the common electrode as the counter voltage;
前記バイアス制御部は、前記対向電圧の直流成分を変更するときに、前記直流電 圧の値を当該直流成分の変更に必要な変化よりも過渡的に大きく変化させることを 特徴とする。 The bias control unit is characterized in that when changing the DC component of the counter voltage, the value of the DC voltage is changed transiently larger than the change necessary for changing the DC component.
[0015] 本発明の第 2の局面は、本発明の第 1の局面において、 [0015] A second aspect of the present invention is the first aspect of the present invention,
前記バイアス制御部は、前記対向電圧の直流成分を変更するときに、当該直流成 分の変更直後の所定期間だけ、前記直流電圧の値を当該直流成分の変更に必要 な変化よりも大きく変化させることを特徴とする。 When changing the DC component of the counter voltage, the bias control unit changes the value of the DC voltage to be larger than the change necessary for changing the DC component for a predetermined period immediately after the change of the DC component. It is characterized by that.
[0016] 本発明の第 3の局面は、本発明の第 1の局面において、 [0016] A third aspect of the present invention is the first aspect of the present invention,
前記バイアス制御部は、前記表示装置での表示開始時に、前記直流電圧の値を、 前記表示装置での表示のために前記対向電圧が有すべき直流成分を前記接続点 の電圧に持たせるのに必要な変化よりも過渡的に大きく変化させることを特徴とする The bias control unit causes the value of the DC voltage to be included in the voltage at the connection point when the display device starts the display, and the DC voltage that the counter voltage should have for display on the display device. It is characterized by a change that is transiently larger than the change required for
[0017] 本発明の第 4の局面は、本発明の第 1の局面において、 [0017] A fourth aspect of the present invention is the first aspect of the present invention,
前記接続点の電圧を検出する電圧検出器を更に備え、 A voltage detector for detecting a voltage at the connection point;
前記バイアス制御部は、前記対向電圧の直流成分の変更後の値として予め決めら れた設定値と、前記電圧検出器の検出結果に基づき決定される前記接続点の電圧
の直流成分の値である検出値との差が打ち消されるように、前記直流電圧の値を決 定することを特徴とする。 The bias controller is configured to determine a voltage value at the connection point determined based on a set value determined in advance as a value after the change of the direct current component of the counter voltage and a detection result of the voltage detector. The value of the DC voltage is determined so that the difference from the detected value, which is the value of the DC component, is canceled out.
[0018] 本発明の第 5の局面は、本発明の第 4の局面において、 [0018] According to a fifth aspect of the present invention, in a fourth aspect of the present invention,
前記バイアス制御部は、 The bias control unit includes:
前記差が所定の許容値よりも大きくかつ前記設定値が前記検出値よりも大きい場 合には、予め決められた最大値を前記直流電圧の値として決定し、 When the difference is larger than a predetermined allowable value and the set value is larger than the detected value, a predetermined maximum value is determined as the value of the DC voltage;
前記差が前記許容値よりも大きくかつ前記設定値が前記検出値よりも小さい場合 には、予め決められた最小値を前記直流電圧の値として決定し、 When the difference is larger than the allowable value and the set value is smaller than the detected value, a predetermined minimum value is determined as the value of the DC voltage,
前記差が前記許容値以下である場合には、前記設定値を前記直流電圧の値とし て決定することを特徴とする。 When the difference is less than or equal to the allowable value, the set value is determined as the value of the DC voltage.
[0019] 本発明の第 6の局面は、表示すべき画像を構成する単位画像にそれぞれ対応する 複数の個別電極と当該複数の個別電極に対向するように設けられた共通電極との間 に前記画像に応じて電圧を印加することにより前記画像を表示する表示装置の駆動 回路であって、 [0019] In a sixth aspect of the present invention, a plurality of individual electrodes respectively corresponding to unit images constituting an image to be displayed are provided between the common electrode provided so as to face the plurality of individual electrodes. A driving circuit of a display device that displays the image by applying a voltage according to the image,
前記画像に応じた電圧を前記複数の個別電極に与える個別電極駆動部と、 前記共通電極に与えるべき対向電圧を出力し、当該対向電圧の値を所定の高電 圧値と所定の低電圧値との間で所定周期で交互に切り替える共通電極駆動部とを 備え、 An individual electrode driving unit that applies a voltage according to the image to the plurality of individual electrodes, and outputs a counter voltage to be applied to the common electrode, and the value of the counter voltage is set to a predetermined high voltage value and a predetermined low voltage value. A common electrode driving unit that alternately switches between and with a predetermined cycle,
前記共通電極駆動部は、 The common electrode driving unit includes:
互いに直列に接続された 2つの抵抗素子を含む抵抗列の両端間に直流電圧を 与え、 A DC voltage is applied across the resistor string including two resistance elements connected in series with each other,
所定のコンデンサを介して前記 2つの抵抗素子の間の接続点に前記対向電圧の 波形に対応する矩形波電圧を与え、 A rectangular wave voltage corresponding to the waveform of the counter voltage is applied to a connection point between the two resistance elements through a predetermined capacitor,
前記接続点の電圧を前記対向電圧として前記共通電極に与え、 Applying the voltage at the connection point to the common electrode as the counter voltage;
前記対向電圧の直流成分を変更するときには、前記直流電圧の値を当該直流成 分の変更に必要な変化よりも過渡的に大きく変化させることを特徴とする。 When changing the DC component of the counter voltage, the value of the DC voltage is changed transiently to be larger than the change necessary for changing the DC component.
[0020] 本発明の第 7の局面は、表示装置であって、 [0020] A seventh aspect of the present invention is a display device,
本発明の第 1から 6の局面のいずれかの局面に係る駆動回路を備えたことを特徴と
する。 A drive circuit according to any one of the first to sixth aspects of the present invention is provided. To do.
[0021] 本発明の第 8の局面は、表示すべき画像を構成する単位画像にそれぞれ対応する 複数の個別電極と当該複数の個別電極に対向するように設けられた共通電極との間 に前記画像に応じて電圧を印加することにより前記画像を表示する表示装置の駆動 方法であって、 [0021] In an eighth aspect of the present invention, the plurality of individual electrodes respectively corresponding to the unit images constituting the image to be displayed and the common electrode provided so as to face the plurality of individual electrodes. A method of driving a display device that displays the image by applying a voltage according to the image,
前記画像に応じた電圧を前記複数の個別電極に与える個別電極駆動ステップと、 前記共通電極に与えるべき対向電圧を出力し、当該対向電圧の値を所定の高電 圧値と所定の低電圧値との間で所定周期で交互に切り替える共通電極駆動ステップ とを備え、 An individual electrode driving step for applying a voltage corresponding to the image to the plurality of individual electrodes; and a counter voltage to be applied to the common electrode is output, and the value of the counter voltage is set to a predetermined high voltage value and a predetermined low voltage value. A common electrode driving step that alternately switches between and with a predetermined cycle,
前記共通電極駆動ステップは、 The common electrode driving step includes:
互いに直列に接続された 2つの抵抗素子を含む抵抗列の両端間に直流電圧を 与える直流電圧印加ステップと、 A DC voltage applying step for applying a DC voltage between both ends of a resistor string including two resistance elements connected in series;
所定のコンデンサを介して前記 2つの抵抗素子の間の接続点に前記対向電圧の 波形に対応する矩形波電圧を与える矩形波電圧印加ステップと、 A rectangular wave voltage applying step of applying a rectangular wave voltage corresponding to the waveform of the counter voltage to a connection point between the two resistance elements via a predetermined capacitor;
前記接続点の電圧を前記対向電圧として前記共通電極に与える出力ステップと、 前記対向電圧の直流成分を変更するときには、前記直流電圧の値を当該直流成 分の変更に必要な変化よりも過渡的に大きく変化させるバイアス制御ステップとを備 えることを特徴とする。 An output step of applying the voltage at the connection point to the common electrode as the counter voltage, and when changing the DC component of the counter voltage, the value of the DC voltage is more transient than the change necessary for the change of the DC component. And a bias control step that changes greatly.
[0022] 本発明の第 9の局面は、本発明の第 8の局面において、 [0022] A ninth aspect of the present invention is the eighth aspect of the present invention,
前記バイアス制御部ステップでは、前記表示装置での表示開始時に、前記直流電 圧が、前記表示装置での表示のために前記対向電圧が有すべき直流成分を前記接 続点の電圧に持たせるのに必要な変化よりも過渡的に大きく変化することを特徴とす る。 In the bias control unit step, at the start of display on the display device, the DC voltage causes the voltage at the connection point to have a DC component that the counter voltage should have for display on the display device. It is characterized by a change that is transiently larger than the change required for this.
[0023] 本発明の第 10の局面は、本発明の第 8の局面において、 [0023] A tenth aspect of the present invention is the eighth aspect of the present invention,
前記接続点の電圧を検出する検出ステップを更に備え、 A detection step of detecting a voltage at the connection point;
前記バイアス制御ステップでは、前記対向電圧の直流成分の変更後の値として予 め決められた設定値と、前記検出ステップでの検出結果に基づき決定される前記接 続点の電圧の直流成分の値である検出値との差が打ち消されるように、前記直流電
圧の値が決定されることを特徴とする。 In the bias control step, a setting value predetermined as a value after the change of the DC component of the counter voltage and a value of the DC component of the voltage at the connection point determined based on the detection result in the detection step So that the difference from the detected value is cancelled. The pressure value is determined.
発明の効果 The invention's effect
[0024] 本発明の第 1の局面によれば、第 1および第 2の抵抗素子力 なる抵抗列とコンデ ンサを含む CCバイアス回路を使用した共通電極駆動部において、対向電圧の直流 成分を変更するときに、上記抵抗列に与えられる直流電圧の値が当該直流成分の 変更に必要な変化よりも過渡的に大きく変化する。これにより、対向電圧の切替期間 やバイアス起動期間が従来に比べて短縮されるので、対向 AC駆動を行う液晶表示 装置等において、共通電極の駆動のための消費電力を低く抑えつつ、対向電圧の 切替や表示開始時のバイアス起動に伴う表示品位の低下を抑制することができる。 [0024] According to the first aspect of the present invention, the DC component of the counter voltage is changed in the common electrode drive unit using the CC bias circuit including the resistor string having the first and second resistance element forces and the capacitor. When this occurs, the value of the DC voltage applied to the resistor string changes transiently larger than the change necessary to change the DC component. As a result, the counter voltage switching period and the bias start-up period are shortened compared to the conventional case. Therefore, in a liquid crystal display device or the like that performs counter AC drive, the power consumption for driving the common electrode is kept low while the counter voltage is reduced. It is possible to suppress deterioration in display quality associated with switching and bias activation at the start of display.
[0025] 本発明の第 2の局面によれば、対向電圧の直流成分を変更するときに、当該直流 成分の変更直後の所定期間だけ、共通電極駆動部としての CCバイアス回路を構成 する抵抗列に与えられる直流電圧の値が当該直流成分の変更に必要な変化よりも 大きく変化することで、対向電圧の切替期間等が従来に比べて短縮される。 [0025] According to the second aspect of the present invention, when the DC component of the counter voltage is changed, the resistor string constituting the CC bias circuit as the common electrode drive unit only for a predetermined period immediately after the change of the DC component. When the value of the DC voltage applied to is changed more greatly than the change necessary to change the DC component, the switching period of the counter voltage is shortened compared to the conventional case.
[0026] 本発明の第 3の局面によれば、共通電極駆動部としての CCバイアス回路を含む表 示装置での表示開始時に、第 1および第 2の抵抗素子からなる抵抗列に与えられる 直流電圧の値が、当該表示装置での表示のために対向電圧が有すべき直流成分を 得るのに必要な変化よりも過渡的に大きく変化する。これにより、表示開始時におけ るバイアス起動期間が従来に比べて短縮されるので、表示開始時におけるバイアス 電圧の立ち上げの際の表示品位の低下を抑制することができる。 [0026] According to the third aspect of the present invention, the direct current applied to the resistor string composed of the first and second resistance elements at the start of display on the display device including the CC bias circuit as the common electrode driving unit. The voltage value changes transiently larger than the change necessary to obtain the DC component that the counter voltage should have for display on the display device. As a result, the bias start-up period at the start of display is shortened compared to the conventional case, so that it is possible to suppress deterioration in display quality when the bias voltage is raised at the start of display.
[0027] 本発明の第 4の局面によれば、対向電圧の直流成分を変更するときに、共通電極 駆動部としての CCバイアス回路内の第 1および第 2の抵抗素子力もなる抵抗列に与 えられる直流電圧の値が、対向電圧の直流成分の変更に必要な変化よりも過渡的に 大きく変化することに加えて、当該直流成分の変更後の値として予め決められた設定 値と、電圧検出器の検出結果に基づき決定される第 1の抵抗素子と第 2の抵抗素子 との間の接続点の電圧の直流成分の値である検出値との差が打ち消されるように、 上記直流電圧の値が決定される。したがって、上記直流電圧の値の変化を過渡的に 大きくすべき期間を予め決めることなぐ対向電圧の切替期間やバイアス起動期間を 短縮することができる。
[0028] 本発明の第 5の局面によれば、対向電圧の直流成分の変更後の値として予め決め られた設定値と、電圧検出器の検出結果に基づき決定される第 1の抵抗素子と第 2 の抵抗素子との間の接続点の電圧の直流成分の値である検出値との差が許容値よ りも大きい場合に、第 1および第 2の抵抗素子力もなる抵抗列に与えられる直流電圧 の値は、予め決められた最大値または最小値となる。したがって、対向電圧の切替期 間やバイアス起動期間を短縮するために上記直流電圧の値を過渡的にどの程度大 きくするかを決定することが実質的に不要となる。 According to the fourth aspect of the present invention, when the DC component of the counter voltage is changed, the first and second resistance element forces in the CC bias circuit as the common electrode driving unit are also applied to the resistor string. In addition to the DC voltage value obtained being transiently larger than the change necessary for changing the DC component of the counter voltage, a set value that is predetermined as the changed value of the DC component and the voltage The DC voltage is adjusted so that the difference between the detected value, which is the DC component value of the voltage at the connection point between the first resistance element and the second resistance element, determined based on the detection result of the detector is canceled out. The value of is determined. Therefore, it is possible to shorten the counter voltage switching period and the bias start-up period without determining in advance the period in which the change in the value of the DC voltage is to be increased transiently. [0028] According to the fifth aspect of the present invention, the set value predetermined as the value after the change of the DC component of the counter voltage, the first resistance element determined based on the detection result of the voltage detector, When the difference between the detected value, which is the DC component value of the voltage at the connection point with the second resistance element, is larger than the allowable value, the first and second resistance element forces are also given to the resistance string. The value of the DC voltage is a predetermined maximum value or minimum value. Therefore, it is substantially unnecessary to determine how much the DC voltage value should be increased transiently in order to shorten the counter voltage switching period and the bias starting period.
図面の簡単な説明 Brief Description of Drawings
[0029] [図 1]本発明の第 1の実施形態に係る液晶表示装置の構成を示すブロック図である。 FIG. 1 is a block diagram showing a configuration of a liquid crystal display device according to a first embodiment of the present invention.
[図 2]上記第 1の実施形態における液晶パネルの等価回路を示す回路図である。 FIG. 2 is a circuit diagram showing an equivalent circuit of the liquid crystal panel in the first embodiment.
[図 3]上記第 1の実施形態における共通電極駆動部の構成を機能的に示すブロック 図である。 FIG. 3 is a block diagram functionally showing the configuration of a common electrode driving section in the first embodiment.
[図 4]上記第 1の実施形態における共通電極駆動部を構成するバイアス電圧発生回 路の構成例を示す回路図である。 FIG. 4 is a circuit diagram showing a configuration example of a bias voltage generating circuit constituting the common electrode driving unit in the first embodiment.
[図 5]上記第 1の実施形態における共通電極駆動部の動作を示す電圧波形図 (A, B )である。 FIG. 5 is a voltage waveform diagram (A, B) showing the operation of the common electrode driving section in the first embodiment.
[図 6]上記第 1の実施形態の効果を説明するための電圧波形図である。 FIG. 6 is a voltage waveform diagram for explaining the effect of the first embodiment.
[図 7]上記第 1の実施形態における共通電極駆動部のシミュレーションに使用した回 路モデルを示す回路図である。 FIG. 7 is a circuit diagram showing a circuit model used for the simulation of the common electrode driving unit in the first embodiment.
[図 8]上記シミュレーションにおいて可変電圧源力も第 1の抵抗素子の一端に与えら れるバイアス電圧の第 1例の変化を示す電圧波形図 (A)、および、当該バイアス電 圧の第 2例の変化を示す電圧波形図(B)である。 [FIG. 8] A voltage waveform diagram (A) showing the change of the first example of the bias voltage in which the variable voltage source force is also applied to one end of the first resistance element in the simulation, and the second example of the bias voltage. It is a voltage waveform diagram (B) showing a change.
[図 9]上記シミュレーションにおける第 1例および第 2例のバイアス電圧を示す波形図 (A)、当該第 1例のバイアス電圧が与えられたときに出力点に得られる対向電圧と当 該第 2例のバイアス電圧が与えられたときに出力点に得られる対向電圧とを概略的 に示す波形図(B)、および、当該対向電圧を詳細に示す波形図(C)である。 [FIG. 9] Waveform diagram showing the bias voltage of the first example and the second example in the simulation (A), the counter voltage obtained at the output point when the bias voltage of the first example is given, and the corresponding second voltage FIG. 4 is a waveform diagram (B) schematically showing a counter voltage obtained at an output point when an example bias voltage is applied, and a waveform diagram (C) showing the counter voltage in detail.
[図 10]上記第 1の実施形態における共通電極駆動部の表示開始時におけるバイアス 電圧の変化を示す波形図 (A)、従来の共通電極駆動部の表示開始時におけるバイ
ァス電圧の変化を示す波形図(B)、および、上記第 1の実施形態および従来の共通 電極駆動部の表示開始時におけるバイアス電圧の変化による対向電圧における高 電圧値の変化を示す波形図(C)である。 FIG. 10 is a waveform diagram showing a change in bias voltage at the start of display of the common electrode driver in the first embodiment (A). The waveform diagram (B) showing the change of the first voltage and the waveform diagram showing the change of the high voltage value in the counter voltage due to the change of the bias voltage at the start of the display of the first embodiment and the conventional common electrode drive unit (C).
圆 11]本発明の第 2の実施形態における共通電極駆動部の構成を機能的に示すブ ロック図である。 FIG. 11 is a block diagram functionally showing the configuration of the common electrode driving unit in the second embodiment of the present invention.
[図 12]上記第 2の実施形態における共通電極駆動部を構成する制御演算部の動作 を示すフローチャートである。 FIG. 12 is a flowchart showing an operation of a control calculation unit constituting the common electrode driving unit in the second embodiment.
圆 13]液晶表示装置における対向電圧の切替を説明するための電圧波形図である 13] A voltage waveform diagram for explaining switching of the counter voltage in the liquid crystal display device.
[図 14]液晶表示装置における共通電極駆動部の第 1の従来例の構成を示すブロック 図 (A)、および、当該第 1の従来例の動作を示す電圧波形図(B)である。 FIG. 14 is a block diagram (A) showing a configuration of a first conventional example of a common electrode driving unit in a liquid crystal display device, and a voltage waveform diagram (B) showing an operation of the first conventional example.
[図 15]液晶表示装置における共通電極駆動部の第 2の従来例の構成を示すブロック 図 (A)、および、当該第 2の従来例の動作を示す電圧波形図(B, C)である。 FIG. 15 is a block diagram (A) showing a configuration of a second conventional example of a common electrode driving unit in a liquid crystal display device, and voltage waveform diagrams (B, C) showing the operation of the second conventional example. .
符号の説明 Explanation of symbols
10 • · -TFT (スイッチング素子) 10 • · -TFT (switching element)
11 …バイアス電圧発生回路 11… Bias voltage generator
13 …矩形波電圧発生回路 13 ... Square wave voltage generator
15 • · 'バイアス電圧制御部 (バイアス制御部) 15 • · 'Bias voltage controller (bias controller)
17 …電圧検出回路 17… Voltage detection circuit
19 • · ·演算制御部 (バイアス制御部) 19 • · · Arithmetic control unit (bias control unit)
21 …電圧設定レジスタ 21… Voltage setting register
100 …液晶パネル 100 ... LCD panel
102 〜TFT基板 102-TFT substrate
104 …対向基板 104… Counter substrate
120 • "ソースドライバ (個別電極駆動部) 120 • "Source Driver (Individual Electrode Driver)
130 …ゲートドライバ (個別電極駆動部) 130… Gate driver (Individual electrode driver)
200 …コントローラ 200… Controller
210 —DZA変換回路
300 •••DCZDCコンバータ 210 —DZA conversion circuit 300 ••• DCZDC Converter
410, 420 …共通電極駆動部 410, 420… Common electrode drive
CI …結合コンデンサ CI… coupling capacitor
Rl …第 1の抵抗素子 Rl ... 1st resistance element
R2 …第 2の抵抗素子 R2 ... Second resistance element
Nout …出力点 Nout… Output point
Ec …共通電極 Ec ... Common electrode
Vcom …対向電圧 Vcom… Opposite voltage
VHi …対向電圧の各周期での最大値である高電圧値 VHi: High voltage value that is the maximum value in each cycle of the counter voltage
VLi …対向電圧の各周期での最小値である低電圧値 VLi: Low voltage value that is the minimum value in each cycle of the counter voltage
Va …対向電圧の振幅 Va ... Amplitude of counter voltage
Vc …(対向電圧の)中心電圧 Vc: Center voltage (opposite voltage)
Vt …中心電圧目標値 Vt ... Center voltage target value
Vba …ノィァス電圧 Vba… Noise voltage
Vpp …矩形波電圧 Vpp… rectangular wave voltage
発明を実施するための最良の形態 BEST MODE FOR CARRYING OUT THE INVENTION
[0031] 以下、添付図面を参照して本発明の実施形態について説明する。 Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings.
< 1.第 1の実施形態 > <1. First Embodiment>
< 1. 1 全体の構成および動作 > <1.1 Overall configuration and operation>
図 1は、本発明の第 1の実施形態に係る液晶表示装置の構成を示すブロック図で ある。この液晶表示装置は、ライン反転駆動方式が採用されかつ対向 AC駆動が行 われる TFT— LCD装置であり、液晶パネル 100と、その液晶パネル 100に搭載され たデータ信号線駆動回路としてのソースドライバ 120および走査信号線駆動回路とし てのゲートドライバ 130と、表示制御回路としてのコントローラ 200と、電源供給回路と しての DCZDCコンバータ 300と、共通電極駆動部の構成要素としての第 1の抵抗 素子 R1、第 2の抵抗素子 R2およびコンデンサ C1とを備えている。 FIG. 1 is a block diagram showing the configuration of the liquid crystal display device according to the first embodiment of the present invention. This liquid crystal display device is a TFT-LCD device that adopts a line inversion driving method and performs opposed AC driving, and includes a liquid crystal panel 100 and a source driver 120 as a data signal line driving circuit mounted on the liquid crystal panel 100. And a gate driver 130 as a scanning signal line drive circuit, a controller 200 as a display control circuit, a DCZDC converter 300 as a power supply circuit, and a first resistance element R1 as a component of the common electrode drive unit And a second resistance element R2 and a capacitor C1.
[0032] 本実施形態における液晶パネル 100は、液晶層を挟持する 1対の基板 102, 104 からなり、各基板の外表面には偏光板が貼り付けられている。この 1対の基板の一方
102は TFT基板と呼ばれ、 TFT基板 102では、ガラス等の絶縁性基板上に、データ 信号線としての複数のソースライン Lsと走査信号線としての複数のゲートライン Lgと が互いに交差するように格子状に形成され、当該複数のソースライン Lsと当該複数 のゲートライン Lgとの交差点にそれぞれ対応して複数の画素回路がマトリクス状に形 成されている(以下、このようにマトリクス状に形成された当該複数の画素回路を「画 素アレイ」といい、参照符号" 110"で示す)。各画素回路は、図 2に示すように、 TFT 基板 102に形成された個別電極としての画素電極と後述の対向電極 Ecとによって形 成される液晶容量力もなる画素容量 Cpと、スイッチング素子としての TFT10とを含ん でいる。この TFT10のゲート端子およびソース端子は、当該画素回路に対応する交 差点を通過するゲートライン Lgおよびソースライン Lsにそれぞれ接続され、この TFT 10のドレイン端子は上記画素電極に接続されて 、る。 [0032] The liquid crystal panel 100 according to the present embodiment includes a pair of substrates 102 and 104 that sandwich a liquid crystal layer, and a polarizing plate is attached to the outer surface of each substrate. One of this pair of substrates 102 is called a TFT substrate. In the TFT substrate 102, a plurality of source lines Ls as data signal lines and a plurality of gate lines Lg as scanning signal lines cross each other on an insulating substrate such as glass. A plurality of pixel circuits are formed in a matrix form corresponding to the intersections of the plurality of source lines Ls and the plurality of gate lines Lg (hereinafter, formed in a matrix form in this manner). The plurality of pixel circuits thus formed is referred to as a “pixel array” and denoted by reference numeral “110”). As shown in FIG. 2, each pixel circuit includes a pixel capacitor Cp having a liquid crystal capacitive force formed by a pixel electrode as an individual electrode formed on the TFT substrate 102 and a counter electrode Ec described later, and a switching element. Includes TFT10. The gate terminal and the source terminal of the TFT 10 are respectively connected to the gate line Lg and the source line Ls passing through the intersection corresponding to the pixel circuit, and the drain terminal of the TFT 10 is connected to the pixel electrode.
[0033] 一方、上記 1対の基板の他方の基板 104は対向基板と呼ばれ、ガラス等の透明な 絶縁性基板上に、全面にわたって対向電極としての共通電極 Ec、配向膜が順次積 層されている。そして、この対向基板 104と上記 TFT基板 102との間に周囲を封止さ れて狭持された液晶層が存在し、この液晶層と、それを挟むように配置されている各 画素電極と共通電極 Ecとによって上記の液晶容量が画素容量 Cpとして形成されて いる。なお通常、画素容量 Cpに確実に電圧を保持すベぐ液晶容量に並列に補助 容量が設けられるが、補助容量は本発明には直接に関係しないのでその説明およ び図示を省略する。 [0033] On the other hand, the other substrate 104 of the pair of substrates is called a counter substrate, and a common electrode Ec and an alignment film as a counter electrode are sequentially stacked over a transparent insulating substrate such as glass. ing. There is a liquid crystal layer sandwiched between the counter substrate 104 and the TFT substrate 102 so as to be sandwiched between the liquid crystal layer and each pixel electrode disposed so as to sandwich the liquid crystal layer. The liquid crystal capacitance is formed as the pixel capacitance Cp by the common electrode Ec. Usually, an auxiliary capacitor is provided in parallel with the liquid crystal capacitor that should surely hold the voltage in the pixel capacitor Cp. However, since the auxiliary capacitor is not directly related to the present invention, its description and illustration are omitted.
[0034] 上記のような液晶パネルにおいて、後述のように、対向電極としての共通電極 Ecに は、共通電極駆動部によって対向電圧 Vcomが与えられ、各画素電極には、表示す べき画像に応じた電圧がソースドライバ 120およびゲートドライバ 130によって与えら れる。その結果、各画素電極と共通電極 Ecとの間に挟持される液晶層には、それら の電極間の電位差に応じた電圧が印加される。これによつて液晶層の各部分の光学 的変調が行われることで画像表示が実現される。なお、ソースドライバ 120とゲートド ライバ 130とは、表示すべき画像を構成する単位画像に対応する個別電極としての 画素電極に当該画像に応じた電圧を与える駆動部すなわち個別電極駆動部を構成 する。
[0035] コントローラ 200は、外部の信号源 (不図示)力も与えられる画像信号および制御信 号に基づき、ソースドライバ 120を動作させるための駆動制御信号 (画素値に相当す る電圧を各画素電極に与えるための画像信号を含む) Ssdv、および、ゲートドライバ 130を動作させるための駆動制御信号 Sgdvを生成する。また、このコントローラ 200 は、共通電極 Ecを駆動するためのバイアス電圧 Vbaを出力するバイアス電圧発生回 路としての DZA変換回路 210を含んで 、る。 In the liquid crystal panel as described above, as will be described later, the common electrode Ec as the counter electrode is supplied with the counter voltage Vcom by the common electrode driving unit, and each pixel electrode has a voltage corresponding to the image to be displayed. The voltage is provided by the source driver 120 and the gate driver 130. As a result, a voltage corresponding to the potential difference between the electrodes is applied to the liquid crystal layer sandwiched between each pixel electrode and the common electrode Ec. Thus, image display is realized by optically modulating each part of the liquid crystal layer. The source driver 120 and the gate driver 130 constitute a drive unit that applies a voltage corresponding to the image to a pixel electrode as an individual electrode corresponding to a unit image constituting an image to be displayed, that is, an individual electrode drive unit. The controller 200 is a drive control signal (a voltage corresponding to a pixel value is applied to each pixel electrode) for operating the source driver 120 based on an image signal and a control signal to which an external signal source (not shown) is also applied. Ssdv) and a drive control signal Sgdv for operating the gate driver 130 are generated. The controller 200 also includes a DZA conversion circuit 210 as a bias voltage generation circuit that outputs a bias voltage Vba for driving the common electrode Ec.
[0036] DCZDCコンバータ 300は、コントローラ 200からの制御信号 Sigに基づき、他の電 源 (例えば当該液晶表示装置を含む携帯電話等の電子機器の電源 (不図示) )によ つて与えられる直流電圧から、コントローラ 200やソースドライバ 120等の電源電圧と しての直流電圧 V01を生成する。これに加えて、この DCZDCコンバータ 300は、共 通電極 Ecを駆動するための後述の矩形波電圧 Vppおよび基準電圧 V00を出力す る。 [0036] The DCZDC converter 300 is based on a control signal Sig from the controller 200 and is supplied by another power source (for example, a power source (not shown) of an electronic device such as a mobile phone including the liquid crystal display device). From this, a DC voltage V01 is generated as a power supply voltage for the controller 200, the source driver 120, and the like. In addition to this, the DCZDC converter 300 outputs a rectangular wave voltage Vpp and a reference voltage V00, which will be described later, for driving the common electrode Ec.
[0037] 上記コントローラ 200内の DZA変換回路 210から出力されるバイアス電圧 Vbaは、 第 1の抵抗素子 R1の一端に与えられ、第 1の抵抗素子 R1の他端は第 2の抵抗素子 R2の一端と接続されている。第 2の抵抗素子 R2の他端には、上記 DCZDCコンパ ータ 300から出力される基準電圧 V00が与えられ、これにより、第 2の抵抗素子 R2の 他端が接地されて、第 1および第 2の抵抗素子 Rl, R2からなる抵抗列の両端間に直 流電圧としてのバイアス電圧 Vbaが印加されることになる。また、第 1の抵抗素子 R1と 第 2の抵抗素子 R2との接続点 Noutにはコンデンサ C 1の一端が接続され、コンデン サ C1の他端には、上記 DCZDCコンバータ 300から出力される矩形波電圧 Vppが 与えられる。このようにして、第 1の抵抗素子 R1と第 2の抵抗素子 R2とは、ノ ィァス電 圧 Vbaを分圧するための抵抗列を構成し、コンデンサ C1は、矩形波電圧 Vppを当該 抵抗列内の接続点 Noutに与えるための結合コンデンサとして機能する。 [0037] The bias voltage Vba output from the DZA conversion circuit 210 in the controller 200 is applied to one end of the first resistance element R1, and the other end of the first resistance element R1 is connected to the second resistance element R2. Connected to one end. The other end of the second resistance element R2 is supplied with the reference voltage V00 output from the DCZDC comparator 300, whereby the other end of the second resistance element R2 is grounded, and the first and first resistance elements R2 are grounded. A bias voltage Vba as a direct current voltage is applied between both ends of the resistor string composed of the two resistance elements Rl and R2. In addition, one end of a capacitor C1 is connected to a connection point Nout between the first resistor element R1 and the second resistor element R2, and a rectangular wave output from the DCZDC converter 300 is connected to the other end of the capacitor C1. The voltage Vpp is given. Thus, the first resistor element R1 and the second resistor element R2 form a resistor string for dividing the noise voltage Vba, and the capacitor C1 generates a rectangular wave voltage Vpp within the resistor string. It functions as a coupling capacitor to give to the connection point Nout.
[0038] 上記コントローラ 200内の DZA変換回路 210と、上記 DCZDCコンバータ 300と、 第 1および第 2の抵抗素子 Rl, R2と、コンデンサ C1とは、共通電極駆動部を構成し 、第 1の抵抗素子 R1と第 2の抵抗素子 R2との接続点(以下「出力点」 t 、う) Noutの 電圧は、対向電圧 Vcomとして液晶パネル 100の共通電極 Ecに与えられる。 [0038] The DZA conversion circuit 210 in the controller 200, the DCZDC converter 300, the first and second resistance elements Rl and R2, and the capacitor C1 constitute a common electrode drive unit, and the first resistance The connection point between the element R1 and the second resistance element R2 (hereinafter referred to as “output point” t) is applied to the common electrode Ec of the liquid crystal panel 100 as the counter voltage Vcom.
[0039] ソースドライバ 120は、液晶パネル 100における各ソースライン Lsと接続されており
、液晶パネル 100で画像を表示するために各ソースライン Lsに印加すべきデータ信 号をコントローラ 200からの駆動制御信号 Ssdvに基づき生成する。また、ゲートドライ バ 130は、液晶パネル 100における各ゲートライン Lgと接続されており、各ゲートライ ン Lgに印加すべき走査信号を生成する。そしてゲートドライバ 130は、ソースドライバ 120から各ソースライン Lsに印加されるデータ信号を各画素形成部(の画素容量 Cp )に書き込むために、走査信号を各ゲートライン Lgに印加することにより画像表示の 各フレーム期間(各垂直走査期間)において液晶パネル 100におけるゲートライン Lg をほぼ 1水平期間ずつ順次選択する。なお、本実施形態では、ソースドライバ 120お よびゲートドライバ 130は TFT基板 102に実装されているが、この実装形態に限定さ れるものではなぐ例えばフレシキブル基板を介してソースドライバ 120等と TFT基板 102上の配線 (ソースライン等)とが接続される形態でもよい。また、ソースドライバ 12 0とゲートドライバ 130の双方または一方を画素回路とともにガラス基板に一体的に形 成したいわゆるドライバモノリシック型または部分的ドライバモノリシック型の液晶表示 装置であってもよい。 [0039] The source driver 120 is connected to each source line Ls in the liquid crystal panel 100. In order to display an image on the liquid crystal panel 100, a data signal to be applied to each source line Ls is generated based on the drive control signal Ssdv from the controller 200. The gate driver 130 is connected to each gate line Lg in the liquid crystal panel 100, and generates a scanning signal to be applied to each gate line Lg. The gate driver 130 displays an image by applying a scanning signal to each gate line Lg in order to write a data signal applied from the source driver 120 to each source line Ls to each pixel forming portion (pixel capacitance Cp). In each frame period (each vertical scanning period), the gate line Lg in the liquid crystal panel 100 is sequentially selected by approximately one horizontal period. In this embodiment, the source driver 120 and the gate driver 130 are mounted on the TFT substrate 102. However, the present invention is not limited to this mounting mode. For example, the source driver 120 and the TFT substrate 102 are connected via a flexible substrate. The upper wiring (source line or the like) may be connected. Further, a so-called driver monolithic liquid crystal display device or a partial driver monolithic liquid crystal display device in which one or both of the source driver 120 and the gate driver 130 are integrally formed with a pixel circuit on a glass substrate may be used.
[0040] 本実施形態では、既述のようにライン反転駆動方式が採用されて ヽるので、ソース ドライバ 120から各ソースライン Lsに印加されるデータ信号の極性(共通電極 Ecの電 位としての対向電圧 Vcomを基準とする電圧極性)は、 1水平期間毎に反転する。ま た、本実施形態では、対向 AC駆動を行うベぐ上記のように構成される共通電極駆 動部からの出力される対向電圧 Vcomの値は、上記データ信号の振幅が低減される ように上記データ信号の極性反転に連動して 1水平期間毎に所定の 2つの電圧値の 間で切り替わる(詳細は後述)。 In the present embodiment, since the line inversion driving method is adopted as described above, the polarity of the data signal applied to each source line Ls from the source driver 120 (as the potential of the common electrode Ec) The polarity of the counter voltage (Vcom) is reversed every horizontal period. Further, in the present embodiment, the value of the counter voltage Vcom output from the common electrode driving unit configured as described above that performs counter AC driving is set so that the amplitude of the data signal is reduced. Interlocking with the polarity inversion of the data signal, it switches between two predetermined voltage values every horizontal period (details will be described later).
[0041] < 1. 2 共通電極駆動部の構成および動作 > [0041] <1. 2 Configuration and operation of common electrode drive unit>
図 3は、本実施形態における共通電極駆動部の構成を機能的に示すブロック図で ある。本実施形態における共通電極駆動部 410は、機能的には、バイアス電圧発生 回路 11と、矩形波電圧発生回路 13と、バイアス電圧制御部 15と、既述のように接続 された第 1および第 2の抵抗素子 Rl, R2と、コンデンサ C1とからなり、 CCバイアス回 路として構成されている。なお以下では、記号" C1"はコンデンサ C1の容量値をも表 し、記号" R1"と" R2"は、それぞれ第 1および第 2の抵抗素子 Rl, R2の抵抗値をも
表すものとする。 FIG. 3 is a block diagram functionally showing the configuration of the common electrode driving unit in the present embodiment. Functionally, the common electrode drive unit 410 in the present embodiment functionally includes the bias voltage generation circuit 11, the rectangular wave voltage generation circuit 13, and the bias voltage control unit 15, which are connected as described above. It consists of two resistive elements Rl, R2 and a capacitor C1, and is configured as a CC bias circuit. In the following, the symbol “C1” also represents the capacitance value of the capacitor C1, and the symbols “R1” and “R2” respectively represent the resistance values of the first and second resistance elements Rl and R2. It shall represent.
[0042] ここで、バイアス電圧発生回路 11は、コントローラ 200内の既述の DZA変換回路 2 10として実現されている。図 4は、この DZA変換回路 210の構成例を示す回路図で ある。この構成例による DZA変換回路 210は、互いに直列に接続された 5個の抵抗 素子 Ral〜Ra5からなる抵抗列と、接地電圧と所定の基準電源の電圧 Vref (以下「 基準電圧 Vref」という)との間での選択が可能な切替スィッチ SW1〜SW4と、これら の切替スィッチ SW1〜SW4と上記抵抗列における各 2つの抵抗素子 Raj, Raj+1 (j = 1, 2, 3, 4)の間の接続点とをそれぞれ接続する抵抗素子 Rbl〜Rb4と、電圧設 定レジスタ 21と、電圧ホロヮ 23とを備えており、上記抵抗列の両端は接地され、抵抗 素子 Ra4と Ra5との接続点は、電圧ホロヮ 23を構成するオペアンプの非反転入力端 子に接続されている。そして、切替スィッチ SW1〜SW4は、電圧設定レジスタ 21に 書き込まれる電圧設定値としてのデータ Dbaによって制御される。この電圧設定レジ スタ 21へのデータ Dbaの書込はコントローラ 200の機能に基づ!/、て行われ、コント口 ーラ 200のうち電圧設定レジスタ 21へのデータ Dbaの書込を行う部分は、バイアス電 圧制御部 15を構成する。 Here, the bias voltage generation circuit 11 is realized as the above-described DZA conversion circuit 210 in the controller 200. FIG. 4 is a circuit diagram showing a configuration example of the DZA conversion circuit 210. The DZA conversion circuit 210 according to this configuration example includes a resistor string composed of five resistor elements Ral to Ra5 connected in series, a ground voltage and a voltage Vref of a predetermined reference power supply (hereinafter referred to as “reference voltage Vref”). Switching switches SW1 to SW4 that can be selected between these switching switches SW1 to SW4 and each of the two resistance elements Raj, Raj + 1 (j = 1, 2, 3, 4) The resistor elements Rbl to Rb4, the voltage setting register 21, and the voltage hollow 23 are connected to each other, and both ends of the resistor string are grounded, and the connection point between the resistor elements Ra4 and Ra5 is The voltage holo 23 is connected to the non-inverting input terminal of the operational amplifier. The switching switches SW1 to SW4 are controlled by data Dba as a voltage setting value written in the voltage setting register 21. The data Dba is written to the voltage setting register 21 based on the function of the controller 200. The part of the controller 200 that writes the data Dba to the voltage setting register 21 is The bias voltage control unit 15 is configured.
[0043] 上記のような構成によれば、コントローラ 200内で実現されるバイアス電圧制御部 1 5が電圧設定レジスタ 21にデータ Dba (電圧設定値)を書き込むと、それに応じた電 圧が電圧ホロヮ 23に入力され、その電圧力インピーダンス変換されてバイアス電圧 V baとして出力される。このようにして、電圧設定レジスタ 21にデジタル値としてのデー タ Dbaを書き込むことにより、そのデータ Dbaに相当するアナログ電圧をバイアス電 圧 Vbaとして出力することができる。 [0043] According to the above configuration, when the bias voltage control unit 15 realized in the controller 200 writes the data Dba (voltage setting value) to the voltage setting register 21, the voltage corresponding to the voltage setting register 21 is changed to the voltage hologram. It is input to 23, converted to voltage and impedance, and output as a bias voltage Vba. In this manner, by writing the data Dba as a digital value in the voltage setting register 21, an analog voltage corresponding to the data Dba can be output as the bias voltage Vba.
[0044] 矩形波電圧発生回路 13は、共通電極 Ecに与えるべき対向電圧 Vcomと振幅、周 期および位相が同一の矩形波電圧 Vppを発生する。本実施形態にぉ ヽて共通電極 Ecに与えるべき対向電圧 Vcomは、各ソースライン Lsに印加されるデータ信号の極 性反転に連動して所定の高電圧値と低電圧値との間で 1水平期間(1H)毎に値が切 り替わる電圧である。ここで、この高電圧値と低電圧値との差すなわち振幅を Vaとす ると、矩形波電圧 Vppは、図 5 (A)に示すような矩形波(デューティ比が 1Z2のパル ス波形)の電圧となる。このような矩形波電圧 Vppは、結合コンデンサ C1を介して出
力点(第 1の抵抗素子 Rlと第 2の抵抗素子 R2との接続点) Noutに与えられる。ここ で、結合コンデンサ C1の容量値と第 1および第 2の抵抗素子 Rl, R2の抵抗値とは、 それらによって決まる時定数 (C1 X R1 -R2/ (Rl +R2) )が矩形波電圧 Vppのパル ス幅 (パルス繰り返し周期の 1Z2)に相当する 1水平期間(1H)よりも十分に大きくな るように設定されている(図 7参照)。したがって、矩形波電圧 Vppは、結合コンデンサ C1によって直流成分を遮断された後に出力点 Noutに与えられ、当該出力点 Nout には、この矩形波電圧 Vppと振幅、位相、周期が同一であって直流成分すなわち中 心電圧 (矩形波の最大値と最小値との平均値)が変更された矩形波電圧が対向電圧 Vcomとして得られる。この対向電圧 Vcomの中心電圧 Vcは、バイアス電圧 Vbaと第 1および第 2の抵抗素子 R 1 , R2の抵抗値とに基づき次式により与えられる。 The rectangular wave voltage generation circuit 13 generates a rectangular wave voltage Vpp having the same amplitude, period and phase as the counter voltage Vcom to be applied to the common electrode Ec. In the present embodiment, the counter voltage Vcom to be applied to the common electrode Ec is 1 between a predetermined high voltage value and a low voltage value in conjunction with the polarity inversion of the data signal applied to each source line Ls. This is a voltage whose value changes every horizontal period (1H). Here, when the difference between the high voltage value and the low voltage value, that is, the amplitude is Va, the rectangular wave voltage Vpp is a rectangular wave (pulse waveform with a duty ratio of 1Z2) as shown in Fig. 5 (A). Voltage. Such a rectangular wave voltage Vpp is output via the coupling capacitor C1. Force point (connection point between the first resistance element Rl and the second resistance element R2) is given to Nout. Here, the capacitance value of the coupling capacitor C1 and the resistance values of the first and second resistance elements Rl and R2 are determined by the time constant (C1 X R1 -R2 / (Rl + R2)) is a rectangular wave voltage Vpp Is set to be sufficiently larger than one horizontal period (1H) corresponding to the pulse width (1Z2 of the pulse repetition period) (see Fig. 7). Therefore, the rectangular wave voltage Vpp is applied to the output point Nout after the DC component is cut off by the coupling capacitor C1, and the output point Nout has the same amplitude, phase, and cycle as the rectangular wave voltage Vpp. A rectangular wave voltage in which the component, that is, the center voltage (average value of the maximum value and the minimum value of the rectangular wave) is changed, is obtained as the counter voltage Vcom. The center voltage Vc of the counter voltage Vcom is given by the following equation based on the bias voltage Vba and the resistance values of the first and second resistance elements R 1 and R2.
Vc = {R2/ (R1 +R2) } X Vba Vc = {R2 / (R1 + R2)} X Vba
[0045] ところで、例えば反射表示と透過表示の双方が可能な液晶表示装置において反射 表示モード力 透過表示モードへと切り替える場合のように、対向電圧 Vcomを切り 替えることが必要になる場合がある。共通電極駆動部として本実施形態のように CC ノ ィァス回路が採用されている場合、ノ ィァス電圧 Vbaを変更することにより、直流成 分すなわち中心電圧 Vcの異なる対向電圧 Vcomに切り替えることができる。本実施 形態では、この場合、ノィァス電圧 Vbaの変化が中心電圧 Vcを切替後の値に変更 するのに必要な変化よりも過渡的に(一時的に)大きくなるように、バイアス電圧 Vba が制御される。すなわち、中心電圧 Vcを切替後の値に変更するためのノィァス電圧 Vbaの変化が過渡的に(一時的に)拡大されるようにバイアス電圧 Vbaが制御される Incidentally, for example, in a liquid crystal display device capable of both reflective display and transmissive display, it may be necessary to switch the counter voltage Vcom as in the case of switching to the reflective display mode force transmissive display mode. When a CC noise circuit is employed as the common electrode drive unit as in the present embodiment, it is possible to switch to a counter voltage Vcom having a different DC component, that is, a center voltage Vc, by changing the noise voltage Vba. In this embodiment, in this case, the bias voltage Vba is controlled so that the change in the noise voltage Vba becomes transiently (temporarily) larger than the change necessary to change the center voltage Vc to the value after switching. Is done. That is, the bias voltage Vba is controlled so that the change in the noise voltage Vba for changing the center voltage Vc to the value after switching is transiently (temporarily) expanded.
[0046] 例えば、中心電圧 Vcが第 1の中心電圧値 Vclから第 2の中心電圧値 Vc2へと変更 されるように対向電圧 Vcomを切り替える場合において、 Vcl >Vc2であるときには、 次式で与えられる中心電圧目標値 Vtが、図 5 (B)において 1点鎖線で示す如く変化 するように、バイアス電圧 Vbaが制御される。 [0046] For example, when the counter voltage Vcom is switched so that the center voltage Vc is changed from the first center voltage value Vcl to the second center voltage value Vc2, and Vcl> Vc2, The bias voltage Vba is controlled so that the center voltage target value Vt obtained changes as shown by the one-dot chain line in FIG.
Vt= {R2/ (Rl +R2) } X Vba …ひ) Vt = {R2 / (Rl + R2)} X Vba…
すなわち、以下のようにノ ィァス電圧 Vbaの値が変更される。 That is, the value of the noise voltage Vba is changed as follows.
[0047] まず、対向電圧 Vcomの切替開始時点 tlにおいて、変更後の中心電圧値である第
2の中心電圧値 Vc2よりも小さい第 3の中心電圧値 Vc3に向かって中心電圧 Vcが変 化するように、バイアス電圧 Vbaが変更される。すなわち、上記式(1)より、バイアス電 圧 Vbaは First, at the switching start time tl of the counter voltage Vcom, the center voltage value after the change is The bias voltage Vba is changed so that the center voltage Vc changes toward the third center voltage value Vc3 smaller than the center voltage value Vc2 of 2. That is, from the above equation (1), the bias voltage Vba is
Vba3 = { (Rl +R2) /R2} X Vc3 · '· (2) Vba3 = {(Rl + R2) / R2} X Vc3 · '· (2)
に変更される。具体的には、バイアス電圧制御部 15が DZA変換回路 210における 電圧設定レジスタ 21に、上記式(2)で与えられるバイアス電圧 Vba3に相当する電圧 設定値 Dba3を書き込む。これは、中心電圧目標値 Vtが第 1の中心電圧値 Vclから 第 3の中心電圧値 Vc3に変更されることを意味する。 Changed to Specifically, the bias voltage control unit 15 writes the voltage setting value Dba3 corresponding to the bias voltage Vba3 given by the above equation (2) into the voltage setting register 21 in the DZA conversion circuit 210. This means that the center voltage target value Vt is changed from the first center voltage value Vcl to the third center voltage value Vc3.
[0048] その後、所定時間が経過した時点 t2において、中心電圧 Vcが第 2の中心電圧値 V c2に向力うようにバイアス電圧 Vbaが変更される。すなわち、ノィァス電圧制御部 15 力 DZA変換回路 210の電圧設定レジスタ 21に、次式で与えられるバイアス電圧 値 Vba2に相当する電圧設定値 Dba2を書き込む。これは、中心電圧目標値 Vtが第 3の中心電圧値 Vc3から第 2の中心電圧値 Vc2に変更されることを意味する。 [0048] After that, at a time point t2 when a predetermined time has elapsed, the bias voltage Vba is changed so that the center voltage Vc is directed to the second center voltage value Vc2. That is, the voltage setting value Dba2 corresponding to the bias voltage value Vba2 given by the following equation is written in the voltage setting register 21 of the noise voltage control unit 15 DZA conversion circuit 210. This means that the center voltage target value Vt is changed from the third center voltage value Vc3 to the second center voltage value Vc2.
Vba2= { (Rl +R2) /R2} X Vc2 · '· (3) Vba2 = {(Rl + R2) / R2} X Vc2 · '· (3)
[0049] 中心電圧 Vcを決定するバイアス電圧 Vbaを上記のように変更することにより、対向 電圧 Vcomは、図 5 (B)において実線で示すように変化する。すなわち、対向電圧 V comは、切替開始時点 tlよりも前の期間では、電圧値が第 1の高電圧値 VHilと第 1 の低電圧値 VLolとの間で 1水平期間(1H)毎に切り替わる矩形波電圧であり、時点 t2以降における当該時点 t2近傍の所定時点で、電圧値が第 2の高電圧値 VHi2と 第 2の低電圧値 VLo2との間で 1水平期間(1H)毎に切り替わる矩形波電圧となる。 ただし、 [0049] By changing the bias voltage Vba for determining the center voltage Vc as described above, the counter voltage Vcom changes as indicated by a solid line in FIG. That is, the counter voltage V com is switched every horizontal period (1H) between the first high voltage value VHil and the first low voltage value VLol in the period before the switching start time tl. It is a rectangular wave voltage, and the voltage value switches between the second high voltage value VHi2 and the second low voltage value VLo2 every horizontal period (1H) at a predetermined time near the time t2 after the time t2. It becomes a square wave voltage. However,
Va=VHil -VLol =VHi2-VLo2 · '· (4) Va = VHil -VLol = VHi2-VLo2 '(4)
Vcl = (VHil + VLol) /2 · '· (5) Vcl = (VHil + VLol) / 2 '' (5)
Vc2= (VHi2+VLo2) /2 · '· (6) Vc2 = (VHi2 + VLo2) / 2
である。 It is.
[0050] なお、説明の便宜上 (矩形波を見やすくするために)図 5 (Α)および図 5 (Β)では、 矩形波電圧 Vppおよび対向電圧 Vcomを示すパルス波形の周期(またはパルス幅) を実際よりも長くして示しており、実際の当該パルス波形の周期は切替期間に比べ極
めて短い期間である(図 9 (C)参照)。 [0050] For convenience of explanation (in order to make the rectangular wave easier to see), in Fig. 5 (Α) and Fig. 5 (Β), the period (or pulse width) of the pulse waveform indicating the rectangular wave voltage Vpp and the counter voltage Vcom is shown. The period of the actual pulse waveform is much longer than the switching period. This is a short period (see Figure 9 (C)).
[0051] 本実施形態では上記のようにして、対向電圧 Vcomを切り替えるための中心電圧目 標値 Vtの変化が過渡的に拡大されるように、すなわち、バイアス電圧 Vbaが対向電 圧 Vcomの直流成分としての中心電圧 Vcを変更するのに必要な変化よりも過渡的に 大きく変化するように(時点 tl力も t2までの期間だけバイアス電圧 Vbaの値が Vba3と なるように)、バイアス電圧 Vbaが制御される。これにより、対向電圧 Vcomの切替に 要する時間 (切替期間)を従来に比べて短縮することができる。以下、この点につき 図 6を参照して説明する。 In the present embodiment, as described above, the change of the center voltage target value Vt for switching the counter voltage Vcom is transiently expanded, that is, the bias voltage Vba is a direct current of the counter voltage Vcom. The bias voltage Vba is changed so that it changes transiently and larger than the change necessary to change the center voltage Vc as a component (the value of the bias voltage Vba is Vba3 only during the period up to t2). Be controlled. As a result, the time required for switching the counter voltage Vcom (switching period) can be shortened compared to the conventional case. This point will be described below with reference to FIG.
[0052] 図 6において 1点鎖線で示すように、バイアス電圧 Vbaが時点 tlで第 1のバイアス 電圧値 Vbal力 第 3のバイアス電圧値 Vba3 (式(2) )へと変化し、時点 t2で第 3の バイアス電圧値 Vba3から第 2のノ ィァス電圧値 Vba2 (式(3) )へと変化する(以下、 このようなバイアス電圧 Vbaの変化を「Vbal→Vba3→Vba2」と表記する)。ノ ィァス 電圧 Vbaの値がこのように Vbal→Vba3→Vba2と変化すると、矩形波電圧としての 対向電圧 Vcomの各周期での最大値である高電圧値 VHiは、図 6において実線で 示すように変化する。すなわち、当該高電圧値 VHiは、時点 t2以降における当該時 点 t2近傍の時点 taにおいて、変更後の高電圧値 (第 2の高電圧値) VHi2に略等しく なり(変更後の高電圧値 VHi2に落ち着き)、切替期間の長さは Tl =ta— tlとなる。 これに対し、時点 tlでバイアス電圧 Vbaの値が第 1のノ ィァス電圧値 Vbalから第 2 のバイアス電圧値 Vba2へと変化する場合 (従来の場合)には、当該高電圧値 VHiは 、図 6において記号" VHi (Vbal→Vba2) "が付された点線で示されるように変化し、 時点 t2よりも相当程度の時間が経過した時点 tbにおいて、変更後の高電圧値 (第 2 の高電圧値) VH12に略等しくなり、切替期間の長さは T2 = tb 1となる (Tl < < T 2)。なお、図 6において記号" VHi(Vbal→Vba3) "が付された点線は、時点 tlでバ ィァス電圧 Vbaの値が第 1のバイアス電圧値 Vbalから第 3のバイアス電圧値 Vba3 へと変化し、その後も第 3のノィァス電圧値 Vba3が維持される場合の高電圧値を示 している。 [0052] As shown by the one-dot chain line in FIG. 6, the bias voltage Vba changes to the first bias voltage value Vbal force to the third bias voltage value Vba3 (formula (2)) at time tl, and at time t2. The third bias voltage value Vba3 changes to the second negative voltage value Vba2 (Equation (3)) (hereinafter, the change of the bias voltage Vba is expressed as “Vbal → Vba3 → Vba2”). When the value of the noise voltage Vba changes in this way from Vbal → Vba3 → Vba2, the high voltage value VHi that is the maximum value in each cycle of the counter voltage Vcom as a rectangular wave voltage is as shown by the solid line in FIG. Change. That is, the high voltage value VHi is substantially equal to the changed high voltage value (second high voltage value) VHi2 at the time ta in the vicinity of the time t2 after the time t2 (the changed high voltage value VHi2 The length of the switching period is Tl = ta-tl. In contrast, when the value of the bias voltage Vba is changed from the first Roh Iasu voltage value Vbal to the second bias voltage value V ba2 (the conventional case) at the time tl, the high voltage VHi, the In FIG. 6, it changes as indicated by the dotted line with the symbol “VHi (Vbal → Vba2)”, and at the time tb when a considerable amount of time has elapsed from the time t2, the changed high voltage value (second (High voltage value) VH12 is approximately equal, and the length of the switching period is T2 = tb 1 (Tl << T 2). In FIG. 6, the dotted line with the symbol “VHi (Vbal → Vba3)” indicates that the value of the bias voltage Vba changes from the first bias voltage value Vbal to the third bias voltage value Vba3 at time tl. After that, the high voltage value when the third noise voltage value Vba3 is maintained is shown.
[0053] このようにして本実施形態によれば、 CCバイアス回路を使用して共通電極 Ecを駆 動する場合において、対向電圧 Vcomの切替(直流成分としての中心電圧 Vcの変
更)に要する時間すなわち切替期間を大幅に短縮することができる。ここで、切替期 間をどの程度短縮できるかは、第 3のノ ィァス電圧値 Vba3および時点 tlから時点 t2 までの時間に依存する。すなわち、バイアス電圧 Vbaの変化を対向電圧 Vcomの中 心電圧 Vcを変更するのに必要な変化に比べて過渡的にどの程度拡大する力 およ び、ノ ィァス電圧 Vbaの変化を中心電圧 Vcを変更するのに必要な変化よりも拡大す る時間をどの程度の時間とするか、に依存する。これらの具体的数値については、シ ミュレーシヨンや実験等に基づき決定される。一般的には、対向電圧 Vcomにおける 直流成分(中心電圧 Vc)の変更のためのバイアス電圧 Vbaの過渡的な変化(上記の Vbalから Vba3への変ィ匕)を可能な範囲で大きくし、上記の時点 t2を時点 tlに近づ けるのが好ましい。 Thus, according to this embodiment, when the common electrode Ec is driven using the CC bias circuit, switching of the counter voltage Vcom (change of the center voltage Vc as a DC component) is performed. Further, the time required for the switching, that is, the switching period can be greatly shortened. Here, how much the switching period can be shortened depends on the third noise voltage value Vba3 and the time from time tl to time t2. That is, the force that transiently expands the change in the bias voltage Vba compared to the change necessary to change the center voltage Vc of the counter voltage Vcom and the change in the noisy voltage Vba to the center voltage Vc. Depends on how long it takes to expand beyond the change needed to make the change. These specific values are determined based on simulations and experiments. In general, the transient change of the bias voltage Vba (change from Vbal to Vba3 above) for changing the DC component (center voltage Vc) at the counter voltage Vcom is increased as much as possible. It is preferable that the time point t2 of this time be close to the time point tl.
[0054] なお上記では、対向電圧 Vcomをその中心電圧 Vcが低くなるように切り替える場合 [0054] In the above description, the counter voltage Vcom is switched so that the center voltage Vc is low.
(Vcl > Vc2、 VHil > VHi2、 VLol > VLo2の場合)につ!/、て説明したが(図 5 (B) 、図 6参照)、対向電圧 Vcomをその中心電圧 Vcが高くなるように切り替える場合 (V cl <Vc2、 VHil < Hi2, VLol < VLo2の場合)【こつ 、ても、コントローラ 200内【こ おいてバイアス電圧制御部 15による電圧設定レジスタ 21へのデータ Dbaの設定に より、対向電圧 Vcomにおける直流成分(中心電圧 Vc)の変更のためのバイアス電 圧 Vbaの変化が過渡的に拡大される。すなわち、この場合には、上記の時点 tlから 時点 t2までは、切替後の中心電圧の値 Vc2よりも大きな値 Vc4に向かって中心電圧 Vcが変化するようにバイアス電圧 Vbaが制御され、時点 t2以降は、切替後の中心電 圧の値 Vc2に向かって中心電圧 Vcが変化するようにバイアス電圧 Vbaが制御される 。これは、中心電圧目標値 Vtが、時点 tlにおいて Vcl力も Vc4 ( >Vc2)に変更され 、時点 t2において Vc4力も Vc2に変更されることを意味する。このようにして本実施 形態によれば、対向電圧 Vcomをその中心電圧 Vcが高くなるように切り替える場合 においても切替期間を短縮することができる。 (When Vcl> Vc2, VHil> VHi2, VLol> VLo2)! /, Explained (see Fig. 5 (B), Fig. 6), switch the counter voltage Vcom so that its center voltage Vc is higher (Vcl <Vc2, VHil <Hi2, VLol <VLo2) [But, even in the controller 200 [In this case, the bias voltage control unit 15 sets the data Dba to the voltage setting register 21 to oppose The change in the bias voltage Vba due to the change in the DC component (center voltage Vc) at the voltage Vcom is expanded transiently. That is, in this case, the bias voltage Vba is controlled from the time point tl to the time point t2 so that the center voltage Vc changes toward a value Vc4 that is larger than the center voltage value Vc2 after switching, and the time point t2 Thereafter, the bias voltage Vba is controlled so that the center voltage Vc changes toward the center voltage value Vc2 after switching. This means that the center voltage target value Vt is also changed to Vc4 (> Vc2) at time tl and Vc4 is also changed to Vc2 at time t2. Thus, according to the present embodiment, the switching period can be shortened even when the counter voltage Vcom is switched so that the center voltage Vc becomes high.
[0055] < 1. 3 共通電極駆動部のシミュレーション > [0055] <1. 3 Common electrode driver simulation>
上記のように本実施形態によれば、対向電圧 Vcom (の中心電圧 Vc)を切り替える ためのバイアス電圧 Vbaの変化が過渡的に拡大されるようにバイアス電圧 Vbaが制 御され、これにより切替期間が短縮される。本願発明者は、本実施形態におけるこの
ような切替期間の短縮の効果を確認するために、共通電極駆動部 410の動作につき 数値計算によるシミュレーションを行った。以下では、このシミュレーションにっき図 7 〜図 9を参照して説明する。 As described above, according to the present embodiment, the bias voltage Vba is controlled so that the change in the bias voltage Vba for switching the counter voltage Vcom (the center voltage Vc) is transiently expanded, and thus the switching period is changed. Is shortened. The inventor of the present application uses this In order to confirm the effect of shortening the switching period as described above, the operation of the common electrode driver 410 was simulated by numerical calculation. Hereinafter, this simulation will be described with reference to FIGS.
[0056] 図 7は、液晶表示装置における共通電極駆動部 410としての CCバイアス回路のシ ミュレーシヨンに使用した回路モデルを示す回路図である。この回路モデルでは、共 通電極駆動部は、矩形波電圧発生回路 13に相当する電源 (以下「矩形波電圧源」と V、う) E1と、バイアス電圧発生回路 11に相当する電圧値の制御可能な直流電圧源 ( 以下「可変電圧源」という) E2とを備えるとともに、第 1の抵抗素子 R1に相当する 180 k Ωの抵抗素子 (これも「第 1の抵抗素子」と呼ぶものとする) Rlsと、第 2の抵抗素子 R2に相当する 120k Ωの抵抗素子 (これも「第 2の抵抗素子」と呼ぶものとする) R2sと 、結合コンデンサ C1に相当するコンデンサ Clsとを備えている。そして、第 1の抵抗 素子 Rlsの一端は可変電圧源 E2の正極に、第 1の抵抗素子 R1の他端は第 2の抵 抗素子 R2sの一端にそれぞれ接続され、第 2の抵抗素子 R2の他端は接地されてお り、矩形波電圧源 E1の出力端は、コンデンサ Clsを介して第 1の抵抗素子 Rlsと第 2 の抵抗素子 R2との接続点である出力点 Noutに接続され、可変電圧源 E2の負極は 接地されている。 FIG. 7 is a circuit diagram showing a circuit model used for simulation of the CC bias circuit as the common electrode driving unit 410 in the liquid crystal display device. In this circuit model, the common electrode driver controls the power supply corresponding to the rectangular wave voltage generation circuit 13 (hereinafter referred to as “rectangular wave voltage source” V) and the voltage value corresponding to the bias voltage generation circuit 11. A possible DC voltage source (hereinafter referred to as “variable voltage source”) E2 and a 180 kΩ resistance element corresponding to the first resistance element R1 (also referred to as “first resistance element”) ) Rls, 120 kΩ resistance element corresponding to the second resistance element R2 (also referred to as “second resistance element”) R2s, and a capacitor Cls corresponding to the coupling capacitor C1 . One end of the first resistance element Rls is connected to the positive electrode of the variable voltage source E2, and the other end of the first resistance element R1 is connected to one end of the second resistance element R2s. The other end is grounded, and the output terminal of the rectangular wave voltage source E1 is connected to an output point Nout, which is a connection point between the first resistance element Rls and the second resistance element R2, via the capacitor Cls. The negative electrode of variable voltage source E2 is grounded.
[0057] 図 8 (A)は、上記シミュレーションにおいて可変電圧源 E2から第 1の抵抗素子 Rls の一端に与えられるバイアス電圧 Vbaの第 1例の変化 (本実施形態におけるバイアス 電圧 Vbaの変化に相当)を示す電圧波形図であり、図 8 (B)は、上記シミュレーション において可変電圧源 E2から第 1の抵抗素子 Rlsの一端に与えられるノ ィァス電圧 V baの第 2例の変化 (従来のバイアス電圧 Vbaの変化に相当)を示す電圧波形図であ る。第 1例では、バイアス電圧 Vbaは、シミュレーション開始時点(以下、単に「開始時 点」と 、う)では 4Vであり、開始時点から 0. 03秒経過した時点で 4Vから— 12Vへと 変化し、開始時点から 0. 04秒経過した時点で— 12Vから 0Vへと変化し、その後は 0Vに維持される。これに対し第 2例では、バイアス電圧 Vbaは、開始時点では 4Vで あり、開始時点から 0. 03秒経過した時点で 4V力も 0Vへと変化し、その後は 0Vに維 持される。 FIG. 8A shows a change in the first example of the bias voltage Vba applied from the variable voltage source E2 to one end of the first resistance element Rls in the above simulation (corresponding to the change in the bias voltage Vba in this embodiment). 8 (B) shows the change in the second example of the noise voltage V ba given to one end of the first resistance element Rls from the variable voltage source E2 in the above simulation (conventional bias). FIG. 6 is a voltage waveform diagram showing a change in voltage Vba). In the first example, the bias voltage Vba is 4 V at the start of the simulation (hereinafter simply referred to as “start time”), and changes from 4 V to −12 V when 0.03 seconds have elapsed from the start time. When 0.04 seconds have elapsed from the start, it changes from 12V to 0V, and then remains at 0V. On the other hand, in the second example, the bias voltage Vba is 4V at the start time, and when 0.03 seconds have elapsed from the start time, the 4V force also changes to 0V, and thereafter is maintained at 0V.
[0058] 図 9 (A)〜図 9 (C)は、上記シミュレーション結果を第 1例および第 2例のバイアス電
圧 Vbaとともに示す電圧波形図である。図 9 (A)は、第 1例および第 2例のバイアス電 圧 Vbaをまとめて示しており、図 9 (B)は、第 1例のバイアス電圧 Vbaが与えられたと きに出力点 Noutに得られる対向電圧 Vcomの波形を実線で示すとともに、第 2例の バイアス電圧 Vbaが与えられたときに出力点 Noutに得られる対向電圧 Vcomの波形 を点線で示している。ただし、対向電圧 Vcomは、図 9 (C)に示すように、切替期間に 比べ (またはコンデンサ Clsと抵抗素子 Rls, R2sとによって決まる時定数に比べ)極 めて短い周期の矩形波電圧であるので、図 9 (B)は、矩形波電圧としての対向電圧 Vcomの各周期での最大値である高電圧値 VHiと最小値である低電圧値 VLoとで 対向電圧 Vcomの変化を表している。すなわち、図 9 (B)では、対向電圧 Vcomを示 す矩形波の上側の包絡線 CHiと下側の包絡線 CLoとによって当該矩形波の変化を 表している(図 9 (C)参照)。 [0058] FIGS. 9 (A) to 9 (C) show the simulation results of the bias voltage of the first example and the second example. It is a voltage wave form diagram shown with pressure Vba. Fig. 9 (A) shows the bias voltage Vba of the first and second examples together, and Fig. 9 (B) shows the output point Nout when the bias voltage Vba of the first example is given. The waveform of the counter voltage Vcom obtained is shown by a solid line, and the waveform of the counter voltage Vcom obtained at the output point Nout when the bias voltage Vba of the second example is given is shown by a dotted line. However, the counter voltage Vcom is a rectangular wave voltage with a very short period compared to the switching period (or compared to the time constant determined by the capacitor Cls and the resistance elements Rls and R2s), as shown in FIG. 9 (C). Therefore, Fig. 9 (B) shows the change of the counter voltage Vcom between the high voltage value VHi which is the maximum value in each cycle of the counter voltage Vcom as a rectangular wave voltage and the low voltage value VLo which is the minimum value. . That is, in FIG. 9B, the change of the rectangular wave is represented by the upper envelope CHi and the lower envelope CLo of the rectangular wave indicating the counter voltage Vcom (see FIG. 9C).
[0059] 図 9 (B)に示すように、上記シミュレーション結果によれば、本実施形態に対応する 第 1例のバイアス電圧 Vbaが与えられる場合には、開始時点から 0. 05秒程度経過し た時点で対向電圧 Vcomの波形が切替後の波形に落ち着いており、切替期間の長 さは 0. 02秒程度となる。これに対し、従来に対応する第 2例のバイアス電圧 Vbaが 与えられる場合には、開始時点から 0. 13秒程度経過した時点で対向電圧 Vcomの 波形が切替後の波形に落ち着いており、切替期間の長さは 0. 1秒程度となる。この ように、本実施形態によれば対向電圧 Vcomを切り替える際の切替期間を従来に比 ベ大幅に短縮できることを、上記シミュレーションによって確認することができる。 [0059] As shown in FIG. 9B, according to the simulation result, when the bias voltage Vba of the first example corresponding to this embodiment is given, about 0.05 seconds have passed since the start time. At that time, the waveform of the counter voltage Vcom has settled to the waveform after switching, and the length of the switching period is about 0.02 seconds. On the other hand, when the bias voltage Vba of the second example corresponding to the conventional case is given, the waveform of the counter voltage Vcom is settled to the waveform after switching after about 0.13 seconds from the start time. The length of the period is about 0.1 second. Thus, according to the present embodiment, it can be confirmed by the above simulation that the switching period when switching the counter voltage Vcom can be significantly shortened compared to the conventional case.
[0060] < 1. 4 表示開始時における共通電極駆動部の動作 > [0060] <1.4 Operation of common electrode driver at start of display>
次に、本実施形態における共通電極駆動部 410の表示開始時の動作について説 明する。一般に液晶表示装置には複数の電源が必要であり、それらの電源のほとん どは表示開始前に起動されている。しかし、表示に関わる電圧である上記バイアス電 圧 Vbaを出力するノ ィァス電圧発生回路 11は、表示開始時に起動される。そのため 、表示開始時点力 対向電圧 Vcom力 バイアス電圧 Vbaによって決まる中心電圧 V c (直流成分)を有する矩形波電圧に落ち着く時点までの期間は、上記の切替期間に 相当する。したがって、表示開始時における当該期間(以下「バイアス起動期間」とい う)では、対向電圧 Vcomは最適なものとはなっていないので、本来の表示を行うこと
ができない。 Next, the operation at the start of display of the common electrode driving unit 410 in this embodiment will be described. In general, a liquid crystal display device requires a plurality of power supplies, and most of these power supplies are activated before the display is started. However, the noise voltage generation circuit 11 that outputs the bias voltage Vba, which is a voltage related to display, is activated at the start of display. For this reason, the period until the time when the square wave voltage having the center voltage V c (DC component) determined by the display start time force counter voltage Vcom force bias voltage Vba is reached corresponds to the switching period described above. Therefore, the counter voltage Vcom is not optimal during the relevant period at the start of display (hereinafter referred to as “bias start-up period”). I can't.
[0061] しかし、本実施形態では、表示開始時における切替期間としてのバイアス起動期間 も上記と同様にして短縮することができる。すなわち表示開始の際には、対向電圧 V comは、バイアス電圧 Vba = 0に対応する中心電圧 Vcを有する矩形波電圧から、最 適なバイアス電圧値 Vba 1に対応する中心電圧値 Vc 1を有する矩形波電圧へと切り 替わること〖こなる。そこで本実施形態では、図 10 (A)に示す如くバイアス電圧 Vbaが 変化するように、すなわち、バイアス電圧 Vbaの変化力 対向電圧 Vcomの直流成分 としての中心電圧 Vcを 0から Vclへと変更するのに必要な変化よりも表示開始時点 にお 、て過渡的に大きくなるように、ノ ィァス電圧制御部 15が電圧設定レジスタ 21 にデータ Dbaを書き込む。これにより、表示開始時におけるバイアス起動期間が従来 に比べて短縮される。具体的には、バイアス電圧 Vbaを、表示開始時点 tOlにおいて 、 0から最適な対向電圧 Vcomの中心電圧値 Vc 1を与えるバイアス電圧値 Vba 1すな わち本来のバイアス電圧値 Vbalよりも大きい所定のバイアス電圧値 VbaOへと変化 させ、その後の時点 t02で当該電圧値 VbaOから本来のバイアス電圧値 Vbalへと変 化させる。 However, in the present embodiment, the bias activation period as the switching period at the start of display can be shortened in the same manner as described above. That is, at the start of display, the counter voltage V com has a center voltage value Vc 1 corresponding to the optimum bias voltage value Vba 1 from a rectangular wave voltage having a center voltage Vc corresponding to the bias voltage Vba = 0. Switching to a square wave voltage is difficult. Therefore, in the present embodiment, as shown in FIG. 10A, the bias voltage Vba changes, that is, the changing voltage of the bias voltage Vba, and the center voltage Vc as the DC component of the counter voltage Vcom is changed from 0 to Vcl. The noise voltage control unit 15 writes the data Dba to the voltage setting register 21 so that it becomes transiently larger at the display start time than the change necessary for this. As a result, the bias activation period at the start of display is shortened compared to the conventional case. Specifically, the bias voltage Vba is a predetermined bias voltage value Vba 1 that gives the center voltage value Vc 1 of the optimum counter voltage Vcom from 0 at the display start time tOl, that is, a predetermined value that is larger than the original bias voltage value Vbal. The bias voltage value is changed to VbaO, and then at the time t02, the voltage value VbaO is changed to the original bias voltage value Vbal.
[0062] 表示開始時にぉ 、て共通電極駆動部 410のバイアス電圧 Vbaを上記のように制御 することにより、対向電圧 Vcomを示す矩形波の高電圧値 VHiの変化(当該矩形波 の上側包絡線)は、図 10 (C)において実線で示すようになる。これに対し、従来のよ うに、バイアス電圧 Vbaを、表示開始時点 tOlで 0から最適なバイアス電圧値 Vbalへ と変化させる場合には(図 10 (B)において点線で示す波形参照)、対向電圧 Vcom を示す矩形波の高電圧値 VHiの変化(当該矩形波の上側包絡線)は、図 10 (C)に おいて点線で示すようになる。この図 10 (C)は、本実施形態によれば表示開始時に おけるバイアス起動期間も従来に比べて大きく短縮されることを示している。 [0062] At the start of display, by controlling the bias voltage Vba of the common electrode driver 410 as described above, a change in the high voltage value VHi of the rectangular wave indicating the counter voltage Vcom (the upper envelope of the rectangular wave) ) Is shown as a solid line in Fig. 10 (C). On the other hand, when the bias voltage Vba is changed from 0 to the optimum bias voltage value Vbal at the display start time tOl as in the past (refer to the waveform indicated by the dotted line in FIG. 10B), the counter voltage The change in the high voltage value VHi of the rectangular wave indicating Vcom (upper envelope of the rectangular wave) is shown by the dotted line in Fig. 10 (C). FIG. 10 (C) shows that according to the present embodiment, the bias activation period at the start of display is greatly shortened compared to the conventional case.
[0063] < 1. 5 効果〉 [0063] <1.5 Effect>
上記の切替期間およびバイアス起動期間は、対向電圧 Vcom (の中心電圧 Vc)が 本来の値すなわち最適な状態となっていないので、表示品位が低下する。共通電極 駆動部として CCバイアス回路を用いた場合、消費電力を低く抑えることができるが、 上記の切替期間およびバイアス起動期間は、容量値の大きな結合コンデンサ と
抵抗値の大きな第 1および第 2の抵抗素子 Rl, R2とによって決まる時定数に依存し 、比較的長い期間となる。したがって、 CCバイアス回路を用いた従来の共通電極駆 動部では、切替期間やバイアス起動期間における表示品位の低下が人間に視認さ れてしまう t ヽぅ問題があった。 In the switching period and the bias starting period, the display voltage is deteriorated because the counter voltage Vcom (the center voltage Vc) is not the original value, that is, the optimum state. When a CC bias circuit is used as the common electrode driver, power consumption can be kept low, but the switching period and bias start-up period described above are The period is relatively long depending on the time constant determined by the first and second resistance elements Rl and R2 having a large resistance value. Therefore, in the conventional common electrode driving unit using the CC bias circuit, there has been a problem of t し ま う that the deterioration of display quality during the switching period and the bias starting period is perceived by humans.
[0064] しかし、本実施形態によれば、 CCバイアス回路を用いた共通電極駆動部(図 3)に より対向 AC駆動を行う液晶表示装置において、対向電圧 Vcom (の中心電圧 Vc)を 切り替えるためのバイアス電圧 Vbaの変化が過渡的に拡大されるようにバイアス電圧 が制御され、これにより切替期間が従来に比べて大きく短縮される(図 6)。また、表示 開始時において対向電圧 Vcomの生成のためのノ ィァス電圧 Vbaを立ち上げる際 にも、対向電圧 Vcomの中心電圧 Vcを本来の中心電圧値 Vc 1へと立ち上げるため のバイアス電圧 Vbaの変化が過渡的に拡大されるようにバイアス電圧 Vbaが制御さ れ、これによりバイアス起動期間が従来に比べて大きく短縮される(図 10 (C) )。した がって、本実施形態によれば、対向 AC駆動を行う液晶表示装置において、共通電 極の駆動のための消費電力を低く抑えつつ、対向電圧 Vcomの切替(中心電圧 Vc の切替)や表示開始時におけるバイアス電圧の立ち上げの際の表示品位の低下を 抑帘 Uすることができる。 However, according to the present embodiment, in the liquid crystal display device that performs counter AC driving by the common electrode driving unit (FIG. 3) using the CC bias circuit, the counter voltage Vcom (the center voltage Vc) is switched. The bias voltage is controlled so that the change in the bias voltage Vba is transiently expanded, which greatly shortens the switching period compared to the conventional method (Fig. 6). In addition, when the noise voltage Vba for generating the counter voltage Vcom is raised at the start of the display, the bias voltage Vba for raising the center voltage Vc of the counter voltage Vcom to the original center voltage value Vc 1 is set. The bias voltage Vba is controlled so that the change is expanded transiently, which significantly shortens the bias start-up period compared to the conventional method (Fig. 10 (C)). Therefore, according to the present embodiment, in the liquid crystal display device that performs counter AC driving, the switching of the counter voltage Vcom (switching of the center voltage Vc) and the power consumption for driving the common electrode are kept low. It is possible to suppress the deterioration of display quality when the bias voltage is raised at the start of display.
[0065] < 2.第 2の実施形態 > [0065] <2. Second embodiment>
次に、本発明の第 2の実施形態に係る液晶表示装置について説明する。この液晶 表示装置は、その全体構成が上記第 1の実施形態と同様であって、図 1および図 2に 示す通りであるので、同一部分には同一の参照符号を付して詳しい説明を省略する 。また、この液晶表示装置の全体的な動作も第 1の実施形態と同様であるので説明 を省略する。以下では、本実施形態における共通電極駆動部の構成および動作を 中心に説明する。なお以下では、本実施形態における共通電極駆動部の構成要素 のうち第 1の実施形態と同様の構成要素については同一の参照符号を付すものとす る。 Next, a liquid crystal display device according to a second embodiment of the present invention will be described. Since this liquid crystal display device has the same overall configuration as that of the first embodiment and is as shown in FIG. 1 and FIG. 2, the same parts are denoted by the same reference numerals and detailed description thereof is omitted. To do. Further, the overall operation of the liquid crystal display device is the same as that of the first embodiment, and thus the description thereof is omitted. Below, it demonstrates centering around the structure and operation | movement of a common electrode drive part in this embodiment. In the following description, the same reference numerals are assigned to the same constituent elements as those in the first embodiment among the constituent elements of the common electrode driving unit in the present embodiment.
[0066] 図 11は、本実施形態における共通電極駆動部の構成を機能的に示すブロック図 である。本実施形態における共通電極駆動部 420は、第 1の実施形態と同様、バイ ァス電圧発生回路 11と、矩形波電圧発生回路 13と、第 1および第 2の抵抗素子 R1,
R2と、コンデンサ CIとを備え、これらの構成要素は第 1の実施形態と同様に接続さ れて CCバイアス回路を構成する。また、この共通電極駆動部 420は、出力点 (第 1の 抵抗素子 R1と第 2の抵抗素子 R2との接続点) Noutの電圧を検出する電圧検出回 路 17を更に備えるとともに、バイアス制御手段として、バイアス電圧制御部に代えて 制御演算部 19を備えている。この制御演算部 19は、図 12に示す後述の処理に基 づきバイアス電圧発生回路 11内の電圧設定レジスタ 21 (図 4参照)にデータ Dbaを 書き込むことによりバイアス電圧 Vbaを制御するものであり、コントローラ 200の有する 機能に基づいて実現される。 FIG. 11 is a block diagram functionally showing the configuration of the common electrode driving unit in the present embodiment. As in the first embodiment, the common electrode driver 420 in the present embodiment includes a bias voltage generation circuit 11, a rectangular wave voltage generation circuit 13, and first and second resistance elements R1, R2. R2 and a capacitor CI are provided, and these components are connected in the same manner as in the first embodiment to constitute a CC bias circuit. The common electrode driving unit 420 further includes a voltage detection circuit 17 for detecting the voltage at the output point (connection point between the first resistance element R1 and the second resistance element R2) Nout, and bias control means. As an alternative, a control calculation unit 19 is provided instead of the bias voltage control unit. The control calculation unit 19 controls the bias voltage Vba by writing data Dba to the voltage setting register 21 (see FIG. 4) in the bias voltage generation circuit 11 based on the processing described later shown in FIG. This is realized based on the functions of the controller 200.
[0067] 上記構成において、電圧検出回路 17は、出力点 Noutの電圧 (この電圧は対向電 圧 Vcomとして共通電極 Ecに与えられる)の最大値 Vdmaxと最小値 Vdminとを検出 し、これらを制御演算部 19に与える。制御演算部 19は、これらの最大値 Vdmaxおよ び最小値 Vdminに基づき、図 12のフローチャートが示す処理にしたがってデータ D baをバイアス電圧発生回路 11内の電圧設定レジスタ 21に書き込む。すなわち、制 御演算部 19は、以下のように動作する。 [0067] In the above configuration, the voltage detection circuit 17 detects the maximum value Vdmax and the minimum value Vdmin of the voltage at the output point Nout (this voltage is applied to the common electrode Ec as the counter voltage Vcom) and controls these. This is given to the arithmetic unit 19. Based on the maximum value Vdmax and the minimum value Vdmin, the control calculation unit 19 writes the data D ba into the voltage setting register 21 in the bias voltage generation circuit 11 according to the process shown in the flowchart of FIG. That is, the control calculation unit 19 operates as follows.
[0068] まず、出力点 Noutの電圧として生成すべき対向電圧 Vcomの中心電圧 Vcの値( 以下「中心電圧設定値 Vst」という)に変更がある力否か、すなわち、(例えば反射表 示モードと透過表示モードとの間での表示モードの切替に伴って)対向電圧 Vcomを 切り替えるべき力否かを判定する (ステップ S 12)。この判定の結果、中心電圧設定 値 Vstに変更が無 、場合は、中心電圧設定値 Vstに対応するバイアス電圧値 Dst、 すなわち当該設定値 Vstの中心電圧 Vcを与えるためのバイアス電圧値 Dstを電圧 設定値 Dbaとして (ステップ S 26)、ステップ S 28へ進む。 First, whether or not there is a change in the value of the center voltage Vc of the counter voltage Vcom to be generated as the voltage at the output point Nout (hereinafter referred to as “center voltage setting value Vst”), that is, (for example, the reflection display mode) In step S12, it is determined whether or not the counter voltage Vcom is to be switched. If there is no change in the center voltage set value Vst as a result of this determination, the bias voltage value Dst corresponding to the center voltage set value Vst, that is, the bias voltage value Dst for applying the center voltage Vc of the set value Vst is set to the voltage. As the set value Dba (step S26), the process proceeds to step S28.
[0069] ステップ S 12での判定の結果、中心電圧設定値 Vstに変更があった場合は、その 中心電圧設定値 Vstを変更後の値に更新する (ステップ S14)。次に、電圧検出回路 17から与えられる出力点 Noutの電圧の最大値 Vdmaxおよび最小値 Vdminに基づ き、出力点 Noutの電圧の直流成分を、次式により中心電圧検出値 Vdとして算出す る(ステップ S 16)。 [0069] If the result of determination in step S12 is that the center voltage set value Vst has changed, the center voltage set value Vst is updated to the changed value (step S14). Next, based on the maximum value Vdmax and the minimum value Vdmin of the voltage at the output point Nout given from the voltage detection circuit 17, the DC component of the voltage at the output point Nout is calculated as the center voltage detection value Vd by the following equation: (Step S16).
Vd= (Vdmax+ Vdmin) /2 …(7) Vd = (Vdmax + Vdmin) / 2 (7)
[0070] その後、中心電圧検出値 Vdが中心電圧設定値 Vstに実用上等しいと見なせるか
否かを調べるために、中心電圧設定値 Vstと中心電圧検出値 Vdとの差 I Vt— Vd I が所定の小さい正値 εよりも小さいか否かを判定する (ステップ S 18)。この判定の結 果、当該差 I Vt— Vd Iが正値 εよりも小さければ、中心電圧検出値 Vdは中心電圧 設定値 Vstに実用上等しいと見なせるものとして、中心電圧設定値 Vstに対応するバ ィァス電圧値 Dstを電圧設定値 Dbaとし (ステップ S26)、ステップ S28へ進む。 [0070] After that, can the center voltage detection value Vd be considered practically equal to the center voltage setting value Vst? In order to check whether or not, the difference I Vt−Vd I between the center voltage setting value Vst and the center voltage detection value Vd is determined whether it is smaller than a predetermined small positive value ε (step S18). As a result of this determination, if the difference I Vt—Vd I is smaller than the positive value ε, the center voltage detection value Vd can be regarded as practically equivalent to the center voltage setting value Vst, and corresponds to the center voltage setting value Vst. The bias voltage value Dst is set to the voltage setting value Dba (step S26), and the process proceeds to step S28.
[0071] ステップ S 18での判定の結果、当該差 I Vt—Vd Iが正値 ε以上であれば、中心 電圧設定値 Vstが中心電圧検出値 Vdよりも大き ヽか否かを判定する (ステップ S20) 。この判定の結果、中心電圧設定値 Vstが中心電圧検出値 Vdよりも大きければ、電 圧設定レジスタ 21に設定可能な最大値として予め決められた値 (以下「設定可能最 大値」) Dmaxを電圧設定値 Dbaとし (ステップ S22)、ステップ S28へ進む。一方、ス テツプ S20での判定の結果、中心電圧設定値 Vstが中心電圧検出値 Vdよりも小さけ れば、電圧設定レジスタ 21に設定可能な最小値として予め決められた値 (以下「設 定可能最小値」 ) Dminを電圧設定値 Dbaとし (ステップ S24)、ステップ S28へ進む。 [0071] If the difference I Vt−Vd I is greater than or equal to the positive value ε as a result of the determination in step S18, it is determined whether or not the center voltage set value Vst is greater than the center voltage detection value Vd ( Step S20). As a result of this determination, if the center voltage setting value Vst is larger than the center voltage detection value Vd, the maximum value that can be set in the voltage setting register 21 (hereinafter, “maximum value that can be set”) Dmax is set. Set to the voltage setting value Dba (step S22), and proceed to step S28. On the other hand, if the result of determination in step S20 is that the center voltage setting value Vst is smaller than the center voltage detection value Vd, a predetermined value (hereinafter “setting”) is set as the minimum value that can be set in the voltage setting register 21. Minimum possible value ”) Set Dmin to the voltage setting value Dba (step S24), and proceed to step S28.
[0072] ステップ S28では、上記のようにして決定された電圧設定値 Dbaをバイアス電圧発 生回路 11内の電圧設定レジスタ 21に書き込む。その後、ステップ S 12へ戻り、それ 以降のステップを繰り返し実行する。 In step S28, the voltage setting value Dba determined as described above is written into the voltage setting register 21 in the bias voltage generating circuit 11. Thereafter, the process returns to step S12, and the subsequent steps are repeatedly executed.
[0073] ノ ィァス電圧発生回路 11は、第 1の実施形態と同様、その内部の電圧設定レジス タ 21に書き込まれたデータである電圧設定値 Dbaに相当するアナログ電圧をバイァ ス電圧 Vbaとして生成する。このバイアス電圧 Vbaは第 1の抵抗素子 R1の一端に与 えられ、出力点 Noutに得られる対向電圧 Vcomの直流成分に相当する中心電圧 V cが、このバイアス電圧 Vbaに基づき下記のようになる。 As in the first embodiment, the noise voltage generation circuit 11 generates an analog voltage corresponding to the voltage setting value Dba, which is data written in the internal voltage setting register 21, as the bias voltage Vba. To do. This bias voltage Vba is applied to one end of the first resistance element R1, and the center voltage Vc corresponding to the DC component of the counter voltage Vcom obtained at the output point Nout is as follows based on this bias voltage Vba. .
Vc = {R2/ (R1 +R2) } X Vba Vc = {R2 / (R1 + R2)} X Vba
し力し、バイアス電圧 Vbaを変化させても、その変化は対向電圧 Vcomの中心電圧 V cに直ちに反映されるわけでな 、。本実施形態のように CCバイアス回路を使用して ヽ る場合には、コンデンサ C1の容量値と第 1および第 2の抵抗素子の抵抗値とによつ て決まる時定数が大き 、ためである。 However, even if the bias voltage Vba is changed, the change is not immediately reflected in the center voltage Vc of the counter voltage Vcom. This is because when the CC bias circuit is used as in the present embodiment, the time constant determined by the capacitance value of the capacitor C1 and the resistance values of the first and second resistance elements is large. .
[0074] そこで本実施形態では、中心電圧 Vcを変更することによって対向電圧 Vcomを切 り替える場合には、図 12に示したように、コントローラ 200内の制御演算部 19は、中
心電圧設定値 Vstに変更ありと判定し (ステップ S I 2)、電圧検出回路 17によって検 出された出力点 Noutの最大値 Vdmaxと最小値 Vdminとから算出される中心電圧 検出値 Vd (これは対向電圧 Vcomの現時点の中心電圧 Vcと見なすことができる)と、 変更後の中心電圧設定値 Vstとの差に応じて、次にバイアス電圧発生回路 11内の 電圧設定レジスタ 21に書き込むべき電圧設定値 Dbaを決定する。すなわち、中心電 圧検出値 Vdと中心電圧設定値 Vstとの差が実用上問題となるような場合 (ステップ S 18で Noと判定される場合)には、 Vst>Vdであれば設定可能最大値 Dmaxを電圧 設定値 Dbaとして、 Vstく Vdであれば設定可能最小値 Dminを電圧設定値 Dbaとし て、電圧設定レジスタ 21に書き込む (ステップ S20〜S24)。これは、切替後の対向 電圧 Vcomが有すべき直流成分に相当する中心電圧設定値 Vstと、出力点 Noutに 対向電圧 Vcomとして実際に得られる電圧の直流成分の検出値 Vdとの差が打ち消 されるように、電圧設定値 Dbaが決定されることを意味する。また、 Dmax>Dst、 Dm inく Dstであることから、これは、バイアス電圧 Vbaの変化が、対向電圧 Vcomの中 心電圧 Vcを変更するのに必要な変化(中心電圧 Vcの値を中心電圧設定値 Vstとす るのに必要な変化)よりも大きく変化するように、電圧設定値 Dbaが決定される、という ことを意味する。 Therefore, in the present embodiment, when the counter voltage Vcom is switched by changing the center voltage Vc, as shown in FIG. 12, the control calculation unit 19 in the controller 200 The center voltage detection value Vd (this is calculated from the maximum value Vdmax and minimum value Vdmin of the output point Nout detected by the voltage detection circuit 17 is determined that the cardiac voltage set value Vst has been changed (Step SI 2). The voltage setting to be written next to the voltage setting register 21 in the bias voltage generation circuit 11 according to the difference between the counter voltage Vcom and the current center voltage Vc) and the changed center voltage setting value Vst Determine the value Dba. In other words, if the difference between the center voltage detection value Vd and the center voltage setting value Vst is a problem in practice (if it is determined No in step S18), the maximum value that can be set if Vst> Vd The value Dmax is set as the voltage setting value Dba, and if Vst is Vd, the minimum setting value Dmin is written as the voltage setting value Dba in the voltage setting register 21 (steps S20 to S24). This is because the difference between the center voltage setting value Vst corresponding to the DC component that the counter voltage Vcom after switching should have and the detected value Vd of the DC component of the voltage actually obtained as the counter voltage Vcom at the output point Nout. This means that the voltage setting value Dba is determined so that it is turned off. Since Dmax> Dst and Dmin in Dst, this means that the change in the bias voltage Vba is the change necessary to change the center voltage Vc of the counter voltage Vcom (the value of the center voltage Vc is the center voltage). This means that the voltage setting value Dba is determined so as to change more than the setting value Vst).
[0075] 上記のようにして、中心電圧設定値 Vstと中心電圧検出値 Vdとの間に実用上問題 となるような差がある間は、中心電圧 Vcの値を中心電圧設定値 Vstに変更するため のバイアス電圧 Vbaの変化が拡大されるように、中心電圧設定値 Vstと中心電圧検 出値 Vdとの大小関係に応じて、設定可能最大値 Dmaxまたは設定可能最小値 Dmi nが電圧設定値 Dbaとして電圧設定レジスタ 21に書き込まれる。このようにしてバイァ ス電圧 Vbaが制御されることにより、中心電圧検出値 Vdが中心電圧設定値 Vstに実 用上等しいと見なせる状態になると (ステップ S 18で Yesと判定されると)、その中心 電圧設定値 Vstに対応するバイアス電圧値 Dstが電圧設定値 Dbaとして電圧設定レ ジスタ 21に書き込まれる。 [0075] As described above, while there is a practical difference between the center voltage setting value Vst and the center voltage detection value Vd, the value of the center voltage Vc is changed to the center voltage setting value Vst. The maximum settable value Dmax or the minimum settable value Dmin is set according to the magnitude relationship between the center voltage setting value Vst and the center voltage detection value Vd so that the change in the bias voltage Vba It is written to the voltage setting register 21 as the value Dba. By controlling the bias voltage Vba in this way, when the center voltage detection value Vd can be regarded as practically equal to the center voltage setting value Vst (when it is determined Yes in step S18), The bias voltage value Dst corresponding to the center voltage setting value Vst is written to the voltage setting register 21 as the voltage setting value Dba.
[0076] 上記のように本実施形態によっても、第 1の実施形態と同様、 CCバイアス回路を用 Vヽた共通電極駆動部 420にお!/、て、対向電圧 Vcom (の中心電圧 Vc)を切り替える ためのバイアス電圧 Vbaの変化が過渡的に拡大され、これにより対向電圧 Vcomの
切替期間やバイアス起動期間が短縮される。このため、対向 AC駆動を行う液晶表示 装置において、共通電極 Ecの駆動のための消費電力を低く抑えつつ、対向電圧 Vc omの切替(中心電圧 Vcの変更)や表示開始時におけるバイアス電圧の立ち上げに 伴う表示品位の低下を抑制することができる。し力も、本実施形態によれば、中心電 圧検出値 Vdが中心電圧設定値 Vstに実用上等しいと見なせる状態になると、その中 心電圧設定値 Vstに対応するバイアス電圧値 Dstが電圧設定値 Dbaとして電圧設定 レジスタ 21に書き込まれる。すなわち、対向電圧 Vcomの中心電圧 Vcにっきフィー ドバック制御が行われる。このため、切替期間等を短縮するためにバイアス電圧値 V baの変化をどの程度の期間過渡的に拡大するのかを予め決定する必要はない。ま た、中心電圧設定値 Vstと中心電圧検出値 Vdとの間に実用上問題となるような差が ある場合には、バイアス電圧 Vbaは、中心電圧 Vcの設定値 Vstと検出値 Vdとの差が 打ち消されるように、かつ、中心電圧 Vcを変更するためのバイアス電圧 Vbaの変化 が拡大されるように、出力可能な最大値 (設定可能最大値 Dmaxに相当するバイアス 電圧値)または出力可能な最小値 (設定可能最小値 Dminに相当するバイアス電圧 値)となる。このため、切替期間等を短縮するためにバイアス電圧値 Vbaの変化を過 渡的にどの程度拡大するかを決定することが実質的に不要となる。 [0076] As described above, according to the present embodiment, as in the first embodiment, the common electrode drive unit 420 using the CC bias circuit is connected to the common voltage drive unit 420! /, And the counter voltage Vcom (the center voltage Vc). The change of the bias voltage Vba for switching The switching period and the bias activation period are shortened. For this reason, in a liquid crystal display device that is driven by opposed AC, the power consumption for driving the common electrode Ec is kept low, while switching of the opposed voltage Vcom (change of the center voltage Vc) and the rise of the bias voltage at the start of display. It is possible to suppress the deterioration of display quality due to the increase. According to the present embodiment, when the center voltage detection value Vd can be regarded as practically equal to the center voltage setting value Vst, the bias voltage value Dst corresponding to the center voltage setting value Vst becomes the voltage setting value. It is written to the voltage setting register 21 as Dba. That is, feedback control is performed on the center voltage Vc of the counter voltage Vcom. For this reason, it is not necessary to determine in advance how long the change of the bias voltage value Vba is to be transiently expanded in order to shorten the switching period or the like. If there is a practical problem between the center voltage setting value Vst and the center voltage detection value Vd, the bias voltage Vba is the difference between the center voltage Vc setting value Vst and the detection value Vd. The maximum outputable value (bias voltage value corresponding to the maximum settable value Dmax) or output is possible so that the difference is canceled out and the change of the bias voltage Vba for changing the center voltage Vc is expanded Minimum value (bias voltage value corresponding to the minimum value Dmin that can be set). For this reason, it is substantially unnecessary to determine how much the change in the bias voltage value Vba is to be temporarily expanded in order to shorten the switching period.
[0077] なお、本実施形態では、中心電圧設定値 Vstと中心電圧検出値 Vdとの間に実用 上問題となるような差がある場合には、上記のステップ S20〜S24のようにして電圧 設定値 Dbaが決定される力 このような決定方法に限定されるものではなぐ中心電 圧 Vcを変更するためのバイアス電圧値 Vbaの変化が拡大されるように電圧設定値 D baを決定するための決定方法であれば他の方法であってもよい。例えば、対向電圧 Vcomの切替前のバイアス電圧 Vbaに対する切替後のバイアス電圧 Vbaの変化が、 中心電圧設定値 Vstと中心電圧検出値 Vdとの差に応じて調整されるように、電圧設 定値 Dbaを決定してもよ ヽ。 In the present embodiment, when there is a practically problematic difference between the center voltage setting value Vst and the center voltage detection value Vd, the voltage is applied as in steps S20 to S24 above. Force that determines the set value Dba It is not limited to such a determination method. To determine the voltage set value D ba so that the change of the bias voltage value Vba for changing the center voltage Vc is expanded. Any other method may be used as long as it is a determination method. For example, the voltage setting value Dba is set so that the change of the bias voltage Vba after switching with respect to the bias voltage Vba before switching of the counter voltage Vcom is adjusted according to the difference between the center voltage setting value Vst and the center voltage detection value Vd. You can decide ヽ.
[0078] < 3.変形例 > [0078] <3.Modification>
上記第 1および第 2の実施形態では、共通電極駆動部 410, 420においてバイアス 電圧 Vbaを生成するノ ィァス電圧発生回路 11は、コントローラ 200内で、図 4に示す ような DZA変換回路 210として実現される力 バイアス電圧発生回路 11は、これに
限定されず、ノィァス電圧 Vbaの値を制御するできる構成であればよぐまた、コント ローラ 200の外部に設けられてもよい。 In the first and second embodiments, the negative voltage generation circuit 11 that generates the bias voltage Vba in the common electrode driving units 410 and 420 is realized as the DZA conversion circuit 210 as shown in FIG. Force bias voltage generator circuit 11 The configuration is not limited, and any configuration that can control the value of the noise voltage Vba may be used, and the configuration may be provided outside the controller 200.
[0079] 上記第 1および第 2の実施形態では、画素電極と共通電極とが異なる基板上に形 成された液晶パネルを例に挙げて説明した力 これらの電極構造に限定はなぐ例 えば、 IPS(In Plane Switching)方式のような、同一基板上に画素電極と共通電極とが 形成されて 、るものであってもよ 、。 [0079] In the first and second embodiments, the force described by taking the liquid crystal panel in which the pixel electrode and the common electrode are formed on different substrates as an example. These electrode structures are not limited, for example. A pixel electrode and a common electrode may be formed on the same substrate as in the IPS (In Plane Switching) method.
[0080] 上記第 1および第 2の実施形態では、液晶への印加電圧の極性が 1水平走査線毎 に反転するライン反転駆動方式の液晶表示装置を例に挙げて説明したが、本発明 はこれに限定されるものではなぐ対向 AC駆動が行われる他の反転駆動方式の表 示装置にも適用可能である。例えば、液晶への印加電圧の極性力 水平走査線毎に 反転する nライン反転駆動方式の液晶表示装置 (n≥ 2)やフレーム反転駆動方式の 液晶表示装置にも適用可能である。さらに、対向 AC駆動が行われない液晶表示装 置すなわち対向 DC駆動が行われる液晶表示装置においても、本発明と同様の手法 が適用可能である。すなわち、直流電圧としての対向電圧を切り替える場合に、その 切替のためのバイアス電圧の変化が過渡的に拡大されるようにバイアス電圧を制御 することで、すなわちバイアス電圧が対向電圧の切替に必要な変化よりも大きく変化 するようにバイアス電圧を制御することで、切替期間を短縮することができる。なお、こ の場合、図 3の構成における結合コンデンサ C1は存在しないが、第 1の抵抗素子 R1 と第 2の抵抗素子 R2との接続点すなわち出力点には容量性負荷としての液晶パネ ルの共通電極が接続される。 In the first and second embodiments, the liquid crystal display device of the line inversion driving method in which the polarity of the voltage applied to the liquid crystal is inverted for each horizontal scanning line has been described as an example. The present invention is not limited to this, and can be applied to other inversion drive type display devices in which opposed AC drive is performed. For example, the present invention can be applied to an n-line inversion driving type liquid crystal display device (n≥2) or a frame inversion driving type liquid crystal display device in which the polar force of the voltage applied to the liquid crystal is inverted for each horizontal scanning line. Furthermore, the same technique as that of the present invention can be applied to a liquid crystal display device that does not perform opposed AC drive, that is, a liquid crystal display device that performs opposed DC drive. That is, when switching the counter voltage as a DC voltage, by controlling the bias voltage so that the change in the bias voltage for switching is transiently expanded, that is, the bias voltage is necessary for switching the counter voltage. The switching period can be shortened by controlling the bias voltage so that it changes more greatly than the change. In this case, the coupling capacitor C1 in the configuration of FIG. 3 does not exist, but the connection point of the first resistance element R1 and the second resistance element R2, that is, the output point, is a liquid crystal panel as a capacitive load. A common electrode is connected.
[0081] 上記第 1および第 2の実施形態の説明からわ力るように、本発明は、液晶パネルが 点順次駆動される力線順次駆動されるかに関わらず適用可能であり、また、例えばソ ースドライバの出力端子と液晶パネルのソースラインとの間に切替スィッチを設けるこ とにより各水平期間内で複数のデータ信号線を時分割的に駆動する液晶表示装置 にも適用可能である。 [0081] As can be seen from the description of the first and second embodiments, the present invention is applicable regardless of whether the liquid crystal panel is driven in a line-sequential manner. For example, the present invention can be applied to a liquid crystal display device in which a plurality of data signal lines are driven in a time division manner within each horizontal period by providing a switching switch between the output terminal of the source driver and the source line of the liquid crystal panel.
[0082] 上記第 1の実施形態における共通電極駆動部 410の表示開始時の動作の説明か らゎ力るように、本発明は、表示開始時におけるノィァス起動期間の短縮にも有効で あることから、単一の最適対向電圧しか有さない液晶表示装置にも適用可能である。
産業上の利用可能性 [0082] As can be seen from the description of the operation at the start of display of the common electrode driving unit 410 in the first embodiment, the present invention is also effective in shortening the noise activation period at the start of display. Therefore, the present invention can be applied to a liquid crystal display device having only a single optimum counter voltage. Industrial applicability
本発明は、複数の画素電極とそれに対向する共通電極との間に電圧を印加するこ とによって画像を表示する表示装置であって共通電極に印加すべき対向電圧の値 が所定周期で 2つの電圧値の間で交互に切り替わるいわゆる対向 AC駆動方式の表 示装置に適用されるものであり、表示モード等の切替に応じて対向電圧が変更され る対向 AC駆動方式の液晶表示装置に適する。
The present invention provides a display device that displays an image by applying a voltage between a plurality of pixel electrodes and a common electrode facing the pixel electrode, and the value of the counter voltage to be applied to the common electrode is two in a predetermined cycle. This is applied to a so-called counter AC drive type display device that alternately switches between voltage values, and is suitable for a counter AC drive type liquid crystal display device in which the counter voltage is changed according to switching of the display mode or the like.
Claims
[1] 表示すべき画像を構成する単位画像にそれぞれ対応する複数の個別電極と当該 複数の個別電極に対向するように設けられた共通電極との間に前記画像に応じて電 圧を印加することにより前記画像を表示する表示装置の駆動回路であって、 前記画像に応じた電圧を前記複数の個別電極に与える個別電極駆動部と、 前記共通電極に与えるべき対向電圧を出力し、当該対向電圧の値を所定の高電 圧値と所定の低電圧値との間で所定周期で交互に切り替える共通電極駆動部とを 備え、 [1] A voltage is applied according to the image between a plurality of individual electrodes corresponding to unit images constituting an image to be displayed and a common electrode provided to face the plurality of individual electrodes. A display device driving circuit for displaying the image, wherein an individual electrode driving unit that applies a voltage corresponding to the image to the plurality of individual electrodes; and a counter voltage to be applied to the common electrode; A common electrode driver that alternately switches a voltage value between a predetermined high voltage value and a predetermined low voltage value at a predetermined cycle,
前記共通電極駆動部は、 The common electrode driving unit includes:
互いに直列に接続された 2つの抵抗素子を含む抵抗列と、 A resistor string including two resistive elements connected in series with each other;
前記抵抗列の両端間に直流電圧を与える直流電圧発生回路と、 A DC voltage generating circuit for applying a DC voltage between both ends of the resistor string;
所定のコンデンサと、 With a given capacitor,
前記コンデンサを介して前記 2つの抵抗素子の間の接続点に接続され、前記対 向電圧の波形に対応する矩形波電圧を出力する矩形波電圧発生回路と、 A rectangular wave voltage generating circuit connected to a connection point between the two resistance elements via the capacitor and outputting a rectangular wave voltage corresponding to the waveform of the counter voltage;
前記直流電圧の値を変化させることにより前記接続点の電圧の直流成分を変更 するバイアス制御部とを含み、 A bias control unit that changes a DC component of the voltage at the connection point by changing a value of the DC voltage,
前記共通電極駆動部は、前記接続点の電圧を前記対向電圧として前記共通電極 に与え、 The common electrode driving unit applies the voltage at the connection point to the common electrode as the counter voltage;
前記バイアス制御部は、前記対向電圧の直流成分を変更するときに、前記直流電 圧の値を当該直流成分の変更に必要な変化よりも過渡的に大きく変化させることを 特徴とする駆動回路。 The bias control unit, when changing the DC component of the counter voltage, changes the value of the DC voltage transiently larger than the change necessary for changing the DC component.
[2] 前記バイアス制御部は、前記対向電圧の直流成分を変更するときに、当該直流成 分の変更直後の所定期間だけ、前記直流電圧の値を当該直流成分の変更に必要 な変化よりも大きく変化させることを特徴とする、請求項 1に記載の駆動回路。 [2] When the bias control unit changes the DC component of the counter voltage, the value of the DC voltage is changed from the change necessary for the change of the DC component only for a predetermined period immediately after the change of the DC component. 2. The driving circuit according to claim 1, wherein the driving circuit is largely changed.
[3] 前記バイアス制御部は、前記表示装置での表示開始時に、前記直流電圧の値を、 前記表示装置での表示のために前記対向電圧が有すべき直流成分を前記接続点 の電圧に持たせるのに必要な変化よりも過渡的に大きく変化させることを特徴とする 、請求項 1に記載の駆動回路。
[3] The bias control unit converts the DC voltage value at the start of display on the display device into the DC component that the counter voltage should have for display on the display device. The drive circuit according to claim 1, wherein the drive circuit is changed in a transitionally larger manner than the change necessary for holding.
[4] 前記接続点の電圧を検出する電圧検出器を更に備え、 [4] It further comprises a voltage detector for detecting the voltage at the connection point,
前記バイアス制御部は、前記対向電圧の直流成分の変更後の値として予め決めら れた設定値と、前記電圧検出器の検出結果に基づき決定される前記接続点の電圧 の直流成分の値である検出値との差が打ち消されるように、前記直流電圧の値を決 定することを特徴とする、請求項 1に記載の駆動回路。 The bias control unit includes a set value predetermined as a value after the change of the DC component of the counter voltage and a value of the DC component of the voltage at the connection point determined based on the detection result of the voltage detector. 2. The drive circuit according to claim 1, wherein the value of the DC voltage is determined so that a difference from a certain detection value is canceled out.
[5] 前記バイアス制御部は、 [5] The bias control unit includes:
前記差が所定の許容値よりも大きくかつ前記設定値が前記検出値よりも大きい場 合には、予め決められた最大値を前記直流電圧の値として決定し、 When the difference is larger than a predetermined allowable value and the set value is larger than the detected value, a predetermined maximum value is determined as the value of the DC voltage;
前記差が前記許容値よりも大きくかつ前記設定値が前記検出値よりも小さい場合 には、予め決められた最小値を前記直流電圧の値として決定し、 When the difference is larger than the allowable value and the set value is smaller than the detected value, a predetermined minimum value is determined as the value of the DC voltage,
前記差が前記許容値以下である場合には、前記設定値を前記直流電圧の値とし て決定することを特徴とする、請求項 4に記載の駆動回路。 5. The drive circuit according to claim 4, wherein when the difference is equal to or less than the allowable value, the set value is determined as a value of the DC voltage.
[6] 表示すべき画像を構成する単位画像にそれぞれ対応する複数の個別電極と当該 複数の個別電極に対向するように設けられた共通電極との間に前記画像に応じて電 圧を印加することにより前記画像を表示する表示装置の駆動回路であって、 前記画像に応じた電圧を前記複数の個別電極に与える個別電極駆動部と、 前記共通電極に与えるべき対向電圧を出力し、当該対向電圧の値を所定の高電 圧値と所定の低電圧値との間で所定周期で交互に切り替える共通電極駆動部とを 備え、 [6] A voltage is applied according to the image between a plurality of individual electrodes corresponding to unit images constituting an image to be displayed and a common electrode provided to face the plurality of individual electrodes. A display device driving circuit for displaying the image, wherein an individual electrode driving unit that applies a voltage corresponding to the image to the plurality of individual electrodes; and a counter voltage to be applied to the common electrode; A common electrode driver that alternately switches a voltage value between a predetermined high voltage value and a predetermined low voltage value at a predetermined cycle,
前記共通電極駆動部は、 The common electrode driving unit includes:
互いに直列に接続された 2つの抵抗素子を含む抵抗列の両端間に直流電圧を 与え、 A DC voltage is applied across the resistor string including two resistance elements connected in series with each other,
所定のコンデンサを介して前記 2つの抵抗素子の間の接続点に前記対向電圧の 波形に対応する矩形波電圧を与え、 A rectangular wave voltage corresponding to the waveform of the counter voltage is applied to a connection point between the two resistance elements through a predetermined capacitor,
前記接続点の電圧を前記対向電圧として前記共通電極に与え、 Applying the voltage at the connection point to the common electrode as the counter voltage;
前記対向電圧の直流成分を変更するときには、前記直流電圧の値を当該直流成 分の変更に必要な変化よりも過渡的に大きく変化させることを特徴とする駆動回路。 When changing the direct current component of the counter voltage, the drive circuit is characterized in that the value of the direct current voltage is changed transiently larger than the change necessary for changing the direct current component.
[7] 請求項 1から 6までのいずれか 1項に記載の駆動回路を備えた表示装置。
[7] A display device comprising the drive circuit according to any one of [1] to [6].
[8] 表示すべき画像を構成する単位画像にそれぞれ対応する複数の個別電極と当該 複数の個別電極に対向するように設けられた共通電極との間に前記画像に応じて電 圧を印加することにより前記画像を表示する表示装置の駆動方法であって、 [8] A voltage is applied according to the image between a plurality of individual electrodes respectively corresponding to unit images constituting an image to be displayed and a common electrode provided to face the plurality of individual electrodes. A display device driving method for displaying the image by:
前記画像に応じた電圧を前記複数の個別電極に与える個別電極駆動ステップと、 前記共通電極に与えるべき対向電圧を出力し、当該対向電圧の値を所定の高電 圧値と所定の低電圧値との間で所定周期で交互に切り替える共通電極駆動ステップ とを備え、 An individual electrode driving step for applying a voltage corresponding to the image to the plurality of individual electrodes; and a counter voltage to be applied to the common electrode is output, and the value of the counter voltage is set to a predetermined high voltage value and a predetermined low voltage value. A common electrode driving step that alternately switches between and with a predetermined cycle,
前記共通電極駆動ステップは、 The common electrode driving step includes:
互いに直列に接続された 2つの抵抗素子を含む抵抗列の両端間に直流電圧を 与える直流電圧印加ステップと、 A DC voltage applying step for applying a DC voltage between both ends of a resistor string including two resistance elements connected in series;
所定のコンデンサを介して前記 2つの抵抗素子の間の接続点に前記対向電圧の 波形に対応する矩形波電圧を与える矩形波電圧印加ステップと、 A rectangular wave voltage applying step of applying a rectangular wave voltage corresponding to the waveform of the counter voltage to a connection point between the two resistance elements via a predetermined capacitor;
前記接続点の電圧を前記対向電圧として前記共通電極に与える出力ステップと、 前記対向電圧の直流成分を変更するときには、前記直流電圧の値を当該直流成 分の変更に必要な変化よりも過渡的に大きく変化させるバイアス制御ステップと を備えることを特徴とする駆動方法。 An output step of applying the voltage at the connection point to the common electrode as the counter voltage, and when changing the DC component of the counter voltage, the value of the DC voltage is more transient than the change necessary for the change of the DC component. And a bias control step for greatly changing the driving method.
[9] 前記バイアス制御部ステップでは、前記表示装置での表示開始時に、前記直流電 圧が、前記表示装置での表示のために前記対向電圧が有すべき直流成分を前記接 続点の電圧に持たせるのに必要な変化よりも過渡的に大きく変化することを特徴とす る、請求項 8に記載の駆動方法。 [9] In the bias control unit step, at the start of display on the display device, the DC voltage changes the DC component that the counter voltage should have for display on the display device to the voltage at the connection point. 9. The driving method according to claim 8, wherein the driving method changes transiently and greatly than the change necessary for holding.
[10] 前記接続点の電圧を検出する検出ステップを更に備え、 [10] The method further comprises a detection step of detecting a voltage at the connection point,
前記バイアス制御ステップでは、前記対向電圧の直流成分の変更後の値として予 め決められた設定値と、前記検出ステップでの検出結果に基づき決定される前記接 続点の電圧の直流成分の値である検出値との差が打ち消されるように、前記直流電 圧の値が決定されることを特徴とする、請求項 8に記載の駆動方法。
In the bias control step, a setting value predetermined as a value after the change of the DC component of the counter voltage and a value of the DC component of the voltage at the connection point determined based on the detection result in the detection step 9. The driving method according to claim 8, wherein the value of the DC voltage is determined so that a difference from the detected value is cancelled.
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