WO2005043747A2 - High linearity doherty communication amplifier with bias control - Google Patents
High linearity doherty communication amplifier with bias control Download PDFInfo
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- WO2005043747A2 WO2005043747A2 PCT/US2004/034797 US2004034797W WO2005043747A2 WO 2005043747 A2 WO2005043747 A2 WO 2005043747A2 US 2004034797 W US2004034797 W US 2004034797W WO 2005043747 A2 WO2005043747 A2 WO 2005043747A2
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- amplifier
- power
- voltage control
- peak
- control signal
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- 238000004891 communication Methods 0.000 title description 5
- 238000000034 method Methods 0.000 claims description 19
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- 230000003321 amplification Effects 0.000 abstract description 6
- 238000003199 nucleic acid amplification method Methods 0.000 abstract description 6
- 230000000153 supplemental effect Effects 0.000 abstract description 3
- 239000003990 capacitor Substances 0.000 description 36
- 238000010586 diagram Methods 0.000 description 23
- 238000012545 processing Methods 0.000 description 9
- 238000005516 engineering process Methods 0.000 description 6
- 230000001419 dependent effect Effects 0.000 description 5
- 230000008878 coupling Effects 0.000 description 4
- 238000010168 coupling process Methods 0.000 description 4
- 238000005859 coupling reaction Methods 0.000 description 4
- 238000006842 Henry reaction Methods 0.000 description 3
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 2
- 239000004020 conductor Substances 0.000 description 2
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- 239000004065 semiconductor Substances 0.000 description 2
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Classifications
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/02—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
- H03F1/0205—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers
- H03F1/0288—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers using a main and one or several auxiliary peaking amplifiers whereby the load is connected to the main amplifier using an impedance inverter, e.g. Doherty amplifiers
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/32—Modifications of amplifiers to reduce non-linear distortion
Definitions
- the present invention relates to a power amplification circuit for use in wireless communication technologies, and more particularly to a power amplifier circuit in a mobile handset.
- a Doherty-type power amplifier has been introduced recently as a circuit for increasing efficiency of the RF power amplifier. Unlike other conventional power amplifiers, whose efficiency is low over the low output power range, the Doherty-type power amplifier is designed to maintain an optimum efficiency over a wide output power range (e.g., in low, intermediate, and high output power ranges).
- a common Doherty-type power amplifier design includes both a carrier and a peak amplifier.
- the carrier amplifier i.e., power or main amplifier
- the peak amplifier (i.e., supplemental or auxiliary amplifier) operates in cooperative fashion with the carrier amplifier to maintain a high efficiency until the power amplifier, as a whole, produces a maximum output power.
- the peak amplifier When the power amplifier operates within a low power output range, only the carrier amplifier is operational; the peak amplifier, being biased as a class B or C, does not operate. But, when the power amplifier operates within a high power output range, the peak amplifier is active and may introduce nonlinearity into the overall power amplifier since the peak amplifier is biased as a highly nonlinear class B or class C amplifier.
- the above-mentioned Doherty-type power amplifier is designed to operate while meeting the linearity specification over an entire output power range and where high efficiency is maintained.
- the Doherty-type power amplifier comprises a carrier amplifier and a peak amplifier that operate with each other, the Dohefty-type power amplifier in practice does not satisfy the linearity specification (e.g., in terms of phase or gain characteristics) over the entire output power range where high efficiency is maintained.
- the linearity specification e.g., in terms of phase or gain characteristics
- the Unearity characteristics of such a power amplification device are difficult to predict, which makes it difficult to improve such linearity characteristics because the peak amplifier is biased at a relatively constant, low DC current level, such as a current to set the peak amplifier as a class B or C amplifier.
- a specific embodiment of the present invention provides a power amplifier in a mobile handset that improves efficiency and linearity by applying a voltage control signal to a peak amplifier to bias the peak amplifier.
- a baseband modem chipset generates the voltage control signal according to power levels of signals received from a base station.
- a control voltage in a first state is applied to the peak amplifier so that the power amplifier is operated in a Doherty mode and, in the high output power range, a control voltage in a second state is applied to the peak amplifier so as to sufficiently manage the non- linearity characteristic of the power amplifier.
- the voltage control signal in the first state is a high voltage state signal
- the voltage control signal in the second state is a low voltage state signal.
- the voltage control signal in the first state is the low voltage state signal
- the voltage control signal in the second state is the high voltage state signal.
- the power amplifier in a mobile handset comprises a phase shifter, coupled to input terminals of a carrier amplifier and a peak amplifier, for generating a phase difference between carrier amplifier and peak amplifier input signals to compensate for the phase shift at an output of carrier and peak amplifiers; and an output matching unit for transmitting the output powers from the carrier amplifier and the peak amplifier to an output stage.
- the peak amplifier includes a voltage control unit configured to receive the voltage control signal and bias the peak amplifier in accordance with the power levels of signals received from the base station.
- the phase shifter is implemented with a 3dB hybrid coupler, for example, for distributing certain input powers to the carrier amplifier and the peak amplifier, minimizing interference between the carrier amplifier and the peak amplifier and transmitting signals in such a manner that the phase of input power applied to the peak amplifier is substantially 90° delayed from the phase of input power applied to the carrier amplifier.
- the phase shifter is a phase difference compensator connected in between the input stage of the power amplifier and the peak amplifier, for delaying the phase of input signal applied to the peak amplifier by 90° from the phase of input signal applied to the carrier amplifier.
- the voltage control unit controls a DC bias current of the peak amplifier via the voltage control signal such that the power amplifier is operated in a Doherty mode if the power amplifier operates within the low output power range.
- the voltage control unit controls the DC bias current of the peak amplifier via the voltage control signal such that the power amplifier satisfies non-linearity characteristics.
- FIG. 1 is a block diagram showing the structure of a power amplifier in a mobile handset in accordance with one embodiment of the present invention
- FIG. 2 shows an equivalent circuit of a 3dB hybrid coupler that can be used in the power amplifier of FIG. 1
- FIG. 3 A is a block diagram of the carrier amplifier illustrated in FIG. 1, according to one embodiment of the invention
- FIG. 3B is a block diagram of the input matching unit illustrated in FIG. 3A, according to one embodiment of the invention
- FIG. 3C is a block diagram of the inter-stage matching unit illustrated in FIG. 3A, according to the present invention
- FIG. 3D is a block diagram of the first stage amplifier illustrated in FIG. 3A, in accordance with one embodiment of the invention
- FIG. 3 A is a block diagram showing the structure of a power amplifier in a mobile handset in accordance with one embodiment of the present invention
- FIG. 2 shows an equivalent circuit of a 3dB hybrid coupler that can be used in the power amplifier of FIG. 1
- FIG. 3 A is a block
- FIG. 3E is a block diagram of the second stage amplifier illustrated in FIG. 3A, according to one embodiment of the invention
- FIG. 4A is a block diagram of the peak amplifier illustrated in FIG. 1, according to one embodiment of the invention
- FIG. 4B is a block diagram of the second stage amplifier/voltage control unit illustrated in FIG. 4A, according to one embodiment of the invention
- FIG. 4C is a block diagram of the second stage amplifier/voltage control unit illustrated in FIG. 4A, according to another embodiment of the invention
- FIG. 6 shows an equivalent circuit of the exemplary output matching unit of FIG. 5, implemented with lumped elements;
- FIG. 5 is a block diagram of the exemplary output matching unit illustrated in FIG. 1, implemented with lumped elements
- FIG. 7 is a graph illustrating efficiency characteristics dependent on a voltage control signal applied to an exemplary peak amplifier
- FIG. 8 is a graph illustrating non-linearity characteristics dependent on a voltage control signal applied to an exemplary peak amplifier
- FIG. 9 is a graph illustrating efficiency characteristics corresponding to modes of the power amplifier in accordance with one embodiment of the present invention
- FIG. 10 is a graph illustrating non-linearity characteristics corresponding to modes of the power amplifier in accordance with a specific embodiment of the present invention
- FIG. 11 is a graph illustrating gain characteristics corresponding to modes of the power amplifier in accordance with the present invention
- FIG. 12 is a block diagram showing the structure of a power amplifier in accordance with another embodiment of the present invention.
- FIG. 1 illustrates the structure of an exemplary power amplifier in a mobile handset in accordance with a specific embodiment of the present invention.
- the power amplifier 100 illustrated in FIG. 1 comprises a hybrid coupler, such as exemplary 3dB hybrid coupler 110, a carrier amplifier 120, a peak amplifier 130, and an output matching unit 140.
- 3dB hybrid coupler 110 distributes certain input powers to carrier amplifier 120 and peak amplifier 130, minimizes interference between carrier amplifier 120 and peak amplifier 130 and transmits signals in such a manner that the phase of input power of peak amplifier 130 is 90° ( ⁇ /4) delayed from the phase of input power of carrier amplifier 120. Accordingly, the 3dB hybrid coupler 110 compensates for a later processing of output signals from carrier amplifier 120 and peak amplifier 130 by output matching unit 140 by generating a 90° ( ⁇ /4) phase delay at the output matching unit 140 between the phases of output signals from carrier amplifier 120 and peak amplifier 130.
- 3dB hybrid coupler 110 s introduction of phase difference between the phases of output powers from carrier amplifier 120 and peak amplifier 130 to compensate for subsequent processing of the output powers by the output matching unit 140 results in an equalization of the phases of the output powers and an optimum output power signal at an output stage 70.
- 3dB hybrid coupler 110 is discussed further below in conjunction with FIG. 2.
- Carrier amplifier 120 amplifies signals received from 3dB hybrid coupler 110.
- carrier amplifier 120 includes a transistor that can be sized smaller than that of a transistor constituting peak amplifier 130.
- the ratio of these respective transistor sizes determines an output power range over which the maximum efficiency can be maintained. The higher this ratio, the wider the output power range over which the maximum efficiency can be maintained.
- each amplifier can include one or more transistors or other like circuit elements.
- carrier amplifier 120 and peak amplifier 130 can be implemented in any known semiconductor technologies, such as Si LDMOS, GaAS MESFET, GaAs pHEMT, GaAs HBT, or the like. Carrier amplifier 120 is discussed further below in conjunction with FIGS.
- Peak amplifier 130 which is another amplifier for amplifying signals received from 3dB hybrid coupler 110, is not substantially operated while low-level input signals are applied to carrier amplifier 120. This is made possible by applying a voltage control signal Vc to peak amplifier 130 such that peak amplifier 130 is biased as a class B or C amplifier, where little or no DC current flows. Over the low output power range where peak amplifier 130 is not substantially operated, carrier amplifier 120 has an output impedance having a relatively constant and high value. Since peak amplifier 130 does not draw any current, power amplifier 100 can obtain improved efficiency at an output power level which is lower than the highest output power level that carrier amplifier 120 can generate.
- Peak amplifier 130 is configured to receive the voltage control signal Vc from a baseband modem chipset (not shown) or from power amplifier RF processing circuitry (not shown).
- the baseband modem chipset generates the voltage control signal Vc based upon power levels of signals received from a base station (not shown).
- the power amplifier RF processing circuitry processes signals from the baseband modem chipset, and is well know to one skilled in the art. Peak amplifier 130 is discussed further below in conjunction with FIGS. 4A-4D.
- Output matching unit 140 includes a first ⁇ /4 transformer 143.
- First ⁇ /4 transformer 143 operates as an impedance inverter and is used to provide an impedance at a carrier amplifier output terminal 50 that is inverted from an impedance at a peak amplifier output terminal 60.
- a second ⁇ /4 transformer 145 at the peak amplifier output terminal 60 of the peak amplifier 130 matches an output impedance of the power amplifier 100 to a reference characteristic impedance which is typically 50 ohms.
- Output matching unit 140 is discussed further below in conjunction with FIGS. 5-6.
- FIG. 2 shows an equivalent circuit of 3dB hybrid coupler 110 in accordance with one embodiment of the present invention.
- the FIG. 1 shows an equivalent circuit of 3dB hybrid coupler 110 in accordance with one embodiment of the present invention.
- 2 embodiment of 3dB hybrid coupler 110 comprises a plurality of lumped elements, including a capacitor 111, an inductor 112, a capacitor 113, an inductor 114, an inductor 115, a capacitor 116, an inductor 117, and a capacitor 118.
- nominal capacitances of capacitors 111, 113, 116, and 118 are a few pico-Farads (pF)
- nominal inductances of inductors 112, 114, 115, and 117 are a few nano-Henries (nH).
- 3dB hybrid coupler 110 After signals are received by input stage 10 of 3dB hybrid coupler 110, which has the signal coupling of about 3dB or more, such signals are transmitted to carrier amplifier input terminal 30 (FIG. 1) and to peak amplifier input terminal 40 (FIG. 1).
- the signal at carrier amplifier input terminal 30 and the signal at peak amplifier input terminal 40 have a phase difference at or about 90° ( ⁇ /4, or quarter-wave).
- 3dB hybrid coupler 110 can be implemented with a transmission line, such as a coupled line coupler, a Lange coupler, a branch line coupler or other like coupling circuits known in the art.
- 3dB hybrid coupler 110 may be implemented using a Microwave Monolithic Integrated Circuit (MMIC) chip technology, such as GaAS or any other known semiconductor technologies. That is, exemplary hybrid coupler 110 can be fabricated as an integrated circuit, which can be packaged as a single power amplifier device or Chip. 'In sbll yet a ⁇ bther example, 3dB hybrid coupler 110 may be implemented by the Low Temperature Co-fired Ceramic (LTCC) method or other similar technologies.
- LTCC Low Temperature Co-fired Ceramic
- carrier amplifier 120 is a two-stage amplifier and includes an input matching unit 305, a first stage amplifier 310, an inter-stage matching unit 315 and a second stage amplifier 320.
- the input matching unit 305 matches an output impedance of 3dB hybrid coupler 110 with an input impedance of carrier amplifier 120.
- the inter-stage matching unit 315 matches an output impedance of first stage amplifier 310 with an input impedance of second stage amplifier 320.
- Input matching unit 305 and inter-stage matching unit 315 are discussed further below in conjunction with HGS. 3B and 3C, respectively.
- carrier amplifier 120 includes conductor lines 325 electrically coupled to a DC bias voltage VI (not shown) and conductor lines 330 electrically coupled to a DC bias voltage V2 (not shown) for biasing first stage amplifier 310 and second stage amplifier 320.
- a DC bias voltage VI (not shown)
- V2 DC bias voltage
- FIG. 3B is a block diagram of input matching unit 305 illustrated in HG. 3A, according to one embodiment of the invention.
- Input matching unit 305 includes an inductor 306, a capacitor 307 and a capacitor 308.
- Inductor 306 electrically couples 3dB hybrid coupler 110 (HG. 1) with capacitor 307 and capacitor 308. Additionally, capacitor 307 is electrically coupled to ground, and capacitor 308 is electrically coupled to first stage amplifier 310 (HG. 3A). In one embodiment of the invention, electrical characteristics of inductor 306, capacitor 307, and capacitor 308 are selected such that an output impedance of 3dB hybrid coupler 110 is matched to an input impedance of earner amplifier 120 (FIG. 3A), measured at a terminal 30. For example, capacitances of capacitors 307 and 308 are nominally a few pico-Farads, and inductor 306 has a nominal inductance of a few nano-Henries. [00025] HG. 3C is a block diagram of inter-stage matching unit 315 illustrated in HG.
- Inter-stage matching unit 315 includes a capacitor 309, an inductor 311 and a capacitor 312.
- Capacitor 309 electrically couples a signal received from first stage amplifier 310 (HG. 3A) with inductor 311 and capacitor 312. Furthermore, inductor 311 is electrically coupled to ground, and capacitor 312 is electrically coupled to second stage amplifier 320 (HG. 3A).
- electrical characteristics of capacitor 309, inductor 311, and capacitor 312 are selected such that an output impedance of first stage amplifier 310 (HG. 3 A) is matched to an input impedance of second stage amplifier 320 (HG. 3 A).
- HG. 3D is a block diagram of first stage amplifier 310 illustrated in HG. 3 A, in accordance with one embodiment of the invention.
- First stage amplifier 310 includes a conventional bias unit 1 (CBU1) 335, a conventional bias unit 2 (CBU2) 340 and a transistor Qll 345.
- CBU1 bias unit 1
- CBU2 bias unit 2
- transistor Qll 345 is configured as a common-emitter npn bipolar transistor.
- CBU1 335 includes a resistor 313, a diode 314, a diode 316, a resistor 317, a capacitor 318, and a transistor QIA 319.
- CBU2 340 includes a transmission line 321 and a capacitor 322.
- electrical characteristics of resistor 313, diode 314, diode 316, resistor 317, capacitor 318, and transistor QIA 319 are selected in conjunction with DC bias voltages VI and V2 to bias a base of transistor Qll 345 for normal mode of operation.
- resistor 313 may have a resistance in a range of several hundred Ohms to several kilo- "OHm's
- resistor 317 may have a resistance in a range of several Ohms to several hundred Ohms
- a Q1A:Q11 transistor size ratio may be approximately in a range of 1:4 to 1:10.
- electrical characteristics of transmission line 321 and capacitor 322, collectively referred to as first stage collector bias elements for descriptive purposes, are selected in conjunction with bias voltage V2 to bias a collector of transistor Ql l 345 for normal mode of operation.
- HG. 3E is a block diagram of second stage amplifier 320 illustrated in HG. 3A, according to one embodiment of the invention.
- Second stage amplifier 320 includes a conventional bias unit 3 (CBU3) 350 and a transistor Q12 355.
- CBU3 conventional bias unit 3
- CBU3 350 includes a resistor 323, a diode 324, a diode 326, a resistor 327, a capacitor 328, and a transistor Q1B 329, collectively referred to as second stage base bias elements.
- coupling of the second stage base bias elements of CBU3 350 is identical to coupling of the first stage base bias elements of CBUl 335 (HG. 3D).
- electrical characteristics of the second stage base bias elements may or may not be identical to electrical characteristics of the first stage base bias elements.
- resistor 313 (HG. 3D) and resistor 323 may have different resistance values
- transistor QIA 319 (HG. 3D) and transistor Q1B 329 may be of different sizes.
- resistor 323, diode 324, diode 326, resistor 327, capacitor 328, and transistor Q1B 329 are selected in conjunction with DC bias voltages VI and V2 to bias a base of transistor Q12 355 for normal-mode operation, based upon operating characteristics of transistor Q12 355 and specifications of power amplifier 100 (HG. 1).
- resistor 323 may have a're ' sistance in a range of several hundred Ohms to several kilo-Ohms
- resistor 327 may have a resistance in a range of several Ohms to several hundred Ohms
- a Q1B:Q12 transistor size ratio may be approximately in a range of 1:4 to 1:10
- a Ql 1:Q12 transistor size ratio may be approximately in a range of 1 :4 to 1 :8.
- the scope of the present invention covers other transistor size ratios that are within operating specifications of carrier amplifier 120 (HG. 1) and power amplifier 100 (HG. 1).
- transistor Q12 355 is configured as a common-emitter npn bipolar transistor.
- HG. 4A is a block diagram of peak amplifier 130 illustrated in HG. 1, according to one embodiment of the invention.
- peak amplifier 130 is a two-stage amplifier and includes an input matching unit 405, a first stage amplifier 410, an inter-stage matching unit 415 and a second stage amplifier/voltage control unit 420.
- input matching unit 405 is configured as input matching unit 305 (HG. 3B) with electrical characteristics of inductor 306 (HG. 3B), capacitor 307 (HG. 3B), and capacitor 308 (HG.
- inter-stage matching unit 415 is configured as inter-stage matching unit 315 (HG. 3C) with electrical characteristics of capacitor 309 (HG. 3C), inductor 311 (HG. 3C), and capacitor 312 (HG. 3C) selected such that an output impedance of first stage amplifier 410 is matched to an input impedance of second stage amplifier/voltage control unit 420.
- first stage amplifier410 is configured as first stage amplifier 310 (HG.
- HG. 4B is a block diagram of second stage amplifier/voltage control unit 420 illustrated in HG. 4A, according to one embodiment of the invention.
- the second stage amplifier/voltage control unit 420 includes a second stage amplifier 445 and a voltage control unit 435.
- Second stage amplifier 445 is configured as second stage amplifier 320 (HG. 3E).
- second stage amplifier 445 includes a CBU3 440 and a transistor Q22 450.
- CBU3 440 includes a resistor 423, a diode 424, a diode 426, a resistor 427, a capacitor 428, and a transistor Q2B 429, collectively referred to as second stage peak amplifier base bias elements.
- electrical characteristics of the second stage peak amplifier base bias elements are selected in conjunction with DC bias voltages V3 and V4 to bias a base of transistor Q22450 for normal-mode operation, based upon operating characteristics of transistor Q22 450 and specifications of power amplifier 100 (HG. 1).
- resistor 423 may have a resistance in a range of several hundred Ohms to several kilo-Ohms
- resistor 427 may have a resistance in a range of several Ohms to several hundred Ohms
- a Q2B:Q22 transistor size ratio may be approximately in a range of 1:4 to 1: 10
- DC bias voltage V3 may be in a range of 2.8V to 3.0V
- DC bias voltage V4 may be in a range of 3.2V to 4.2V.
- Second stage amplifier 445 receives a signal from inter-stage matching unit 415, amplifies the received signal based upon the voltage control signal Vc received by voltage control unit 435, and sends the amplified signal to peak amplifier output terminal 60.
- Voltage control unit 435 receives the voltage control signal Vc (typically in a range of 2.8V to 4.2V), and controls a DC bias current of second stage amplifier 445.
- voltage control unit 435 includes a resistor 431 and a transistor Qc 432.
- resistor 431 has a resistance in a range of several hundred Ohms to several kilo- Ohms, and a Qc:Q2B transistor size ratio may be approximately in a range of 1:1 to 1:8.
- a base station for receiving, transmitting and processing RF signals sends signals to a baseband modem chipset (not shown) in response to RF signals received from power amplifier 100.
- the baseband modem chipset processes the signals, and generates the voltage control signal Vc.
- Voltage control unit 435 then receives the voltage control signal Vc from the baseband modem chipset.
- power amplifier 100 includes RF processing circuitry (not shown) for processing the signals received by the baseband modem chipset.
- the RF processing circuitry generates the voltage control signal Vc, and sends the voltage control signal to the voltage control unit 435.
- the RF processing circuitry and the baseband modem chipset are well know in the art, and will not be described in further detail.
- the baseband modem chipset generates the voltage control signal Vc based upon power levels of signals transmitted by the base station and received by the baseband modem chipset. For example, if the baseband modem chipset, upon receiving the signals from the base station, determines that power amplifier 100 operates in a low power output range, the baseband modem chipset sends a "high" voltage control signal Vc (i.e., a high voltage state signal) to voltage control unit 435.
- Vc i.e., a high voltage state signal
- the baseband modem chipset upon receiving the signals from the base station, determines that power amplifier 100 operates in a high power output range, the baseband modem chipset sends a "low" voltage control signal Vc (i.e., low voltage state signal) to voltage control unit 435.
- Vc low voltage state signal
- the scope of the present invention covers a voltage control signal Vc corresponding to any voltage state and to any power output range.
- the voltage control unit 435 receives the low voltage state control signal Vc and sets a DC bias current of second stage amplifier 445 of peak amplifier 130 (HG 4A) via the received low voltage state control signal Vc.
- the low voltage state control signal Vc turns off transistor Qc 432, increases base-emitter currents (not shown) of transistors Q2B 429 and Q22 450, and biases peak amplifier 130 as a class AB amplifier.
- the voltage control unit 435 receives the high voltage state control signal Vc and sets a DC bias current of second stage amplifier 445 of peak amplifier 130 via the received high voltage state control signal Vc.
- the high voltage state control signal Vc turns on transistor Qc 432, and diverts base-emitter current of transistor Q2B 429 to collector-emitter current of transistor Qc 432.
- base-emitter currents of transistor Q2B 429 and Q22450 decrease, and peak amplifier 130 is biased as either a class B or class C amplifier, dependent upon a resultant bias state of transistor Q22 450.
- HG. 4C is a block diagram of second stage amplifier/voltage control unit 420 illustrated in HG. 4A, according to another embodiment of the invention.
- Second stage amplifier/voltage control unit 420 includes second stage amplifier 445 and a voltage control unit 455.
- Second stage amplifier 445 is identically configured as second stage amplifier 445 illustrated in HG. 4B.
- Voltage control unit 455 includes a resistor 456, a resistor 457, a transistor Qcl 458, and a transistor Qc2459.
- a DC bias voltage V3 is applied to voltage control unit 455 via a line 461.
- resistor 456 has a resistance in a range of several hundred Ohms to several kilo-Ohms
- resistor 457 has a resistance in a range of several Ohms to several hundred Ohms
- a Qc2:Qcl transistor size ratio may be approximately in a range of 1:1 to 1:10
- a Qcl:Q2B (PIG. 4B) transistor size ratio may be approximately in a range of 1: 1 to 1:8
- DC bias voltage V3 may be in a range of 2.8V to 3.0V
- a DC bias voltage V4 may be in a range of 3.2V to 4.2V
- a voltage control signal Vc may be in a range of 2.8V to 4.2V.
- HG. 4D is a block diagram of second stage amplifier/voltage control unit 420 illustrated in HG. 4A, according to yet another embodiment of the invention.
- Second stage amplifier/voltage control unit 420 includes second stage amplifier 445 and a voltage control unit 460.
- Second stage amplifier 445 is identically configured as second stage amplifier 445 illustrated in HG. 4B.
- Voltage control unit 460 includes a resistor 462, a transistor Qc3 463, and a transistor Qc4464.
- a DC bias voltage V4 is applied to voltage control unit 460 via a line 466.
- resistor 462 has a resistance in a range of several hundred Ohms to several kilo-Ohms, a Qc3:Qc4 transistor size ratio may be approximately in a range of 1:1 to 1:10, a Qc4:Q2B (HG.
- transistor size ratio may be approximately in a range of 1:1 to 1:8, a DC bias voltage N3 may be in a range of 2.8V to 3.0V, DC bias voltage V4 may be in a range of 3.2V to 4.2V, and a voltage control signal Vc may be in a range of 2.8V to 4.2V.
- Input/output characteristics of voltage control unit 460 are similar to input/output characteristics of voltage control unit 435 (HG. 4B). That is, a low voltage state control signal Vc biases peak amplifier 130 as a class AB amplifier, and a high voltage state control signal Vc biases peak amplifier 130 as either a class B or a class C amplifier, dependent upon a resultant bias state of transistor Q22450 (HG.
- HG. 5 is a block diagram of output matching unit 140 illustrated in HG. 1.
- ⁇ and ⁇ either individually or both
- the characteristic impedances of the two ⁇ /4 transformer lines change.
- the carrier amplifier 120 may achieve the maximum efficiency at an output power level that is lower than the highest output power level that carrier amplifier 120 may generate.
- First ⁇ /4 transformer 143 and second ⁇ /4 transformer 145 may be implemented with ⁇ /4 transmission lines (T-lines), as shown in HG.
- Output matching unit 140 may be implemented with many different combinations of capacitors and inductors (143a, 143b, 143c, 143d, ..., 145a, 145b, 145c, 145d, etc.) to match a specific output impedance at output stage 70 and generate a specific impedance at carrier amplifier output terminal 50 that is inverted from an impedance at a peak amplifier output terminal 60.
- first ⁇ /4 transformer 143 and second ⁇ /4 transformer 145 may be implemented by either the LTCC method or a multi-layer method.
- first ⁇ /4 transformer 143 and second ⁇ /4 transformer 145 can be formed as a single integrated circuit.
- HG. 7 is a graph illustrating efficiency characteristics as determined by, for example, the voltage control signal Vc applied to peak amplifier 130 (HG. 1).
- Mode 0 represents the region of amplifier operation in a low output power range (i.e., from a minimum output power in dBm to point Q).
- Mode 1 represents the region of amplifier operation in a high output power range (i.e., from point Q to point S and/or T).
- an exemplary power amplifier As a current is increasingly applied to peak amplifier 130, an exemplary power amplifier according to an embodiment operates first as shown as curve D. Curves C and B represent the efficiency characteristics associated with the exemplary power amplifier as the amount of DC bias current increases beyond that associated with curve D. Curve A represents the efficiency characteristics of a general power amplifier. [00042] As current starts to flow in peak amplifier 130, peak amplifier 130 commences its operation. This changes the output impedance of carrier amplifier 120, thereby optimizing efficiency of power amplifier 100 to a certain constant level as indicated by D in HG. 7. Accordingly, as indicated by curve D in FIG.
- the Power Added Efficiency has the maximum value from the point P (when peak amplifier 130 starts to operate) to either point S, which is the highest allowable output power satisfying the given linearity conditions, or point T, which is the saturated output power, as generated by power amplifier 100.
- P Power Added Efficiency
- point P when peak amplifier 130 starts to operate
- point S which is the highest allowable output power satisfying the given linearity conditions
- point T which is the saturated output power, as generated by power amplifier 100.
- improved efficiency characteristics are achieved through an exemplary power amplifier, according to an embodiment of the present invention, in comparison with the efficiency characteristic of a general power amplifier indicated by curve A in HG. 7. As described above, this is made possible by operating peak amplifier 130 at class B or C.
- the graph of HG. 8 are non-linearity characteristics as the voltage control signal Vc is applied to peak amplifier 130.
- an exemplary power amplifier in accordance with an embodiment of the present invention meets high efficiency and linearity requirements in the low output power range, such as at point Q, where the ACPR criterion R required by the system is satisfied.
- criterion R is met even if one sets the voltage control signal Nc applied to peak amplifier 130 in such a way that peak amplifier 130 is operated at class B or C where little DC current flows, and thus that power amplifier 100 is operated in the Doherty mode.
- power amplifier 100 can achieve excellent linearity by adjusting the voltage control signal Vc applied to peak amplifier 130. This linearity can be realized by increasing the DC bias current to second stage amplifier 445 of peak amplifier 130 through decrease of the voltage control signal Vc to a point where the linearity specification (or level of linearity) designated as R in HG. 8 can be satisfied.
- HG. 9 is a graph illustrating efficiency characteristics corresponding to modes of power amplifier 100 (HG. 1) in accordance with an embodiment of the present invention.
- HG. 10 is a graph illustrating non-linearity characteristics corresponding to modes of power amplifier 100 in accordance with the present invention. In operation of exemplary power amplifier 100, consider HG. 10.
- the baseband modem chipset (not shown) sends a low voltage state control signal Vc to peak amplifier 130 so that an increased bias current may be applied to peak amplifier 130.
- Vc low voltage state control signal
- point Q is in a range of 15-19 dBm, however, the present invention covers other operating output powers at which power amplifier 100 switches modes.
- the efficiency and linearity curves in mode 1 is similar to those of curves B (HGS. 7-8). This prevents criteria R from being violated. [00047] HG.
- HG. 12 is a' block diagram showing the structure of a power amplifier in a mobile handset in accordance with another embodiment of the present invention.
- the power amplifier according to another embodiment of the present invention is substantially the same as the power amplifier 100 shown in HG. 1, in terms of the structure and operation.
- another exemplary power amplifier in accordance with another embodiment comprises a phase difference compensator 180 which replaces 3dB hybrid coupler 110 of HG. 1.
- Phase difference compensator 180 is coupled to input stage 10 and peak amplifier 130 so that the input signal is applied to peak amplifier 130 and to carrier amplifier 120, where phase difference compensator 180 has a phase difference of 90° ( ⁇ /4).
- phase difference compensator 180 may be implemented with one simple transmission line.
- the phase difference compensator 180 may be implemented with lumped elements because the simple transmission line may be approximated to inductance values. In this manner, the power amplifier may be implemented without a complex 3dB hybrid coupler 110 or a large-size transmission line outside of the amplifier.
- phase difference compensator 180 may be integrated within a single chip and/or a single integrated circuit, the overall size of power amplifier 100 may be reduced and the price of power amplifier 100 may also be reduced.
- mode 0 low output power range
- the baseband modem chipset sends a voltage control signal Vc in a first state to peak amplifier 130 such that power amplifier 100 is operated in the Doherty mode (i.e., so that peak amplifier 130 is operated as a class B or C amplifier).
- a low output power range (mode 0) generated by power amplifier 100 of the mobile handset is inadequate for proper functioning of a mobile handset/base station pair as determined by the power levels of signals received by the baseband modem chipset, and the base station requires power amplifier 100 to operate in the high output power range (mode 1)
- the baseband modem chipset sends a voltage control signal Vc in a second state to peak amplifier 130 such that DC bias current applied to peak amplifier 130 is increased and the ACPR is improved up to point R where the non-linearity specification of power amplifier 100 is satisfied.
- the voltage control signal Vc in the first state is a high voltage state signal
- the voltage control signal Nc in the second state is a low voltage state signal.
- the voltage control signal Vc in the first state is the low voltage state signal
- the voltage control signal Nc in the second state is the high voltage state signal.
- a state of a control signal Vc applied to a peak amplifier is selected so that the power amplifier of the present invention is operated in the Doherty mode and, in the high output power range, the state of the control signal Vc applied to the peak amplifier is selected so as to satisfy the non-linearity specification of the power amplifier.
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Amplifiers (AREA)
- Microwave Amplifiers (AREA)
Abstract
Description
Claims
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2004800310591A CN101164229B (en) | 2003-10-21 | 2004-10-19 | High linearity doherty communication amplifier with bias control |
GB0605973A GB2421862B (en) | 2003-10-21 | 2004-10-19 | High linearity doherty communication amplifier with bias control |
JP2006536770A JP4860476B2 (en) | 2003-10-21 | 2004-10-19 | High linearity Doherty communication amplifier with bias control |
DE112004001976T DE112004001976T5 (en) | 2003-10-21 | 2004-10-19 | High linearity Doherty communication amplifier with bias control |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/690,923 US7053706B2 (en) | 2002-02-01 | 2003-10-21 | High linearity doherty communication amplifier with bias control |
US10/690,923 | 2003-10-21 |
Publications (2)
Publication Number | Publication Date |
---|---|
WO2005043747A2 true WO2005043747A2 (en) | 2005-05-12 |
WO2005043747A3 WO2005043747A3 (en) | 2005-09-09 |
Family
ID=34549861
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/US2004/034797 WO2005043747A2 (en) | 2003-10-21 | 2004-10-19 | High linearity doherty communication amplifier with bias control |
Country Status (5)
Country | Link |
---|---|
JP (1) | JP4860476B2 (en) |
CN (1) | CN101164229B (en) |
DE (1) | DE112004001976T5 (en) |
GB (1) | GB2421862B (en) |
WO (1) | WO2005043747A2 (en) |
Cited By (5)
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JP2008035487A (en) * | 2006-06-19 | 2008-02-14 | Renesas Technology Corp | Rf power amplifier |
JP2008131186A (en) * | 2006-11-17 | 2008-06-05 | Hitachi Kokusai Electric Inc | Power amplifier |
JP2008258986A (en) * | 2007-04-05 | 2008-10-23 | Japan Radio Co Ltd | High frequency amplifier circuit |
EP2933918A1 (en) * | 2014-04-15 | 2015-10-21 | Nxp B.V. | Ultra wideband doherty amplifier |
EP4340219A1 (en) * | 2022-08-18 | 2024-03-20 | NXP USA, Inc. | Doherty amplifiers |
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JP4927351B2 (en) * | 2005-05-27 | 2012-05-09 | ルネサスエレクトロニクス株式会社 | Doherty amplifier |
JP5217182B2 (en) * | 2007-02-22 | 2013-06-19 | 富士通株式会社 | High frequency amplifier circuit |
JP5705122B2 (en) * | 2009-10-23 | 2015-04-22 | 日本碍子株式会社 | Doherty amplifier synthesizer |
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US20120013401A1 (en) * | 2010-07-14 | 2012-01-19 | Avago Technologies Wireless Ip (Singapore) Pte. Ltd. | Power amplifier with selectable load impedance and method of amplifying a signal with selectable load impedance |
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CN107408923B (en) * | 2015-02-15 | 2021-05-28 | 天工方案公司 | Doherty power amplifier with reduced size |
CN106982041B (en) * | 2017-02-23 | 2023-07-25 | 南京邮电大学 | A New Topology Structure of 180° Ring Bridge Designed Using Lumped Parameters and Its Method for Arbitrary Power Ratio Output |
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- 2004-10-19 JP JP2006536770A patent/JP4860476B2/en not_active Expired - Fee Related
- 2004-10-19 WO PCT/US2004/034797 patent/WO2005043747A2/en active Application Filing
- 2004-10-19 GB GB0605973A patent/GB2421862B/en not_active Expired - Fee Related
- 2004-10-19 CN CN2004800310591A patent/CN101164229B/en not_active Expired - Fee Related
- 2004-10-19 DE DE112004001976T patent/DE112004001976T5/en not_active Ceased
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US5757229A (en) * | 1996-06-28 | 1998-05-26 | Motorola, Inc. | Bias circuit for a power amplifier |
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JP2008035487A (en) * | 2006-06-19 | 2008-02-14 | Renesas Technology Corp | Rf power amplifier |
JP2008131186A (en) * | 2006-11-17 | 2008-06-05 | Hitachi Kokusai Electric Inc | Power amplifier |
JP2008258986A (en) * | 2007-04-05 | 2008-10-23 | Japan Radio Co Ltd | High frequency amplifier circuit |
EP2933918A1 (en) * | 2014-04-15 | 2015-10-21 | Nxp B.V. | Ultra wideband doherty amplifier |
US9577585B2 (en) | 2014-04-15 | 2017-02-21 | Ampleon Netherlands B.V. | Ultra wideband doherty amplifier |
EP4340219A1 (en) * | 2022-08-18 | 2024-03-20 | NXP USA, Inc. | Doherty amplifiers |
Also Published As
Publication number | Publication date |
---|---|
DE112004001976T5 (en) | 2006-10-19 |
JP2007509584A (en) | 2007-04-12 |
WO2005043747A3 (en) | 2005-09-09 |
GB2421862B (en) | 2007-11-07 |
GB2421862A (en) | 2006-07-05 |
JP4860476B2 (en) | 2012-01-25 |
CN101164229B (en) | 2010-12-08 |
CN101164229A (en) | 2008-04-16 |
GB0605973D0 (en) | 2006-05-03 |
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