PHASE & ENVELOPE GENERATION IN AN EER SYSTEM
FIELD OF THE INVENTION
This invention relates to generation of phase and envelope information from Cartesian information in a baseband signal, particularly but not only in EER (Envelope Elimination and Restoration) systems with Cartesian feedback.
BACKGROUND TO THE INVENTION
EER systems with Cartesian feedback for use in linearisation of RF transmitters are discussed in WO 01/24356 and WO 02/067445. These systems generally require conversion from Cartesian to polar coordinates and perform the required operations in a digital processing stage. Cartesian feedback is provided to assist linearisation of the RF amplifier, being an increasingly strict requirement of many radio transmitters.
Calculation of the phase information required for polar coordinates involves an arctan operation that can be relatively time consuming in a digital process. It can be carried out by several known techniques such as a look-up-table (LUT) indexed by Cartesian coordinates, or either of the Cahn or CORDIC algorithms. However, the process time required by these techniques often creates undesirable latency and therefore instability, in the feedback loop, and may be relatively complex when implemented in hardware.
SUMMARY OF THE INVENTION
It is an object of the invention to provide an improved technique for generation of phase and envelope information in systems such as EER with Cartesian feedback, or at least to provide an alternative to existing techniques. In general terms, the technique reduces latency that can arise in digital systems when polar coordinates are calculated from Cartesian coordinates.
In one aspect the invention may broadly be said to consist in a method of generating phase and envelope information from a digital Cartesian signal, comprising: rotating the
Cartesian signal to represent incremental changes of phase between subsequent digital samples of the signal, approximating the phase and envelope information using the Cartesian components of the rotated signal, and providing the Cartesian signal at a sample rate that is selected to reduce the magnitude of the incremental changes of phase. Preferably the Cartesian signal is rotated by matrix multiplication using feedback of the approximated phase information. Preferably the phase information is approximated by determining and adding the incremental change of phase to phase information from which the respective rotation was calculated. Preferably the incremental change of phase is approximated using the in-phase and quadrature components of the rotated signal. In one embodiment rotation takes place toward a selected Cartesian axis and the incremental change of phase is approximated from the component of the rotated signal along the other Cartesian axis using a look up table. In another embodiment rotation takes place toward a selected Cartesian axis and the incremental change of phase is approximated as the component of the rotated signal along the other Cartesian axis. Preferably the envelope information is approximated as the component of the rotated signal along the selected axis.
Preferably a maximum likely magnitude of the incremental change of phase is calculated to maintain quality of the approximation. Preferably the sample rate is set so that the phase increments between consecutive samples of the Cartesian signal are less than the absolute phase of the signal, and preferably less than 0.1 radian.
In another aspect the invention may be said to consist in a digital processing system for generating phase and envelope information from an input Cartesian signal, comprising: a rotation subsystem that receives a sample of the input Cartesian signal and calculates a rotation of the signal toward a selected Cartesian axis using feedback of phase information generated from a preceding sample of the signal, an approximation subsystem that receives a sample of the rotated input signal from the rotation subsystem and calculates an approximate increment of phase of the signal in relation to the preceding sample of the signal, and an output subsystem that generates the phase information by adding the approximate increment of phase to the feedback phase
information, and generates the envelope information as the magnitude of the rotated signal along the selected axis.
In one embodiment the approximation subsystem calculates the phase increment from a 2D look-up-table indexed by the in-phase and quadrature components of the rotated input signal. In another embodiment the input signal is rotated towards the in-phase Cartesian axis and the approximation subsystem calculates the phase increment from a ID look-up- table indexed by the quadrature component of the rotated signal. In a further embodiment the input signal is rotated towards the in-phase Cartesian axis and the approximation subsystem calculates the phase increment by approximating a division of the quadrature component by the in-phase component of the rotated input signal. In still another embodiment the input signal is rotated towards the in-phase Cartesian axis and the approximation subsystem uses the quadrature component of the rotated signal as the phase increment.
The phase and envelope information determined by the methods and systems defined above may be used to determine modulation of a power amplifier in an EER system.
Preferably the digital Cartesian signal in either case includes Cartesian feedback from the output of the amplifier. However, the invention may also be used to generate phase and envelope data in a range of other digital systems where such information may be required. The invention may also be said to consist in any alternative combination of features indicated in this specification. All equivalents of these features are included whether or not explicitly set out.
LIST OF FIGURES Preferred embodiments of the invention will be described with reference to the accompanying drawings, of which:
Figure 1 shows an EER amplification system with a digital processing stage and Cartesian feedback,
Figure 2 indicates a process for generating phase and envelope information in the digital processing stage,
Figure 3 is a phase diagram relating to a rotation subsystem in the process of Figure 2, Figures 4, 5, 6 and 7 indicate variations on the process of Figure 2, and
Figure 8 shows an implementation of the rotation subsystem in Figure 3.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
Referring to the drawings it will be appreciated that a transformation from Cartesian to polar coordinates according to the invention can be achieved in various ways for various purposes. The systems of these embodiments are given as examples only. Many features of the systems, such as modulation, RF amplification, digital to analog and analog to digital conversion also come in many forms that will be well known to skilled readers and need not be described in detail. Figure 1 shows a generalised EER system with Cartesian feedback, and a digital processing stage typically implemented as an FPGA, DSP or ASIC. An input baseband signal having Cartesian in-phase and quadrature components I, Q is received by the processing stage which generates corresponding phase and envelope information in digital form. The envelope signal is used by an amplitude modulator, such as a PWM, delta modulator or sigma-delta modulator, to vary the output magnitude of a power amplifier PA, such as a linear amplifier or a switch-mode power amplifier. The phase signal is used by a phase modulator, such as a quadrature modulator or phase lock loop, that generates a constant phase input to the power amplifier. Output signal S of the amplifier is sampled, demodulated to a pair of Cartesian baseband signals, converted to digital form IF, QF, and fed back to the processing stage.
In Figure 1 the digital stage involves a number of processes in transforming the input signals I, Q from Cartesian to polar coordinates, and in applying Cartesian feedback from the output signal S. A phase shifter rotates the vector formed by IF, QF into alignment with the vector I, Q. The amount of phase shift is generally constant and determined by
delays around the loop, particularly in the ADC and RF blocks. The IF, QF signals contain the distortion at the output of the amplifier, and are subtracted from I, Q to improve linearity of the amplifier output. Low pass filters LPF limit the bandwidth and assist stabilisation of the feedback loop. It will be appreciated that some of these functions such as the phase shift can be performed outside the digital processing stage in some systems.
Figures 2 and 3 indicate a process that may be used in the digital processor of Figure 1 to carry out calculation of the phase and envelope information required for modulation of the amplifier. Digital baseband signals I, Q have polar coordinates En, θn that are to be estimated to provide the information. A phase rotation block receives a sample (n) of the signals I, Q and also phase information from an earlier sample (n-1). The block rotates the I, Q vector towards the I coordinate axis by the previous phase estimate θn-1 to an incremental angle δθ and new coordinates I', Q'. It will be appreciated that either the I or Q axis could be used and that phase data usually includes multiples of a full cycle. The sample rate of the digital signal in relation to the rate of change of phase in the information that it contains will determine the size of the phase increment between the samples (n, n-1). The quadrature component Q' is intended to be small. In general the phase increment should be smaller than the absolute magnitude of the phase, and preferably less than 0.1 radians, but will depend on the particular system in operation. The coordinates of the rotated signal are generated as I', Q'.
In Figure 2 the phase and envelope information is calculated by approximation from the rotated vector I', Q' based on small size of the phase increment δθ. The phase calculation typically requires evaluation of arctan(QVr) in an approximate form. In this example the approximation involves use of 2-dimensional look-up-table LUT indexed by I', Q', with a reduction in the range of values that would otherwise be required by I, Q. The output of the LUT is δθ which is then added to the previous phase estimate θn-1 in an accumulator. The output of the accumulator serves as the current phase estimate θn while the V coordinate output by the phase rotation block serves as the envelope estimate. The current phase estimate is fed back from the output to the input of the accumulator and to the rotation block.
Figures 4 and 5 show alternative approximations that may be made by the digital processing stage in Figure 1 to generate phase and envelope information. The I' signal may be considered constant and replaced by K, so that no more than a 1 -dimensional LUT is required as in Figure 4. Simulations can be used to determine the optimum value of K. At still higher digital sample rates the Q' value may be sufficient itself as an approximation to δθ, given the nature of the arctan function, dispensing with the LUT altogether in Figure 5.
Figures 6 and 7 are further alternative approximations that may be made by the digital processing stage in Figure 1 to generate phase and envelope information. The I' signal is first quantised to values of 2"m , so that the ratio Q'/I' required for the arctan function may be calculated as multiplication by 2m. In this example the MSB of each digital sample is the leftmost bit so multiplication is readily carried out by a shift left operation. The output of the shifter is used to index a 1 -dimensional LUT as in Figure 6. A further approximation that may be made at high sample rates, given the nature of arctan, is use of the Q'/I' result directly in the accumulator as an estimate of δθ, as in Figure 7.
Figure 8 shows an implementation of the phase rotation process indicated in Figures 2 and 3. This block receives the phase estimate θn-1, and optionally also a fixed phase shift required due to delays in the feedback loop. The block carries out the matrix multiplication indicated below, without the fixed phase shift for simplicity. A LUT is preferably used for the range of sin and cos values, reduced by the symmetry of those functions where appropriate.
Phase and envelope information determined by these examples may be used to determine modulation of a power amplifier in an EER system. However, the invention may also be used to generate phase and envelope data in a range of other digital systems where such information may be required.