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WO2004073075A1 - Package of semiconductor device and fabrication method thereof - Google Patents

Package of semiconductor device and fabrication method thereof Download PDF

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Publication number
WO2004073075A1
WO2004073075A1 PCT/KR2004/000297 KR2004000297W WO2004073075A1 WO 2004073075 A1 WO2004073075 A1 WO 2004073075A1 KR 2004000297 W KR2004000297 W KR 2004000297W WO 2004073075 A1 WO2004073075 A1 WO 2004073075A1
Authority
WO
WIPO (PCT)
Prior art keywords
semiconductor chip
semiconductor
transparent electrode
resin
filler resin
Prior art date
Application number
PCT/KR2004/000297
Other languages
French (fr)
Inventor
Ik-Seong Park
Original Assignee
Alti-Electronics Co., Ltd.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Alti-Electronics Co., Ltd. filed Critical Alti-Electronics Co., Ltd.
Publication of WO2004073075A1 publication Critical patent/WO2004073075A1/en

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80—Constructional details
    • H10H20/85—Packages
    • H10H20/857—Interconnections, e.g. lead-frames, bond wires or solder balls
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L24/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
    • H01L24/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/82—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
    • H01L2224/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
    • H01L2224/241—Disposition
    • H01L2224/24135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/24137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73267—Layer and HDI connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of semiconductor or other solid state devices
    • H01L25/03—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/075—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H10H20/00
    • H01L25/0753—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H10H20/00 the devices being arranged next to each other
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01005—Boron [B]
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    • H01L2924/01—Chemical elements
    • H01L2924/01006—Carbon [C]
    • H—ELECTRICITY
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    • H01L2924/01015—Phosphorus [P]
    • H—ELECTRICITY
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    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
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    • H01L2924/01033—Arsenic [As]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L2924/01—Chemical elements
    • H01L2924/01047—Silver [Ag]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01049—Indium [In]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L2924/01079—Gold [Au]
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    • H01—ELECTRIC ELEMENTS
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    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1204—Optical Diode
    • H01L2924/12041—LED
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    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80—Constructional details
    • H10H20/83—Electrodes
    • H10H20/832—Electrodes characterised by their material
    • H10H20/833—Transparent materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80—Constructional details
    • H10H20/85—Packages
    • H10H20/855—Optical field-shaping means, e.g. lenses

Definitions

  • the present invention relates to a package of a semiconductor device and a fabrication method thereof, and in particular, to a semiconductor package for electrically connecting a light emitting diode (LED) to an external lead using a transparent electrode, and a method of fabricating the same.
  • LED light emitting diode
  • a semiconductor package has a function of connecting a semiconductor chip to an external substrate, such as a printed circuit board, through fitting the semiconductor chip to a lead frame, and mounting it onto the external substrate.
  • an external substrate such as a printed circuit board
  • semiconductor packages are existent while being differentiated in the structure and the function thereof. Among them, wire bonding semiconductor packages have been most extensively used with excellent product adaptability.
  • Fig. 1 illustrates a semiconductor chip packaged using the wire bonding technique, which has an LED radiating visible rays of a specific wavelength.
  • a first bonding pad 2 is formed on a printed circuit board
  • the semiconductor chip 3 is mounted onto the printed circuit board 1 using a silver paste 5 as an adhesive.
  • the so-called wire bonding process is performed using a gold- based wire 6 to interconnect the first bonding pad 2 of the printed circuit board 1 and the second bonding pad 4 of the semiconductor chip 3.
  • a photolithography process is conventionally performed to form such a bonding pad.
  • the photolithography process involves the steps of coating a photoresist film onto a target, light-exposing and developing it, removing the photoresist film, and cleaning the target. That is, the photolithography process involves complicated processing steps with much time consumption.
  • the photolithography process it is required with the photolithography process to provide high cost equipments, such as a light exposing apparatus, a spin coater, a developer, and a wet etching apparatus. Furthermore, as the area of the non-transparent bonding pad on the semiconductor chip does not serve to make the light emission, the brightness of the resulting light-emitting device is limited.
  • the size of the bonding pad should be reduced as much as possible. Accordingly, the bonding pad is locally formed at a predetermined region on the chip. However, with such a structure, the current flow is concentrated close to the bonding pad so that it is not uniformly distributed over the entire area of the chip. This deteriorates the device light emission efficiency.
  • the flip chip package refers to the package where the chip is overturned, and attached to the substrate.
  • the flip chip is manufactured through attaching a chip to a substrate with connection pads arranged corresponding to the input and output pads of the chip, and forming a protective layer thereon.
  • a conductive bump is additionally formed on the bonding pad of the chip instead of the conventional wire bonding.
  • the semiconductor device package includes a semiconductor chip mounted on a printed circuit board, an external electrode formed on the printed circuit board, a transparent electrode formed on the semiconductor chip such that it is connected to the external electrode to supply power to the semiconductor chip, and a molding resin formed on the transparent electrode.
  • Fig. 1 is a sectional view of a semiconductor device package based on the wire bonding according to a prior art
  • Fig. 2 is a sectional view of a semiconductor device package according to an embodiment of the present invention
  • Fig. 3 is a sectional view of a semiconductor device package according to another embodiment of the present invention.
  • Fig. 2 is a sectional view of a semiconductor device package according to an embodiment of the present invention.
  • a semiconductor chip 13 is mounted on a printed circuit board 1 1 via an adhesive layer 12 based on a conductive resin, such as a silver paste.
  • First and second external electrodes 17 and 18 are formed at the printed circuit board 11 to supply power to the semiconductor chip 13.
  • a light emitting diode is mounted as the semiconductor chip 13.
  • the LED has a p-n contact structure, and emits visible rays.
  • the first external electrode 17 supplies power to the upper p layer of the p-n contact structure, and the second external electrode 18 supplies power to the lower n layer of the p-n contact structure.
  • a transparent electrode 15 is formed on the semiconductor chip 13 while being connected to the first external electrode 17.
  • the transparent electrode 15 is formed with a transparent conductive material, such as indium tin oxide (ITO), but it is not needed to limit the electrode material to the specific one. Furthermore, it is not needed to form the transparent electrode 15 only with the film shape.
  • the transparent electrode 15 may be formed with a transparent conductive polymer material.
  • a filler resin 14 may be formed at the lateral side of the semiconductor chip 13 with a non-conductive material to improve the insulating characteristic thereof.
  • the filler resin 14 may be formed with a material capable of transmitting visible rays, ultraviolet rays or infrared rays, but not limited thereto.
  • the filler resin 14 may be formed with a milk white-colored material.
  • the filler resin 14 it is preferable to form the filler resin 14 at the lateral side of the semiconductor chip 13. However, it may be formed also at a predetermined region on the top of the semiconductor chip 13 close to the lateral side thereof during the formation process. With the formation of the filler resin 14, it is preferable to form the transparent electrode 15 on the top surface of the semiconductor chip 13 together with the filler resin 14.
  • a molding resin 16 is formed on the top of the transparent electrode 15. In order to improve the brightness of the LED, it is preferable to form the molding resin 16 with a material capable of transmitting visible rays, ultraviolet rays or infrared rays.
  • an adhesion-inducement layer may be formed at the interface between the transparent electrode 15 and the semiconductor chip 13 as well as at the interface between the transparent electrode 15 and the filler resin 14 to reinforce the adhesive force.
  • Fig. 3 is a sectional view of a semiconductor device package according to another embodiment of the present invention. As different from the structure related to the previous embodiment of the present invention, the package involves plural numbers of semiconductor chips 23.
  • a plurality of semiconductor chips 23 are mounted on the printed circuit board 21 via an adhesive layer 22 based on a conductive resin, such as a silver paste.
  • a filler resin 24 is formed at the lateral side of the semiconductor chips with a non-conductive material to fill the space between the semiconductor chip neighbors 23.
  • a transparent electrode 25 is formed on the filler resin 24 and the semiconductor chips 23.
  • a reflector 27 may be installed between the semiconductor chips 23 to concentrate the light emitted from the chips 23.
  • the filler resin 24 fills the space between the semiconductor chip neighbors 23 except for the reflector 27.
  • the transparent electrode 25 is formed on the reflector 27, the filler resin 24, and the semiconductor chip 23.
  • a semiconductor chip 13 is mounted onto a printed circuit board 11 via an adhesive layer 12 based on a conductive resin, such as a silver paste, and first and second external electrodes 17 and 18 are formed on the printed circuit board 11 to supply power to the semiconductor chip 13.
  • a conductive resin such as a silver paste
  • a light emitting diode (LED) is mounted as the semiconductor chip 13.
  • the LED has a p-n contact structure, and emits visible rays.
  • the first external electrode 17 supplies power to the upper p layer of the p-n contact structure, and the second external electrode 18 supplies power to the lower n layer of the p-n contact structure.
  • the LED may radiate visible rays, ultraviolet rays, or infrared rays.
  • a transparent electrode 15 is formed on the top of the semiconductor chip 13 such that it is connected to the first external electrode 17.
  • the transparent electrode 15 may be formed using a sputtering technique, or other film formation techniques. Furthermore, it is not needed to form the transparent electrode 15 only with the film shape.
  • the transparent electrode 15 may be formed with a transparent conductive polymer material.
  • a filler resin 14 may be formed at the lateral side of the semiconductor chip 13 with a non-conductive material to improve the insulating characteristic thereof.
  • the filler resin 14 may be formed with a material capable of transmitting visible rays, ultraviolet rays or infrared rays, and other suitable materials.
  • the filler resin 14 may be formed with a milk white-colored material.
  • the filler resin 14 is preferably formed at the lateral side of the semiconductor chip 13, it may be also formed at a predetermined region on the top of the semiconductor chip 13 close to the lateral side thereof during the formation process. With the formation of the filler resin 14, the transparent electrode 15 is formed on the filler resin 14 and the semiconductor chip 13.
  • a molding resin 16 is formed on the top of the transparent electrode 15, thereby completing the package. It is preferable to form the molding resin 16 with a material capable of transmitting visible rays, ultraviolet rays or infrared rays. Furthermore, an adhesion-inducement layer (not shown) may be formed at the interface between the transparent electrode 15 and the semiconductor chip 13 as well as at the interface between the transparent electrode 15 and the filler resin 14 to reinforce the adhesive force.
  • a plurality of semiconductor chips 23 are mounted on the printed circuit board 21 via an adhesive layer 22 based on a conductive resin, such as a silver paste.
  • a filler resin 24 is formed at the lateral side of the semiconductor chips with a non-conductive material to fill the space between the semiconductor chip neighbors 23.
  • a transparent electrode 25 is formed on the filler resin 24 and the semiconductor chips 23.
  • a reflector 27 is installed between the semiconductor chips 23 to concentrate the light emitted from the chips 23.
  • the filler resin 24 fills the space between the semiconductor chip neighbors 23 except for the reflector 27. It is preferable that the transparent electrode 25 is formed on the reflector 27, the filler resin 24, and the semiconductor chip 23.
  • the photolithography process for forming a bonding pad in a separate manner is omitted with the inventive package fabricating method.
  • a transparent electrode is formed on the chip, it is not required to form a separate bonding pad, that is, to separately perform the photolithography process.
  • the overall process is simplified while reducing the processing time and cost.
  • the transparent electrode is formed at the entire area of the chip, the brightness of the LED is enhanced compared to the conventional case where the non-transparent bonding pad takes a local region on the semiconductor chip so that the brightness thereof is deteriorated.
  • the light emission efficiency of the device is enhanced.
  • the package can be effectively minimized.

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Led Device Packages (AREA)

Abstract

Disclosed is a semiconductor device package and a method of fabricating the same to package the semiconductor device in simplified, speedy and cost effective manners while enhancing the light emission efficiency thereof with a minimized package structure. For this purpose, the semiconductor device package includes a semiconductor chip mounted on a printed circuit board, an external electrode formed on the printed circuit board, a transparent electrode formed on the semiconductor chip such that the transparent electrode is connected to the external electrode to supply power to the semiconductor chip, and a molding resin formed over the transparent electrode. With this structure, the package is fabricated without forming a nontransparent conductive bonding pad, such as a wire bonding pad and a flip chip bonding pad.

Description

PACKAGE OF SEMICONDUCTOR DEVICE AND FABRICATION METHOD
THEREOF
BACKGROUND OF THE INVENTION (a) Field of the Invention
The present invention relates to a package of a semiconductor device and a fabrication method thereof, and in particular, to a semiconductor package for electrically connecting a light emitting diode (LED) to an external lead using a transparent electrode, and a method of fabricating the same. (b) Description of Related Art
Generally, a semiconductor package has a function of connecting a semiconductor chip to an external substrate, such as a printed circuit board, through fitting the semiconductor chip to a lead frame, and mounting it onto the external substrate. Various kinds of semiconductor packages are existent while being differentiated in the structure and the function thereof. Among them, wire bonding semiconductor packages have been most extensively used with excellent product adaptability.
Fig. 1 illustrates a semiconductor chip packaged using the wire bonding technique, which has an LED radiating visible rays of a specific wavelength.
As shown in Fig. 1, a first bonding pad 2 is formed on a printed circuit board
1 with a metallic material, and a second bonding pad 4 is formed on a semiconductor chip 3. After the formation of the second bonding pad 4 thereon, the semiconductor chip 3 is mounted onto the printed circuit board 1 using a silver paste 5 as an adhesive.
Thereafter, the so-called wire bonding process is performed using a gold- based wire 6 to interconnect the first bonding pad 2 of the printed circuit board 1 and the second bonding pad 4 of the semiconductor chip 3.
The resulting package is then sealed with a molding resin 7, and completed. A photolithography process is conventionally performed to form such a bonding pad. The photolithography process involves the steps of coating a photoresist film onto a target, light-exposing and developing it, removing the photoresist film, and cleaning the target. That is, the photolithography process involves complicated processing steps with much time consumption.
Particularly, it is required with the photolithography process to provide high cost equipments, such as a light exposing apparatus, a spin coater, a developer, and a wet etching apparatus. Furthermore, as the area of the non-transparent bonding pad on the semiconductor chip does not serve to make the light emission, the brightness of the resulting light-emitting device is limited.
In order to solve such a problem, the size of the bonding pad should be reduced as much as possible. Accordingly, the bonding pad is locally formed at a predetermined region on the chip. However, with such a structure, the current flow is concentrated close to the bonding pad so that it is not uniformly distributed over the entire area of the chip. This deteriorates the device light emission efficiency.
As the semiconductor package manufactured by the wire bonding technique is significantly larger than the semiconductor chip practically functioning as the light-emitting device, it is desperately needed to minimize the semiconductor package.
With the requirement for the light-weighted thin, short, and small package, a flip chip package has been developed while being differentiated from the wire bonding packages commonly made up to now. The flip chip package refers to the package where the chip is overturned, and attached to the substrate. The flip chip is manufactured through attaching a chip to a substrate with connection pads arranged corresponding to the input and output pads of the chip, and forming a protective layer thereon.
With the flip chip package, a conductive bump is additionally formed on the bonding pad of the chip instead of the conventional wire bonding.
However, even with the flip chip package, it is required to conduct the photolithography process in forming the bonding pad, and this involves complicated processing steps, much time consumption, and high production cost. Furthermore, the device light emission efficiency is still deteriorated due to the non-uniformity in the current flow.
SUMMARY OF THE INVENTION It is an object of the present invention to package a semiconductor device in simplified, speedy and cost effective manners. It is another object of the present invention to provide a package structure where the light emission efficiency of the light-emitting device is improved, and a method of fabricating the same.
It is still another object of the present invention to provide a minimized light- emitting device package.
These and other objects may be achieved by a package where a transparent electrode is formed on the semiconductor chip without providing a non- transparent conductive bonding pad, such as a wire bonding pad and a flip chip bonding pad. That is, the semiconductor device package includes a semiconductor chip mounted on a printed circuit board, an external electrode formed on the printed circuit board, a transparent electrode formed on the semiconductor chip such that it is connected to the external electrode to supply power to the semiconductor chip, and a molding resin formed on the transparent electrode. BRIEF DESCRIPTION OF THE DRAWINGS
Fig. 1 is a sectional view of a semiconductor device package based on the wire bonding according to a prior art;
Fig. 2 is a sectional view of a semiconductor device package according to an embodiment of the present invention; and Fig. 3 is a sectional view of a semiconductor device package according to another embodiment of the present invention.
DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS The present invention will be described more fully hereinafter with reference to the accompanying drawings, in which preferred embodiments of the invention are shown.
Fig. 2 is a sectional view of a semiconductor device package according to an embodiment of the present invention. As shown in Fig. 2, a semiconductor chip 13 is mounted on a printed circuit board 1 1 via an adhesive layer 12 based on a conductive resin, such as a silver paste. First and second external electrodes 17 and 18 are formed at the printed circuit board 11 to supply power to the semiconductor chip 13.
As shown in Fig. 2, a light emitting diode (LED) is mounted as the semiconductor chip 13. The LED has a p-n contact structure, and emits visible rays. The first external electrode 17 supplies power to the upper p layer of the p-n contact structure, and the second external electrode 18 supplies power to the lower n layer of the p-n contact structure.
A transparent electrode 15 is formed on the semiconductor chip 13 while being connected to the first external electrode 17.
The transparent electrode 15 is formed with a transparent conductive material, such as indium tin oxide (ITO), but it is not needed to limit the electrode material to the specific one. Furthermore, it is not needed to form the transparent electrode 15 only with the film shape. The transparent electrode 15 may be formed with a transparent conductive polymer material.
A filler resin 14 may be formed at the lateral side of the semiconductor chip 13 with a non-conductive material to improve the insulating characteristic thereof.
The filler resin 14 may be formed with a material capable of transmitting visible rays, ultraviolet rays or infrared rays, but not limited thereto. The filler resin 14 may be formed with a milk white-colored material.
It is preferable to form the filler resin 14 at the lateral side of the semiconductor chip 13. However, it may be formed also at a predetermined region on the top of the semiconductor chip 13 close to the lateral side thereof during the formation process. With the formation of the filler resin 14, it is preferable to form the transparent electrode 15 on the top surface of the semiconductor chip 13 together with the filler resin 14.
A molding resin 16 is formed on the top of the transparent electrode 15. In order to improve the brightness of the LED, it is preferable to form the molding resin 16 with a material capable of transmitting visible rays, ultraviolet rays or infrared rays.
Furthermore, an adhesion-inducement layer (not shown) may be formed at the interface between the transparent electrode 15 and the semiconductor chip 13 as well as at the interface between the transparent electrode 15 and the filler resin 14 to reinforce the adhesive force.
Fig. 3 is a sectional view of a semiconductor device package according to another embodiment of the present invention. As different from the structure related to the previous embodiment of the present invention, the package involves plural numbers of semiconductor chips 23.
That is, a plurality of semiconductor chips 23 are mounted on the printed circuit board 21 via an adhesive layer 22 based on a conductive resin, such as a silver paste. A filler resin 24 is formed at the lateral side of the semiconductor chips with a non-conductive material to fill the space between the semiconductor chip neighbors 23.
A transparent electrode 25 is formed on the filler resin 24 and the semiconductor chips 23.
A reflector 27 may be installed between the semiconductor chips 23 to concentrate the light emitted from the chips 23. In this case, the filler resin 24 fills the space between the semiconductor chip neighbors 23 except for the reflector 27.
It is preferable that the transparent electrode 25 is formed on the reflector 27, the filler resin 24, and the semiconductor chip 23.
A method of fabricating the semiconductor device package will be now explained in detail.
In order to manufacture the semiconductor device package shown in Fig. 2, a semiconductor chip 13 is mounted onto a printed circuit board 11 via an adhesive layer 12 based on a conductive resin, such as a silver paste, and first and second external electrodes 17 and 18 are formed on the printed circuit board 11 to supply power to the semiconductor chip 13.
A light emitting diode (LED) is mounted as the semiconductor chip 13.
The LED has a p-n contact structure, and emits visible rays. The first external electrode 17 supplies power to the upper p layer of the p-n contact structure, and the second external electrode 18 supplies power to the lower n layer of the p-n contact structure.
The LED may radiate visible rays, ultraviolet rays, or infrared rays.
Thereafter, a transparent electrode 15 is formed on the top of the semiconductor chip 13 such that it is connected to the first external electrode 17.
The transparent electrode 15 may be formed using a sputtering technique, or other film formation techniques. Furthermore, it is not needed to form the transparent electrode 15 only with the film shape. The transparent electrode 15 may be formed with a transparent conductive polymer material.
Before the formation of the transparent electrode 15, a filler resin 14 may be formed at the lateral side of the semiconductor chip 13 with a non-conductive material to improve the insulating characteristic thereof.
The filler resin 14 may be formed with a material capable of transmitting visible rays, ultraviolet rays or infrared rays, and other suitable materials. The filler resin 14 may be formed with a milk white-colored material.
Although the filler resin 14 is preferably formed at the lateral side of the semiconductor chip 13, it may be also formed at a predetermined region on the top of the semiconductor chip 13 close to the lateral side thereof during the formation process. With the formation of the filler resin 14, the transparent electrode 15 is formed on the filler resin 14 and the semiconductor chip 13.
A molding resin 16 is formed on the top of the transparent electrode 15, thereby completing the package. It is preferable to form the molding resin 16 with a material capable of transmitting visible rays, ultraviolet rays or infrared rays. Furthermore, an adhesion-inducement layer (not shown) may be formed at the interface between the transparent electrode 15 and the semiconductor chip 13 as well as at the interface between the transparent electrode 15 and the filler resin 14 to reinforce the adhesive force.
Meanwhile, in order to manufacture the semiconductor device package shown in Fig. 3, a plurality of semiconductor chips 23 are mounted on the printed circuit board 21 via an adhesive layer 22 based on a conductive resin, such as a silver paste. A filler resin 24 is formed at the lateral side of the semiconductor chips with a non-conductive material to fill the space between the semiconductor chip neighbors 23. Thereafter, a transparent electrode 25 is formed on the filler resin 24 and the semiconductor chips 23.
A reflector 27 is installed between the semiconductor chips 23 to concentrate the light emitted from the chips 23. In this case, the filler resin 24 fills the space between the semiconductor chip neighbors 23 except for the reflector 27. It is preferable that the transparent electrode 25 is formed on the reflector 27, the filler resin 24, and the semiconductor chip 23.
As described above, the photolithography process for forming a bonding pad in a separate manner is omitted with the inventive package fabricating method. As a transparent electrode is formed on the chip, it is not required to form a separate bonding pad, that is, to separately perform the photolithography process. As a result, the overall process is simplified while reducing the processing time and cost. As the transparent electrode is formed at the entire area of the chip, the brightness of the LED is enhanced compared to the conventional case where the non-transparent bonding pad takes a local region on the semiconductor chip so that the brightness thereof is deteriorated.
As the current flow is uniformly distributed over the entire area of the chip, the light emission efficiency of the device is enhanced.
Furthermore, compared to the conventional wire bonding technique, the package can be effectively minimized.

Claims

WHAT IS CLAIMED IS:
1. A semiconductor device package comprising: a semiconductor chip mounted on a printed circuit board; an external electrode formed on the printed circuit board; a transparent electrode formed on the semiconductor chip such that the transparent electrode is connected to the external electrode to supply power to the semiconductor chip; and a molding resin formed over the transparent electrode.
2. The semiconductor device package of claim 1 wherein a filler resin is formed at the lateral side of the semiconductor chip with a non-conductive material, and the transparent electrode is formed on the filler resin and the semiconductor chip.
3. The semiconductor device package of claim 2 wherein the filler resin is formed at the lateral side of the semiconductor chip and at a predetermined region on the top surface of the semiconductor chip close to the lateral side thereof, and the filler resin is formed with a material transmitting any one of visible ray, ultraviolet ray and infrared ray.
4. The semiconductor device package of claim 3 wherein the semiconductor chip is a light emitting diode radiating any one of visible ray, ultraviolet ray and infrared ray.
5. The semiconductor device package of claim 4 wherein the molding resin is formed with a material transmitting any one of visible ray, ultraviolet ray and infrared ray.
6. The semiconductor device package of claim 5 wherein the semiconductor chip is mounted on the printed circuit board using a conductive resin including a silver paste as an adhesive.
7. The semiconductor device package of claim 6 wherein the transparent electrode is formed with any one of a conductive transparent thin film including indium tin oxide, and a conductive transparent resin.
8. The semiconductor device package of any one of claims 4 to 7 wherein plural numbers of the semiconductor chips are mounted on the printed circuit board, the filler resin based on the nonconductive material is formed at the lateral side of the semiconductor chips to fill the space between the semiconductor chips, and the transparent electrode is formed on the filler resin and the semiconductor chips.
9. The semiconductor device package of claim 8 wherein the filler resin is formed at the lateral side of the semiconductor chips and at a predetermined region on the top surface of the semiconductor chips close to the lateral side thereof, and the filler resin is formed with a material transmitting any one of visible ray, ultraviolet ray and infrared ray.
10. The semiconductor device package of claim 9 wherein a reflector is installed between the semiconductor chips to concentrate the light radiating from the semiconductor chips, the filler resin fills the space between the semiconductor chips except for the reflector, and the transparent electrode is formed on the reflector, the filler resin and the semiconductor chips.
11. A method of fabricating a semiconductor device package, the method comprising the steps of: mounting a semiconductor chip onto a printed circuit board; forming an external electrode on the printed circuit board; forming a transparent electrode on the semiconductor chip to supply power to the semiconductor chip such that the transparent electrode is connected to the external electrode; and forming a molding resin over the transparent electrode.
12. The method of claim 11 wherein before the formation of the transparent electrode, a filler resin is formed at the lateral side of the semiconductor chip with a nonconductive material, and the transparent electrode is formed on the filler resin and the semiconductor chip.
13. The method of claim 12 wherein the filler resin is formed at the lateral side of the semiconductor chip and at a predetermined region on the top surface of the semiconductor chip close to the lateral side thereof, and the filler resin is formed with a material transmitting any one of visible ray, ultraviolet ray and infrared ray.
14. The method of claim 13 wherein the semiconductor chip is a light emitting diode radiating any one of visible ray, ultraviolet ray and infrared ray.
15. The method of claim 14 wherein the molding resin is formed with a material transmitting any one of visible ray, ultraviolet ray and infrared ray.
16. The method of claim 15 wherein with the step of mounting the semiconductor chip, the semiconductor chip is mounted on the printed circuit board using a conductive resin including a silver paste as an adhesive.
17. The method of claim 16 wherein the transparent electrode is formed with any one of a conductive transparent thin film including indium tin oxide, and a conductive transparent resin.
18. The method of any one of claims 14 to 17 wherein plural numbers of the semiconductor chips are mounted on the printed circuit board, the filler resin based on the non-conductive material is formed at the lateral side of the semiconductor chips to fill the space between the semiconductor chips, and the transparent electrode is formed on the filler resin and the semiconductor chips.
19. The method of claim 18 wherein the filler resin is formed at the lateral side of the semiconductor chips and at a predetermined region on the top surface of the semiconductor chips close to the lateral side thereof, and the filler resin is formed with a material transmitting any one of visible ray, ultraviolet ray and infrared ray.
20. The method of claim 19 wherein a reflector is installed between the semiconductor chips to concentrate the light radiating from the semiconductor chips, the filler resin fills the space between the semiconductor chips except for the reflector, and the transparent electrode is formed on the reflector, the filler resin and the semiconductor chips.
PCT/KR2004/000297 2003-02-13 2004-02-13 Package of semiconductor device and fabrication method thereof WO2004073075A1 (en)

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