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WO2004060793A1 - Multilayer structure and method for manufacturing same, functional structure and method for manufacturing same, and mask for electron beam exposure and method for manufacturing same - Google Patents

Multilayer structure and method for manufacturing same, functional structure and method for manufacturing same, and mask for electron beam exposure and method for manufacturing same Download PDF

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Publication number
WO2004060793A1
WO2004060793A1 PCT/JP2003/014512 JP0314512W WO2004060793A1 WO 2004060793 A1 WO2004060793 A1 WO 2004060793A1 JP 0314512 W JP0314512 W JP 0314512W WO 2004060793 A1 WO2004060793 A1 WO 2004060793A1
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WIPO (PCT)
Prior art keywords
layer
substrate
layer containing
structure according
single crystal
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Application number
PCT/JP2003/014512
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French (fr)
Japanese (ja)
Inventor
Masaki Hara
Original Assignee
Sony Corporation
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Publication of WO2004060793A1 publication Critical patent/WO2004060793A1/en

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    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F1/00Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
    • G03F1/20Masks or mask blanks for imaging by charged particle beam [CPB] radiation, e.g. by electron beam; Preparation thereof

Definitions

  • the present invention relates to a multilayer structure, a method for manufacturing the same, a functional structure, a method for manufacturing the same, an electron beam exposure mask, and a method for manufacturing the same.
  • a SOI (Silicon On Insulator) substrate has been frequently used as a substrate for fabricating a structure having a flat surface, for example, a micromirror.
  • Structure which is a structure having upper and lower single-crystal silicon thermal oxide film called B OX layer between the (S i) layer (S i 0 2 film), by processing them single crystal S i layer It is what makes.
  • a dry etching method using high-density plasma called a deep RIE (Reactive Ion Etching) method
  • RIE Reactive Ion Etching
  • Japanese Patent Application Laid-Open No. 5-2187825 discloses that a Si substrate is made porous, and a non-porous Si single crystal layer is formed on the porous substrate.
  • a technique for bonding both Si substrates by heating the non-porous Si single crystal layer to a temperature of 450 to 900 ° C with the surface of the non-porous Si single crystal layer bonded to another substrate having a metal surface. It has been disclosed.
  • Japanese Patent Application Laid-Open No. 5-10971 discloses that the surface of the first Si substrate on which the polycrystalline Si layer is formed is in contact with the first Si substrate. There is disclosed a technique of bonding both Si substrates by performing a heat treatment at about 100 ° C.
  • Japanese Patent Application Laid-Open Nos. 11-15035 and 110-1576 describe that two substrates are provided with a reaction layer between a metal and a metal or a semiconductor between them.
  • a technique for manufacturing an S 0 I substrate by bonding by forming is disclosed.
  • the problem to be solved by the present invention is to manufacture various functional structures such as micromirrors inexpensively, easily and accurately. And a method of manufacturing the same.
  • Another object of the present invention is to provide a functional structure capable of manufacturing various types of functional structures such as micromirrors inexpensively, easily, and accurately, and a method of manufacturing the same. .
  • Still another object of the present invention is to provide an electron beam exposure mask capable of manufacturing an electron beam exposure mask at a low cost, easily and accurately, and a method of manufacturing the same. Disclosure of the invention
  • a multilayer structure according to a first invention of the present invention comprises:
  • first layer and a second layer are joined at room temperature via a layer containing at least one kind of metal.
  • the single crystal material includes not only a perfect single crystal but also a material that can be regarded as a substantially single crystal, such as a material containing a sub-grain boundary. Also, if one of the first and second layers is not made of a single crystal material, it is specifically a polycrystalline or amorphous material. Typical—In one example, both the first and second layers consist of a single crystal material.
  • the single crystal material is excellent as a structural material because it has extremely low internal stress, is tough, and can produce a flat layer or a substrate.
  • the first layer and the second layer may be made of the same material or may be made of different materials.
  • the material of the first layer and the second layer can be selected according to the purpose of use of the multilayer structure, and basically any material can be used. If that, one of the first layer and the first layer, S i, S i have x G e x (was however, 0 ⁇ x ⁇ 1), S i C :, C ( diamond etc.), III _ V compound semiconductor (e.g., G a a s based semiconductor, a 1 G a I n p type semiconducting material, G a n type semiconductor, etc.) consists of compounds typified by semiconductor, the other is, S i, glass (For example, Pyrex (registered trademark) glass) and ceramics.
  • the semiconductor When a semiconductor is used as the material of the first layer and the second layer, the semiconductor may be non-doped or may be doped with an n-type impurity or a p-type impurity.
  • at least one of the first layer and the second layer is made of single-crystal Si, and in particular, both the first layer and the second layer are made of single-crystal Si.
  • at least hand of the first layer and the second layer is made of a single crystal S i, the other of the t first and second layers of glass or ceramics
  • the layer is made of a dry-etchable material.
  • the material that can be dry-etched various materials can be used in combination with the dry-etching method to be used, and single crystal Si is one of the materials excellent in this dry-etching property.
  • Each of the first layer and the second layer may have a single-layer structure made of a single material or a multi-layer structure made of a plurality of layers made of the same or a plurality of materials. . Further, the first layer and the second layer may have a structure or an element formed on one or both of them.
  • the layer containing one or more metals sandwiched between the first and second layers typically comprises a metal or alloy.
  • This metal or alloy can be selected according to the purpose of use of the multilayer structure, and basically any material can be used. However, dry etching resistance, electrical conductivity, The most suitable one is often selected from the viewpoint of thermal conductivity and the like. Specific examples include Al, Cu, Au, Cr, Ta, and W.
  • a low-melting-point metal such as A1 can be used because room-temperature bonding is used.
  • the layer containing one or more metals is patterned into a predetermined shape depending on the intended use of the multilayer structure. When showing the thermal expansion coefficient of a metal exemplified above by reference, S for i that 2.
  • W Shirisai de is 8. 4 X 1 0- 6 / ° C, the C 0 Shirisai de 9. a 4 X 1 0 one 6 / ° C.
  • the first layer and the second layer are preferably used.
  • An etching stopper is provided between at least one of the layers and the layer containing one or more metals.
  • An insulating film (such as a Si 2 film or a Si 3 N 4 film) is typically used as the etching stopper layer.
  • the first layer and the second layer may be the substrate itself, films formed by various film forming techniques, or thin layers of the substrate.
  • the thickness of at least one of the first layer and the first layer is typically less than 100, more typically less than 50 um, more typically 10 m or less.
  • the method for manufacturing a multilayer structure according to the second invention of the present invention includes:
  • the method for producing a multilayer structure according to the third invention of the present invention comprises:
  • first substrate and a second substrate at least one of which is made of a single crystal material, forming a layer containing one or more metals on a main surface of the first substrate;
  • the first substrate and the second substrate correspond to the first layer and the second layer in the first invention, and the first substrate is made thinner, and the first substrate is formed by a film forming technique.
  • the first substrate itself or the like is the first layer
  • the second substrate is a thin layer, a film formed by a film forming technique, or the second substrate itself is the first layer.
  • the room-temperature bonding between the second substrate and the layer containing one or more metals is typically performed by bonding the main surface of the second substrate and the surface of the layer containing one or more metals in an ultra-high vacuum.
  • the cleaning is performed, and pressure is applied in a state where they are opposed to each other.
  • one of the first substrate and the second substrate is thinned by, for example, polishing the back surface.
  • the substrate to be thinned is made of a single crystal material
  • the thinned substrate becomes a single crystal layer.
  • the first substrate and the second substrate may be made of a single crystal material.
  • a porous layer is formed on one of the main surfaces, a single crystal layer is epitaxially grown on the porous layer, and the second substrate and a layer containing at least one metal are bonded at room temperature. Separation may be performed at the position of the porous layer. This separation utilizes the fact that the porous layer becomes a mechanical weak point.
  • the single crystal layer that is epitaxially grown on the porous layer is porous.
  • a hydrogen accumulation layer is formed by ion-implanting hydrogen ions into one of the main surfaces of the first substrate and the second substrate made of a single crystal material, and the second substrate and one or more kinds of metals are formed. After bonding at room temperature to a layer containing, separation may be performed at the position of the hydrogen storage layer. This separation utilizes the fact that the hydrogen storage layer becomes a mechanical weak point.
  • a layer containing at least one type of metal is patterned into a predetermined shape.
  • the functional structure according to the fourth invention of the present invention is:
  • a first layer and a first layer, at least one of which is made of a single crystal material, are joined at room temperature through a layer containing one or more metals;
  • At least one of the layer containing one or more metals, the first layer, and the second layer is patterned in a predetermined shape.
  • the layer containing one or more types of metal, the first layer, and the second layer are each patterned into a predetermined shape. These patterning shapes depend on the purpose of use of the functional structure and the functions it has. It is appropriately selected depending on the situation.
  • the functional structure is a structure having some function, and is generally, for example, a mechanical, electrical, electro-mechanical, optical, or electro-optical component or element.
  • a specific example is a micro mirror used for scanning a laser beam in an optical disk device or the like.
  • the method for manufacturing a functional structure according to the fifth aspect of the present invention includes:
  • first substrate and a second substrate at least one of which is made of a single crystal material, forming a layer containing one or more metals on a main surface of the first substrate;
  • the layer containing one or more types of metal is patterned into a predetermined shape.
  • one of the first substrate and the second substrate is patterned into a predetermined shape. If necessary, one etching stopper is formed between at least one of the first substrate and the second substrate and a layer containing one or more types of metals.
  • a first layer and a second layer, at least one of which is made of a single crystal material, are joined at room temperature via a layer containing one or more metals,
  • a layer containing at least one metal and at least a first layer and a second layer A mask pattern is formed on one side.
  • a material for forming a mask pattern a material having at least one kind of metal and at least one of the first layer and the second layer is preferably used because it has a high ability to block an electron beam. It will be selected accordingly.
  • the mask pattern is typically formed by a layer containing one or more metals and one of the first layer and the second layer, and the other of the first layer and the second layer forms the mask pattern. Is completely removed.
  • a method of manufacturing a mask for electron beam exposure comprising: preparing a first substrate and a second substrate, at least one of which is made of a single crystal material, Forming a layer containing the above metal;
  • At least one of the first layer and the first layer made of a single-crystal material is interposed via a layer containing at least one kind of metal, for example, a layer made of a metal or an alloy.
  • the first layer and the second layer or one of the first and second substrates by dry etching by bonding the first layer and the first substrate and the second substrate at room temperature.
  • the layer containing one or more metals has a sufficiently high electrical conductivity as compared to the SiO 2 film, so that the charge No charge-up occurs, and the orbit of the ion is bent by the charge-up so that it is below the layer to be etched. It is possible to prevent the occurrence of the notching phenomenon in which the portion is hollowed out. For this reason, it is not necessary to switch the recipe of the etching process or install a mechanism for preventing charge up in the etching apparatus, so that the process is easy and the cost of the countermeasure can be reduced.
  • the thermal expansion differs from the conventional case where the substrates are bonded by using a high-temperature heat treatment. Can be eliminated.
  • the substrates to be bonded have different coefficients of thermal expansion (linear expansion coefficients)
  • the substrates are greatly warped during the heat treatment, and a flat bonded substrate is obtained. This makes it difficult to manufacture the functional structure.
  • one of the first layer and the second layer or one of the first substrate and the second substrate can be formed of an insulator such as A1N.
  • a reaction layer is not formed at the interface between layers or the interface between substrates.
  • FIG. 1 is a cross-sectional view showing a multilayer structure according to a first embodiment of the present invention.
  • FIGS. 2A and 2B are multilayer structures for manufacturing a micromirror mirror according to a second embodiment of the present invention. Plan view and cross section showing body, Fig. 3 A
  • FIG. 3B is a plan view and a sectional view showing a micromirror according to a second embodiment of the present invention.
  • FIGS. 4A to 4F are diagrams of a multilayer structure according to a third embodiment of the present invention.
  • FIG. 5A to FIG. 5D are cross-sectional views for explaining a method of manufacturing a mask for electron beam exposure according to the fourth embodiment of the present invention. BEST MODE FOR CARRYING OUT THE INVENTION
  • FIG. 1 shows a multilayer structure according to a first embodiment of the present invention.
  • the (100) single-crystal Si layers 2 and 3 are joined at room temperature with the upper and lower sides of the metal film 1 interposed therebetween to form a three-layer structure.
  • the material of the metal film for example, A1 or Cu can be used.
  • the thickness of the (100) single crystal Si layer 2 depends on the use thereof, but is generally 100 Lim or less, typically 50 m or less.
  • the (100) single-crystal Si layer 3 serves as a support of the multilayer structure, and is composed of the (100) single-crystal Si substrate itself, and has a thickness of, for example, 300 m to 1 m. mm.
  • a metal film 1 is formed on a (100) single-crystal Si layer 3 made of a (100) single-crystal Si substrate by a sputtering method or a vacuum evaporation method.
  • the (100) single-crystal Si layer 3 on which the substrate was formed was opposed to another (100) single-crystal Si substrate at an interval in one ultra-high vacuum chamber, and A r After cleaning by irradiation with ions, normal pressure bonding is performed by applying pressure while keeping them in close contact.
  • Fig. 1 shows A multilayer structure is manufactured.
  • the (100) single-crystal Si layer 2 has excellent workability by dry etching and is most suitable as a structural material
  • the (100) single-crystal Si layer 2 is desirably etched by dry etching.
  • the base of the (100) single-crystal Si layer 2 is a metal film 1 having excellent dry etching resistance
  • the (100) single-crystal Si layer 2 is, for example, RIE.
  • the metal film 1 becomes one layer of etching.
  • the metal film 1 is made of the (100) single crystal single crystal. It works effectively as an etching stopper layer of the Si layer 2. It not only by an electrically conductive metal layer 1, the abnormality of the S 0 I substrate single crystal S i layer of the single crystal S i layer due to charge-up of S i ⁇ 2 film has become a problem when the dry etching ing of It is possible to suppress the occurrence of the etching phenomenon, that is, the notching phenomenon, and there is no problem that the lower portion of the (100) single-crystal Si layer 2 is cut off.
  • the process is simple. Low cost.
  • the metal film 1 can be expected to function as a current path / heat conduction path. Further, since room-temperature bonding is used for bonding the substrates, there is no risk of warpage of the substrate due to a difference in the thermal expansion coefficient between the metal used for the metal film 1 and Si, and there is no fear of a reaction between the metal and Si.
  • FIGS. 2A and 2B show a multilayer structure having a three-layer structure used for manufacturing the micromirror.
  • FIG. 2A is a plan view
  • FIG. 2B is an X-X line of FIG. 2A. It is sectional drawing along.
  • this multilayer structure is formed by bonding (100) single-crystal Si layers 12 and 13 at room temperature with the upper and lower sides of metal film 11 interposed therebetween.
  • the formation of the three-layer structure is the same as that of the first embodiment, except that the metal film 11 is patterned in a predetermined shape corresponding to the structure of the microphone opening mirror.
  • illustration of the (100) single crystal Si layer 12 is omitted.
  • the method for manufacturing the multilayer structure is the same as the method for manufacturing the multilayer structure according to the first embodiment, except that the metal film 11 is patterned into a predetermined shape after the metal film 11 is formed. is there.
  • FIGS. 3A and 3B show micromirrors manufactured using the multilayer structure shown in FIGS. 2A and 2B, wherein FIG. 3A is a plan view and FIG. FIG. 3 is a cross-sectional view taken along the line Y-Y of FIG.
  • This micromirror is manufactured using the multilayer structure shown in FIGS. 3A and 3B as follows. That is, first, a mirror surface 14 made of a metal film and a pair of electrode pads 15 and 16 are formed at predetermined positions on the (100) single crystal Si layer 12. The mirror surface 14 and the electrode pads 15 and 16 are formed by forming a metal film on the entire surface of the (100) single crystal Si layer 12 and then using the metal film as a mask with a resist pattern or the like. It can be formed by a pattern jung method by etching or by a lift-off method.
  • the (100) single-crystal Si layer 12 is dry-etched. After the resist pattern 12 was etched to an intermediate depth, the resist pattern was removed, and the surface of the (100) single crystal Si layer 12 was again masked with a resist pattern having a predetermined shape.
  • a rectangular mirror portion 17 and two V-shaped hinge portions that support the mirror portion 17 are formed. 18 and 19 are formed.
  • the (100) single-crystal Si layer 13 is masked by a resist pattern having a predetermined shape, and the (100) single-crystal Si layer 13 is dry-etched.
  • the Si through layer 13 is etched through.
  • a micro mirror 20 composed of the mirror part 17 and the hinge parts 18 and 19 is formed.
  • the micromirror 20 is a cantilever supported at the root of the hinge 18-19.
  • the entire hinge portions 18 and 19 and the predetermined portion on the hinge portions 18 and 19 side of the mirror portion 17 are formed by the (100) single crystal Si layer 12 and the metal film 11. It has a bimorph structure consisting of two layers.
  • the mirror surface 14 is formed on the mirror part 17, and the electrode surface. Heads 15 and 16 are formed at the roots of hinges 18 and 19, respectively.
  • the hinge portions 18 and 19 that generate heat by applying a pulse voltage between the electrode pads 15 and 16 have a coefficient of thermal expansion between S i and metal. It is deformed from the difference, and as a result it can move up and down.
  • the micromirror 20 can be used, for example, as a device for scanning one laser beam in an optical disk device.
  • the fine pattern of the metal film 11 not used in the configuration of the micromirror 20 may be replaced by, for example, an electric It can be used as a standard wiring.
  • the microphone opening mirror can be easily manufactured using the multilayer structure shown in FIGS. 2A and 2B.
  • a thin-film device having a fine metal pattern on the back side like the micromirror 120 could not be easily manufactured.
  • a multi-layered structure in which a metal film 11 previously patterned into a predetermined shape is formed between (100) single-crystal Si layers 12 and 13 is formed. Since the micromirror 20 is manufactured using the body, a fine metal pattern can be formed on the back side of the micromirror 20, which is a thin film device using single crystal Si. It goes without saying that various advantages similar to those of the first embodiment can be obtained.
  • a method for manufacturing a multilayer structure according to the third embodiment of the present invention will be described. This manufacturing method is shown in FIGS. 4A to 4F.
  • a (100) single crystal Si substrate 21 is prepared, and the surface is cleaned by cleaning.
  • the (100) The single-crystal Si layer 23 is epitaxially grown to form a structure having the (100) single-crystal Si layer 23 on the porous Si layer 22.
  • a metal film 24 is formed on the (100) single crystal Si layer 23 by a sputtering method.
  • a (100) single crystal Si substrate 25 whose surface has been cleaned by cleaning in advance is separately prepared, and the (100) single crystal Si substrate 25 is prepared in an ultra-high vacuum.
  • the (100) single crystal Si substrate 25 is prepared in an ultra-high vacuum.
  • a water jet is injected toward the porous Si layer 22 of the (100) single-crystal Si substrate 21 to form a porous Si layer. Separate at 1 and 2.
  • the porous Si layer 22 remaining on the outermost surface of one of the separated (100) single crystal Si substrates 25 is chemically removed.
  • the metal film 24 and the (100) single-crystal Si layer 27 are sequentially formed on the (100) single-crystal Si substrate 25.
  • a multi-layer structure having a three-layer structure is manufactured.
  • the (100) single crystal Si layer 23 is formed by epitaxial growth, its thickness is easily reduced to about 1 / m or less. Not only can it be controlled, but the in-plane distribution of its thickness can be controlled with high precision. In addition, advantages similar to those of the first embodiment can be obtained.
  • FIGS. 5A to 5D This manufacturing method is shown in FIGS. 5A to 5D.
  • a (100) single crystal Si substrate 31 is formed on a (100) single-crystal Si substrate 31 by using, for example, a normal temperature bonding method as in the third embodiment. Then, a multilayer structure having a three-layer structure in which a metal film 32 and a (100) single-crystal Si layer 33 are sequentially formed is manufactured.
  • the surface of the (100) single-crystal Si layer 33 is formed by a resist pattern (not shown) made of an electron beam resist having a predetermined shape corresponding to the mask pattern.
  • the (100) single-crystal Si layer 3 is dry-etched until the metal film 32 is exposed in a state masked by You.
  • the metal film 32 is dry-etched again using this resist pattern.
  • a line-and-space mask pattern 34 having a two-layer structure of the metal film 32 and the (100) single-crystal Si layer 33 is formed.
  • a resist pattern having a predetermined shape with an opening corresponding to the mask pattern 34 is formed on the back surface of the (100) single crystal Si substrate 31, Using this resist pattern as a mask, through-holes are formed by dry-etching the (100) single-crystal Si substrate 31 from the back side. As a result, the mask pattern 34 has a structure floating in the air except for its end.
  • the intended electron beam exposure mask is manufactured.
  • the mask pattern 34 of the mask for electron beam exposure has a two-layer structure of the metal film 32 and the (100) single-crystal Si layer 33.
  • heat generated by the electron beam exposure mask heated by the electron beam irradiation is transferred to a metal film 3 having particularly good thermal conductivity through a heat conduction path.
  • deformation of the mask pattern 34 due to a rise in temperature can be effectively prevented. Therefore, it is possible to perform exposure that faithfully reflects the shape of the mask pattern 34.
  • Example 1 Example corresponding to the first embodiment
  • the (100) single-crystal Si layer 3 has a diameter of 5 inches and a thickness of 500 m (100) single-crystal Si substrate; 0) The thickness of the single crystal Si layer 1 is 0 m.
  • the metal film 1 an A1 film having a thickness of 1 ⁇ m was used. These layers are firmly bonded to each other and can be used without any problem even when heated to about 400 ° C.
  • This multilayer structure was manufactured by the cold bonding method as follows. First, an A1 film having a thickness of 1 is formed by a sputtering method on a (100) single crystal Si substrate 3 having a diameter of 5 inches and a thickness of 500 m serving as a supporting substrate.
  • a diameter of a thickness of 5 Inchi 2 0 0 (1 0 0) zm is prepared separately monocrystal S i substrate, both 1 X 1 0- 9 T 0 rr total one scan pressure board
  • the substrates were held opposite to each other in an ultra-high vacuum vessel and irradiated with an Ar ion beam at a pressure of 1 ⁇ 10 ⁇ 3 ⁇ 0 rr to clean the surfaces of the substrates.
  • the accelerating voltage of the Ar ion was 1 kV.
  • the multilayer structure manufactured in this manner can suppress the notching phenomenon during the dry etching of the (100) single-crystal Si layer 2 and contribute to the realization of an excellent etched shape.
  • Example 1 Example corresponding to the second embodiment
  • a (100) single crystal Si substrate having a diameter of 5 inches was used as the (100) single crystal Si layer 13 of the multilayer structure shown in FIGS. 2A and 2B.
  • the thickness of the (100) single crystal Si layer 13 is 525 m
  • the thickness of the upper (100) single crystal Si layer 12 is 20 m.
  • the metal film 11 is an A1 film having a thickness of 1.
  • This multilayer structure can be manufactured by the same process as in Example 1. However, after forming an A 1 film as a metal film 11 on a (100) single crystal Si layer 13, This is different from Example 1 in that normal temperature bonding is performed after pattern jungling of one film.
  • a micromirror shown in FIGS. 3A and 3B was manufactured.
  • the mirror surface 14 and the electrode pads 15 and 16 are formed by forming a Cr / Au film on the (100) single-crystal Si layer 12 by the sputtering method, and then pattern-jewing the Cr / Au film. Thus, they were simultaneously formed.
  • the basic structure of the micromirror 20 was formed by dry-etching the (100) single-crystal Si layer 12.
  • the (100) single crystal Si layer 12 was a low resistance layer having a specific resistance of 0.01 ⁇ cm.
  • the hinge sections 18 and 19 of the microphone opening mirror 20 have a (100) single-crystal Si layer 12 and an A1 film formed in advance as a metal layer 11 on the lower side, and a bimorph It has a structure.
  • the upper etching is performed by the over-etching after the (100) single-crystal Si layer 13 penetrates. Since there is a concern that the (100) single crystal Si layer 12 may be damaged, for example, when manufacturing a multilayer structure, the (100) single crystal Si layer By forming one insulating film such as two films and then forming the metal film 11 thereon, this insulating film becomes one layer of etching (100) single crystal Si Damage to the layer 12 can be effectively prevented. This insulating film also reduces the value of the current flowing when current flows through the hinge portions 18 and 19 of the bimorph structure. It also works to reduce power consumption.
  • Example 3 Example corresponding to the third embodiment.
  • the multilayer structure was manufactured according to the manufacturing method shown in FIGS. 4A to 4F.
  • (100) single crystal Si substrates 21 and 25 having a diameter of 5 inches are prepared.
  • the thickness of the (100) single crystal Si substrate 21 was 525 m
  • the thickness of the (100) single crystal Si substrate 25 was 200 m.
  • the (100) single crystal Si substrates 21 and 25 are anodized to form a porous Si layer 22 having a thickness of 0.8 m.
  • a (100) single crystal Si layer (23) was grown by an epitaxial thickness of 0.6. As a result, a structure in which the (100) single crystal Si layer 23 was formed on the porous Si layer 22 was produced.
  • an Al film having a thickness of 1 / m was formed as a metal film 22 on the (100) single crystal Si layer I3 by a sputtering method.
  • the (100) single-crystal Si substrate 21 and the (100) single-crystal Si substrate 25 formed up to the metal film 22 were put into an ultra-high vacuum chamber, and their surfaces were cleaned. After cleaning by cleaning by Ar ion beam irradiation, they were brought into close contact with each other and pressure was applied to perform normal temperature bonding.
  • the joining conditions were the same as in Example 1.
  • a composite substrate was obtained in which the (100) single-crystal Si substrate 21 and the (100) single-crystal Si substrate 25 formed up to the metal film 22 were integrated.
  • the multilayer structure manufactured in this way has a better in-plane thickness than a multilayer structure manufactured by a manufacturing method in which one substrate is thinned by polishing the back surface after bonding the substrates. It has uniformity and is suitable for forming a single-crystal Si layer with a thickness of about 1 m.
  • Example 4 Example corresponding to the fourth embodiment.
  • the thickness of the (100) single crystal Si substrate 31 is 5255 wm, and the thickness of the (100) single crystal Si layer 33 is 0. 6 um.
  • the metal film 32 an A1 film having a thickness of 0.1 m was used.
  • a mask for electron beam exposure was manufactured as follows. First, an electron beam resist is applied on the (100) single crystal Si layer 33, and the electron beam resist is exposed to a desired pattern shape by an electron beam drawing method, and then the resist is developed. A resist pattern is formed. Next, the (100) single-crystal Si layer 33 is pattern-junged by performing dry etching using this resist pattern to obtain a desired pattern shape. Subsequently, the lower metal film 32 is also dry-etched using this resist pattern to form a pattern having the same shape as the pattern shape of the (100) single-crystal Si layer 33. Thus, a mask pattern 34 is formed.
  • the (100) single-crystal Si layer 33 constituting the mask pattern 34 is a tough material having almost no residual stress.
  • the lower metal film 32 has an excellent drawing capability because it has a function of quickly releasing the charge charged up to the electron beam exposure mask and the heat generated by the electron beam irradiation at the time of exposure.
  • the numerical values are merely examples, and numerical values different from these may be used as necessary.
  • a material, a structure, a shape, a plane orientation, a process, or the like may be used.
  • a ceramic material may be used instead of the (100) single crystal Si layer 3. It is also very useful to use a multilayer structure having a metal film between a ceramic substrate and a single-crystal Si substrate instead of the multilayer structure of the first embodiment. Further, a structure such as a cavity may be provided in advance on the side to be a supporting substrate, and a substrate having a metal film may be bonded thereto to manufacture a similar structure.
  • the porous Si layer 22 was used as the separation layer, but the porous Si layer 22 was formed on the (100) single crystal Si substrate 21. Instead, hydrogen ions may be implanted into the (100) single crystal Si substrate 21 and a hydrogen storage layer formed thereby may be used as a separation layer.
  • a layer made of, for example, SiC or diamond may be used instead of the (100) single crystal Si layer 33.
  • a layer containing at least one kind of metal for example, a layer made of a metal or an alloy

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Abstract

A first layer and a second layer at least one of which is composed of a single-crystal material are brought together at room temperature with a layer containing one or more metals, e.g. a metal film such as an Al film, interposed therebetween, thereby forming a multilayer structure. Both of the first and second layers can be composed of single crystal materials, or they may be composed of different materials. The first and second layers are, for example, single-crystal Si layers or single-crystal Si substrates. For example, a micromirror is manufactured using this multilayer structure.

Description

明 細 書 多層構造体およびその製造方法ならびに機能構造体およびその製造 方法ならびに電子線露光用マスクおよびその製造方法 技術分野  Description Multilayer structure, method of manufacturing the same, functional structure and method of manufacturing the same, mask for electron beam exposure, and method of manufacturing the same
この発明は、 多層構造体およびその製造方法ならびに機能構造体お よびその製造方法ならびに電子線露光用マスクおよびその製造方法に 関する。 背景技術  The present invention relates to a multilayer structure, a method for manufacturing the same, a functional structure, a method for manufacturing the same, an electron beam exposure mask, and a method for manufacturing the same. Background art
MEM S (Microelectromechanical Systems) 分野においては、 従 来は、 平坦な面を持つ構造、 例えばマイクロミラーなどを作製するた めの基板として S O I (Silicon On Insulator)基板が多用されていた。 これは、 上下の単結晶シリコン (S i ) 層の間に B OX層と呼ばれる 熱酸化膜 ( S i 02 膜) を有する構造であり、 それらの単結晶 S i層 を加工することにより構造を作り込むものである。 In the field of MEMS (Microelectromechanical Systems), a SOI (Silicon On Insulator) substrate has been frequently used as a substrate for fabricating a structure having a flat surface, for example, a micromirror. Structure which is a structure having upper and lower single-crystal silicon thermal oxide film called B OX layer between the (S i) layer (S i 0 2 film), by processing them single crystal S i layer It is what makes.
上記の S〇 I基板の単結晶 S i層の加工には、 ディープ (deep) R I E (Reactive Ion Etching) 法と呼ばれる、 高密度プラズマを利用 したドライエッチング法が多用されている (例えば、 Alexandra Rick ard and Mark Mc ie Characterisation and optimisation of deep dry etching for MEMS appl ications 'SPIE International Conferere nce on "Microelectronic & MEMS Technologies", Edinburgh (UK), May 2001および特開 2 0 0 1— 1 6 8 0 8 1号公報) 。  For the processing of the single-crystal Si layer on the SII substrate described above, a dry etching method using high-density plasma, called a deep RIE (Reactive Ion Etching) method, is often used (for example, Alexandra Rick ard and Mark Mcie Characterization and optimisation of deep dry etching for MEMS applications' SPIE International Conference on "Microelectronic & MEMS Technologies", Edinburgh (UK), May 2001 and Japanese Patent Application Publication No.).
なお、 特開平 5— 2 1 7 8 2 5号公報には、 S i基板を多孔質化し、 この多孔質化した基板上に非多孔質 S i単結晶層を形成した後、 この 非多孔質 S i単結晶層の表面を金属表面を有する他の基板と貼り合わ せた状態で 4 5 0〜 9 0 0 °Cの温度に加熱することにより両 S i基板 を接合する技術が開示されている。 また、 特開平 5— 1 0 9 7 1 1号 公報には、 第 1の S i基板の多結晶 S i層が形成された面と第 1の S i基板とを接触させた状態で 1 0 0 0 °C程度の熱処理を行うことによ り両 S i基板を接合させる技術が開示されている。 特開平 1 1— 1 0 3 0 3 5号公報および特開平 1 0— 1 5 0 1 7 6号公報には、 2枚の 基板をそれらの間に金属と金属、 半導体などとの反応層を形成するこ とにより接合して S 0 I基板を製造する技術が開示されている。 Note that Japanese Patent Application Laid-Open No. 5-2187825 discloses that a Si substrate is made porous, and a non-porous Si single crystal layer is formed on the porous substrate. A technique for bonding both Si substrates by heating the non-porous Si single crystal layer to a temperature of 450 to 900 ° C with the surface of the non-porous Si single crystal layer bonded to another substrate having a metal surface. It has been disclosed. Also, Japanese Patent Application Laid-Open No. 5-10971 discloses that the surface of the first Si substrate on which the polycrystalline Si layer is formed is in contact with the first Si substrate. There is disclosed a technique of bonding both Si substrates by performing a heat treatment at about 100 ° C. Japanese Patent Application Laid-Open Nos. 11-15035 and 110-1576 describe that two substrates are provided with a reaction layer between a metal and a metal or a semiconductor between them. A technique for manufacturing an S 0 I substrate by bonding by forming is disclosed.
しかしながら、 上述のディープ R I E法で S O I基板の単結晶 S i 層を加工する場合には、 単結晶 S i層のエッチングが終了して下地の S i 0 2 膜が露出すると、 チャージアップした S i 0 2 膜のためにィ オンの軌道が曲げられて単結晶 S i層の下部が抉られるノツチング現 象が発生していた。 この現象を抑制するためには、 単結晶 S i層のェ ツチング終点直前にエッチングプロセスのレシピを切り替えたり、 あ るいはエッチング装置にチャージアップ防止用の機構を設置したりす る対策が必要であった。 しかしながら、 これらの対策は、 前者では手 間が掛かる割に正確さに欠け、 後者は初期投資が大きい上、 未だ完全 な制御は困難である点で問題が多い。 However, when the single crystal Si layer of the SOI substrate is processed by the deep RIE method described above, when the etching of the single crystal Si layer is completed and the underlying SiO 2 film is exposed, the charged Si 0 2 Notsuchingu phenomenon that the bottom of the bent orbit of i on the single crystal S i layer is gouged for membrane has occurred. In order to suppress this phenomenon, it is necessary to take measures such as switching the recipe of the etching process immediately before the end of the etching of the single-crystal Si layer, or installing a mechanism for preventing charge-up in the etching apparatus. Was. However, these countermeasures are problematic in that the former requires less time, but is less accurate, and the latter requires a larger initial investment and is still difficult to completely control.
また、 S O I基板を利用した場合は、 単結晶 S i層の S i 0 2 膜側 の面に電気的配線を作製することは困難であることから、 通常は単結 晶 S i層に選択的にドーピングを施してこれを電気的配線としていた c このため、 単結晶 S i層の両面を生かした構造を作製することは困難 であった。 In addition, when an SOI substrate is used, it is difficult to form electrical wiring on the surface of the single crystal Si layer on the side of the SiO 2 film. Therefore, it was difficult to produce a structure utilizing both surfaces of the single-crystal Si layer.
したがって、 この発明が解決しょうとする課題は、 マイクロミラ一 などの各種の機能構造体を安価かつ簡便にしかも精度良く製造するこ とができる多層構造体およびその製造方法を提供することにある。 この発明が解決しょうとする他の課題は、 マイクロミラ一などの各 種の機能構造体を安価かつ簡便にしかも精度良く製造することができ る機能構造体およびその製造方法を提供することにある。 Therefore, the problem to be solved by the present invention is to manufacture various functional structures such as micromirrors inexpensively, easily and accurately. And a method of manufacturing the same. Another object of the present invention is to provide a functional structure capable of manufacturing various types of functional structures such as micromirrors inexpensively, easily, and accurately, and a method of manufacturing the same. .
この発明が解決しょうとする更に他の課題は、 電子線露光用マスク を安価かつ簡便にしかも精度良く製造することができる電子線露光用 マスクおよびその製造方法を提供することにある。 発明の開示  Still another object of the present invention is to provide an electron beam exposure mask capable of manufacturing an electron beam exposure mask at a low cost, easily and accurately, and a method of manufacturing the same. Disclosure of the invention
上記課題を解決するために、 この発明の第 1の発明による多層構造 体は、  In order to solve the above-mentioned problems, a multilayer structure according to a first invention of the present invention comprises:
1種類以上の金属を含む層を介して、 少なく とも一方が単結晶材料 からなる第 1の層および第 2の層が常温接合されていることを特徴と する。  It is characterized in that a first layer and a second layer, at least one of which is made of a single crystal material, are joined at room temperature via a layer containing at least one kind of metal.
ここで、 単結晶材料には、 完全な単結晶のみならず、 亜粒界を含む ものなど、 実質的に単結晶とみなすことができる材料も含まれる。 ま た、 第 1の層および第 2の層の一方が単結晶材料からなるものでない 場合、 それは具体的には多結晶または非晶質の材料である。 典型的な —つの例では、 第 1の層および第 2の層の両者とも単結晶材料からな る。 ここで、 単結晶材料は、 内部応力が極めて少ないことや強靭であ り、 平坦な層あるいは基板を製造することができることなどにより構 造材として優れている。  Here, the single crystal material includes not only a perfect single crystal but also a material that can be regarded as a substantially single crystal, such as a material containing a sub-grain boundary. Also, if one of the first and second layers is not made of a single crystal material, it is specifically a polycrystalline or amorphous material. Typical—In one example, both the first and second layers consist of a single crystal material. Here, the single crystal material is excellent as a structural material because it has extremely low internal stress, is tough, and can produce a flat layer or a substrate.
第 1の層および第 2の層は、 互いに同一の材料からなる場合もある し、 互いに異なる材料からなる場合もある。 第 1の層および第 2の層 の材料は、 多層構造体の使用目的などに応じて選択可能であり、 基本 的にはどのような材料を使用することも可能であるが、 具体例を挙げ ると、 第 1の層および第 1の層の一方が、 S i、 S i い x G e x (た だし、 0 < x≤ 1 ) 、 S i C:、 C (ダイヤモンドなど) 、 I I I _ V 族化合物半導体 (例えば、 G a A s系半導体、 A 1 G a I n p系半導 体、 G a N系半導体など) に代表される化合物半導体などからなり、 他方が、 S i、 ガラス (例えば、 パイレックス (登録商標) ガラス) 、 セラミ.ックスなどからなる。 第 1の層および第 2の層の材料として半 導体を用いる場合、 この半導体はノンドープであっても、 n型不純物 または P型不純物をド一プしたものであってもよい。 典型的な一つの 例では、 第 1の層および第 2の層の少なく とも一方が単結晶 S iから なり、 特に第 1の層および第 2の層の両者とも単結晶 S iからなる。 また、 他の典型的な例では、 第 1の層および第 2の層の少なく とも一 方が単結晶 S iからなり、 他方がガラスまたはセラミックスからなる t 第 1の層および第 2の層の少なく とも一方をドライエッチングにより 加工する必要がある場合、 その層はドライエッチング可能な材料から なる。 このドライエツチング可能な材料としては、 使用するドライエ ツチング法との組み合わせにより種々のものを使用可能であるが、 単 結晶 S i はこのドライエッチング性に優れた材料の一つである。 The first layer and the second layer may be made of the same material or may be made of different materials. The material of the first layer and the second layer can be selected according to the purpose of use of the multilayer structure, and basically any material can be used. If that, one of the first layer and the first layer, S i, S i have x G e x (was however, 0 <x≤ 1), S i C :, C ( diamond etc.), III _ V compound semiconductor (e.g., G a a s based semiconductor, a 1 G a I n p type semiconducting material, G a n type semiconductor, etc.) consists of compounds typified by semiconductor, the other is, S i, glass (For example, Pyrex (registered trademark) glass) and ceramics. When a semiconductor is used as the material of the first layer and the second layer, the semiconductor may be non-doped or may be doped with an n-type impurity or a p-type impurity. In a typical example, at least one of the first layer and the second layer is made of single-crystal Si, and in particular, both the first layer and the second layer are made of single-crystal Si. Further, in another exemplary embodiment, at least hand of the first layer and the second layer is made of a single crystal S i, the other of the t first and second layers of glass or ceramics If at least one needs to be processed by dry etching, the layer is made of a dry-etchable material. As the material that can be dry-etched, various materials can be used in combination with the dry-etching method to be used, and single crystal Si is one of the materials excellent in this dry-etching property.
第 1の層および第 2の層のそれぞれは、 単一の材料からなる単層構 造のものであっても、 同一または複数の材料からなる複数層からなる 多層構造のものであってもよい。 また、 第 1の層および第 2の層は、 それらの一方または両方に何らかの構造あるいは素子が形成されたも のであってもよい。  Each of the first layer and the second layer may have a single-layer structure made of a single material or a multi-layer structure made of a plurality of layers made of the same or a plurality of materials. . Further, the first layer and the second layer may have a structure or an element formed on one or both of them.
第 1の層および第 2の層の間に挟まれた 1種類以上の金属を含む層 は、 典型的には金属または合金からなる。 この金属または合金は、 多 層構造体の使用目的などに応じて選択可能であり、 基本的にはどのよ うなものも使用可能であるが、 ドライエッチング耐性、 電気伝導性、 熱伝導性などの観点から最適なものが選ばれることが多い。 具体例を 挙げると、 A l、 C u、 Au、 C r、 T a、 Wなどである。 ここで、 常温接合を用いるために、 A 1のような低融点金属の使用も可能とな る。 また、 この 1種類以上の金属を含む層は、 多層構造体の使用目的 などに応じて、 所定の形状にパターンユングされる。 参考までに上に 例示した金属の熱膨張係数を示すと、 S iが 2. 4 4 X 1 0— 6/°Cで あるのに対して、 A 1は 2. 3 X 1 0 -5/。C、 C uは 1 . 4 x 1 0一5 /°C、 A uは 1 . 4 2 X 1 0— 5/°C、 C rは 8. 2 x 1 0— 6/°C、 T aは 7 x 1 0— 6/ ;、 Wは 4 x 1 0— 6/°Cである。 なお、 金属と S i との反応により形成されるシリサイ ドの熱膨張率は、 T aシリサイ ド が 8. 9 X 1 0— 6/°C、 T i シリサイ ドが 1 . 0 5 X 1 0— 5/°C、 W シリサイ ドが 8. 4 X 1 0— 6/°C、 C 0シリサイ ドが 9. 4 X 1 0一6 /°Cである。 The layer containing one or more metals sandwiched between the first and second layers typically comprises a metal or alloy. This metal or alloy can be selected according to the purpose of use of the multilayer structure, and basically any material can be used. However, dry etching resistance, electrical conductivity, The most suitable one is often selected from the viewpoint of thermal conductivity and the like. Specific examples include Al, Cu, Au, Cr, Ta, and W. Here, a low-melting-point metal such as A1 can be used because room-temperature bonding is used. The layer containing one or more metals is patterned into a predetermined shape depending on the intended use of the multilayer structure. When showing the thermal expansion coefficient of a metal exemplified above by reference, S for i that 2. is 4 4 X 1 0- 6 / ° C, A 1 is 2. 3 X 1 0 - 5 / . C, C u is 1. 4 x 1 0 one 5 / ° C, A u is 1. 4 2 X 1 0- 5 / ° C, C r is 8. 2 x 1 0- 6 / ° C, T a the 7 x 1 0- 6 /;, W is 4 x 1 0- 6 / ° C . The thermal expansion coefficient of Shirisai de formed by reaction of the metal and S i is, T a Shirisai de is 8. 9 X 1 0- 6 / ° C, T i Shirisai de is 1. 0 5 X 1 0 - 5 / ° C, W Shirisai de is 8. 4 X 1 0- 6 / ° C, the C 0 Shirisai de 9. a 4 X 1 0 one 6 / ° C.
第 1の層および第 2の層の一方をそれらの間に挟まれた 1種類以上 の金属を含む層とともにドライエッチングにより加工し、 その後に他 方をドライエッチングにより加工する場合には、 後のドライエツチン グ時に最初にドライエツチングした層の裏面が露出し、 そのままドラ ィエッチングを行うと損傷が生じるおそれがあることから、 これを防 止するため、 好適には、 第 1の層および第 2の層の少なく とも一方と 1種類以上の金属を含む層との間にエッチングストツバ一層が設けら れる。 このエッチングストツバ一層としては、 典型的には絶縁膜 (S i 〇2 膜や S i 3 N4 膜など) が用いられる。 When one of the first layer and the second layer is processed by dry etching together with a layer containing at least one kind of metal sandwiched between them, and then the other is processed by dry etching, At the time of dry etching, the back surface of the layer that has been dry-etched first is exposed, and if dry etching is performed as it is, damage may occur. Therefore, to prevent this, preferably, the first layer and the second layer are preferably used. An etching stopper is provided between at least one of the layers and the layer containing one or more metals. An insulating film (such as a Si 2 film or a Si 3 N 4 film) is typically used as the etching stopper layer.
第 1の層および第 2の層は、 基板そのものであっても、 各種の成膜 技術により形成された膜であっても、 基板を薄層化したものであって もよい。 第 1の層および第 の層の少なく とも一方の厚さは、 典型的 には 1 0 0 以下、 より典型的には 5 0 um以下、 更に典型的には 1 0 m以下である。 The first layer and the second layer may be the substrate itself, films formed by various film forming techniques, or thin layers of the substrate. The thickness of at least one of the first layer and the first layer is typically less than 100, more typically less than 50 um, more typically 10 m or less.
以上のことは、 その性質に反しない限り、 以下の発明についても同 様に成立する。  The above holds true for the following inventions as long as they do not contradict their properties.
この発明の第 2の発明による多層構造体の製造方法は、  The method for manufacturing a multilayer structure according to the second invention of the present invention includes:
1種類以上の金属を含む層を介して、 少なく とも一方が単結晶材料 からなる第 1 の層および第 2の層を常温接合する工程を有することを 特徴とする。  A step of bonding a first layer and a second layer at least one of which is made of a single crystal material at room temperature via a layer containing at least one kind of metal.
この発明の第 3の発明による多層構造体の製造方法は、  The method for producing a multilayer structure according to the third invention of the present invention comprises:
少なく とも一方が単結晶材料からなる第 1の基板および第 2の基板 を用意し、 第 1の基板の主面に 1種類以上の金属を含む層を形成する 工程と、  Providing a first substrate and a second substrate, at least one of which is made of a single crystal material, forming a layer containing one or more metals on a main surface of the first substrate;
第 2の基板と 1種類以上の金属を含む層とを常温接合する工程とを 有することを特徴とする。  Bonding the second substrate and a layer containing one or more metals at room temperature.
ここで、 第 1の基板および第 2の基板は第 1 の発明における第 1 の 層および第 2の層に対応し、 第 1 の基板を薄層化したもの、 成膜技術 により成膜したもの、 あるいは第 1 の基板そのものなどが第 1の層で あり、 第 2の基板を薄層化したもの、 成膜技術により成膜したもの、 あるいは第 2の基板そのものなどが第 の層である。  Here, the first substrate and the second substrate correspond to the first layer and the second layer in the first invention, and the first substrate is made thinner, and the first substrate is formed by a film forming technique. Alternatively, the first substrate itself or the like is the first layer, and the second substrate is a thin layer, a film formed by a film forming technique, or the second substrate itself is the first layer.
第 2の基板と 1種類以上の金属を含む層との常温接合は、 典型的に は、 第 2の基板の主面とその 1種類以上の金属を含む層の表面とを超 高真空中で清浄化処理し、 それらを互いに対向させた状態で圧力を加 えることにより行う。  The room-temperature bonding between the second substrate and the layer containing one or more metals is typically performed by bonding the main surface of the second substrate and the surface of the layer containing one or more metals in an ultra-high vacuum. The cleaning is performed, and pressure is applied in a state where they are opposed to each other.
常温接合を行った後には、 必要に応じて、 第 1の基板および第 2の 基板の一方を例えば裏面研磨などにより薄層化する。 薄層化する基板 が単結晶材料からなるものである場合、 薄層化された基板は単結晶層 となる。 また、 第 1の基板および第 2の基板の単結晶材料からなる一 方の主面に多孔質層を形成し、 この多孔質層上に単結晶層をェピタキ シャル成長させておき、 第 2の基板と 1種類以上の金属を含む層とを 常温接合した後、 その多孔質層の位置で分離を行うようにしてもよい この分離は多孔質層が機械的弱点部となることを利用するものである 多孔質層上にェピタキシャル成長させる単結晶層は、 多孔質層を形成 する基板と同一の材料からなるが、 場合によっては、 多孔質層を形成 する基板と異なる材料からなるものであってもよい。 更に、 第 1の基 板および第 2の基板の単結晶材料からなる一方の主面に水素イオンを ィォン注入することにより水素蓄積層を形成しておき、 第 2の基板と 1種類以上の金属を含む層とを常温接合した後、 水素蓄積層の位置で 分離を行うようにしてもよい。 この分離は水素蓄積層が機械的弱点部 となることを利用するものである。 After performing the room temperature bonding, if necessary, one of the first substrate and the second substrate is thinned by, for example, polishing the back surface. When the substrate to be thinned is made of a single crystal material, the thinned substrate becomes a single crystal layer. Further, the first substrate and the second substrate may be made of a single crystal material. A porous layer is formed on one of the main surfaces, a single crystal layer is epitaxially grown on the porous layer, and the second substrate and a layer containing at least one metal are bonded at room temperature. Separation may be performed at the position of the porous layer. This separation utilizes the fact that the porous layer becomes a mechanical weak point. The single crystal layer that is epitaxially grown on the porous layer is porous. It may be made of the same material as the substrate on which the layer is formed, but in some cases, may be made of a material different from the substrate on which the porous layer is formed. Further, a hydrogen accumulation layer is formed by ion-implanting hydrogen ions into one of the main surfaces of the first substrate and the second substrate made of a single crystal material, and the second substrate and one or more kinds of metals are formed. After bonding at room temperature to a layer containing, separation may be performed at the position of the hydrogen storage layer. This separation utilizes the fact that the hydrogen storage layer becomes a mechanical weak point.
必要に応じて、 第 1の基板の主面に 1種類以上の金属を含む層を形 成した後、 第 2の基板との常温接合を行う前に、 その 1種類以上の金 属を含む層を所定の形状にパターンニングする。  If necessary, after forming a layer containing at least one type of metal on the main surface of the first substrate, and before performing room-temperature bonding with the second substrate, a layer containing at least one type of metal. Is patterned into a predetermined shape.
以上のことは、 その性質に反しない限り、 以下の発明についても同 様に成立する。  The above holds true for the following inventions as long as they do not contradict their properties.
この発明の第 4の発明による機能構造体は、  The functional structure according to the fourth invention of the present invention is:
1種類以上の金属を含む層を介して、 少なく とも一方が単結晶材料 からなる第 1 の層および第 の層が常温接合され、  A first layer and a first layer, at least one of which is made of a single crystal material, are joined at room temperature through a layer containing one or more metals;
1種類以上の金属を含む層、 第 1の層および第 2の層のうちの少な く とも一つが所定の形状にパターンユングされていることを特徴とす る。  At least one of the layer containing one or more metals, the first layer, and the second layer is patterned in a predetermined shape.
典型的には、 1種類以上の金属を含む層、 第 1の層および第 2の層 がそれぞれ所定の形状にパターンユングされている。 これらのパター ン二ング形状は、 機能構造体の使用目的やそれに持たせる機能などに 応じて適宜選択される。 Typically, the layer containing one or more types of metal, the first layer, and the second layer are each patterned into a predetermined shape. These patterning shapes depend on the purpose of use of the functional structure and the functions it has. It is appropriately selected depending on the situation.
機能構造体は、 何らかの機能を有する構造体であり、 一般的には、 例えば機械的、 電気的、 電気一機械的、 光学的、 電気光学的な各種部 品または素子である。 具体例を挙げると、 光ディスク装置などにおい てレーザ光の走査に使用されるマイクロミラ一である。  The functional structure is a structure having some function, and is generally, for example, a mechanical, electrical, electro-mechanical, optical, or electro-optical component or element. A specific example is a micro mirror used for scanning a laser beam in an optical disk device or the like.
以上のことは、 その性質に反しない限り、 次の第 5の発明について も同様に成立する。  The above holds true for the following fifth invention as long as it does not contradict its nature.
この発明の第 5の発明による機能構造体の製造方法は、  The method for manufacturing a functional structure according to the fifth aspect of the present invention includes:
少なく とも一方が単結晶材料からなる第 1の基板および第 2の基板 を用意し、 第 1の基板の主面に 1種類以上の金属を含む層を形成する 工程と、  Providing a first substrate and a second substrate, at least one of which is made of a single crystal material, forming a layer containing one or more metals on a main surface of the first substrate;
第 2の基板と 1種類以上の金属を含む層とを常温接合する工程と、 1種類以上の金属を含む層、 第 1の基板および第 2の基板のうちの 少なく とも一つを所定の形状にパターンニングする工程とを有するこ とを特徴とする。  Bonding the second substrate and a layer containing one or more metals at room temperature; and forming at least one of the layer containing one or more metals, the first substrate and the second substrate into a predetermined shape. And a patterning step.
典型的には、 第 2の基板と 1種類以上の金属を含む層との常温接合 を行う前に、 その 1種類以上の金属を含む層を所定の形状にパターン ユングする。 また、 典型的には、 第 2の基板と 1種類以上の金属を含 む層との常温接合を行った後に、 第 1の基板および第 2の基板の一方 を所定の形状にパターンユングする。 また、 必要に応じて、 第 1の基 板および第 2の基板の少なく とも一方と 1種類以上の金属を含む層と の間にエツチングストッパ一層を形成する。  Typically, before performing room-temperature bonding between the second substrate and the layer containing one or more types of metal, the layer containing one or more types of metal is patterned into a predetermined shape. Also, typically, after performing room-temperature bonding between the second substrate and a layer containing one or more types of metals, one of the first substrate and the second substrate is patterned into a predetermined shape. If necessary, one etching stopper is formed between at least one of the first substrate and the second substrate and a layer containing one or more types of metals.
この発明の第 6の発明による電子線露光用マスクは、  The electron beam exposure mask according to the sixth invention of the present invention,
1種類以上の金属を含む層を介して、 少なく とも一方が単結晶材料 からなる第 1の層および第 2の層が常温接合され、  A first layer and a second layer, at least one of which is made of a single crystal material, are joined at room temperature via a layer containing one or more metals,
1種類以上の金属を含む層と第 1の層および第 2の層の少なく とも 一方とによりマスクパターンが形成されていることを特徴とする。 マスクパターンを形成する、 1種類以上の金属を含む層と第 1の層 および第 2の層の少なく とも一方との材料は、 電子線を遮る能力が高 いものが好適に用いられ、 必要に応じて選択される。 マスクパターン は、 典型的には、 1種類以上の金属を含む層と第 1の層および第 2の 層の一方とにより形成され、 第 1の層および第 2の層の他方はそのマ スクパターンの部分が完全に除去される。 A layer containing at least one metal and at least a first layer and a second layer A mask pattern is formed on one side. As a material for forming a mask pattern, a material having at least one kind of metal and at least one of the first layer and the second layer is preferably used because it has a high ability to block an electron beam. It will be selected accordingly. The mask pattern is typically formed by a layer containing one or more metals and one of the first layer and the second layer, and the other of the first layer and the second layer forms the mask pattern. Is completely removed.
以上のことは、 次の第 7の発明についても同様に成立する。  The above holds true for the following seventh invention.
この発明の第 7の発明による電子線露光用マスクの製造方法は、 少なく とも一方が単結晶材料からなる第 1 の基板および第 2の基板 を用意し、 第 1の基板の主面に 1種類以上の金属を含む層を形成する 工程と、  According to a seventh aspect of the present invention, there is provided a method of manufacturing a mask for electron beam exposure, comprising: preparing a first substrate and a second substrate, at least one of which is made of a single crystal material, Forming a layer containing the above metal;
第 2の基板と上記 1種類以上の金属を含む層とを常温接合する工程 と、  Bonding the second substrate and the layer containing one or more metals at room temperature,
1種類以上の金属を含む層と第 1の層および第 2の層の少なく とも 一方とをパターンユングすることによりマスクパターンを形成する工 程とを有することを特徴とする。  A step of forming a mask pattern by pattern-junging at least one of a layer containing one or more metals and at least one of the first layer and the second layer.
上述のように構成されたこの発明によれば、 1種類以上の金属を含 む層、 例えば金属または合金からなる層を介して、 少なく とも一方が 単結晶材料からなる第 1の層および第 1の層あるいは第 1の基板およ び第 2の基板を常温接合することにより、 第 1の層および第 2の層あ るいは第 1の基板および第 2の基板の一方をドライエッチングにより 加工する場合、 エッチングが終了して下地の 1種類以上の金属を含む 層が露出しても、 この 1種類以上の金属を含む層は電気伝導性が S i 0 2 膜に比べて十分に高いためチャージアップが生じることがなく、 チャージアップによりィォンの軌道が曲げられて被ェッチング層の下 部が抉られるノッチング現象の発生を防止することができる。 このた め、 エッチングプロセスのレシピを切り替えたり、 エツチング装置に チャージアツプ防止用の機構を設置したりする対策が不要となり、 プ 口セスが容易となり、 対策費用の節減を図ることもできる。 また、 1 種類以上の金属を含む層を形成した後、 この層を所定の形状にパター ンユングすることにより、 電気的配線を容易に形成することができる。 更に、 第 1の層および第 2の層あるいは第 1の基板および第 2の基 板を常温接合することにより、 従来のように高温での熱処理を用いて 基板を接合する場合と異なり、 熱膨張の影響をなくすことができる。 すなわち、 高温での熱処理を用いて基板を接合する場合には、 接合す る基板の熱膨張率 (線膨張率) が互いに異なるとその熱処理時に基板 が大きく反ってしまい、 平坦な接合基板を得ることは困難となるため、 機能構造体の製造に支障が生じる場合がある。 これを防止するために は、 接合する基板の材料を同一とせざるを得ず、 基板の選択の自由度 が著しく低くなる。 これに対し、 この発明では、 第 1の層および第 2 の層あるいは第 1の基板および第 2の基板を常温接合することから、 熱膨張率の影響がないためこの問題は解消され、 基板の選択の自由度 が高い。 このため、 例えば、 第 1の層および第 2の層あるいは第 1の 基板および第 2の基板の一方を例えば A 1 Nなどの絶縁物により形成 することも可能となる。 また、 常温接合では、 層の界面あるいは基板 の界面に反応層が形成されることがない。 図面の簡単な説明 According to the present invention configured as described above, at least one of the first layer and the first layer made of a single-crystal material is interposed via a layer containing at least one kind of metal, for example, a layer made of a metal or an alloy. The first layer and the second layer or one of the first and second substrates by dry etching by bonding the first layer and the first substrate and the second substrate at room temperature. In this case, even if the etching is completed and the underlying layer containing one or more metals is exposed, the layer containing one or more metals has a sufficiently high electrical conductivity as compared to the SiO 2 film, so that the charge No charge-up occurs, and the orbit of the ion is bent by the charge-up so that it is below the layer to be etched. It is possible to prevent the occurrence of the notching phenomenon in which the portion is hollowed out. For this reason, it is not necessary to switch the recipe of the etching process or install a mechanism for preventing charge up in the etching apparatus, so that the process is easy and the cost of the countermeasure can be reduced. Further, by forming a layer containing one or more kinds of metals and then patterning this layer into a predetermined shape, electrical wiring can be easily formed. Furthermore, by bonding the first layer and the second layer or the first substrate and the second substrate at room temperature, the thermal expansion differs from the conventional case where the substrates are bonded by using a high-temperature heat treatment. Can be eliminated. In other words, when bonding substrates using a heat treatment at a high temperature, if the substrates to be bonded have different coefficients of thermal expansion (linear expansion coefficients), the substrates are greatly warped during the heat treatment, and a flat bonded substrate is obtained. This makes it difficult to manufacture the functional structure. In order to prevent this, the materials of the substrates to be bonded must be the same, and the degree of freedom in selecting the substrates is significantly reduced. On the other hand, in the present invention, since the first layer and the second layer or the first substrate and the second substrate are bonded at room temperature, this problem is solved because there is no influence of the coefficient of thermal expansion, and High degree of freedom in selection. Therefore, for example, one of the first layer and the second layer or one of the first substrate and the second substrate can be formed of an insulator such as A1N. In the case of room temperature bonding, a reaction layer is not formed at the interface between layers or the interface between substrates. BRIEF DESCRIPTION OF THE FIGURES
第 1図は、 この発明の第 1の実施形態による多層構造体を示す断面 図、 第 2図 Aおよび第 2図 Bは、 この発明の第 2の実施形態によるマ イク口ミラー製造用多層構造体を示す平面図および断面図、 第 3図 A および第 3図 Bは、 この発明の第 2の実施形態によるマイクロミラー を示す平面図および断面図、 第 4図 A〜第 4図 Fは、 この発明の第 3 の実施形態による多層構造体の製造方法を説明するための断面図、 第 5図 A〜第 5図 Dは、 この発明の第 4の実施形態による電子線露光用 マスクの製造方法を説明するための断面図である。 発明を実施するための最良の形態 FIG. 1 is a cross-sectional view showing a multilayer structure according to a first embodiment of the present invention. FIGS. 2A and 2B are multilayer structures for manufacturing a micromirror mirror according to a second embodiment of the present invention. Plan view and cross section showing body, Fig. 3 A FIG. 3B is a plan view and a sectional view showing a micromirror according to a second embodiment of the present invention. FIGS. 4A to 4F are diagrams of a multilayer structure according to a third embodiment of the present invention. FIG. 5A to FIG. 5D are cross-sectional views for explaining a method of manufacturing a mask for electron beam exposure according to the fourth embodiment of the present invention. BEST MODE FOR CARRYING OUT THE INVENTION
以下、 この発明の実施形態について図面を参照しながら説明する。 第 1図はこの発明の第 1の実施形態による多層構造体を示す。  Hereinafter, embodiments of the present invention will be described with reference to the drawings. FIG. 1 shows a multilayer structure according to a first embodiment of the present invention.
第 1図に示すように、 この多層構造体においては、 金属膜 1の上下 を挟んで ( 1 0 0 ) 単結晶 S i層 2、 3が常温接合されて 3層構造が 形成されている。 金属膜 1の材料としては、 例えば A 1や C uなどを 用いることができる。 この場合、 ( 1 0 0 ) 単結晶 S i層 2の厚さは その用途にもよるが一般的には 1 0 0 Li m以下であり、 典型的には 5 0 m以下である。 一方、 ( 1 0 0 ) 単結晶 S i層 3は多層構造体の 支持体となるもので ( 1 0 0 ) 単結晶 S i基板そのものからなり、 そ の厚さは例えば 3 0 0 m〜 1 mmである。  As shown in FIG. 1, in this multilayer structure, the (100) single-crystal Si layers 2 and 3 are joined at room temperature with the upper and lower sides of the metal film 1 interposed therebetween to form a three-layer structure. As the material of the metal film 1, for example, A1 or Cu can be used. In this case, the thickness of the (100) single crystal Si layer 2 depends on the use thereof, but is generally 100 Lim or less, typically 50 m or less. On the other hand, the (100) single-crystal Si layer 3 serves as a support of the multilayer structure, and is composed of the (100) single-crystal Si substrate itself, and has a thickness of, for example, 300 m to 1 m. mm.
この多層構造体の製造方法は次のとおりである。 まず、 ( 1 0 0 ) 単結晶 S i基板からなる ( 1 0 0 ) 単結晶 S i層 3上にスパッ夕リン グ法ゃ真空蒸着法などにより金属膜 1 を成膜し、 この金属膜 1 を形成 した ( 1 0 0 ) 単結晶 S i層 3を超高真空チャンバ一内でもう 1枚の ( 1 0 0 ) 単結晶 S i基板と間隔を置いて対向させ、 それぞれの対向 面に A rイオンを照射して洗浄した後にそれらを密着させた状態で圧 力を加えて常温接合を行う。 この後、 ( 1 0 0 ) 単結晶 S i層 3の相 手側の ( 1 0 0 ) 単結晶 S i基板を裏面研磨により所定の厚さに薄層 化して ( 1 0 0 ) 単結晶 S i層 1とする。 以上により、 第 1図に示す 多層構造体が製造される。 The method for manufacturing this multilayer structure is as follows. First, a metal film 1 is formed on a (100) single-crystal Si layer 3 made of a (100) single-crystal Si substrate by a sputtering method or a vacuum evaporation method. The (100) single-crystal Si layer 3 on which the substrate was formed was opposed to another (100) single-crystal Si substrate at an interval in one ultra-high vacuum chamber, and A r After cleaning by irradiation with ions, normal pressure bonding is performed by applying pressure while keeping them in close contact. Thereafter, the (100) single-crystal Si substrate on the other side of the (100) single-crystal Si layer 3 is thinned to a predetermined thickness by polishing the back surface, and the (100) single-crystal Si substrate is thinned. i-layer 1. From the above, Fig. 1 shows A multilayer structure is manufactured.
この第 1の実施形態によれば、 次のような種々の利点を得ることが できる。 まず、 ( 1 0 0 ) 単結晶 S i層 2はドライエッチングによる 加工性に優れていて構造材としても最適であるため、 この ( 1 0 0 ) 単結晶 S i層 2をドライエッチングにより所望の形状に加工すること で様々な機能を有する部品や素子を製造することができる。 そしてこ の場合、 この ( 1 0 0 ) 単結晶 S i層 2の下地がドライエツチング耐 性に優れた金属膜 1であるため、 この ( 1 0 0 ) 単結晶 S i層 2を例 えば R I E法により ドライエッチングする時に、 この金属膜 1がエツ チングストツバ一層となる。 すなわち、 ( 1 0 0 ) 単結晶 S i層 2と 金属膜 1 とのエッチング特性は大きく異なるため、 エッチング時の選 択比を大きく取ることができ、 金属膜 1 は ( 1 0 0 ) 単結晶 S i層 2 のエッチングストツバ一層として有効に働く。 それだけでなく、 金属 膜 1の電気伝導性により、 S 0 I基板の単結晶 S i層をドライエッチ ングする時に問題となっている S i 〇2 膜のチャージアップによる単 結晶 S i層の異常エッチング現象、 すなわちノッチング現象の発生を 抑制することが可能となり、 ( 1 0 0 ) 単結晶 S i層 2の下部が抉ら れる問題がない。 また、 ノッチング現象の発生を抑制するために、 ェ ツチングプロセスのレシピを切り替えたり、 エツチング装置にチヤ一 ジアップ防止用の機構を設置したりする必要がないため、 プロセスが 簡単であり、 また、 低コス卜で済む。 更に、 ( 1 0 0 ) 単結晶 S i層 2の加工後には、 この金属膜 1 には電流路ゃ熱伝導路としての働きを 期待することもできる。 また、 基板の接合に常温接合を用いるため、 金属膜 1に用いる金属と S i との熱膨張係数の違いによる基板の反り の心配もなく、 金属と S i との反応の恐れもない。 According to the first embodiment, the following various advantages can be obtained. First, since the (100) single-crystal Si layer 2 has excellent workability by dry etching and is most suitable as a structural material, the (100) single-crystal Si layer 2 is desirably etched by dry etching. By processing into a shape, parts and elements having various functions can be manufactured. In this case, since the base of the (100) single-crystal Si layer 2 is a metal film 1 having excellent dry etching resistance, the (100) single-crystal Si layer 2 is, for example, RIE. When dry etching is performed by the method, the metal film 1 becomes one layer of etching. That is, since the etching characteristics of the (100) single crystal Si layer 2 and the metal film 1 are greatly different, the selection ratio at the time of etching can be made large, and the metal film 1 is made of the (100) single crystal single crystal. It works effectively as an etching stopper layer of the Si layer 2. It not only by an electrically conductive metal layer 1, the abnormality of the S 0 I substrate single crystal S i layer of the single crystal S i layer due to charge-up of S i 〇 2 film has become a problem when the dry etching ing of It is possible to suppress the occurrence of the etching phenomenon, that is, the notching phenomenon, and there is no problem that the lower portion of the (100) single-crystal Si layer 2 is cut off. In addition, it is not necessary to switch the recipe of the etching process or install a mechanism for preventing charging up in the etching device in order to suppress the occurrence of the notching phenomenon, so the process is simple. Low cost. Further, after the (100) single crystal Si layer 2 is processed, the metal film 1 can be expected to function as a current path / heat conduction path. Further, since room-temperature bonding is used for bonding the substrates, there is no risk of warpage of the substrate due to a difference in the thermal expansion coefficient between the metal used for the metal film 1 and Si, and there is no fear of a reaction between the metal and Si.
次に、 この発明の第 2の実施形態によるマイクロミラ一について説 明する。 Next, a micro mirror according to a second embodiment of the present invention will be described. I will tell.
第 2図 Aおよび第 2図 Bはこのマイクロミラーの製造に用いる 3層 構造の多層構造体を示し、 第 2図 Aは平面図、 第 2図 Bは第 2図 Aの X—X線に沿っての断面図である。  FIGS. 2A and 2B show a multilayer structure having a three-layer structure used for manufacturing the micromirror. FIG. 2A is a plan view, and FIG. 2B is an X-X line of FIG. 2A. It is sectional drawing along.
第 2図 Aおよび第 2図 Bに示すように、 この多層構造体は、 金属膜 1 1の上下を挟んで ( 1 0 0 ) 単結晶 S i層 1 2、 1 3が常温接合さ れて 3層構造が形成されていることは第 1の実施形態と同様であるが、 金属膜 1 1がマイク口ミラーの構造に対応した所定の形状にパターン ユングされていることが異なる。 なお、 第 2図 Aにおいては、 ( 1 0 0 ) 単結晶 S i層 1 2の図示は省略されている。  As shown in FIGS. 2A and 2B, this multilayer structure is formed by bonding (100) single-crystal Si layers 12 and 13 at room temperature with the upper and lower sides of metal film 11 interposed therebetween. The formation of the three-layer structure is the same as that of the first embodiment, except that the metal film 11 is patterned in a predetermined shape corresponding to the structure of the microphone opening mirror. In FIG. 2A, illustration of the (100) single crystal Si layer 12 is omitted.
この多層構造体の製造方法は、 金属膜 1 1の成膜後にこの金属膜 1 1を所定の形状にパターンユングすることを除いて、 第 1の実施形態 による多層構造体の製造方法と同様である。  The method for manufacturing the multilayer structure is the same as the method for manufacturing the multilayer structure according to the first embodiment, except that the metal film 11 is patterned into a predetermined shape after the metal film 11 is formed. is there.
第 3図 Aおよび第 3図 Bは第 2図 Aおよび第 2図 Bに示す多層構造 体を用いて製造されたマイクロミラーを示し、 第 3図 Aは平面図、 第 3図 Bは第 3図 Aの Y— Y線に沿っての断面図である。  FIGS. 3A and 3B show micromirrors manufactured using the multilayer structure shown in FIGS. 2A and 2B, wherein FIG. 3A is a plan view and FIG. FIG. 3 is a cross-sectional view taken along the line Y-Y of FIG.
このマイクロミラーは、 第 3図 Aおよび第 3図 Bに示す多層構造体 を用いて次のようにして製造される。 すなわち、 まず、 ( 1 0 0 ) 単 結晶 S i層 1 2上の所定位置に金属膜からなるミラ一面 1 4および一 対の電極パッ ド 1 5、 1 6を形成する。 これらのミラー面 1 4および 電極パッ ド 1 5、 1 6は、 金属膜を ( 1 0 0 ) 単結晶 S i層 1 2の全 面に形成した後、 この金属膜をレジストパターンなどをマスクとして エッチングによりパターンユングする方法により形成することができ るほか、 リフトオフ法により形成することもできる。 次に、 ( 1 0 0 ) 単結晶 S i層 1 2の表面を所定の形状を有するレジストパターンによ りマスクした状態でドライエッチングにより ( 1 0 0 ) 単結晶 S i層 1 2を途中の深さまでエッチングした後、 このレジス トパターンを除 去し、 再び ( 1 0 0 ) 単結晶 S i層 1 2の表面を所定の形状を有する レジス トパターンによりマスクした状態で、 ドライエツチングにより ( 1 0 0 ) 単結晶 S i層 1 2を完全にエッチングすることにより、 長 方形のミラー部 1 7およびこのミラー部 1 7を支持する V字形状をな す 2本のヒンジ部 1 8、 1 9 を形成する。 この後、 このレジストバタ ーンを除去した後、 ( 1 0 0 ) 単結晶 S i層 1 3の表面を所定の形状 を有するレジス トパターンによりマスクした状態でドライエツチング によりこの ( 1 0 0 ) 単結晶 S i層 1 3を貫通エッチングする。 これ によって、 ミラ一部 1 7およびヒンジ部 1 8、 1 9からなるマイクロ ミラ一 2 0が形成される。 このマイクロミラ一 2 0は、 ヒンジ部 1 8 - 1 9の根元で支持された片持ばりとなる。 ここで、 ヒンジ部 1 8、 1 9の全体およびミラー部 1 7のヒンジ部 1 8、 1 9側の所定部分は、 ( 1 0 0 ) 単結晶 S i層 1 2 と金属膜 1 1 との 2層からなるバイモル フ構造を有する。 ミラー面 1 4はミラー部 1 7の上に形成され、 電極 ノヽ。ッ ド 1 5、 1 6はそれぞれヒンジ部 1 8、 1 9の根元の部分に形成 されている。 This micromirror is manufactured using the multilayer structure shown in FIGS. 3A and 3B as follows. That is, first, a mirror surface 14 made of a metal film and a pair of electrode pads 15 and 16 are formed at predetermined positions on the (100) single crystal Si layer 12. The mirror surface 14 and the electrode pads 15 and 16 are formed by forming a metal film on the entire surface of the (100) single crystal Si layer 12 and then using the metal film as a mask with a resist pattern or the like. It can be formed by a pattern jung method by etching or by a lift-off method. Next, while the surface of the (100) single-crystal Si layer 12 is masked by a resist pattern having a predetermined shape, the (100) single-crystal Si layer is dry-etched. After the resist pattern 12 was etched to an intermediate depth, the resist pattern was removed, and the surface of the (100) single crystal Si layer 12 was again masked with a resist pattern having a predetermined shape. By completely etching the (100) single-crystal Si layer 12 by dry etching, a rectangular mirror portion 17 and two V-shaped hinge portions that support the mirror portion 17 are formed. 18 and 19 are formed. Thereafter, after removing the resist pattern, the (100) single-crystal Si layer 13 is masked by a resist pattern having a predetermined shape, and the (100) single-crystal Si layer 13 is dry-etched. The Si through layer 13 is etched through. As a result, a micro mirror 20 composed of the mirror part 17 and the hinge parts 18 and 19 is formed. The micromirror 20 is a cantilever supported at the root of the hinge 18-19. Here, the entire hinge portions 18 and 19 and the predetermined portion on the hinge portions 18 and 19 side of the mirror portion 17 are formed by the (100) single crystal Si layer 12 and the metal film 11. It has a bimorph structure consisting of two layers. The mirror surface 14 is formed on the mirror part 17, and the electrode surface. Heads 15 and 16 are formed at the roots of hinges 18 and 19, respectively.
このようにして製造されたマイクロミラー 2 0は、 電極パッ ド 1 5 - 1 6間にパルス電圧を印加することにより発熱したヒンジ部 1 8、 1 9が、 S i と金属との熱膨張係数の違いから変形し、 その結果上下動 が可能である。 このマイ クロミラー 2 0は、 例えば、 光ディスク装置 においてレ一ザ一光を走査するためのデバィスとして使用することが できる。 なお、 第 2図 A、 第 2図 B、 第 3図 Aおよび第 3図 Bにおい て、 マイクロミラー 2 0の構成に用いられていない金属膜 1 1の微小 なパターンは必要に応じて例えば電気的配線として用いることができ る。 以上のように、 この第 2の実施形態によれば、 第 2図 Aおよび第 2 図 Bに示す多層構造体を用いてマイク口ミラーを容易に製造すること ができる。 すなわち、 従来は、 このマイクロミラ一 2 0のように裏側 に微細な金属パターンを有する薄膜デバイスは、 簡単には製造するこ とができなかった。 特に、 このマイクロミラ一 2 0のように薄膜とし て単結晶のものを用いる薄膜デバィスは製造が困難であつた。 これに 対し、 この第 2の実施形態においては、 あらかじめ所定の形状にパ夕 ーンユングされた金属膜 1 1 を ( 1 0 0 ) 単結晶 S i層 1 2、 1 3の 間に形成した多層構造体を用いてマイクロミラー 2 0を製造している ため、 単結晶 S i を用いた薄膜デバイスであるこのマイクロミラー 2 0の裏側に微細な金属パターンを形成することができる。 第 1の実施 形態と同様な種々の利点を得ることができることは言うまでもない。 次に、 この発明の第 3の実施形態による多層構造体の製造方法につ いて説明する。 この製造方法を第 4図 A〜第 4図 Fに示す。 In the micromirror 20 manufactured in this manner, the hinge portions 18 and 19 that generate heat by applying a pulse voltage between the electrode pads 15 and 16 have a coefficient of thermal expansion between S i and metal. It is deformed from the difference, and as a result it can move up and down. The micromirror 20 can be used, for example, as a device for scanning one laser beam in an optical disk device. In FIGS. 2A, 2B, 3A, and 3B, the fine pattern of the metal film 11 not used in the configuration of the micromirror 20 may be replaced by, for example, an electric It can be used as a standard wiring. As described above, according to the second embodiment, the microphone opening mirror can be easily manufactured using the multilayer structure shown in FIGS. 2A and 2B. That is, conventionally, a thin-film device having a fine metal pattern on the back side like the micromirror 120 could not be easily manufactured. In particular, it was difficult to manufacture a thin film device using a single crystal thin film such as the micromirror 120. On the other hand, in the second embodiment, a multi-layered structure in which a metal film 11 previously patterned into a predetermined shape is formed between (100) single-crystal Si layers 12 and 13 is formed. Since the micromirror 20 is manufactured using the body, a fine metal pattern can be formed on the back side of the micromirror 20, which is a thin film device using single crystal Si. It goes without saying that various advantages similar to those of the first embodiment can be obtained. Next, a method for manufacturing a multilayer structure according to the third embodiment of the present invention will be described. This manufacturing method is shown in FIGS. 4A to 4F.
この第 3の実施形態においては、 第 4図 Aに示すように、 ( 1 0 0 ) 単結晶 S i基板 2 1 を用意し、 洗浄を行って表面を清浄化する。  In the third embodiment, as shown in FIG. 4A, a (100) single crystal Si substrate 21 is prepared, and the surface is cleaned by cleaning.
次に、 第 4図 Bに示すように、 ( 1 0 0 ) 単結晶 S i基板 2 1上に 陽極酸化法により多孔質 S i層 2 2を形成した後、 その上に ( 1 0 0 ) 単結晶 S i層 2 3をェピタキシャル成長させ、 多孔質 S i層 2 2上に ( 1 0 0 ) 単結晶 S i層 2 3がある構造を形成する。  Next, as shown in FIG. 4B, after forming a porous Si layer 22 on the (100) single-crystal Si substrate 21 by anodization, the (100) The single-crystal Si layer 23 is epitaxially grown to form a structure having the (100) single-crystal Si layer 23 on the porous Si layer 22.
次に、 第 4図 Cに示すように、 スパッタリング法により ( 1 0 0 ) 単結晶 S i層 2 3上に金属膜 2 4を成膜する。  Next, as shown in FIG. 4C, a metal film 24 is formed on the (100) single crystal Si layer 23 by a sputtering method.
次に、 第 4図 Dに示すように、 あらかじめ洗浄を行って表面を清浄 化した ( 1 0 0 ) 単結晶 S i基板 2 5を別途用意し、 超高真空中でこ の ( 1 0 0 ) 単結晶 S i基板 2 5の表面および単結晶 S i ( 1 0 0 ) 基板 2 1上の金属膜 2 4の表面を A rイオン照射により清浄化した後、 それらの表面同士を密着させて圧力を加えることにより常温接合する c これにより、 ( 1 0 0 ) 単結晶 S i基板 2 1 と ( 1 0 0 ) 単結晶 S i 基板 2 5 とは強固に接合して 1枚の基板となる。 Next, as shown in FIG. 4D, a (100) single crystal Si substrate 25 whose surface has been cleaned by cleaning in advance is separately prepared, and the (100) single crystal Si substrate 25 is prepared in an ultra-high vacuum. After cleaning the surface of the single crystal Si substrate 25 and the surface of the metal film 24 on the single crystal Si (100) substrate 21 by Ar ion irradiation, Thus c to the room temperature bonding by brought into close contact with their surfaces on each by applying pressure, (1 0 0) single crystal S i substrate 2 1 (1 0 0) firmly bonded to the single crystal S i board 2 5 Then, it becomes one substrate.
次に、 第 4図 Eに示すように、 ( 1 0 0 ) 単結晶 S i基板 2 1の多 孔質 S i層 2 2を目がけてウォータ一ジエツ トを噴射し、 多孔質 S i 層 1 2を境に分離する。  Next, as shown in FIG. 4E, a water jet is injected toward the porous Si layer 22 of the (100) single-crystal Si substrate 21 to form a porous Si layer. Separate at 1 and 2.
次に、 分離した一方の ( 1 0 0 ) 単結晶 S i基板 2 5の最表面に残 つた多孔質 S i層 2 2を化学的に除去する。 このようにして、 第 4図 Fに示すように、 ( 1 0 0 ) 単結晶 S i基板 2 5上に金属膜 2 4およ び ( 1 0 0 ) 単結晶 S i層 2 7が順次形成された 3層構造の多層構造 体が製造される。  Next, the porous Si layer 22 remaining on the outermost surface of one of the separated (100) single crystal Si substrates 25 is chemically removed. In this way, as shown in FIG. 4F, the metal film 24 and the (100) single-crystal Si layer 27 are sequentially formed on the (100) single-crystal Si substrate 25. A multi-layer structure having a three-layer structure is manufactured.
この第 3の実施形態によれば、 ( 1 0 0 ) 単結晶 S i層 2 3をェピ タキシャル成長により形成するため、 その厚さを容易に 1 /m程度も しくはそれ以下に薄くすることができるだけでなく、 その厚さの面内 分布を高精度に制御することもできる。 これに加えて、 第 1の実施形 態と同様な利点を得ることができる。  According to the third embodiment, since the (100) single crystal Si layer 23 is formed by epitaxial growth, its thickness is easily reduced to about 1 / m or less. Not only can it be controlled, but the in-plane distribution of its thickness can be controlled with high precision. In addition, advantages similar to those of the first embodiment can be obtained.
次に、 この発明の第 4の実施形態による電子線露光用マスクの製造 方法について説明する。 この製造方法を第 5図 A〜第 5図 Dに示す。  Next, a method for manufacturing an electron beam exposure mask according to a fourth embodiment of the present invention will be described. This manufacturing method is shown in FIGS. 5A to 5D.
この第 4の実施形態においては、 まず、 第 5図 Aに示すように、 例 えば第 3の実施形態と同様に常温接合法を用いて、 ( 1 0 0 ) 単結晶 S i基板 3 1上に金属膜 3 2および ( 1 0 0 ) 単結晶 S i層 3 3が順 次形成された 3層構造の多層構造体を製造する。  In the fourth embodiment, first, as shown in FIG. 5A, a (100) single crystal Si substrate 31 is formed on a (100) single-crystal Si substrate 31 by using, for example, a normal temperature bonding method as in the third embodiment. Then, a multilayer structure having a three-layer structure in which a metal film 32 and a (100) single-crystal Si layer 33 are sequentially formed is manufactured.
次に、 第 5図 Bに示すように、 この ( 1 0 0 ) 単結晶 S i層 3 3の 表面をマスクパターンに対応した所定の形状の電子線レジストからな るレジストパターン (図示せず) によりマスクした状態でこの ( 1 0 0 ) 単結晶 S i層 3を金属膜 3 2が露出するまでドライエッチングす る。 次に、 再びこのレジストパターンを用いて金属膜 3 2をドライエ ツチングする。 これによつて、 金属膜 3 2 と ( 1 0 0 ) 単結晶 S i層 3 3 との 2層構造を有するラインアンドスペース状のマスクパターン 3 4が形成される。 Next, as shown in FIG. 5B, the surface of the (100) single-crystal Si layer 33 is formed by a resist pattern (not shown) made of an electron beam resist having a predetermined shape corresponding to the mask pattern. The (100) single-crystal Si layer 3 is dry-etched until the metal film 32 is exposed in a state masked by You. Next, the metal film 32 is dry-etched again using this resist pattern. Thus, a line-and-space mask pattern 34 having a two-layer structure of the metal film 32 and the (100) single-crystal Si layer 33 is formed.
次に、 第 5図 Cに示すように、 ( 1 0 0 ) 単結晶 S i基板 3 1 の裏 面にマスクパターン 3 4に対応する部分が開口した所定の形状のレジ ストパターンを形成し、 このレジストパターンをマスクとして ( 1 0 0 ) 単結晶 S i基板 3 1 を裏面側からドライエッチングすることによ り貫通孔を形成する。 これによつて、 マスクパターン 3 4はその末端 部を除いて宙に浮いた構造となる。  Next, as shown in FIG. 5C, a resist pattern having a predetermined shape with an opening corresponding to the mask pattern 34 is formed on the back surface of the (100) single crystal Si substrate 31, Using this resist pattern as a mask, through-holes are formed by dry-etching the (100) single-crystal Si substrate 31 from the back side. As a result, the mask pattern 34 has a structure floating in the air except for its end.
以上により、 目的とする電子線露光用マスクが製造される。  As described above, the intended electron beam exposure mask is manufactured.
この第 4の実施形態によれば、 電子線露光用マスクのマスクパター ン 3 4が金属膜 3 2と ( 1 0 0 ) 単結晶 S i層 3 3 との 2層構造を有 するため、 この電子線露光用マスクを用いて半導体ウェハーなどに露 光を行う場合、 電子線の照射によって加熱された電子線露光用マスク に発生した熱を特に熱伝導性の良好な金属膜 3 を熱伝導路として迅 速に逃がすことができ、 温度上昇によるマスクパターン 3 4の変形な どを有効に防止することができる。 このため、 マスクパターン 3 4の 形状を忠実に反映した露光を行うことができる。  According to the fourth embodiment, since the mask pattern 34 of the mask for electron beam exposure has a two-layer structure of the metal film 32 and the (100) single-crystal Si layer 33, When exposing a semiconductor wafer or the like using an electron beam exposure mask, heat generated by the electron beam exposure mask heated by the electron beam irradiation is transferred to a metal film 3 having particularly good thermal conductivity through a heat conduction path. As a result, deformation of the mask pattern 34 due to a rise in temperature can be effectively prevented. Therefore, it is possible to perform exposure that faithfully reflects the shape of the mask pattern 34.
以下、 この発明の具体的な実施例について説明する。  Hereinafter, specific embodiments of the present invention will be described.
実施例 1 第 1の実施形態に対応する実施例 Example 1 Example corresponding to the first embodiment
第 1図に示す多層構造体において、 ( 1 0 0 ) 単結晶 S i層 3は直 径が 5ィンチで厚さが 5 0 0 mの ( 1 0 0 ) 単結晶 S i基板、 ( 1 0 0 ) 単結晶 S i層 1の厚さは 0 mである。 金属膜 1 としては厚 さが 1〃mの A 1膜を用いた。 これら各層は互いに強固に接合されて おり、 4 0 0 °C程度までの加熱にも問題なく使用することができる。 この多層構造体は常温接合法により以下のようにして製造した。 ま ず、 支持基板となる直径 5ィンチで厚さ 5 0 0 mの ( 1 0 0 ) 単結 晶 S i基板 3上にスパッタリング法により A 1膜を厚さ 1 成膜す る。 一方、 同じく直径が 5ィンチで厚さが 2 0 0 zmの ( 1 0 0 ) 単 結晶 S i基板を別途用意し、 両方の基板を 1 X 1 0— 9T 0 r rのべ一 ス圧力を持つ超高真空容器に互いに対向して保持し、 1 X 1 0 -3τ 0 r rの圧力で A rイオンビームを対向したそれぞれの基板に照射して それらの表面を清浄化した。 この時の A rイオンの加速電圧は 1 k V であつた。 In the multilayer structure shown in FIG. 1, the (100) single-crystal Si layer 3 has a diameter of 5 inches and a thickness of 500 m (100) single-crystal Si substrate; 0) The thickness of the single crystal Si layer 1 is 0 m. As the metal film 1, an A1 film having a thickness of 1 μm was used. These layers are firmly bonded to each other and can be used without any problem even when heated to about 400 ° C. This multilayer structure was manufactured by the cold bonding method as follows. First, an A1 film having a thickness of 1 is formed by a sputtering method on a (100) single crystal Si substrate 3 having a diameter of 5 inches and a thickness of 500 m serving as a supporting substrate. On the other hand, also a diameter of a thickness of 5 Inchi 2 0 0 (1 0 0) zm is prepared separately monocrystal S i substrate, both 1 X 1 0- 9 T 0 rr total one scan pressure board The substrates were held opposite to each other in an ultra-high vacuum vessel and irradiated with an Ar ion beam at a pressure of 1 × 10 −3 τ 0 rr to clean the surfaces of the substrates. At this time, the accelerating voltage of the Ar ion was 1 kV.
次に、 常温で両基板を密着させて圧力を加えた。 加えた圧力は 1 M P aであった。 この結果、 表面に金属膜 1 として A 1膜を有する厚さ 5 0 0 mの ( 1 0 0 ) 単結晶 S i基板 3と厚さ 2 0 0 m厚の ( 1 0 0 ) 単結晶 S i基板とが常温接合された。 続いて、 厚さ 2 0 0 m の ( 1 0 0 ) 単結晶 S i基板をその裏面側から研磨していき、 金属膜 1としての A 1膜上に残される S i層の厚さが 2 0 mになるまで薄 層化し、 ( 1 0 0) 単結晶 S i層 2を形成した。 これによつて、 目的 とする多層構造体が製造された。  Next, pressure was applied by bringing both substrates into close contact at room temperature. The applied pressure was 1 MPa. As a result, a (100) single-crystal Si substrate 3 having a thickness of 500 m and an A1 film as the metal film 1 on the surface 3 and a (100) single crystal Si having a thickness of 200 m The substrate was bonded at room temperature. Subsequently, the (100) single crystal Si substrate having a thickness of 200 m was polished from the back surface side, and the thickness of the Si layer remaining on the A 1 film as the metal film 1 was 2 mm. The thickness was reduced to 0 m to form a (100) single crystal Si layer 2. As a result, the intended multilayer structure was manufactured.
このようにして製造した多層構造体は、 ( 1 0 0) 単結晶 S i層 2 のドライエッチング時のノツチング現象を抑制し、 優れたエッチング 形状の実現に寄与することができる。  The multilayer structure manufactured in this manner can suppress the notching phenomenon during the dry etching of the (100) single-crystal Si layer 2 and contribute to the realization of an excellent etched shape.
実施例 1 第 2の実施形態に対応する実施例 Example 1 Example corresponding to the second embodiment
第 2図 Aおよび第 2図 Bに示す多層構造体の ( 1 0 0 ) 単結晶 S i 層 1 3として直径 5ィンチの ( 1 0 0) 単結晶 S i基板を用いた。 こ の ( 1 0 0 ) 単結晶 S i層 1 3の厚さは 5 2 5〃m、 上側の ( 1 0 0) 単結晶 S i層 1 2の厚さは 2 0 mである。 金属膜 1 1は厚さ 1 の A 1膜である。 この多層構造体は実施例 1 と同様な工程で製造することができるが- ( 1 0 0) 単結晶 S i層 1 3上に金属膜 1 1 として A 1膜を成膜した 後、 この A 1膜をパターンユングしてから常温接合を行うことが実施 例 1 と異なる。 A (100) single crystal Si substrate having a diameter of 5 inches was used as the (100) single crystal Si layer 13 of the multilayer structure shown in FIGS. 2A and 2B. The thickness of the (100) single crystal Si layer 13 is 525 m, and the thickness of the upper (100) single crystal Si layer 12 is 20 m. The metal film 11 is an A1 film having a thickness of 1. This multilayer structure can be manufactured by the same process as in Example 1. However, after forming an A 1 film as a metal film 11 on a (100) single crystal Si layer 13, This is different from Example 1 in that normal temperature bonding is performed after pattern jungling of one film.
この多層構造体を用いて第 3図 Aおよび第 3図 Bに示すマイクロミ ラーを製造した。 ミラ一面 1 4および電極パッ ド 1 5、 1 6は、 ( 1 0 0 ) 単結晶 S i層 1 2上にスパッ夕リング法により C r /Au膜を 成膜した後、 これをパターンユングすることにより同時に形成した。 次に、 ( 1 0 0) 単結晶 S i層 1 2をドライエッチングすることによ りマイクロミラー 2 0の基本構造を形成した。 なお、 ( 1 0 0) 単結 晶 S i層 1 2は、 比抵.抗 0. 0 1 · c mの低抵抗層であつた。  Using this multilayer structure, a micromirror shown in FIGS. 3A and 3B was manufactured. The mirror surface 14 and the electrode pads 15 and 16 are formed by forming a Cr / Au film on the (100) single-crystal Si layer 12 by the sputtering method, and then pattern-jewing the Cr / Au film. Thus, they were simultaneously formed. Next, the basic structure of the micromirror 20 was formed by dry-etching the (100) single-crystal Si layer 12. The (100) single crystal Si layer 12 was a low resistance layer having a specific resistance of 0.01 × cm.
次に、 ( 1 0 0) 単結晶 S i層 1 3の裏面側から ドライエツチング を行い、 第 3図 Bに示すように、 マイクロミラー 2 0を支持基板であ る ( 1 0 0 ) 単結晶 S i層 1 3から自由に動けるようにした。 マイク 口ミラ一 2 0のヒンジ部 1 8、 1 9は、 ( 1 0 0 ) 単結晶 S i層 1 2 の下側の部分に金属層 1 1 として A 1膜があらかじめ形成してあり、 バイモルフ構造になっている。  Next, dry etching was performed from the back side of the (100) single-crystal Si layer 13, and the micromirror 20 was used as a support substrate as shown in FIG. 3B. It is possible to move freely from the Si layer 13. The hinge sections 18 and 19 of the microphone opening mirror 20 have a (100) single-crystal Si layer 12 and an A1 film formed in advance as a metal layer 11 on the lower side, and a bimorph It has a structure.
なお、 ( 1 0 0 ) 単結晶 S i層 1 3をその裏面側からドライエッチ ングする際には、 ( 1 0 0 ) 単結晶 S i層 1 3の貫通後のオーバ一ェ ッチングで上側の ( 1 0 0) 単結晶 S i層 1 2に損傷が生じることが 懸念されるので、 多層構造体を製造する際に、 ( 1 0 0) 単結晶 S i 層 1 3上に例えば S i 02 膜のような絶縁膜を 1層形成しておいてか らその上に金属膜 1 1を成膜することにより、 この絶縁膜がエツチン グストツバ一層となって ( 1 0 0 ) 単結晶 S i層 1 2に損傷が発生す るのを効果的に防止することができる。 この絶縁膜はまた、 バイモル フ構造のヒンジ部 1 8、 1 9に通電する際に流れる電流値を小さく し- 消費電力を低減する働きもある。 When dry-etching the (100) single-crystal Si layer 13 from the back side, the upper etching is performed by the over-etching after the (100) single-crystal Si layer 13 penetrates. Since there is a concern that the (100) single crystal Si layer 12 may be damaged, for example, when manufacturing a multilayer structure, the (100) single crystal Si layer By forming one insulating film such as two films and then forming the metal film 11 thereon, this insulating film becomes one layer of etching (100) single crystal Si Damage to the layer 12 can be effectively prevented. This insulating film also reduces the value of the current flowing when current flows through the hinge portions 18 and 19 of the bimorph structure. It also works to reduce power consumption.
実施例 3 第 3の実施形態に対応する実施例 Example 3 Example corresponding to the third embodiment.
第 4図 A〜第 4図 Fに示す製造方法にしたがって多層構造体を製造 した。 まず、 直径 5ィンチの ( 1 0 0 ) 単結晶 S i基板 2 1、 2 5を 用意する。 ( 1 0 0 ) 単結晶 S i基板 2 1の厚さは 5 2 5 m、 ( 1 0 0 ) 単結晶 S i基板 2 5の厚さは 2 0 0 mとした。 次に、 ( 1 0 0 ) 単結晶 S i基板 2 1、 2 5の陽極酸化を行って厚さ 0. 8 mの 多孔質 S i層 2 2を形成し、 続いてこの多孔質 S i層 2 2上に ( 1 0 0 ) 単結晶 S i層 2 3を厚さ 0. 6 ェピタキシャル成長させた。 これにより、 多孔質 S i層 2 2上に ( 1 0 0 ) 単結晶 S i層 2 3があ る構造を作製した。  The multilayer structure was manufactured according to the manufacturing method shown in FIGS. 4A to 4F. First, (100) single crystal Si substrates 21 and 25 having a diameter of 5 inches are prepared. The thickness of the (100) single crystal Si substrate 21 was 525 m, and the thickness of the (100) single crystal Si substrate 25 was 200 m. Next, the (100) single crystal Si substrates 21 and 25 are anodized to form a porous Si layer 22 having a thickness of 0.8 m. On (22), a (100) single crystal Si layer (23) was grown by an epitaxial thickness of 0.6. As a result, a structure in which the (100) single crystal Si layer 23 was formed on the porous Si layer 22 was produced.
次に、 ( 1 0 0 ) 単結晶 S i層 I 3上にスパッ夕リング法により厚 さ 1 /mの A 1膜を金属膜 2 2として成膜した。 続いて、 この金属膜 2 2まで形成した ( 1 0 0 ) 単結晶 S i基板 2 1および ( 1 0 0 ) 単 結晶 S i基板 2 5を超高真空チャンバ一内に入れ、 それらの表面を A rイオンビーム照射による洗浄により清浄化してからそれらを密着さ せて圧力を加え、 常温接合を行った。 接合条件は、 実施例 1 と同等と した。 これにより、 金属膜 2 2まで形成した ( 1 0 0 ) 単結晶 S i基 板 2 1 と ( 1 0 0 ) 単結晶 S i基板 2 5とが一体となった複合基板を 得た。  Next, an Al film having a thickness of 1 / m was formed as a metal film 22 on the (100) single crystal Si layer I3 by a sputtering method. Subsequently, the (100) single-crystal Si substrate 21 and the (100) single-crystal Si substrate 25 formed up to the metal film 22 were put into an ultra-high vacuum chamber, and their surfaces were cleaned. After cleaning by cleaning by Ar ion beam irradiation, they were brought into close contact with each other and pressure was applied to perform normal temperature bonding. The joining conditions were the same as in Example 1. As a result, a composite substrate was obtained in which the (100) single-crystal Si substrate 21 and the (100) single-crystal Si substrate 25 formed up to the metal film 22 were integrated.
次に、 この複合基板の多孔質 S i層 2 2に目がけてウォータ一ジヱ ッ トを噴射して複合基板を二つに分離した。 その後、 一方の ( 1 0 0 ) 単結晶 S i基板 2 5の最表面の多孔質 S i層 2 2を HFと H2 02 と の混合溶液中で処理することにより除去した。 こう して製造された多 層構造体は、 基板貼り合わせ後に一方の基板を裏面研磨することによ り薄層化する製造方法により製造される多層構造体より良好な面内厚 さ均一性を持ち、 厚さが 1 m程度の単結晶 S i層の形成に好適なも のである。 Next, a water jet was sprayed on the porous Si layer 22 of the composite substrate to separate the composite substrate into two. It was then removed by treating the porous S i layer 2 2 of one (1 0 0) single crystal S i outermost surface of the substrate 2 5 in a mixed solution of HF and H 2 0 2. The multilayer structure manufactured in this way has a better in-plane thickness than a multilayer structure manufactured by a manufacturing method in which one substrate is thinned by polishing the back surface after bonding the substrates. It has uniformity and is suitable for forming a single-crystal Si layer with a thickness of about 1 m.
実施例 4 第 4の実施形態に対応する実施例 Example 4 Example corresponding to the fourth embodiment.
第 5図 Aに示す多層構造体において、 ( 1 0 0 ) 単結晶 S i基板 3 1の厚さは 5 2 5 wm、 ( 1 0 0 ) 単結晶 S i層 3 3の厚さは 0. 6 umである。 金属膜 3 2 としては厚さ 0. 1 mの A 1膜を用いた。 この多層構造体を用いて電子線露光用マスクを以下のようにして製 造した。 まず、 ( 1 0 0 ) 単結晶 S i層 3 3上に電子線レジストを塗 布し、 この電子線レジストを電子線描画法で所望のパターン形状に露 光した後、 レジストの現像を行ってレジストパターンを形成する。 次 に、 このレジストパターンを用いてドライエッチングを行うことによ り ( 1 0 0 ) 単結晶 S i層 3 3をパターンユングし、 所望のパターン 形状とする。 続いて、 このレジストパターンを用いて更に下層の金属 膜 3 2もドライエッチングし、 ( 1 0 0 ) 単結晶 S i層 3 3のパター ン形状と同じ形状のパターンとする。 これによつて、 マスクパターン 3 4が形成される。  In the multilayer structure shown in FIG. 5A, the thickness of the (100) single crystal Si substrate 31 is 5255 wm, and the thickness of the (100) single crystal Si layer 33 is 0. 6 um. As the metal film 32, an A1 film having a thickness of 0.1 m was used. Using this multilayer structure, a mask for electron beam exposure was manufactured as follows. First, an electron beam resist is applied on the (100) single crystal Si layer 33, and the electron beam resist is exposed to a desired pattern shape by an electron beam drawing method, and then the resist is developed. A resist pattern is formed. Next, the (100) single-crystal Si layer 33 is pattern-junged by performing dry etching using this resist pattern to obtain a desired pattern shape. Subsequently, the lower metal film 32 is also dry-etched using this resist pattern to form a pattern having the same shape as the pattern shape of the (100) single-crystal Si layer 33. Thus, a mask pattern 34 is formed.
次に、 ( 1 0 0 ) 単結晶 S i層 3 1の裏面側からドライエツチング を行ってマスクパターン 3 4の直下に開口を形成し、 マスクパターン 3 4が宙に浮いた構造を形成した。  Next, dry etching was performed from the back side of the (100) single crystal Si layer 31 to form an opening immediately below the mask pattern 34, thereby forming a structure in which the mask pattern 34 was suspended in the air.
こうして製造された電子線露光用マスクは、 マスクパターン 3 4を 構成する ( 1 0 0 ) 単結晶 S i層 3 3が残留応力が殆どない強靱な材 料であり、 また、 マスクパターン 3 4の下部の金属膜 3 2は電子線露 光用マスクにチャージアップした電荷と露光時の電子線照射による熱 とを迅速に逃がす働きをするため、 優れた描画能力を示した。  In the mask for electron beam exposure manufactured in this manner, the (100) single-crystal Si layer 33 constituting the mask pattern 34 is a tough material having almost no residual stress. The lower metal film 32 has an excellent drawing capability because it has a function of quickly releasing the charge charged up to the electron beam exposure mask and the heat generated by the electron beam irradiation at the time of exposure.
以上、 この発明の実施形態および実施例につき具体的に説明したが. この発明は、 上述の実施形態および実施例に限定されるものではなく . この発明の技術的思想に基づく各種の変形が可能である。 Although the embodiments and examples of the present invention have been specifically described above, the present invention is not limited to the above-described embodiments and examples. Various modifications based on the technical concept of the present invention are possible.
例えば、 上述の実施形態および実施例において挙げた数値 (厚さや 直径などの寸法) 、 材料、 構造、 形状、 面方位、 プロセスなどはあく までも例にすぎず、 必要に応じてこれらと異なる数値、 材料、 構造、 形状、 面方位、 プロセスなどを用いてもよい。  For example, the numerical values (dimensions such as thickness and diameter), materials, structures, shapes, plane orientations, processes, and the like mentioned in the above-described embodiments and examples are merely examples, and numerical values different from these may be used as necessary. A material, a structure, a shape, a plane orientation, a process, or the like may be used.
具体的には、 実施形態 1において、 ( 1 0 0 ) 単結晶 S i層 3の代 わりに例えばセラミックス材料を用いてもよい。 また、 実施形態 1の 多層構造体の代わりに、 セラミックス基板と単結晶 S i基板との間に 金属膜を有する多層構造体を用いることも極めて有用である。 更に、 支持基板となる側に空洞などの構造をあらかじめ設けておき、 これに 金属膜を有する基板を接合して同様な構造を製造するようにしてもよ い。  Specifically, in the first embodiment, for example, a ceramic material may be used instead of the (100) single crystal Si layer 3. It is also very useful to use a multilayer structure having a metal film between a ceramic substrate and a single-crystal Si substrate instead of the multilayer structure of the first embodiment. Further, a structure such as a cavity may be provided in advance on the side to be a supporting substrate, and a substrate having a metal film may be bonded thereto to manufacture a similar structure.
また、 実施形態 3および実施例 3においては、 分離層として多孔質 S i層 2 2を用いたが、 ( 1 0 0 ) 単結晶 S i基板 2 1上に多孔質 S i層 2 2を形成する代わりに、 この ( 1 0 0 ) 単結晶 S i基板 2 1に 水素ィォンを注入し、 それによつて形成される水素蓄積層を分離層と して用いてもよい。  Further, in Embodiment 3 and Example 3, the porous Si layer 22 was used as the separation layer, but the porous Si layer 22 was formed on the (100) single crystal Si substrate 21. Instead, hydrogen ions may be implanted into the (100) single crystal Si substrate 21 and a hydrogen storage layer formed thereby may be used as a separation layer.
更に、 実施形態 4および実施例 4において、 ( 1 0 0 ) 単結晶 S i 層 3 3の代わりに例えば S i Cやダイャモンドなどからなる層を用い てもよい。  Further, in Embodiment 4 and Example 4, a layer made of, for example, SiC or diamond may be used instead of the (100) single crystal Si layer 33.
以上説明したように、 この発明によれば、 1種類以上の金属を含む 層、 例えば金属または合金からなる層を介して、 少なく とも一方が単 結晶材料からなる第 1の層および第 2の層あるいは第 1の基板および 第 2の基板を常温接合することにより、 マイクロミラ一などの各種の 機能構造体や電子線露光用マスクを安価かつ簡便にしかも精度良く製 造することができる。  As described above, according to the present invention, a first layer and a second layer at least one of which is made of a single crystal material via a layer containing at least one kind of metal, for example, a layer made of a metal or an alloy Alternatively, by bonding the first substrate and the second substrate at room temperature, various functional structures such as a micromirror and an electron beam exposure mask can be manufactured inexpensively, simply, and accurately.

Claims

請 求 の 範 囲 The scope of the claims
1 . 1種類以上の金属を含む層を介して、 少なく とも一方が単結晶材 料からなる第 1の層および第 2の層が常温接合されていることを特徴 とする多層構造体。 1. A multilayer structure wherein at least one of a first layer and a second layer made of a single crystal material is bonded at room temperature via a layer containing one or more kinds of metals.
2 . 上記第 1の層および上記第 2の層が単結晶材料からなることを特 徴とする請求の範囲 1記載の多層構造体。  2. The multilayer structure according to claim 1, wherein the first layer and the second layer are made of a single crystal material.
3 . 上記第 1の層および上記第 2の層が互いに同一の材料からなるこ とを特徴とする請求の範囲 1記載の多層構造体。  3. The multilayer structure according to claim 1, wherein the first layer and the second layer are made of the same material.
4 . 上記第 1の層および上記第 2の層が互いに異なる材料からなるこ とを特徴とする請求の範囲 1記載の多層構造体。  4. The multilayer structure according to claim 1, wherein the first layer and the second layer are made of different materials.
5 . 上記第 1の層および上記第 2の層の一方が、 S i、 S i n G e; (ただし、 0 < x≤ 1 ) 、 S i C、 Cまたは I I I 一 V族化合物半導 体からなり、 他方が、 S i、 ガラスまたはセラミックスからなること を特徴とする請求の範囲 1記載の多層構造体。  5. One of the first layer and the second layer is composed of Si, S in Ge; (where 0 <x≤1), Si C, C or III-V compound semiconductor. 2. The multilayer structure according to claim 1, wherein the other is made of Si, glass or ceramic.
6 . 上記第 1の層および上記第 1の層の少なく とも一方が単結晶 S i からなることを特徴とする請求の範囲 1記載の多層構造体。  6. The multilayer structure according to claim 1, wherein at least one of the first layer and the first layer is made of single crystal Si.
7 . 上記第 1の層および上記第 2の層が単結晶 S iからなることを特 徴とする請求の範囲 1記載の多層構造体。  7. The multilayer structure according to claim 1, wherein the first layer and the second layer are made of single crystal Si.
8 . 上記第 1の層および上記第 2の層の少なく とも一方がドライエツ チング可能な材料からなることを特徴とする請求の範囲 1記載の多層 fe适体。  8. The multilayered ferrite body according to claim 1, wherein at least one of the first layer and the second layer is made of a material that can be dry-etched.
9 . 上記 1種類以上の金属を含む層が金属または合金からなることを 特徴とする請求の範囲 1記載の多層構造体。  9. The multilayer structure according to claim 1, wherein the layer containing at least one metal is made of a metal or an alloy.
1 0 . 上記 1種類以上の金属を含む層が所定の形状にパターンユング されていることを特徴とする請求の範囲 1記載の多層構造体。 1 1。 上記第 1の層および上記第 2の層の少なく とも一方と上記 1種 類以上の金属を含む層との間にエッチングストッパー層が設けられて いることを特徴とする請求の範囲 1記載の多層構造体。 10. The multilayer structure according to claim 1, wherein the layer containing at least one metal is patterned in a predetermined shape. 1 1. 2. The multilayer according to claim 1, wherein an etching stopper layer is provided between at least one of the first layer and the second layer and a layer containing at least one kind of metal. Structure.
1 2。 上記エッチングストッパー層は絶縁膜であることを特徴とする 請求の範囲 1 1記載の多層構造体。  1 2. The multilayer structure according to claim 11, wherein the etching stopper layer is an insulating film.
1 3 . 上記第 1の層および上記第 2の層の少なく とも一方の厚さが 1 0 0 m以下であることを特徴とする請求の範囲 1記載の多層構造体 t 1 4 . 1種類以上の金属を含む層を介して、 少なく とも一方が単結晶 材料からなる第 1の層および第 2の層を常温接合する工程を有するこ とを特徴とする多層構造体の製造方法。 1 3. The first layer and the second least also one of the layer thickness is 1 0 0 multilayered structure according to claim 1, wherein, characterized in that m is less than body t 1 4. 1 or more A method for producing a multilayered structure, comprising a step of bonding a first layer and a second layer, at least one of which is made of a single crystal material, at room temperature via a layer containing a metal.
1 5 . 少なく とも一方が単結晶材料からなる第 1の基板および第 2の 基板を用意し、 上記第 1の基板の主面に 1種類以上の金属を含む層を 形成する工程と、  15. A step of preparing a first substrate and a second substrate, at least one of which is made of a single crystal material, and forming a layer containing one or more metals on a main surface of the first substrate;
上記第 2の基板と上記 1種類以上の金属を含む層とを常温接合する 工程とを有することを特徴とする多層構造体の製造方法。  Bonding the second substrate and the layer containing one or more types of metal at room temperature.
1 6 . 上記第 2の基板の主面と上記 1種類以上の金属を含む層の表面 とを超高真空中で清浄化処理し、 互いに対向させた状態で圧力を加え ることにより上記第 2の基板と上記 1種類以上の金属を含む層とを常 温接合することを特徴とする請求の範囲 1 5記載の多層構造体の製造 方法。  16. The main surface of the second substrate and the surface of the layer containing one or more types of metals are subjected to cleaning treatment in an ultra-high vacuum, and pressure is applied in a state where the surfaces are opposed to each other. 16. The method for producing a multilayer structure according to claim 15, wherein the substrate and the layer containing one or more kinds of metals are bonded at room temperature.
1 7 . 上記常温接合を行った後、 上記第 1の基板および上記第 2の基 板の一方を薄層化することを特徴とする請求の範囲 1 5記載の多層構 造体の製造方法。  17. The method for manufacturing a multilayer structure according to claim 15, wherein after performing the room-temperature bonding, one of the first substrate and the second substrate is thinned.
1 8 . 上記第 1の基板および上記第 2の基板の単結晶材料からなる一 方の主面に多孔質層を形成し、 この多孔質層上に単結晶層をェピタキ シャル成長させておき、 上記第 2の基板と上記 1種類以上の金属を含 む層とを常温接合した後、 上記多孔質層の位置で分離を行うことを特 徴とする請求の範囲 1 5記載の多層構造体の製造方法。 18. A porous layer is formed on one main surface of the first substrate and the second substrate made of a single crystal material, and the single crystal layer is epitaxially grown on the porous layer. Including the second substrate and the one or more metals 16. The method for producing a multilayer structure according to claim 15, wherein, after bonding to the porous layer at room temperature, separation is performed at the position of the porous layer.
1 9 . 上記第 1の基板および上記第 2の基板の単結晶材料からなる一 方の主面に水素ィオンをィォン注入することにより水素蓄積層を形成 しておき、 上記第 2の基板と上記 1種類以上の金属を含む層とを常温 接合した後、 上記水素蓄積層の位置で分離を行うことを特徴とする請 求の範囲 1 5記載の多層構造体の製造方法。  1 9. A hydrogen storage layer is formed by injecting hydrogen ions into one main surface of the single-crystal material of the first substrate and the second substrate, and the second substrate and the second substrate The method for producing a multilayered structure according to claim 15, wherein after bonding at room temperature to a layer containing one or more kinds of metals, separation is performed at the position of the hydrogen storage layer.
2 0 . 上記 1種類以上の金属を含む層を形成した後、 上記常温接合を 行う前に、 上記 1種類以上の金属を含む層を所定の形状にパターン二 ングすることを特徴とする請求の範囲 1 5記載の多層構造体の製造方 法。  20. After forming the layer containing one or more types of metal, patterning the layer containing one or more types of metal into a predetermined shape before performing the room temperature bonding. The method for producing the multilayer structure according to the range 15, wherein
2 1 . 1種類以上の金属を含む層を介して、 少なく とも一方が単結晶 材料からなる第 1 の層および第 2の層が常温接合され、  21.1. A first layer and a second layer, at least one of which is made of a single crystal material, are joined at room temperature via a layer containing at least one metal,
上記 1種類以上の金属を含む層、 上記第 1の層および上記第 2の層 のうちの少なく とも一つが所定の形状にパターンユングされているこ とを特徴とする機能構造体。  A functional structure, characterized in that at least one of the layer containing at least one kind of metal, the first layer and the second layer is patterned in a predetermined shape.
2 2 . 上記 1種類以上の金属を含む層、 上記第 1の層および上記第 2 の層がそれぞれ所定の形状にパターンユングされていることを特徴と する請求の範囲 2 1記載の機能構造体。  22. The functional structure according to claim 21, wherein the layer containing at least one metal, the first layer, and the second layer are each patterned into a predetermined shape. .
2 3 . 上記機能構造体はマイクロミラーであることを特徴とする請求 の範囲 2 1記載の機能構造体。  23. The functional structure according to claim 21, wherein the functional structure is a micromirror.
2 4 . 少なく とも一方が単結晶材料からなる第 1 の基板および第 2の 基板を用意し、 上記第 1の基板の主面に 1種類以上の金属を含む層を 形成する工程と、  24. a step of preparing a first substrate and a second substrate, at least one of which is made of a single crystal material, and forming a layer containing one or more metals on a main surface of the first substrate;
上記第 2の基板と上記 1種類以上の金属を含む層とを常温接合する 工程と、 上記 1種類以上の金属を含む層、 上記第 1の基板および上記第 2の 基板のうちの少なく とも一つを所定の形状にパターンユングする工程 とを有することを特徴とする機能構造体の製造方法。 Bonding the second substrate and the layer containing one or more metals at room temperature, Patterning at least one of the layer containing at least one kind of metal, the first substrate and the second substrate into a predetermined shape, and manufacturing the functional structure. Method.
2 5 . 上記常温接合を行う前に、 上記 1種類以上の金属を含む層を所 定の形状にパターンユングすることを特徴とする請求の範囲 2 4記載 の機能構造体の製造方法。  25. The method for producing a functional structure according to claim 24, wherein the layer containing the one or more kinds of metals is patterned in a predetermined shape before performing the room-temperature bonding.
2 6 . 上記常温接合を行った後に、 上記第 1の基板および上記第 2の 基板の一方を所定の形状にパターンニングすることを特徴とする請求 の範囲 2 4記載の機能構造体の製造方法。  26. The method for manufacturing a functional structure according to claim 24, wherein after performing the room temperature bonding, one of the first substrate and the second substrate is patterned into a predetermined shape. .
2 7 . 上記第 1の基板および上記第 2の基板の少なく とも一方と上記 1種類以上の金属を含む層との間にエッチングストツバ一層を形成す ることを特徴とする請求の範囲 2 4記載の機能構造体の製造方法。 2 8 . 1種類以上の金属を含む層を介して、 少なく とも一方が単結晶 材料からなる第 1 の層および第 2の層が常温接合され、  27. An etching stopper layer is formed between at least one of the first substrate and the second substrate and the layer containing one or more metals. A method for manufacturing the functional structure according to the above. 28. At least one of the first layer and the second layer, each of which is made of a single-crystal material, is joined at room temperature through a layer containing one or more metals,
上記 1種類以上の金属を含む層と上記第 1の層および上記第 2の層 の少なく とも一方とによりマスクパターンが形成されていることを特 徴とする電子線露光用マスク。  An electron beam exposure mask, characterized in that a mask pattern is formed by a layer containing one or more types of metals and at least one of the first layer and the second layer.
2 9 . 少なく とも一方が単結晶材料からなる第 1の基板および第 2の 基板を用意し、 上記第 1の基板の主面に 1種類以上の金属を含む層を 形成する工程と、  29. A step of preparing a first substrate and a second substrate, at least one of which is made of a single crystal material, and forming a layer containing one or more metals on a main surface of the first substrate;
上記第 2の基板と上記 1種類以上の金属を含む層とを常温接合する 工程と、  Bonding the second substrate and the layer containing one or more metals at room temperature,
上記 1種類以上の金属を含む層と上記第 1の層および上記第 2の層 の少なく とも一方とをパターンユングすることによりマスクパターン を形成する工程とを有することを特徴とする電子線露光用マスクの製 造方法。  Forming a mask pattern by pattern-junging the layer containing at least one kind of metal and at least one of the first layer and the second layer. The method of manufacturing the mask.
PCT/JP2003/014512 2002-12-26 2003-11-14 Multilayer structure and method for manufacturing same, functional structure and method for manufacturing same, and mask for electron beam exposure and method for manufacturing same WO2004060793A1 (en)

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JPH1144797A (en) * 1997-07-29 1999-02-16 Nec Corp Silicon analyzing crystal and manufacture thereof
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Publication number Priority date Publication date Assignee Title
JPS63216393A (en) * 1987-03-04 1988-09-08 Fujitsu Ltd Manufacturing method of piezoelectric actuator
JPH05259038A (en) * 1992-03-10 1993-10-08 Nippon Steel Corp X-ray transfer mask
EP0845831A2 (en) * 1996-11-28 1998-06-03 Matsushita Electric Industrial Co., Ltd. A millimeter waveguide and a circuit apparatus using the same
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