WO2004048985A1

WO2004048985A1 - Device and method for detecting stress migration properties

Info

Publication number: WO2004048985A1
Application number: PCT/DE2003/003844
Authority: WO
Inventors: Armin Fischer; Alexander Von Glasow; Jochen Von Hagen
Original assignee: Infineon Technologies Ag
Priority date: 2002-11-23
Filing date: 2003-11-20
Publication date: 2004-06-10
Also published as: CN1714299A; TWI234220B; DE10254756B4; CN100554988C; TW200415739A; DE10254756A1

Abstract

The invention relates to a device and a method for detecting stress migration properties of a semiconductor module (IC), which is terminally mounted in a product-relevant housing (G), with a stress migration test structure (SMT) which is embodied inside the semiconductor module (IC). An integrated heating device (IH) is embodied inside or in the direct vicinity of the stress migration test structure (SMT) in order to increase accuracy even when detecting stress SG caused by the housing.

Description

description

Device and method for recording stress migration properties

The present invention relates to a device and a method for detecting stress migration properties and, in particular, to a device and a method for detecting stress migration properties of a semiconductor component which is finally assembled in a product-relevant housing.

Integrated circuits are usually produced with a large number of structured metallization or conductor track levels which are electrically separated from one another by dielectric intermediate insulating layers. In order to realize electrical connections between the structured metallization or interconnect layers or between the interconnect layers and a substrate, so-called contact holes or vias are formed in the insulating layers at selected locations.

As the density of integration progresses, improved performance features such as e.g. an increased speed and an increased circuit functionality per unit area, the structure widths and in particular the contact holes or vias are increasingly smaller, which is why they are increasingly susceptible to so-called stress migration.

In contrast to the so-called electromigration, in which a mass transport of conductor track material is caused due to an applied direct current and in particular at very high current densities, the stress migration described in the present invention relates to mass transport, which in particular in conductor track layers or contact holes Due to mechanical stresses or gradient is caused. Such mechanical stresses, which result, for example, from a mismatch of thermal expansion coefficients and from different elasticity modules of the interconnect layers or the interposed insulator layers and other conductive and non-conductive intermediate layers, consequently lead to a similar material transport, which is dependent on a compressive or tensile stress or alternating stresses the formation of voids in the electrically conductive material, as a result of which an electrical resistance of conductor tracks in the semiconductor component is increased or even a conductor track interruption can occur.

For example, consider a manufacturing process in which on a conductor layer (aluminum, copper, etc.) that is formed on a semiconductor substrate or a dielectric layer, another insulator layer, for example at a temperature of 350 degrees Celsius by means of a CVD process (Chemical Vapor deposition) abgeschie- that is, so are already apparent due to the different coefficients of expansion between the wiring layer and the adjacent insulating layers, mechanical stresses which cause, for example, as a train-stress ^• a stress migration in the wiring layer. In the case of copper metallization with Cu vias, voltage gradients, for example as a result of thermal mismatch, lead to the transport of vacancies into the via (formation of cavities).

More specifically, vacancies diffuse to reduce the voltage energy in the conductor layer, whereby after a certain time, usually several months or years, this mass transport in the conductor layer or the vias creates cavities which influence the electrical properties of the semiconductor module and, up to an interruption, can lead a conductor track. FIGS. 1A to IC show simplified sectional views to illustrate conventional devices for recording stress migration properties.

According to FIG. 1A, reliability tests are typically carried out directly on the wafer or on the wafer level in order to characterize the stress migration properties of conductor tracks and in particular of metallizations in integrated circuits or semiconductor components IC described above. The resistances of different stress migration test structures SMT, which are formed in a semiconductor chip IC, are measured at regular intervals (e.g. once an hour, day or week) and the deviation from the initial value is assessed. Between these measurements, the wafers are stored in an oven at temperatures greater than 150 degrees Celsius, which means that the duration of these reliability tests can be significantly reduced to around 1000 to 2000 hours in order to achieve a product life of e.g. 15 years.

A disadvantage of such a test device, however, is that the results obtained are inadequate owing to a lack of final assembly in a housing and, in this respect, do not enable the stress migration properties of the semiconductor module to be recorded with sufficient accuracy in an environment close to the product.

According to FIG. 1B, such a test can therefore also be carried out in a final assembled test housing TG, the semiconductor component IC being mounted on a component carrier T for example by means of bond wires or soldered connections B, a temperature-resistant ceramic test housing being used as the housing. Although in this way, in addition to internal stresses σ _{0 of} the semiconductor component IC, the stresses σ _TG caused by the assembly or the soldered connections B and the component carrier T of the test housing TG can be recorded and evaluated, results in particular due to the test housing TG, which differs from a product-relevant housing, again no precise statements for the stress migration properties of the conductor track systems in a semiconductor component with a product housing.

According to FIG. IC, the semiconductor component IC to be examined can in turn also be embedded in a product-relevant plastic housing G via solder connections B and a component carrier T, but here the

The problem arises that with a corresponding heating to temperatures T _E greater than 150 degrees Celsius, the thermal mismatching of the layers surrounding the conductor track system causes a change in the voltage state relevant to the product, which is why no precise statements are made about the stress migration properties in such a packed semiconductor -Building block IC receives. Furthermore, the plastic or plastic mass of the housing G can melt or become soft, as a result of which the stress caused by this plastic housing G likewise leads to a reduced stress σ _G ^x .

Without these elevated temperatures of more than 150 degrees Celsius, which are preferably generated by an external heating EH, such reliability tests cannot be carried out economically, since they would take several months and usually even several years.

The invention is therefore based on the object of providing a device and a method for detecting stress migration properties of a semiconductor component which is finally assembled in a product-relevant housing, as a result of which a sufficiently precise assessment of stress migration properties is obtained in a relatively short time.

According to the invention, this object is achieved with regard to the device by the features of patent claim 1 and lent the method by the measures of claim 11 solved.

In particular, by using an internal heating device that is formed within or in the immediate vicinity of a stress migration test structure in the semiconductor module for local heating of the stress migration test structure, sufficient acceleration is obtained to reduce the test times, one being due to a product-relevant housing - The voltage caused thereby remains essentially unaffected.

The stress migration test structure preferably consists of at least a first conductor area which is formed in a first conductor layer, at least a second conductor area which is formed in a second conductor layer and at least one connection area which is between the conductor layers for electrically connecting the first and second conductor areas in a first insulating layer is formed. Since the stress migration test structure is consequently formed in the available conductor track layers of the semiconductor module, the measured values obtained are highly meaningful with regard to the stress migration properties in the semiconductor module.

A surface and / or a volume of the first and / or a volume of the second conductor track region is preferably substantially larger than a surface and / or a volume of the connection region, as a result of which, with knowledge of the layout for the further semiconductor circuit, a further substantial reduction in the time period for receives the reliability test because the stress or stress acting on the enlarged surface and the number of diffusible voids in the volume are correspondingly increased. To further increase measurement accuracy and statistical significance when examining stress migration properties, the stress migration test structure can have a multiplicity of first and second conductor track regions which are connected to one another in a chain-like manner via a multiplicity of connecting regions.

The internal heating device is preferably designed as a heating conductor region within the at least one first or second conductor region or connecting region, an alternating current flowing through the heating conductor region. In this way, a particularly effective heating of the structures to be examined is obtained, wherein the influence of electromigration can be reliably excluded, in particular when using an alternating current.

With regard to the method for detecting stress migration properties, the stress migration detection device described above is preferably first formed in a semiconductor module, then the semiconductor module is mounted on a module carrier and packaged in a product-relevant housing, with a heating current finally being connected to the integrated module Heating device and for detecting the stress migration properties of the semiconductor device, a measurement voltage is applied to the stress migration test structure and a current is measured through the stress migration test structure. In this way, the corresponding stress migration properties can be determined with high accuracy in a sufficiently short time for product-relevant housings, such as plastic housings.

Further advantageous configurations of the invention are characterized in the further subclaims.

The invention is described below using exemplary embodiments with reference to the drawing. Show it:

FIGS. 1A to IC show simplified sectional views to illustrate a conventional device and a conventional method for recording stress migration properties;

FIG. 2 shows a simplified sectional view to illustrate a device and a method for recording stress migration properties of a semiconductor component which is finally assembled in a product-relevant housing;

FIG. 3A shows a simplified top view of a device for recording stress migration properties according to a first exemplary embodiment;

FIG. 3B shows a simplified perspective view of the device according to FIG. 3A along a section I-I;

FIG. 4A shows a simplified plan view of a device for recording stress migration properties according to a second exemplary embodiment;

FIG. 4B shows a simplified sectional view of the device according to FIG. 4A along a section II-II; and

FIG. 5 shows a simplified top view of a device for recording stress migration properties according to a third exemplary embodiment.

FIG. 2 shows a simplified sectional view of a device for recording stress migration properties, the same reference numerals designating the same or corresponding elements as in FIGS. 1A to IC and a repeated description being omitted below. According to FIG. 2, the reliability tests for the characterization of stress migration properties (in particular of metallizations) in semiconductor components IC (integrated circuits) are carried out according to the invention in a fully assembled state and after packaging in a product-relevant housing G.

In the case of so-called flip-chip housings G in particular, mechanical stresses in the semiconductor component IC are induced up to the range of the yield stress of so-called bulk materials, which is why they represent an increased risk of reliability. According to FIG. 2, this influence, which cannot be assessed according to the prior art, is recorded in that the stress migration test structures SMT integrated in the semiconductor component IC have an integrated heating device IH internally or in the immediate vicinity thereof, which locally has an internal temperature T _Σ greater than 150 degrees Celsius can generate. Accordingly, the outdoor temperatures may be, for example, at a working temperature of T = T _op e _r atio _n, which is sufficiently below a plastic acceptable maximum temperature of 150 degrees Celsius. In this way, the plastic materials used in product-relevant housings G can continue to attack the semiconductor component IC and the component carrier T or the solder connections or balls B and cause their corresponding mechanical stress or stress σ _G to the semiconductor component IC unchanged , • In addition, outside of the stress migration test structures SMT, a prevailing basic stress or a basic stress in the semiconductor material or the wiring and / or insulator layers remains at an unchanged value σ ₀ , so that the stress that can be detected by the stress migration test structure SMT or the corresponding stress σ to:

σ = σ ₀ + σ _G results. Nonetheless, the integrated heating device IH can be used to locally heat the stress migration test structure SMT to Ti greater than 150 degrees Celsius, preferably temperatures in a range from 225 degrees Celsius to 300 degrees Celsius. In this way, a statement can be made in a relatively short time, ie 100 to 2000 hours, about the stress migration properties of a semiconductor component IC which is finally assembled in a product-relevant housing.

Contrary to the conventional embedding of the semiconductor components IC with their product-relevant housings G in an oven, whereby the housing voltage states are changed in an undesirable manner until they flow, product-related tests for the characterization of the stress migration properties, in particular of metallizations of integrated circuits, can thus be carried out for the first time become.

FIG. 3A shows a simplified plan view and FIG. 3B shows a perspective sectional view along a section II according to FIG. 3A of a device for recording stress migration properties according to a first exemplary embodiment, the same reference numerals again designating identical or corresponding elements and a repeated description subsequently being omitted becomes.

According to FIGS. 3A and 3B, the stress migration test structure SMT has two first conductor path regions 1 in a first conductor path layer or metallization level L 1, which are used as circuit boards with a relatively large surface area for optimal absorption of mechanical stresses or stresses and / or volumes for formation or provision are formed by empty spaces. In a second interconnect layer or metallization level L2, three second interconnect regions 2 are formed, which electrically connect the first interconnect regions 1 to one another via connection regions 3 in so-called contact holes or vias. The connection area Before 3, the first and second interconnect regions 1 and 2 accordingly connect through a corresponding contact hole or via in a first insulating layer II lying between the interconnect layers L1 and L2.

In order to improve the sensitivity of the stress migration test structure SMT, at least the surface and / or the volume of the first interconnect regions 1 is substantially larger than a surface and / or a volume of the connection regions 3, as a result of which the stress migration-related material transport or voiding mainly occurs affects the connection areas 3. These cavities formed by the stress migration are designated V (void) in the connection areas 3.

In the stress migration test structure SMT according to the first exemplary embodiment according to FIGS. 3A and 3B, the first interconnect regions 1 have a substantially larger surface area and / or volume than the second interconnect regions 2, whereby these second interconnect regions can also have a correspondingly large surface area and / or volume. In the exemplary embodiment shown, however, these second conductor track regions are also outstandingly suitable for an internal heating device described later.

According to FIGS. 3A and 3B, the stress migration test structure SMT accordingly consists of a multiplicity of first interconnect regions 1 and a multiplicity of second interconnect regions 2, which are connected to one another in a chain-like manner via a multiplicity of connection regions 3. Due to this chain-like structure, there is a further improvement in the statistical significance for the detection of stress migration properties in a semiconductor module.

For local heating of the stress migration test structure SMT, in the first exemplary embodiment according to FIGS. 3A and 3B, outside of the first conductor track regions 1 and the second conductor terbahnzonen 2 or the connecting areas 3, an integrated heating device in the form of heating conductor structures.

More specifically, according to FIG. 3B, a conductor strip IH1, for example with a meandering structure, is formed in the second conductor path layer L2 below the first conductor path regions 1 and between the second conductor path regions 2 and can be heated with a heating current by Joule heating. According to FIG. 3A, the heating current of this lower integrated heating device IH1 can be, for example, an alternating current or a direct current AC / DC.

Furthermore, according to FIG. 3B, an upper integrated heating device IH2 can also be formed in a conductor path layer L3 which is spaced apart by a second insulating layer 12 and consequently lies above the first conductor path layer L1 and which, for example, can in turn be structured in a meandering manner. In this case, heating takes place in the same way as in the lower integrated heating device IH1 via a direct or alternating current.

The integrated heating device IH1 and IH2 preferably has a polycrystalline semiconductor material and in particular polysilicon, as a result of which particularly good thermal conductivity properties are obtained. However, metal materials can also be used in the same way. The temperatures generated in this lower and upper internal heating device IH1 and IH2 are usually above 150 degrees Celsius and preferably in a temperature range from 225 degrees Celsius to 300 degrees Celsius, as a result of which the stress migration, in particular in the first conductor track areas 1, can be optimally accelerated without thereby causing a significant change in the stresses σ ₀ in the semiconductor component IC and in particular in the stresses σ _G caused by the plastic housing _G. Particularly when using silicon as the semiconductor material for the semiconductor component IC, due to the good thermal conductivity properties of silicon, exclusively local heating is obtained, which is only limited to a very small area directly in the vicinity of the stress migration test structure SMT.

FIG. 4A shows a simplified plan view and FIG. 4B shows a simplified sectional view along a section II-II in FIG. 4A of a device for recording stress migration properties according to a second exemplary embodiment, the same reference symbols denoting and identifying the same or corresponding elements as in FIGS. 3A and 3B a repeated description is omitted below.

According to FIGS. 4A and 4B, the stress migration test structure in turn has the same structure as the stress migration test structure according to the first exemplary embodiment, but now the integrated heating device is formed directly in or within the stress migration test structure SMT. More specifically, the heating device according to the second exemplary embodiment has an internal heating conductor region IH within the at least first conductor path region 1 or the second conductor path region 2 or the connection regions 3, a heating current AC flowing through the heating conductor region. The heating current AC preferably has a high AC component, it preferably having only AC components. In this way, undesired electromigration caused by direct current can be prevented, which would impair measurement accuracy when determining the desired stress migration properties.

According to FIGS. 4A and 4B, the heating current AC is applied via connection areas A directly to the outermost second conductor track areas 2 of the chain-shaped stress migration test structure SMT, in particular in the case of the illustrated Structuring of the second conductor track regions 2 with their relatively small surfaces and / or volumes and when using similar conductor path materials, a joule 'see heating mainly takes place in these second conductor path regions 2, and the first conductor path regions 1 hardly contribute to the heating, but are heated by heat conduction become.

According to FIG. 4B, a cavity or void V, which in turn leads to a deterioration in the electrical conductivity or, in the extreme case, to an interruption in the connection, arises in turn due to stress migration, in particular in the connection regions 3. Since, according to this second exemplary embodiment, the connection areas 3 are also flowed through with heating current, there should preferably be no direct current component in the heating current AC in order to avoid damage from electromigration.

FIG. 5 shows a simplified top view of a stress migration test structure SMT according to a third exemplary embodiment, the same reference numerals again designating the same or corresponding elements as in FIGS. 3 and 4 and a repeated description being omitted below.

The device according to FIG. 5 essentially corresponds to the device according to the second exemplary embodiment, the internal heating device IH again being formed within or as part of the stress migration test structure.

In contrast to FIGS. 4A and 4B, however, the entire stress migration test structure SMT is not loaded with a heating current AC and thus heated by Joule 's heating, but only a second conductor path region 2 lying between the first conductor path regions 1 to the heating current AC connected via connection areas A. Thus, the structure is only heated in this intermediate see the second conductor region 2 lying on the first conductor region 1, whereby an electrical load on the connection regions or vias 3 can be avoided. Because of the sufficient heat conduction, these immediately adjacent conductor track regions 3 are nevertheless sufficiently heated by the lower or second conductor track layer L2, so that stress migration is accelerated sufficiently. Again, to avoid damage caused by electromigration, there should be no direct current component in the heating current AC if possible.

The materials for the respective conductor layers and connection areas can be the conductor or metallization materials available in semiconductor modules, with copper and / or aluminum being used as materials for the conductor layers and copper, aluminum or tungsten for the connection areas can be.

With regard to the method for recording stress migration properties of a semiconductor component which is finally assembled in a product-relevant housing, it is proposed that the stress migration test structures described above are first formed in the semiconductor component with their respective internal or directly integrated heating devices, the semiconductor component is then mounted on a component carrier T, which preferably represents a lead frame of a flip-chip housing. The product-relevant housing is then preferably formed by means of a plastic injection molding process, and after the plastic has cooled or hardened, the actual reliability test is carried out in the final assembled state. In this case, a heating current is first applied to the integrated heating device and, in addition, a measurement voltage is applied to the stress migration test structure and to measure the stress migration properties of the semiconductor module measured a current flowing through the stress migration test structure. The application of the heating current and the application of the measurement voltage can be carried out simultaneously or at different times, which further simplifies the test procedure and accelerates.

The invention has been described above with reference to a semiconductor module packed in a flip-chip housing. However, it is not limited to this and includes all other product-relevant housings in the same way. In the same way, the stress migration test structure is not limited to the form shown, but instead includes all alternative forms and configurations in the same way, an integrated heating device bringing about local heating within or in the immediate vicinity of the stress migration test structure.

Claims

claims

1. Device for detecting stress migration properties of a semiconductor module (IC) end-end in a product-relevant housing (G) with a stress migration test structure (SMT), which is in the semiconductor module (IC) for recording the stress migration properties is trained; and an integrated heating device (IH), which is formed within or in the immediate vicinity of the stress migration test structure (SMT) in the semiconductor module (IC) for local heating of the stress migration test structure (SMT).

2. Device according to claim 1, d a d u r c h g e k e n n z e i c h n e t that the

Stress migration test structure (SMT) at least a first interconnect area (1) in a first interconnect layer (L1), at least one second interconnect area (2) in a second interconnect layer (L2), and at least one connection area (3) for electrically connecting the interconnect areas (1 , 2) by a first insulating layer (II) which is formed between the conductor track layers (L1, L2).

3. Device according to patent claim 2, that a surface and / or a volume of the first and / or second interconnect region (1, 2) is substantially larger than a surface and / or a volume of the connection region (3).

4. Device according to one of claims 1 to 3, d a d u r c h g e k e n n z e i c h n e t that the product-relevant housing (G) is a plastic housing.

5. Device according to one of claims 2 to 4, characterized in that the stress migration test structure (SMT) a plurality of first and second conductor track areas (1, 2), which are connected to one another in a chain-like manner via a plurality of connecting areas (3).

6. Device according to one of the claims 2 to 5, characterized in that the integrated heating device (IH) has a heating conductor region (IH1, IH2) outside the at least one first or second conductor region (1, 2) or connecting region (3) , whereby the heating conductor area is flowed through by a heating current (AC, DC).

7. The device according to claim 6, characterized in that the heating conductor region (IH1, IH2) in the first conductor layer (L1), the second conductor layer (L2) or another conductor layer adjacent to the first or second conductor region (1, 2) ( L3) is formed.

8. Device according to one of the claims 2 to 5, characterized in that the integrated heating device has a heating conductor region (IH) within the at least one first or second conductor region (1, 2) or the connecting region (3), the heating -The conductor area (IH) is flowed through by a heating current (AC).

9. The device according to claim 8, so that the heating current (AC) has a high AC component.

10. Device according to one of the claims 1 to 9, characterized in that the integrated heating device (IH) polysilicon or metal and the semiconductor module (IC) comprises a silicon semiconductor material.

11. A method for recording stress migration properties of a semiconductor component (IC) which is finally assembled in a product-relevant housing (G), comprising the steps: a) forming a recording device according to one of the claims 1 to 10 in a semiconductor component (IC) ; b) mounting the semiconductor component (IC) on a component carrier (T); c) forming a product-relevant housing (G) around the assembled semiconductor component (IC); d) applying a heating current (AC, DC) to the integrated heating device (IH); and e) applying a measurement voltage to the stress migration test structure (SMT) and measuring a current through the stress migration test structure (SMT) in order to detect the stress migration properties of the semiconductor component.

12. The method according to claim 11, so that a flip-chip carrier is mounted in step c) as the component carrier (T).

13. The method according to any one of the claims 11 to 12, so that a plastic injection molding process is carried out in step c).

14. The method according to any one of the claims 11 to 13, characterized in that in step d) a heating current for generating a local temperature (Ti) greater than 150 degrees Celsius and in particular for generating a temperature (Υ _τ ) in a range from 225 degrees Celsius to 300 degrees Celsius is applied.

15. The method according to any one of claims 11 to 14, d a d u r c h g e k e n n z e i c h n e t that the

Steps d) and e) are carried out simultaneously or at different times.