WO2003039830A1

WO2003039830A1 - Manufacture of varnish impregnated webs and laminate boards made therefrom

Info

Publication number: WO2003039830A1
Application number: PCT/US2002/035738
Authority: WO
Inventors: Ngow J. Choy; Twee L. Wong; Hock G. Lee; Toh H. Quek
Original assignee: Park Electrochemical Corporation
Priority date: 2001-11-08
Filing date: 2002-11-07
Publication date: 2003-05-15

Abstract

A process for manufacturing a prepreg for use in the manufacture of laminates and printed circuit boards comprising the steps of treating a reinforcement substrate (12), such as a woven fiberglass fabric, with a resin-free solvent that can include one or more solvent (18) compounds to effectively wet the reinforcement substrate, optionally, air drying (24) the treated reinforcement substrate, thereafter, impregnating the fabric reinforcement with a curable varnish (32) and heating the varnish-impregnated reinforcement to partially cure the varnish. The void-free prepregs made according to the invention are subsequently laminated with copper or other conductive foils and then pressed into multilayer laminate boards. Alternatively, the void-free perpregs made according to the invention are used as bonding plies for multiple printed circuit boards and pressed into laminates with or without copper or other conductive foils.

Description

MANUFACTURE OF VARNISH IMPREGNATED WEBS AND LAMINATE

BOARDS MADE THEREFROM Cross-Reference to Related Application

This application claims the benefit of U.S. Provisional Application No. 60/336,998, filed on November 8, 2001.

Field of the Invention

This invention relates to varnish impregnated webs and laminate boards made therefrom. In one of its aspects, the invention relates to the manufacture of prepregs for use in printed circuit boards. In another of its aspects, the invention relates to the manufacture of reinforced resin articles. And yet another of its aspects, the invention relates to substantially void free, or reduced void, prepregs for use in the manufacture of printed circuit boards. In another of its aspects, the invention relates to a method for making prepregs with reduced or essentially zero voids. And yet another of its aspects, the invention relates to laminate boards made with substantially void free, or reduced void, prepregs. In another of its aspects, the invention relates to printed circuit board laminates with improved conductive anodic filament (CAF) resistance.

BACKGROUND OF THE INVENTION

Description of the Related Art In the manufacture of laminate boards, a fabric, such as fiberglass, is impregnated with a thermosetting resin, such as an epoxy resin, and is partially cured to a "B" stage condition to form a prepreg. The prepregs are laminated together with or without a conductive foil or foils to build laminate boards. Several of these laminates with printed circuits etched onto the conductive foil or foils form a multi- layer printed circuit board. Medney et al. in U.S. Patent No. 5,037,691 disclose a process for manufacturing multi-layer printed circuit boards in more detail. This disclosure is incorporated herein by reference.

It has been found that the presence of small voids in the laminates adversely affect the performance of advanced printed circuit boards. For example, these small voids may result in electrical failures as a result of the printed circuit board drilling operation. The presence of micro voids, mainly due to the wetability of the quality of the glass bundles, provides a link for hole-to-hole bridging shorts. By capillary action, the plating solutions may bridge through the drilled hole walls if the pitch distances are too close. Further, these micro voids may also reduce conductive anodic filament (CAF) resistance. CAF is commonly described as the ability of the base material to provide resistance for copper migration in high density circuitry. The micro voids are the result of incomplete coating of the reinforced composite substrate or substrates with the varnish in the manufacture of the prepregs. Variations in permeability quality of the reinforcement substrates may also cause voids. These variations are the result of difficulties in controlling the manufacturing process for the reinforced substrates. Voids caused from these factors can adversely influence product thickness, reliability, and thermal properties. Although the prepregs are heated to partially cure the varnish, the curing process does not completely remove all the volatile components from the varnish.

Efforts have been made to reduce or eliminate the voids from the prepreg. One technique is to apply heat to the prepregs to advance the varnish cure to drive volatile components from the varnish. Another technique is to reduce the speed of the varnish coating step to give more time for the varnish to wet the reinforcement substrate. In addition, vacuum has been applied during the press lamination process to further reduce the micro voids. Although these techniques tend to reduce the micro voids, they adversely affect productivity and increase operating costs and an unacceptable number of micro voids still remain in the final prepregs and laminates. Thus, voids still present a challenge to the manufacture of void free prepregs and laminates for printed circuit industry. Tremendous interest has been generated from laminators to solve this potential reliability problem. The conventional process for making prepregs with reduced voids is illustrated in FIG. 1 to which reference is now made. A fiberglass or other reinforcement substrate is pre- wet with a curable varnish solution. The pre-wet varnish solution can be a low resin solid solution in a volatile solvent. The thus-treated reinforcement is then impregnated with a heat curable varnish to make the prepregs. The prepregs are then subject to infrared heating and/or hot air cure to make a semi-cured prepreg. In this prior art process, hot air is distributed in oven zones through an array of nozzles and blows directly on the surface of the reinforced substrate web as it is pulled through the coating process. The hot air treaters attempt to evaporate the solvents and/or mixture of solvents from the outer layer of the varnish treated reinforcement. The hot air blown on the varnish forms a thin skin on the semi-cured prepreg as the solvent is evaporated. The varnish starts to cure and the viscosity of the varnish increases. Both physical and chemical reactions tend to slow down the evaporation rate of the solvent so that a small amount of solvent may be trapped in the semi-cured varnish as micro voids. Infrared radiant (IR) heat can also be directed across the web to advance the varnish cure. When subjected to infrared radiant heating, the heat is radiated across the substrate to cure the varnish. The IR cure subjects the solvent volatiles to evaporate faster from the inner core to the outer surface of the reinforced substrate. This process reduces the skin effect as the reinforced substrates absorb IP energy foster to boil out the excess volatiles. However, there are still trapped micro Voids in the prepreg. Further, occasionally unacceptable level of voids occurs in the laminate boards after the vacuum press lamination cycle.

FIG. 2 is a photomicrograph made in accordance with a conventional process of FIG. 1 magnified fifty times. As illustrated in FIG. 2, numerous micro and needle voids can be seen.

FIG. 3 is a photomicrograph of a prepreg made in accordance with the conventional process illustrated in FIG. 1 magnified one hundred times. As illustrated in FIG. 3, the same micro and needle voids are observed under this magnification. Not withstanding these prior art techniques, all of the volatile components are not removed and voids result in the resin.

Olsen et al. in U.S. Patent No. 6,083,855, disclose a method for manufacturing a cured resin impregnated substrate using a solvent containing a curable resin in accordance with a prior art process. Olsen et al. claim to have reduced the number of voids in the cured varnish-impregnated substrate by processing the substrate (fiberglass fabric) in one or more of the following ways: • The pre-wet varnish solution has a curable resin with a relatively low solids content;

• the varnish impregnated substrate is dipped into a second varnish solution that includes a relatively high solids content; • the substrate is manipulated mechanically by a Meir rod;

• moisture is removed from the substrate prior to placing the substrate in the solvent-containing curable resin solution;

• the solvent-containing curable resin solution is heated; and

• the low solids resin-impregnated substrate is heated before dipping it into the solvent containing curable resin having a relatively high solids content.

SUMMARY OF THE INVENTION According to the invention, a process for manufacturing a prepreg for use in the manufacture of laminates and printed circuit boards comprises the steps of treating a fabric reinforcement with a resin-free solvent and/or mixture of solvents before impregnating the fabric reinforcement with a curable varnish. Subsequent to impregnation, the varnish-impregnated reinforcement is heated in a conventional manner with infrared radiation and/or a hot air to partially cure the varnish. Preferably, prior to the varnish impregnation process, the solvent and/or mixture of solvents-treated fabric is aired before coating the fabric reinforcement with the curable varnish to remove excess solvents.

The void-free prepregs made according to the invention are subsequently laminated with copper or other conductive foils and then pressed into multilayer laminate boards. Alternately, the void-free prepregs made according to the invention are used as bonding plies for multiple printed circuit boards and pressed into laminates with or without copper or other conductive foils.

The reinforced substrates can be any suitable materials used in making of prepregs. The reinforced substrate is typically woven but can also be non-woven. Other substrates, woven or non-woven, can also be used in the process according to the invention. The solvents and/or mixture of solvents used to pre-wet or pre-soak the fabric reinforcement can be any suitable solvent and/or mixture of solvents that effectively wets the substrate prior to the coating process. Typically, the substrate is passed through a pre-wet or pre-soak tank with a suitable solvent and/or mixture of solvents that effectively wets the substrate. The solvent and/or mixture of solvents can be any suitable solvent and/or mixture of solvents. The preferred solvent is dimethyl formamide (DMF) and the preferred substrate is woven fiberglass. Other solvents include N-Methyl Pyrolidine (NMP), Gamma buteral lactone (GBL), Ketones (such as, but not limited to, acetone and methyl ethyl ketone), glycol ethers (such as, but not limited to, propylene glycol monomethyl ether), glycol esters (such as, but not limited to, propylene glycol monomethyl ether acetate) and mixtures thereof.

The varnish used in the invention can be any suitable varnish used for impregnation of fabric reinforcements used in making prepregs for use in printed circuit boards. Those varnishes comprise a thermosetting resin, such as an epoxy resin, in a solvent such as DMF or any of the other solvents listed above. Suitable varnish compositions that can be used in the invention are disclosed in U.S. Patent No. 6,083,855, which is incorporated herein by reference.

The process according to the invention has been found to reduce voids to a very minimal level, essentially void free, to avoid the problem inherent in prepregs made in accordance with the prior art processes.

With the use of the process according the invention, it has been found that the resulting laminates have better thickness distribution, predictable impedance distribution, no dryness (no voids in the laminate and interlayer cores), better dimensional stability, improved CAF resistance, essentially no voids in the inner layer core, improved thermomechanical properties, improved resistance to hipot failures, and are less prone to warpage. Further, prepregs manufactured according to the invention can be used with continuous or conventional lamination pressing techniques and related pressing equipment with a wider window of operation.

Still further according to the invention, a multilayer printed circuit board is made according to the process of treating a reinforcement substrate, such as a woven fiberglass, with a resin-free solvent and/or mixture of solvents, impregnating the prewetted reinforcement substrate with a varnish, and heating the varnish-impregnated reinforcement with infrared radiation and/or a hot air to partially cure the varnish to form a void free prepreg. The prepreg is then laminated with copper or other conductive foils and pressed into laminate board. The thus formed laminated board is then further processed with other prepregs and laminate cores to malce a multilayer printed circuit board. Preferably, the solvents and/or mixture of solvents-treated reinforcement substrate is aired before coating the reinforcement substrate with the curable varnish. Alternately, the prepreg is used as a binding layer between printed circuit boards that are joined to the prepreg with conventional pressing processes. The multilayer printed circuit boards according to the invention have better thickness distribution, predictable impedance distribution, no dryness (no voids in the laminate and interlayer cores), better dimensional stability, improved CAF resistance, essentially no voids in the inner layer core, improved thermomechanical properties, improved resistance to hipot failures, and are less prone to warpage. Still further according to the invention, a prepreg for a laminate board is made according to the process of treating a reinforcement substrate, such as a woven fiberglass fabric, with a resin-free solvent and/or mixture of solvents, impregnating the prewetted reinforcement substrate with a varnish, and heating the varnish- impregnated reinforcement with infrared radiation and/or a hot air to partially cure the varnish. Preferably, the solvent-treated fabric reinforcement is air dried before coating the fabric reinforcement with the curable varnish.

BRIEF DESCRIPTION OF THE DRAWINGS

In the drawings: FIG. 1 is a schematic view of a conventional process for making prepregs according to a conventional prior art process.

FIG. 2 is a photomicrograph of a prepreg made in accordance with the conventional prepreg manufacturing process illustrated in FIG. 1 and magnified at 50 times. FIG. 3 is a photomicrograph of a prepreg made in accordance with the process of FIG. 1 and magnified at 100 times. FIG. 4 is schematic representation of a process for making void free prepregs according to the invention.

FIG. 5 is photomicrograph of a prepreg made in accordance with the process of FIG. 4 and magnified 50 times. FIG. 6 is a photomicrograph of a prepreg made in accordance with the process of FIG. 4 and magnified 100 times.

FIG. 7 is a schematic representation of a process for making prepregs according to the invention.

DESCRIPTION OF THE PREFERRED EMBODIMENT Referring now to the drawings and to FIG. 4 in particular, a reinforcement substrate, typically a fabric such as a woven or non woven fiberglass fabric, is treated with a solvent and/or mixture of solvents which has the ability to wet the fabric. The solvents and/or mixture of solvents are essentially free from a curable resin. The wetting process typically takes place in a presoak system, typically a tank, through which the fabric reinforcement is passed. The fabric reinforcement is usually continuously unrolled and drawn through the solvents and/or mixture of solvents tank to prewet the fiberglass or other fabric reinforcement and enhance the varnish to reinforcement wetability.

The reinforcement substrate can be any suitable material typically used in the manufacture of laminates for printed circuit boards. Woven or non- woven fabrics are typically used for such purposes. In particular, woven fiberglass fabric, including silane-treated woven fiberglass, is the preferred substrate in this invention although a variety of other fabrics, other reinforcements or other substrate materials can also be used. After the solvent wetting step, the substrate is dried to remove the excess solvents and/or mixture of solvents and thereafter is coated or impregnated with a curable varnish, such as an epoxy resin of the type typically used in the manufacture of laminate boards. The drying step is preferably air drying but other forms of drying can also be used within the scope of the invention. The varnish coating or impregnation step is a conventional step and conventional epoxy-containing varnishes are preferably used for this step. Subsequent to the varnish coating or impregnation step, the varnish-coated or varnish-impregnated fabric reinforcement is heated with infrared radiation and/or hot air to drive off any volatile solvents and to cure the varnish. The void-free prepreg is then ready for use as bonding plies for printed circuit boards or for pressing with or without copper or other conductive foils into laminates for printed circuit boards. The laminated prepregs form a base material used in making a printed circuit board.

The solvents used in the solvent treating step in the invention can include a number of solvents. The solvent can be a single compound such as dimethyl formamide (DMF) which is the preferred solvent or a mixture of solvents. Other solvent include N-Methyl Pyrolidine (NMP), Gamma buteral lactone (GBL), Ketones (such as, but not limited to, acetone and methyl ethyl ketone), glycol ethers (such as, but not limited to, propylene glycol monomethyl ether), glycol esters (such as, but not limited to, propylene glycol monomethyl ether acetate) and mixtures thereof. As illustrated in photomicrographs of FIGS. 5 and 6, a prepreg made in accordance with a process of FIG. 4 is essentially void free. In any case, the voids are reduced to an absolute minimum compared with prepregs made in accordance with the conventional process of FIG. 1 and as represented in the photomicrographs of FIGS. 2 and 3.

Referring now to FIG. 7, there is shown a schematic representation of a process for making prepregs according to the invention. A fabric web 12, for example, fiberglass, is fed from a roll (not shown) over a guide roller 14 and into a solvent solution 18 in a solvent vat 16. The web 12 is passed around guide rollers 20 and 22 to wet the fabric 12. The wetted fabric 12 then passes into a drying chamber 24 having an inlet opening 26 and an outlet opening 28. The drying chamber 24 can have a partial vacuum and can have an inner gas seal, if desired. As illustrated, the inlet opening 26 extends into the solvent solution 18 and the outlet opening 28 extends into a varnish solution in a first varnish vat 32. The fabric web 12 is air dried in the drying chamber 24 as it passes over a series of guide rollers 30 and into the first varnish solution in the first varnish vat 32. The fabric web 12 is then impregnated or coated with the varnish in the first varnish vat 32 and then passed over guide rollers 36 to a second varnish vat 38 having a second varnish solution which can be identical or different than the varnish in the first varnish vat 32. The fabric web is again coated or impregnated with varnish in the second varnish vat as it passes around guide roller 40 and is then drawn from the second varnish vat by metering rolls 42. The thus coated fabric web then passes to a conventional oven for partial cure of the varnish on the fabric web 12.

The solvents and/or mixture of solvents in the process according to the invention are believed to lower the surface tension of the reinforcement substrate or fabric, facilitating the release of entrapped air and facilitating the varnish impregnation or saturation of the filaments with capillary action. Reasonable variations and modifications are possible within the scope of the foregoing disclosure and drawings without departing from the spirit of the invention, which is defined in the appended claims.

Claims

1. A process for manufacturing a prepreg for use in the manufacture of laminates and printed circuit boards comprising the steps of: treating a fabric reinforcement with a resin-free solvent to effectively wet the fabric reinforcement; thereafter, impregnating the fabric reinforcement with a curable varnish; and heating the varnish-impregnated reinforcement to partially cure the varnish.

2. A process for manufacturing a prepreg according to claim 1 wherein the resin-free solvent is selected to effectively wet the fabric reinforcement during the treating step.

3. A process for manufacturing a prepreg according to claim 2 wherein the resin-free solvent is a mixture of solvent compounds.

4. A process for manufacturing a prepreg according to claim 1 wherein the resin-free solvent is selected from the group consisting of dimethyl formamide (DMF), N-Methyl Pyrolidine (NMP), gamma buteral lactone (GBL), ketones, glycol ethers, glycol esters and mixtures thereof.

5. A process for manufacturing a prepreg according to claim 4 wherein the ketones includes at least one of acetone or methyl ethyl ketone.

6. A process for manufacturing a prepreg according to claim 4 wherein the glycol ether is propylene glycol monomethyl ether.

7. A process for manufacturing a prepreg according to claim 4 wherein the glycol ester is propylene glycol monomethyl ether acetate.

8. A process for manufacturing a prepreg according to claim 4 and further comprising the step of drying the solvent-treated fabric to remove excess solvent prior to the varnish impregnation step.

9. A process for manufacturing a prepreg according to claim 8 wherein the drying step includes air drying.

10. A process for manufacturing a prepreg according to claim 9 wherein the fabric reinforcement treating step comprises passing the fabric reinforcement through a bath of the varnish-free solvent.

11. A process for manufacturing a prepreg according to claim 10 wherein the varnish-free solvent includes dimethyl formamide (DMF).

12. A process for manufacturing a prepreg according to claim 11 wherein the heating step comprises infrared radiation and/or hot air heating.

13. A process for manufacturing a prepreg according to claim 11 wherein the fabric reinforcement is a woven or non-woven fabric.

14. A process for manufacturing a prepreg according to claim 11 wherein the fabric reinforcement is a woven fiberglass fabric.

15. A process for manufacturing a prepreg according to claim 1 wherein the resin-free solvent includes dimethyl formamide (DMF).

16. A process for manufacturing a prepreg according to claim 15 wherein the fabric reinforcement is a woven fiberglass fabric.

17. A process for manufacturing a prepreg according to claim 1 and further comprising the step of drying the solvent-treated fabric to remove excess solvent prior to the varnish impregnation step.

18. A process for manufacturing a prepreg according to claim 17 wherein the drying step includes air drying.

19. A process for manufacturing a prepreg according to claim 18 wherein the fabric reinforcement treating step comprises passing the fabric reinforcement through a bath of the varnish-free solvent.

20. A process for manufacturing a prepreg according to claim 19 wherein the resin-free solvent includes dimethyl formamide (DMF).

21. A process for manufacturing a prepreg according to claim 17 wherein the heating step comprises infrared radiation and/or a hot air heating.

22. A process for manufacturing a prepreg according to claim 17 wherein the fabric reinforcement is a woven or non-woven fabric.

23. A process for manufacturing a prepreg according to claim 17 wherein the fabric reinforcement is a woven fiberglass fabric.

24. A process for manufacturing a prepreg according to claim 17 wherein the resin-free solvent includes dimethyl formamide (DMF).

25. A process for manufacturing a prepreg according to claim 1 wherein the fabric reinforcement treating step comprises passing the fabric reinforcement through a bath of the resin-free solvent.

26. A process for manufacturing a multi-layer laminated board comprising the steps of forming at least one prepreg according to the process of claim 1 and further comprising the step of subsequently laminating the at least one prepreg thus formed with at least two printed circuit boards.

27. A process for manufacturing a multi-layer laminated board according to claim 26 wherein the resin-free solvent is selected to effectively wet the fabric reinforcement during the treating step.

28. A process for manufacturing a multi-layer laminated board according to claim 27 wherein the resin-free solvent is a mixture of solvent compounds.

29. A process for manufacturing a multi-layer laminated board according to claim 26 wherein the resin-free solvent is selected from the group consisting of dimethyl formamide (DMF), N-Methyl Pyrolidine (NMP), gamma buteral lactone (GBL), ketones, glycol ethers, glycol esters and mixtures thereof.

30. A process for manufacturing a multi-layer laminated board according to claim 29 wherein the ketones includes at least one of acetone or methyl ethyl ketone.

31. A process for manufacturing a multi-layer laminated board according to claim 29 wherein the glycol ether is propylene glycol monomethyl ether.

32. A process for manufacturing a multi-layer laminated board according to claim 29 wherein the glycol ester is propylene glycol monomethyl ether acetate.

33. A process for manufacturing a multi-layer laminated board according to claim 29 and further comprising the step of drying the solvent-treated fabric to remove excess solvent prior to the varnish impregnation step.

34. A process for manufacturing a multi-layer laminated board according to claim 33 wherein the drying step includes air drying.

35. A process for manufacturing a multi-layer laminated board according to claim 34 wherein the fabric reinforcement treating step comprises passing the fabric reinforcement through a bath of the resin-free solvent.

36. A process for manufacturing a multi-layer laminated board according to claim 35 wherein the resin-free solvent includes dimethyl formamide (DMF).

37. A process for manufacturing a multi-layer laminated board according to claim 36 wherein the heating step comprises infrared radiation and/or a hot air heating.

38. A process for manufacturing a multi-layer laminated board according to claim 36 wherein the fabric reinforcement is a woven or non- woven fabric.

39. A process for manufacturing a multi-layer laminated board according to claim 36 wherein the fabric reinforcement is a woven fiberglass fabric.

40. A process for manufacturing a multi-layer laminated board according to claim 26 wherein the resin-free solvent includes dimethyl formamide (DMF).

41. A process for manufacturing a multi-layer laminated board according to claim 40 wherein the fabric reinforcement is a woven fiberglass fabric.

42. A process for manufacturing a multi-layer laminated board according to claim 26 and further comprising the step of drying the solvent-treated fabric to remove excess solvent prior to the varnish impregnation step.

43. A process for manufacturing a multi-layer laminated board according to claim 42 wherein the drying step includes air drying.

44. A process for manufacturing a multi-layer laminated board according to claim 43 wherein the fabric reinforcement treating step comprises passing the fabric reinforcement through a bath of the resin-free solvent.

45. A process for manufacturing a multi-layer laminated board according to claim 44 wherein the resin-free solvent includes dimethyl formamide (DMF).

45. A process for manufacturing a multi-layer laminated board according to claim 42 wherein the heating step comprises infrared radiation and/or a hot air heating.

46. A process for manufacturing a multi-layer laminated board according to claim 33 wherein the fabric reinforcement is a woven or non- woven fabric.

47. A process for manufacturing a multi-layer laminated board according to claim 33 wherein the fabric reinforcement is a woven fiberglass fabric.

48. A process for manufacturing a multi-layer laminated board according to claim 33 wherein the resin-free solvent includes dimethyl formamide (DMF).

49. A process for manufacturing a multi-layer laminated board according to claim 26 wherein the fabric reinforcement treating step comprises passing the fabric reinforcement through a bath of the resin-free solvent.

50. A process for manufacturing a printed circuit board comprising the steps of forming a prepreg according to the process of claim 1 and further comprising the step of subsequently laminating to the prepreg thus formed a conductive foil.

51 A prepreg made according to the process of claim 1.

52. A prepreg made according to the process of claim 4.

53. A prepreg made according to the process of claim 14.

54. A prepreg made according to the process of claim 17.

55. A multi-layer laminate board made according to the process of claim 26.

56. A multi-layer laminate board made according to the process of claim 29.

56. A multi-layer laminate board made according to the process of claim 39.

57. A multi-layer laminate board made according to the process of claim 42.

58. A printed circuit board made according to the process of claim 50.