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WO2003015155A1 - Method of manufacturing thin film sheet with bumps and thin film sheet with bumps - Google Patents

Method of manufacturing thin film sheet with bumps and thin film sheet with bumps Download PDF

Info

Publication number
WO2003015155A1
WO2003015155A1 PCT/JP2002/008059 JP0208059W WO03015155A1 WO 2003015155 A1 WO2003015155 A1 WO 2003015155A1 JP 0208059 W JP0208059 W JP 0208059W WO 03015155 A1 WO03015155 A1 WO 03015155A1
Authority
WO
WIPO (PCT)
Prior art keywords
thin film
film sheet
bumps
holes
forming
Prior art date
Application number
PCT/JP2002/008059
Other languages
French (fr)
Japanese (ja)
Inventor
Takayuki Miki
Kazuo Inoue
Original Assignee
Shinozaki Manufacturing Co., Ltd.
Jsr Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shinozaki Manufacturing Co., Ltd., Jsr Corporation filed Critical Shinozaki Manufacturing Co., Ltd.
Publication of WO2003015155A1 publication Critical patent/WO2003015155A1/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R3/00Apparatus or processes specially adapted for the manufacture or maintenance of measuring instruments, e.g. of probe tips
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07
    • H01L21/4814Conductive parts
    • H01L21/4846Leads on or in insulating or insulated substrates, e.g. metallisation
    • H01L21/4853Connection or disconnection of other leads to or from a metallisation, e.g. pins, wires, bumps
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • H01L23/49816Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02General constructional details
    • G01R1/06Measuring leads; Measuring probes
    • G01R1/067Measuring probes
    • G01R1/06711Probe needles; Cantilever beams; "Bump" contacts; Replaceable probe pins
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02General constructional details
    • G01R1/06Measuring leads; Measuring probes
    • G01R1/067Measuring probes
    • G01R1/073Multiple probes
    • G01R1/07307Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card
    • G01R1/0735Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card arranged on a flexible frame or film
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/095Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
    • H01L2924/097Glass-ceramics, e.g. devitrified glass
    • H01L2924/09701Low temperature co-fired ceramic [LTCC]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/3025Electromagnetic shielding

Landscapes

  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Measuring Leads Or Probes (AREA)
  • Wire Bonding (AREA)
  • Tests Of Electronic Circuits (AREA)

Abstract

A method of manufacturing a thin film sheet (24) with bumps, comprising the steps of forming a plurality of through holes (36) in the thin film sheet (24), stacking a positive dry film (38) and the thin film sheet (24) on a substrate (32), applying exposure processing to the surface of the thin film sheet (24) to expose the dry film (38) exposed to the insides of the through holes (36), forming through holes (40) communicating with the through holes (36) in the thin film sheet (24) by applying a development treatment to the dry film and removing an exposed portion (38a), applying a plating treatment to the surface of the thin film sheet (24) and forming bumps (26) allowing the through holes (36) to communicate with the through holes (40), and projecting the tip parts (27) of the bumps (26) from the surface of the thin film sheet (24) by peeling off the thin film sheet (24) together with the bumps (26) from the dry film (38).
PCT/JP2002/008059 2001-08-07 2002-08-07 Method of manufacturing thin film sheet with bumps and thin film sheet with bumps WO2003015155A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2001239518A JP2007134048A (en) 2001-08-07 2001-08-07 Manufacturing method of thin film sheet with bump and thin film sheet with bump
JP2001-239518 2001-08-07

Publications (1)

Publication Number Publication Date
WO2003015155A1 true WO2003015155A1 (en) 2003-02-20

Family

ID=19070253

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2002/008059 WO2003015155A1 (en) 2001-08-07 2002-08-07 Method of manufacturing thin film sheet with bumps and thin film sheet with bumps

Country Status (3)

Country Link
JP (1) JP2007134048A (en)
TW (1) TW200412622A (en)
WO (1) WO2003015155A1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110546517A (en) * 2017-02-27 2019-12-06 迪睿合株式会社 Inspection jig for electrical characteristics

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101148917B1 (en) * 2008-05-16 2012-05-22 가부시키가이샤 어드밴티스트 Manufacturing method and wafer unit for testing
JP2010098046A (en) * 2008-10-15 2010-04-30 Renesas Technology Corp Probe card and method for manufacturing semiconductor device
KR102036105B1 (en) * 2018-11-06 2019-10-24 (주)티에스이 Data signal transmission connector

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07283280A (en) * 1994-02-21 1995-10-27 Hitachi Ltd Connection device and manufacturing method thereof
JPH1064341A (en) * 1996-08-19 1998-03-06 Toppan Printing Co Ltd Anisotropic conductive film and method for producing the same
JPH10142259A (en) * 1996-11-14 1998-05-29 Mitsubishi Materials Corp Manufacture of contact probe, contact probe using same, and probe device provided with contact probe
JPH1183941A (en) * 1997-09-10 1999-03-26 Hitachi Ltd Connection device, semiconductor device inspection device, and semiconductor device
JP2000039450A (en) * 1998-07-17 2000-02-08 Hoya Corp Burn-in board, membrane ring with bump and its manufacture
JP2001056347A (en) * 1999-08-20 2001-02-27 Hoya Corp Contact component and its manufacture

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07283280A (en) * 1994-02-21 1995-10-27 Hitachi Ltd Connection device and manufacturing method thereof
JPH1064341A (en) * 1996-08-19 1998-03-06 Toppan Printing Co Ltd Anisotropic conductive film and method for producing the same
JPH10142259A (en) * 1996-11-14 1998-05-29 Mitsubishi Materials Corp Manufacture of contact probe, contact probe using same, and probe device provided with contact probe
JPH1183941A (en) * 1997-09-10 1999-03-26 Hitachi Ltd Connection device, semiconductor device inspection device, and semiconductor device
JP2000039450A (en) * 1998-07-17 2000-02-08 Hoya Corp Burn-in board, membrane ring with bump and its manufacture
JP2001056347A (en) * 1999-08-20 2001-02-27 Hoya Corp Contact component and its manufacture

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110546517A (en) * 2017-02-27 2019-12-06 迪睿合株式会社 Inspection jig for electrical characteristics

Also Published As

Publication number Publication date
JP2007134048A (en) 2007-05-31
TW200412622A (en) 2004-07-16

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