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WO2002021593A3 - Method of forming titanium nitride (tin) films using metal-organic chemical vapor deposition (mocvd) - Google Patents

Method of forming titanium nitride (tin) films using metal-organic chemical vapor deposition (mocvd) Download PDF

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Publication number
WO2002021593A3
WO2002021593A3 PCT/US2001/027571 US0127571W WO0221593A3 WO 2002021593 A3 WO2002021593 A3 WO 2002021593A3 US 0127571 W US0127571 W US 0127571W WO 0221593 A3 WO0221593 A3 WO 0221593A3
Authority
WO
WIPO (PCT)
Prior art keywords
tin
titanium nitride
film
substrate
films
Prior art date
Application number
PCT/US2001/027571
Other languages
French (fr)
Other versions
WO2002021593A2 (en
WO2002021593A9 (en
Inventor
Murali Narasimhan
Xiangbing Li
Original Assignee
Applied Materials Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Applied Materials Inc filed Critical Applied Materials Inc
Publication of WO2002021593A2 publication Critical patent/WO2002021593A2/en
Publication of WO2002021593A3 publication Critical patent/WO2002021593A3/en
Publication of WO2002021593A9 publication Critical patent/WO2002021593A9/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841—Barrier, adhesion or liner layers
    • H01L21/76853—Barrier, adhesion or liner layers characterized by particular after-treatment steps
    • H01L21/76861—Post-treatment or after-treatment not introducing additional chemical elements into the layer
    • H01L21/76862—Bombardment with particles, e.g. treatment in noble gas plasmas; UV irradiation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841—Barrier, adhesion or liner layers
    • H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/5329—Insulating materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204—Conductive materials
    • H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
    • H01L23/53214—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being aluminium
    • H01L23/53223—Additional layers associated with aluminium layers, e.g. adhesion, barrier, cladding layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204—Conductive materials
    • H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
    • H01L23/53228—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being copper
    • H01L23/53238—Additional layers associated with copper layers, e.g. adhesion, barrier, cladding layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204—Conductive materials
    • H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
    • H01L23/53257—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being a refractory metal
    • H01L23/53266—Additional layers associated with refractory-metal layers, e.g. adhesion, barrier, cladding layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Plasma & Fusion (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Chemical Vapour Deposition (AREA)

Abstract

A method of plasma treating titanium nitride (TiN) films at temperatures that are compatible with carbon-based dielectric layers is disclosed. The titanium nitride (TiN) film is formed by thermally decomposing a titanium based compound on a substrate having a carbon-based dielectric layer thereon. Thereafter, the titanium nitride (TiN) film is plasma treated. During the titanium nitride (TiN) film plasma treatment, the substrate is maintained at a temperature less than about 360 °C. The substrate is preferably maintained at a temperature less than about 360 °C using a backside gas which conducts heat away from the substrate. The titanium nitride (TiN) film is compatible with integrated circuit fabrication processes. In one integrated circuit fabrication process, the titanium nitride (TiN) film is incorporated into a damascene structure.
PCT/US2001/027571 2000-09-08 2001-09-05 Method of forming titanium nitride (tin) films using metal-organic chemical vapor deposition (mocvd) WO2002021593A2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US65779200A 2000-09-08 2000-09-08
US09/657,792 2000-09-08

Publications (3)

Publication Number Publication Date
WO2002021593A2 WO2002021593A2 (en) 2002-03-14
WO2002021593A3 true WO2002021593A3 (en) 2003-01-03
WO2002021593A9 WO2002021593A9 (en) 2003-08-28

Family

ID=24638678

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2001/027571 WO2002021593A2 (en) 2000-09-08 2001-09-05 Method of forming titanium nitride (tin) films using metal-organic chemical vapor deposition (mocvd)

Country Status (1)

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WO (1) WO2002021593A2 (en)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7622400B1 (en) 2004-05-18 2009-11-24 Novellus Systems, Inc. Method for improving mechanical properties of low dielectric constant materials
US7695765B1 (en) 2004-11-12 2010-04-13 Novellus Systems, Inc. Methods for producing low-stress carbon-doped oxide films with improved integration properties
US8247332B2 (en) 2009-12-04 2012-08-21 Novellus Systems, Inc. Hardmask materials
US9337068B2 (en) 2012-12-18 2016-05-10 Lam Research Corporation Oxygen-containing ceramic hard masks and associated wet-cleans
US9502493B2 (en) 2014-02-26 2016-11-22 Taiwan Semiconductor Manufacturing Co., Ltd. Multi-step method of forming a metal film
US9847221B1 (en) 2016-09-29 2017-12-19 Lam Research Corporation Low temperature formation of high quality silicon oxide films in semiconductor device manufacturing
CN111793519B (en) * 2020-07-06 2022-09-13 安徽省赛威输送设备有限公司 Degradable lubricating oil for conveyor
CN117215153B (en) * 2023-11-09 2024-02-27 粤芯半导体技术股份有限公司 Photoresist coating method and device for wafer, electronic equipment and storage medium

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5969425A (en) * 1997-09-05 1999-10-19 Advanced Micro Devices, Inc. Borderless vias with CVD barrier layer
US5970378A (en) * 1996-09-03 1999-10-19 Taiwan Semiconductor Manufacturing Company, Ltd. Multi-step plasma treatment process for forming low resistance titanium nitride layer
JP2000252357A (en) * 1999-03-01 2000-09-14 Nec Corp Manufacture of semiconductor device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5970378A (en) * 1996-09-03 1999-10-19 Taiwan Semiconductor Manufacturing Company, Ltd. Multi-step plasma treatment process for forming low resistance titanium nitride layer
US5969425A (en) * 1997-09-05 1999-10-19 Advanced Micro Devices, Inc. Borderless vias with CVD barrier layer
JP2000252357A (en) * 1999-03-01 2000-09-14 Nec Corp Manufacture of semiconductor device

Non-Patent Citations (3)

* Cited by examiner, † Cited by third party
Title
MARCADAL C ET AL: "OMCVD TiN diffusion barrier for copper contact and via/interconnects structures", MICROELECTRONIC ENGINEERING, ELSEVIER PUBLISHERS BV., AMSTERDAM, NL, vol. 37-38, 1 November 1997 (1997-11-01), pages 197 - 203, XP004103548, ISSN: 0167-9317 *
PATENT ABSTRACTS OF JAPAN vol. 2000, no. 12 3 January 2001 (2001-01-03) *
UHLIG M ET AL: "LOW KAPPA ( 2.0) PLASMA CF POLYMER FILMS MODIFIED BY IN SITU DEPOSITED CARBON RICH ADHESION LAYERS", ADVANCED METALLIZATION CONFERENCE. PROCEEDINGS OF THE CONFERENCE, XX, XX, 1999, pages 395 - 401, XP001094526 *

Also Published As

Publication number Publication date
WO2002021593A2 (en) 2002-03-14
WO2002021593A9 (en) 2003-08-28

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