PHASE PRE-DISTORTION FOR TRANSMITTER WITH FREQUENCY SYNTHESIZER BASED PHASE ENCODING
BACKGROUND OF THE INVENTION The present invention relates to communications transmitters, such as wireless telephone transmitters, and more particularly to communications transmitters using frequency synthesizers to generate a phase encoded signal. In wireless communications, such as cellular telephony, it is common for signals to be transmitted with both amplitude and phase encoding. For instance, communications standards such as TIA/EIA-136, which is common in North
America, and Enhanced Datarates for Global Evolution (EDGE), call for amplitude and phase modulation for encoding information on a carrier frequency. For these standards, it is common to employ an l/Q modulator architecture that uses one or more mixing stages to take a transmit signal from a baseband frequency to the appropriate carrier frequency. In these architectures, the Inphase (I) and
Quadrature (Q) signal components representing the data to be transmitted are generated at a baseband frequency. From the baseband frequency, the I and Q signals are mixed to typically two or more intermediate frequencies (in series) and then to the carrier frequency.
BRIEF SUMMARY OF THE INVENTION In one aspect of the present invention, a frequency synthesizer having a variable output frequency is used to generate a phase encoded signal at a selected carrier frequency. The frequency synthesizer operates under the control
of a control signal generated by a waveform generator based on a baseband frequency phase signal. In an illustrative embodiment, the frequency synthesizer comprises a phase-lock loop having a variable feedback divider and the feedback divider operates under the control of the control signal generated by the waveform generator. The control signal is pre-distorted so as to compensate for band limiting effects of the frequency synthesizer. The signal transmitted is then based on the phase encoded signal.
In another aspect of the present invention, the frequency deviation for the frequency synthesizer from one time interval to the next is calculated by the waveform generator using an estimate of the actual phase of the previous time interval. The estimate is based on an integer representation of the frequency deviation associated with the earlier time interval rather than on the ideal phase of the previous time interval.
The present invention allows for numerous standard components to be used to generate the phase encoded signal at the carrier frequency directly from the baseband frequency while allowing for suitably clean signals to be produced, such as signals with acceptable adjacent channel power levels.
BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 shows a wireless communications mobile terminal incorporating the present invention.
Fig. 2 shows the modulator and RF amplifier of Fig. 1 in greater detail. Fig. 3 shows the waveform generator of Fig. 2 in greater detail. Fig. 4 shows the frequency synthesizer of Fig. 2 in greater detail.
Fig. 5 shows one process flow for determining the compensation pre- distortion utilized by the compensator of Fig. 3.
DETAILED DESCRIPTION OF THE INVENTION The present invention will be discussed in the context of a wireless communications mobile terminal 20. However, it should be understood that the present invention is not limited thereto, but instead applies to any type of communications transmitter using a frequency synthesizer to generate a phase encoded transmission signal. As used herein, the term "mobile terminal" may include a cellular radiotelephone with or without a multi-line display; a Personal Communications System (PCS) terminal that may combine a cellular radiotelephone with data processing, facsimile and data communications capabilities; a PDA that can include a radiotelephone, pager, Internet/intranet access, Web browser, organizer, calendar and/or a global positioning system (GPS) receiver; and a conventional laptop and/or palmtop receiver or other appliance that includes a radiotelephone transceiver. Mobile terminals may also be referred to as "pervasive computing" devices.
Referring to Figure 1, a wireless communications mobile terminal 20 typically includes a controller 22, an operator interface 26, a transmitter 38, a receiver 50, and an antenna assembly 58. The operator interface 26 typically includes a display 28, a keypad 30, a control unit 32, a microphone 34, and a speaker 36. The display 28 allows the operator to see dialed digits, call status, and other service information. The keypad 30 allows the, operator to dial numbers, enter commands, and select options. The control unit 32 interfaces the
display 28 and keypad 30 with the controller 22. The microphone 34 receives acoustic signals from the user and converts the acoustic signals to an analog electrical signal. The speaker 36 converts analog electrical signals from the receiver 50 to acoustic signals which can be heard by the user. The analog electrical signal from the microphone 34 is supplied to transmitter 38. The transmitter 38 includes an analog to digital converter 40, a digital signal processor 42, and a phase modulator and RF amplifier 48. The analog to digital converter 40 changes the analog electrical signal from the microphone 34 into a digital signal. The digital signal is passed to the digital signal processor (DSP) 42, which contains a speech coder 44 and channel coder 46. The speech coder 44 compresses the digital signal and the channel coder 46 inserts error detection, error correction and signaling information. The DSP 42 may include, or may work in conjunction with, a DTMF tone generator (not shown). The compressed and encoded signal from the digital signal processor 42 is passed to the phase modulator and RF amplifier 48, which are shown as a combined unit in Figure 1. The phase modulator converts the signal to a form which is suitable for transmission on an RF carrier. The RF amplifier then boosts the output of the phase modulator for transmission via the antenna assembly 58. The receiver 50 includes a receiver/amplifier 52, digital signal processor 54, and a digital to analog converter 56. Signals received by the antenna assembly 58 are passed to the receiver/amplifier 52, which shifts the frequency spectrum, and boosts the low-level RF signal to a level appropriate for input to the digital signal processor 54.
The digital signal processor 54 typically includes an equalizer to compensate for phase and amplitude distortions in the channel corrupted signal, a demodulator for extracting bit sequences from the received signal, and a detector for determining transmitted bits based on the extracted sequences. A channel decoder detects and corrects channel errors in the received signal. The channel decoder also includes logic for separating control and signaling data from speech data. Control and signaling data is passed to the controller 22. Speech data is processed by a speech decoder and passed to the digital to analog converter 56. The digital signal processor 54, may include, or may work in conjunction with, a DTMF tone detector (not shown). The digital to analog converter 56 converts the speech data into an analog signal which is applied to the speaker 36 to generate acoustic signals which can be heard by the user.
The antenna assembly 58 is connected to the RF amplifier of the transmitter 38 and to the receiver/amplifier 52 of the receiver 50. The antenna assembly 58 typically includes a duplexer 60 and an antenna 62. The duplexer 60 permits full duplex communications over the antenna 62.
The controller 22 coordinates the operation of the transmitter 38 and the receiver 50, and may for instance take the form of a common microprocessor. This coordination includes power control, channel selection, timing, as well as a host of other functions known in the art. The controller 22 inserts signaling messages into the transmitted signals and extracts signaling messages from the received signals. The controller 22 responds to any base station commands contained in the signaling messages, and implements those commands. When the user enters commands via the keypad 30, the commands are transferred to
the controller 22 for action. Memory 24 stores and supplies information at the direction of the controller 22 and may include both volatile and non-volatile portions.
As noted above, the compressed and encoded signal from the DSP 42 is input to the phase modulator and RF amplifier 48. The phase modulator and RF amplifier 48 is shown in greater detail in Figure 2. The phase modulator and RF amplifier 48 may be conceptually divided into a waveform generator 120, a frequency synthesizer 140, and an amplifier 110. The waveform generator 120 takes the incoming data stream from the DSP 42 and generates an amplitude component AM(t) and a phase control signal fd(t). At least the phase control
signal fd(t)\s at the baseband frequency. The frequency synthesizer 140 uses
the phase control signal fd(t) to generate phase-modulated signal PM(t), which in exemplary embodiments is a constant amplitude envelope signal at a carrier frequency. The amplifier 110 applies an amplitude modulation to the phase component signal PM(t), based on the amplitude component AM(t), to produce an output signal s(t) at the carrier frequency, in any fashion known in the art, such as the approaches known from AM radio transmitters or those described in U.S. Pat. Nos. 5,990,735, 5,973,556, or the like.
The waveform generator 120 is shown in greater detail in Figure 3. The waveform generator 120 may be viewed as including a symbol mapper 122, a pulse shaping filter 124, a phase generator 126, an amplitude generator 190, a compensator 128, and a frequency deviation unit 130. The symbol mapper 122, which may for instance be a differential encoder, takes the incoming data stream from the DSP 42 and maps the data to the appropriate symbols, thereby encoding
the data stream and producing two outputs indicative of the data signal -- an inphase component I and a quadrature component Q. The optional pulse shaping filter 124, typically a filter specified by the particular standard being used, such as a raised root cosine filter for an TIA/EIA-136 transmitter, filters I and Q to produce
I and β in a fashion well known in the art. The land Q signals are then passed to both the amplitude generator 190 and the phase generator 126. The amplitude generator 190 operates to generate the amplitude component AM(t) in any fashion known in the art, which is then fed to the amplifier 110. The phase generator 126 operates to generate an initial phase signal θ(ή based on I and
Q that is forwarded to the compensator 128. The compensator 128 applies a pre-distortion to the initial phase signal based on compensation vector h as described further below to produce a pre-distorted signal φ(t). The pre-distorted
signal φ(t) is fed to the frequency deviation unit 130. The frequency deviation unit
30 operates to generate a control signal fd(t) based on the pre-distorted signal
φ{f) to control the changes in frequency of the frequency synthesizer 140 from one time interval to the next. The operation of the amplitude generator 190, phase generator 126, and the frequency deviation unit 130 may be as well known in the art; however, it should be noted that the input to the frequency deviation unit 130 in the present invention is the pre-distorted signal φ(t) from the compensator
128, rather than the initial phase signal θ(t) from the phase generator 126.
The control signal fd(t) is used to adjust the operation of the frequency
synthesizer 140 so as to produce the desired phase variations in the phase component PM(t). While the frequency synthesizer 140 may take a variety of
forms well known in the art the frequency synthesizer 140 will be assumed to be a phase-locked loop (PLL) for purposes of illustration. Referring to Fig. 4, a PLL 140 typically includes a reference divider 142, a phase comparitor 144, a filter 146, a voltage controlled oscillator (VCO) 148, and a feedback divider 150. The optional reference divider 142 may take the incoming reference signal and divide it down to an appropriate frequency, if necessary. The phase comparitor 144 compares the phase of the reference signal and the output of the feedback divider 150 and generates a phase correction signal. The phase correction signal is directed to the VCO 148 via the filter 146. The VCO 148 generates an output signal based at least in part on the phase correction signal. For purposes of this illustration, the output signal is PM(t) which is passed to the amplifier 110. The output signal is also fedback through the feedback divider 150 to the phase comparitor 144. While the feedback divider 150 may take a variety of forms known in the art, the feedback divider 150 in this illustrative example takes the form of a fractional N divider. The operation of the feedback divider 150 is controlled by the control signal fd(t) from the frequency deviation unit 130. The
general operation of a PLL 140 having a fractional N feedback divider 150 is well known in the art, so further details of the operation of the PLL have been omitted for clarity. While PLL 140 generates the phase-modulated signal PM(t) based on the control, which is in turn based on the phase signal θ(t), PLL 140 inherently band
limits phase-modulated signal PM(t) as compared to the phase signal θ(t). Thus, unless compensated for, the PLL 140 would impart a phase distortion to the phase-modulated signal PM(t), and thus the signal ultimately transmitted. To
counteract this, the present invention pre-distorts the input to the PLL so as to compensate for the phase distortion associated with the PLL 140. By doing so, the phase-modulated signal PM(t) output by the PLL 140 is made to be closer to an ideal phase-modulated signal than otherwise could be achieved. As a result, the signal ultimately transmitted is cleaner, resulting in lower adjacent channel power.
The pre-distortion required for compensation will depend on the phase distortion associated with the PLL 140, which is in turn dependent on the impulse response of the PLL 140. Thus, it is helpful to know the performance characteristics of the PLL 140 in order to determine the appropriate pre-distortion to apply. One characteristic that is particularly helpful is the impulse response of the PLL 140.
The impulse response of PLL 140 may be represented as a N x 1 vector / where each element of the vector (e.g., f0, fi, f2, ... fN- is the sampled impulse response of the PLL 140 at the corresponding time index. Based on the sampled impulse response vector / , a matrix F (sometimes referred to as the impulse response matrix) can be constructed as follows:
In order to calculate the compensation vector h used by the compensator 128, a desired response vector g is selected. The desired response vector g may be thought of as the time domain representation of the ideal overall response function of the circuit path from where the pre-distortion is applied (e.g., the compensator 128) through the PLL 140. Typically, the desired response vector g
will be a vector of mostly zeros with a 1 at position gk corresponding to the time
delay of the output signal of the PLL PM(t) with respect to the input to the phase generator 126. Based on the desired response vector g , the compensation vector h used by the compensator 128 may be derived by solving the following equation:
h = c∑ - where c = ( Γ.F)~ Vg
∑,c'
One possible process flow for determining compensation vector h is shown in Figure 5. The impulse response of the frequency synthesizer 140 f(t) is determined either analytically or through empirical means (box 310). Matrix F is formed based on the impulse response of the frequency synthesizer 140 (box
320). The desired response vector g is selected (box 330) and the compensation vector h is thereafter calculated (box 340). It should be noted that, given a desired response vector g and impulse response matrix F , one can determine an appropriate compensation vector h to minimize the overall difference as
expressed by ε(n)= min Fh-g\ .
It should also be noted that desired response vector g should be chosen so that appropriate minimum performance criteria are met. For instance, desired
response vector g should be chosen so that the error vector magnitude (EVM) and adjacent channel power (ACP) performance targets of TIA EIA-136 and/or the earlier standard IS-137. Therefore, other desired response vectors g- than the illustrative example may be chosen without exceeding the scope of the present invention.
In general terms, the application of compensation vector h to the signal from the standard phase generator 126 (6>(t)) by the compensator 128 pre-distorts the input to the frequency synthesizer 140 so as to compensate for the band- limiting effects of the frequency synthesizer 140. Stated in conceptual terms, the distortion associated with the PLL 140 may be considered a lowpass filter while the pre-distortion h is the inverse of this lowpass filter. The compensator 128 is thus aimed at totally, or at least substantially "undoing" (or "counteracting") the effect of the PLL 140. To achieve this, the compensator 128 is inserted between the phase generator 126 and the frequency deviation unit 130, and programmed to apply the appropriate pre-distortion h . Thus, the band-limiting effects of the frequency synthesizer 140 may be compensated for while retaining the use of numerous other standard components.
It should be noted that the above illustration has assumed that a differential encoder generates the baseband frequency signals l,Q which are filtered by pulse shaping filter 124; however, this is not required. Indeed, to use the present invention, the baseband frequency inputs to the phase generator 126 may be generated in any known fashion, and the particular method is not important.
The frequency deviation unit 130 computes the frequency deviation that should be applied to the frequency synthesizer 140 for a given time interval to
obtain the desired phase in the output signal PM(t) based on the phase of the frequency synthesizer for the immediately previous time interval. In some aspects of the present invention, the frequency deviation unit 130 may use integer
representations ^(n-1) of the phase for the previous time interval φ(n-\) rather
than real number representations of φ{n-l). For instance, the frequency deviation unit 130 may use a sigma-delta approach using integer value(s), or some other known integer arithmetic approach. In general, the ideal required
frequency deviation fd{n) may be expressed as φ(n) = φ(n-i)A-2πAt fd(n). This
computation of fd(n) yields a real number; however, the frequency deviation unit 130 may use an integer representation of the phase of the frequency synthesizer
φ(n), labeled φ(n). The resulting integer representation of the frequency
deviation is denoted fd(ή) . The error introduced by the integer representations
ε(n) is equal to is used to compute
f
d(n -l), this error is included in the calculation. While ε(n) will likely be very
small for most sampling intervals, there are circumstances where ε(n) becomes significant, such as at the abrupt phase changes associated with symbol boundaries. In some situations, such as when a full scale frequency deviation is called for, the error ε(n) may.remain as an artifact in the output signal PM(t) long after the time interval has passed. To minimize instantaneous frequency deviation errors and to prevent the accumulation of such errors, exemplary embodiments of frequency deviation unit 130 of the present invention calculate the frequency
deviation for time interval n based on the integer representations rather than the ideal representations. The frequency deviation is calculated based on the formula
yd ) _ φψ)-φψ- ) wnere φ (n_ ) is the integer representation of the ideal
2πAt ph.ase at time interval n-1. The present invention allows for standard frequency synthesizers to be used to generate a phase-encoded signal for transmission. Such an arrangement may be advantageously used in a direct conversion transmitter; direct conversion transmitters take signals from baseband and convert them to the carrier frequency without intervening conversions to intermediate frequencies. The present invention compensates for some of the shortcomings of using frequency synthesizers, and particularly phase-lock loops, in such situations, thereby allowing for cleaner signals to be produced, such as transmitted signals with better adjacent channel power levels.
The present invention may, of course, be carried out in other specific ways than those herein set forth without departing from the scope of the invention. The present embodiments are, therefore, to be considered in all respects as illustrative and not restrictive, and all changes coming within the meaning and equivalency range of the appended claims are intended to be embraced therein.