WO2002003450A3 - Automated determination and display of the physical location of a failed cell in an array of memory cells - Google Patents
Automated determination and display of the physical location of a failed cell in an array of memory cells Download PDFInfo
- Publication number
- WO2002003450A3 WO2002003450A3 PCT/US2001/018729 US0118729W WO0203450A3 WO 2002003450 A3 WO2002003450 A3 WO 2002003450A3 US 0118729 W US0118729 W US 0118729W WO 0203450 A3 WO0203450 A3 WO 0203450A3
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- array
- display
- memory cells
- physical location
- failed cell
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/56—External testing equipment for static stores, e.g. automatic test equipment [ATE]; Interfaces therefor
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Tests Of Electronic Circuits (AREA)
- Semiconductor Memories (AREA)
- Non-Volatile Memory (AREA)
- User Interface Of Digital Computer (AREA)
- For Increasing The Reliability Of Semiconductor Memories (AREA)
- Read Only Memory (AREA)
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
AU2001268294A AU2001268294A1 (en) | 2000-07-03 | 2001-06-08 | Automated determination and display of the physical location of a failed cell inan array of memory cells |
JP2002507433A JP4698119B2 (en) | 2000-07-03 | 2001-06-08 | Automatic determination and display of the physical location of defective cells in an array of memory cells |
KR10-2003-7000076A KR20030019553A (en) | 2000-07-03 | 2001-06-08 | Automated determination and display of the physical location of a failed cell in an array of memory cells |
EP01946216A EP1307912A2 (en) | 2000-07-03 | 2001-06-08 | Automated determination and display of the physical location of a failed cell in an array of memory cells |
BR0112154-5A BR0112154A (en) | 2000-07-03 | 2001-06-08 | Automated determination and display of the physical location of a failed cell in a memory cell loop |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/609,793 US6560729B1 (en) | 2000-07-03 | 2000-07-03 | Automated determination and display of the physical location of a failed cell in an array of memory cells |
US09/609,793 | 2000-07-03 |
Publications (2)
Publication Number | Publication Date |
---|---|
WO2002003450A2 WO2002003450A2 (en) | 2002-01-10 |
WO2002003450A3 true WO2002003450A3 (en) | 2002-04-25 |
Family
ID=24442352
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/US2001/018729 WO2002003450A2 (en) | 2000-07-03 | 2001-06-08 | Automated determination and display of the physical location of a failed cell in an array of memory cells |
Country Status (9)
Country | Link |
---|---|
US (1) | US6560729B1 (en) |
EP (1) | EP1307912A2 (en) |
JP (1) | JP4698119B2 (en) |
KR (1) | KR20030019553A (en) |
CN (1) | CN1440570A (en) |
AU (1) | AU2001268294A1 (en) |
BR (1) | BR0112154A (en) |
TW (1) | TW494520B (en) |
WO (1) | WO2002003450A2 (en) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6842534B1 (en) * | 2000-09-28 | 2005-01-11 | Itt Manufacturing Enterprises, Inc. | Detecting material failures in ground locations |
JP4246979B2 (en) * | 2002-09-05 | 2009-04-02 | 株式会社日立製作所 | Device management system |
US6801470B2 (en) * | 2002-12-23 | 2004-10-05 | Intel Corporation | Digital regulation circuit |
US7418367B2 (en) | 2003-10-31 | 2008-08-26 | Hewlett-Packard Development Company, L.P. | System and method for testing a cell |
JP6657797B2 (en) * | 2015-10-30 | 2020-03-04 | 富士ゼロックス株式会社 | Printing system, display control device and program |
CN110879931B (en) * | 2018-09-05 | 2022-04-05 | 长鑫存储技术有限公司 | Visual memory chip repair analysis program inspection method and device |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4876685A (en) * | 1987-06-08 | 1989-10-24 | Teradyne, Inc. | Failure information processing in automatic memory tester |
US5720031A (en) * | 1995-12-04 | 1998-02-17 | Micron Technology, Inc. | Method and apparatus for testing memory devices and displaying results of such tests |
DE19746695A1 (en) * | 1996-10-22 | 1998-06-10 | Advantest Corp | Flash memory testing system |
US5946250A (en) * | 1998-02-20 | 1999-08-31 | Advantest Corporation | Memory testing apparatus |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04278556A (en) * | 1991-03-07 | 1992-10-05 | Nec Corp | Visual defect analysis system of lsi |
JP3256555B2 (en) * | 1991-03-18 | 2002-02-12 | 株式会社日立製作所 | Semiconductor memory failure analysis system and defective cell display output method |
JP3526894B2 (en) * | 1993-01-12 | 2004-05-17 | 株式会社ルネサステクノロジ | Nonvolatile semiconductor memory device |
US5943437A (en) * | 1995-10-09 | 1999-08-24 | Kabushiki Kaisha Kobe Seiko Sho | Method and apparatus for classifying a defect on a semiconductor wafer |
JPH09270200A (en) * | 1996-03-29 | 1997-10-14 | Ando Electric Co Ltd | Device and method of failure anaysis of memory cell array |
JPH10104314A (en) * | 1996-09-27 | 1998-04-24 | Ando Electric Co Ltd | Wafer defect analyzer |
KR100278926B1 (en) * | 1998-05-25 | 2001-01-15 | 김영환 | Pulley on-chip wafer level burn-in test circuit and its method |
US6367042B1 (en) * | 1998-12-11 | 2002-04-02 | Lsi Logic Corporation | Testing methodology for embedded memories using built-in self repair and identification circuitry |
US6294918B1 (en) * | 1999-09-23 | 2001-09-25 | Taiwan Semiconductor Manufacturing Company, Ltd | Method for locating weak circuit having insufficient driving current in IC chips |
-
2000
- 2000-07-03 US US09/609,793 patent/US6560729B1/en not_active Expired - Fee Related
-
2001
- 2001-06-08 WO PCT/US2001/018729 patent/WO2002003450A2/en not_active Application Discontinuation
- 2001-06-08 AU AU2001268294A patent/AU2001268294A1/en not_active Abandoned
- 2001-06-08 KR KR10-2003-7000076A patent/KR20030019553A/en not_active Application Discontinuation
- 2001-06-08 JP JP2002507433A patent/JP4698119B2/en not_active Expired - Fee Related
- 2001-06-08 EP EP01946216A patent/EP1307912A2/en not_active Withdrawn
- 2001-06-08 CN CN01812247A patent/CN1440570A/en active Pending
- 2001-06-08 BR BR0112154-5A patent/BR0112154A/en not_active Application Discontinuation
- 2001-06-26 TW TW090115368A patent/TW494520B/en not_active IP Right Cessation
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4876685A (en) * | 1987-06-08 | 1989-10-24 | Teradyne, Inc. | Failure information processing in automatic memory tester |
US5720031A (en) * | 1995-12-04 | 1998-02-17 | Micron Technology, Inc. | Method and apparatus for testing memory devices and displaying results of such tests |
DE19746695A1 (en) * | 1996-10-22 | 1998-06-10 | Advantest Corp | Flash memory testing system |
US5946250A (en) * | 1998-02-20 | 1999-08-31 | Advantest Corporation | Memory testing apparatus |
Also Published As
Publication number | Publication date |
---|---|
AU2001268294A1 (en) | 2002-01-14 |
BR0112154A (en) | 2003-07-01 |
JP4698119B2 (en) | 2011-06-08 |
KR20030019553A (en) | 2003-03-06 |
JP2004503041A (en) | 2004-01-29 |
US6560729B1 (en) | 2003-05-06 |
WO2002003450A2 (en) | 2002-01-10 |
CN1440570A (en) | 2003-09-03 |
TW494520B (en) | 2002-07-11 |
EP1307912A2 (en) | 2003-05-07 |
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