WO2001057740A2 - Calibration software tool and method - Google Patents
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/20—Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
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- G—PHYSICS
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- G06F30/20—Design optimisation, verification or simulation
- G06F30/23—Design optimisation, verification or simulation using finite element methods [FEM] or finite difference methods [FDM]
Definitions
- ECAD Electronic Computer-Aided Design
- TCAD Technology Computer-Aided Design
- the process simulator tasks are the simulation of semiconductor device fabrication processes, which may include substrate formation, ion implantation, thermal diffusion, thermal oxidation, depositing of materials, lithography operations, etching of materials, etching of trenches and vias, surface passivation, packaging, or other similar processes.
- the principal outputs of a process simulator are complete structural descriptions of structures (geometry, material definitions, impurity profiles, contact placement).
- the device simulator's task is to analyze the electrical behavior of the most basic of IC building blocks, the individual transistors or even small sub-circuits, at a very fundamental level. As such, the simulator uses as inputs the individual structural definitions.
- the device simulator's principal outputs are terminal currents and voltages.
- TCAD In principle, given recipes and a set of masks, the TCAD tools themselves can build virtual device structures and then predict performance of entire circuits to a very high degree of accuracy. Modern process and device simulators are capable of rapid characterization, on the order of many structures per hour, as compared to experiments where one is sometimes fortunate to obtain a new structure within a period of a couple of months.
- TCAD is extensively used during all stages of semiconductor devices and systems manufacturing, from the design phase to process control, when the technology has matured into mass production. Examples of this are discussed by R. W. Dutton and M.R. Pinto, "The use of computer aids in IC techology evolution", Proc. IEEE, vol.74, no. 12 (December 1986) pp. 1730-1740, and by H.
- the physical models that are used are typically empirical models that are suitable for numerical simulation on a computer and that adequately describe the physical effects which are relevant for the physical modeling of the semiconductor process or device.
- Each physical model typically has a number of parameters, which do not necessarily directly relate to fundamental physical parameters, but have to be determined from experiments- Model parameters in general need to be determined for each typical family of processes, if quantitatively correct results are expected. The process of dete ⁇ ining these parameters is called calibration.
- Calibration poses several difficulties: In the complete process and device simulation of a semiconductor technology, a large number of physical models with model parameters are used. It is quite difficult, however, to determine these parameters in a straightforward way from measurements, because only limited possibilities exist for experimental measurements. From the available experimental measurements, the model parameters can not be viewed as independent. It is therefore essential to establish a sequence in individual steps within a calibration can be performed for a given semiconductor technology. The particular sequence of the individual steps depends on the semiconductor technology for which the simulation is to be calibrated. Another difficulty of cahbration is the large amounts of time and manpower effort that are necessary to perform a calibration, because no established methodologies of calibration exist and the procedure requires a large amount of manual work.
- Methodologies to automatize calibration along with software tools to efficiently perform the calibration reduce the time required to calibrate a design technology in an efficient manner and make the calibration less dependent on particular experts. By way of example it would be desirable to provide a set of calibrated parameters delivered to the customer in two weeks or less.
- simulation is used to provide an indication of many of those characteristics at a lower cost than the cost of performing an actual experiment. This is especially important if a large number of experiments (variation of sseveral semiconductor process or design parameters) is necessary in order to improve a semiconductor device.
- a semiconductor technology simulation is optimized by defining a measurable target, performing experimental measurements, and applying a calibration algorithm to determine a set of calibrated parameters for the models in the semiconductor technology simulation using the experimental measurements as target.
- a methodology for calibrating semiconductor processes and devices includes providing a required set of data for the semiconductor processes and devices, establisliing a simulation file, simulating and calibrating at least one oxide thickness, calibrating one-dimensional, as-implanted concentration profiles, simulating and calibrating diffused concentration profiles, and simulating and calibrating the electrical characteristics of the devices.
- the desired experimental data includes SIMS measurements for the as-implanted profiles, major Dt (diffusion time) steps in the process, and at the end of the process, sheet resistance for CMOS wells, extension and source/drain, SRP for the highly doped areas, oxide thickness, TEM cross section of the gate and of the edge of the gate, and recipes for process steps including recipes used in forming concentration ramps.
- SIMS refers to secondary ion mass spectrometry and the results of SIMS are STMS profiles.
- SRP refers to spreading resistance
- TEM refers to transmission electron microscopy.
- the establishment of the simulation file includes determining physical models and choosing model parameters of the physical model as parameters to be varied.
- the calibration of the initial oxide thickness includes entering a target oxide thickness, establishing a variable in the main step of the recipe, changing the variable value until the target is reached.
- an as-implanted profile can be approximated analytically, for example, using the Pearson4 formula.
- the coefficients for the analytical formulas are extracted from profiles obtained from SLMS measurements and/or from results obtained from Monte Carlo simulation.
- Calibration of the diffused profiles is preferably accomplished by selecting the parameters in the process, estabhshing the parameter ranges, reading the STMS profiles, running the process with an initial set of parameter values, comparing the simulation to the SIMS measurements for every step, changing the parameter values in order to fit a first profile at a first Dt step where the SIMS data are available, and continuing this procedure for the subsequent profiles until the end of the process is reached.
- the electrical parameters of a long channel device include the transfer characteristics Vt L0W (threshold voltage measured at low drain voltage), Vt rac ⁇ ., (threshold voltage measured at high drain voltage), I d V d (drain current versus gate voltage for different gate voltages), I d N K (drain current versus gate voltage), body effect LV g (I sub ) (variation of the I d V K characteristics with the substrate bias), I ⁇ b (substrate current), and CN (capacitance versus voltage measurement).
- SCE Short Channel Effect
- RSCE Reverse Short Channel Effect
- CV refers to capacitance/voltage ratio, usually of a transistor gate.
- a calibration includes experimentation, computer simulation and determination of optimal parameter values for physical models by computer optimization. The experiment gives measurements as output characteristics. The simulation provides simulation results as output characteristics, and uses a large number of physical models to model physical effects to within a certain level of accuracy.
- the physical models may have one or more unknown model parameters.
- optimal values for the unknown model parameters are determined using a "fitting" procedure.
- Target values are obtained as measured characteristics of a semiconductor device. Fitting and/or optimization in the widest sense is performed so that simulation results match target characteristics.
- predictivity is a measure of the quality of matching between simulation results and a correspondin ig experiment. The quality of a calibration is determined both by accuracy of the calibration (how well the actually performed experiments match the simulation) and by predictivity of the calibration.
- a calibration methodology includes a general, systematic approach for CMOS calibration with a particular choice of calibration targets.
- a particular sequence of calibration targets, and a corresponding sequence of optimization, are particularly well suited for automatization is achieved through computer simulation models and model parameters. Choice of these models and parameters requires some experience on the part of the calibration expert, but according to the present invention, screening procedures used in the optimizer can help to eliminate less important parameters.
- an optimization algorithm is provided.
- the use of optimization is well suited for application on computationally expensive and difficult simulations.
- a screening technique enhances significance of parameters by determming which parameters are more relevant for results and for predictablility.
- the optimization algorithm combines DoE (design of experiment) techniques, which are effective in handling expensive experiments that can be handled in parallel, with an iterative system for optimization. Automatic, iterative fitting is more accurate than the results achieved with prior art manual techniques.
- calibration simulations are performed by computer and further automated by use of computer optimization.
- automated calibration provides expertise concerning semiconductor processes and device characterization and leaves the low productivity, time consuming work to the software tool.
- the technique is suitable for the calibration of a submicron MOS process although the inventive techniques are also useful for any semiconductor and submicron fabrication processes.
- Figure 1 is a flow chart showing calibration adaptable to optimization in accordance with a preferred embodiment of the invention.
- Figure 2 is a flow chart showing a sequence of operations in calibrating a complete semiconductor manufacturing process when using the calibration method in accordance with a preferred embodiment of the invention.
- Figure 3 is a flow chart showing details of a single c-dibration step according to one embodiment of the present invention.
- Figures 4A and 4B are a flow chart showing details of a process calibration performed in accordance with an embodiment of the invention for a particular semiconductor manufacturing process.
- Figure 7 is a flow chart showing parameter optimization used in accordance with the invention.
- Figure 8 is a flow chart showing details of obtaining an initial solution according with embodiment of the invention.
- Figure 9 is a flow chart showing details of a local search heuristic algorithm used in accordance with one embodiment of the invention.
- Figure 10 is a flow chart showing details of an algorithm used to optimize the best local solution in accordance with the embodiment of Figure 9.
- Figure 1 is a flow chart illustrating use of calibration that is adaptable to optimization. Measurements are taken of a desired characteristic I d V E in step 3, and these measurements are applied to define an experiment, in step 4. This experiment yields experimental results in step 5. Physical models and physical parameters, provided in step 6, are used in step 7 to perform a simulation, and this yields simulated results, in step 8. The simulated results are compared with experimental results to yield a calibration, in step 9, of the simulation. The calibration is achieved by matching simulated results, found in step 8, with the experimental results, found in step 5. Calibration of the technology is optimized by repeatedly changing physical models or physical model parameters and performing the simulation until the comparison is satisfactory.
- data desired for calibration are first defined in step 11.
- data includes, for example, data obtained between individual steps in the manufacturing process, such as SIMS and SRP for a semiconductor well structure of source/drain implants, extension and source/drain data, STMS and SRP data for the highly doped areas, TEM cross section of the gate, edge data for the gate, recipes for process steps, including ramp data, and oxide thickness data for oxidization steps.
- the data include electrical measurements on a number of fully processed structures with different gate lengths, such as long channel transistor values and short channel transistor values.
- a simulation file is set up and cahbration of the semiconductor manufacturing process begins, with calibration of the oxide thickness, in step 12.
- Monte Carlo (MC) simulation in which event the Monte Carlo simulation should be calibrated with the as-implanted profiles, in step 13.
- the as-implanted profiles as obtained from SIMS measurements or from MC simulation, may, in step 13, be approximated with analytical approximations, such as the Pearson4 formula.
- the diffused profiles are calibrated, in step 14.
- Calibration for the long channel device is then performed, in step 15, followed by calibration operations for SCE and RSCE on devices with different channel lengths, in step 16.
- Nj is calibrated on all devices, in step 17.
- I sul) is calibrated, in step 18.
- a recalibration of earlier-found values may be required, if parameters of the completed step influence the results of the earlier steps or parameters which were used in earlier steps have been calibrated in the completed step.
- the calibration of the diffused profiles may have to be repeated one or more times.
- the calibration includes determining one or more physical models to be used, in step 21.
- a simulation file is established, b step 22.
- Parameters of the physical models and initial values which significantly influence the simulation results are selected as variables for calibration, in step 23.
- a simulation of a particular experiment is performed, in step 24, and the results are compared, in step 25, with measurements from experiments, obtained in step 26.
- a determination is made whether the quality of the simulation is sufficient, in step 27. When the quality is sufficient, the values for the model parameters are accepted, in step 29, as calibrated model parameters.
- FIGS 4A and 4B are a flow chart depicting details of the calibration of Figure 2 according to one embodiment of the present invention.
- the initial data required for the process are defined in step 31. These data include SIMS for as-implanted profiles and SIMS data and possibly SRP data after the major Dt steps in the process, as well as oxide thickness values. Furthermore, a complete description of the manufacturing process as process recipe data, is required.
- the simulation and calibration of the oxide thickness is performed in step 32, according to the method shown in Figure 3,
- the initial data defined in step 31 may be used for extraction, in step 33, of parameters for an analytical description of the implantation profile, such as the Pearson4 formula. Extraction of the analytical profile parameters provides an output file containing the parameters for a formula describing the concentration of impurity as a function of the depth in the silicon.
- the next operation is the calibration of the diffused profiles, in step 34.
- the calibration of the diffused profiles for each profile individually as it appears during the process the results being used as a constraint for the calibration of subsequent profiles.
- a general optimization may be performed on all the profiles simultaneously.
- the next operation is the calibration of a long channel device, in step 35, in which the electrical data required for the device calibration are introduced.
- the electrical data used includes, for example, the transistor characteristics: Vt L0W , Vt fflGlI , I d Nd, LV g , l ⁇ J m ⁇ I aub , and CV characteristics.
- the SCE and RSCE values are calibrated, in step 36. This cahbration typically involves four to five devices with different gate lengths.
- the algorithm according to one embodiment of the present invention is achieved by simulation of l d V g curves at low and high drain voltages and optimization with the related data as targets. By way of example, where five devices are of interest, the optimization can run over ten or more different curves.
- calibration of diffused profiles (step 34) may have to be repeated, and one or more diffusion parameters may have to be modified, as determined in step 37. This results in some rather long loops of optimization for this calibration operation.
- step 37 the CV cahbration is verified and SCE and RSCE value(s) are properly calibrated, as indicated by the loop of step 38 back to step 35.
- the next operation is the calibration of l d V d for all devices, in step 39.
- the algorithm according to the invention includes using I d V d curves data as targets, with four curves typically representing each device. If five devices are examined, the optimization has to be performed with at least 20 curves. Once the calibration is done, the I d V g curves are checked and, if necessary, recalibrated, in step 40.
- the next operation includes the calibration of 1 ⁇ for all devices, in step 41
- the algorithm according to the invention includes using ⁇ curve data as targets.
- the calibration has to be performed for at least 15 curves.
- the I d V K curves and the ⁇ ⁇ curves are checked, in steps 42 and 43. If necessary, a recalibration at an earb'er step is performed, as indicated in steps 42 and 43.
- the calibrated physical model parameters set represents the result of the calibration, in step 44.
- FIG. 5 is a flow chart showing details of the process calibration using the approach of performing the cahbration of the diffused profiles as they come in the process according to one embodiment of the invention.
- This approach takes into account the history of the process.
- the calibration begins with the profile at a first Dt step for the STMS data, in step 51.
- Cahbration of diffused profiles is achieved by selecting the physical models, selecting the model parameters to be varied and selecting for each parameter a default value with a selected range, in step 52.
- the process is run in a one-dimensional (1-D) mode, in step 53.
- Output from the simulated 1-D process is compared, in step 54, to STMS profiles and, optionally, to SRP profiles for the highly doped areas, according to cahbration rules provided by the user.
- the SIMS data include, by way of example, well, channel, and extension values. If the quality of the fit is determined to be sufficient, in step 55, a calibrated simulation profile is obtained, in step 57. Otherwise, the parameters are then adjusted or changed, in step 56, and the processes of simulation (step 53) and comparison (step 54) are repeated. The process is repeated, through step 59, for each of the profiles throughout the process, with each iteration providing an calibrated profile (step 57) as well as an output in the form of a calibrated model parameter set (step 58). For each subsequent Dt step, cahbration for the next profile is (re)begun, in step 60. The calibrated profile serves as an initial condition and constraint for the calibration.
- the profiles are recalibrated until the end of the process.
- the process terminates, at step 61, after analyzing the last profile.
- the parameters are changed in order to fit the profiles, changing the parameters with the first profile as a constraint.
- the parameters used for the profile number n are not changed for the profile number n+1.
- the parameters set up for the profile n at the Dt step number j can vary at the Dt step number j+i (i>0) for the profile n, and also for the calibration of the profile n+m (rn>0).
- the calibration software tool integrates the external knowledge of calibration in order to modify a parameter at the step j+i for the profile n+m without disregarding the previous calibrations.
- the calibration software tool integrates the external knowledge of calibration in order to modify a parameter at the step j+i for the profile n+m without disregarding the previous calibrations.
- TED Transient Enhanced Diffusion
- the calibration of the long channel begins with the cahbration of a CV, V, and body effect I ⁇ l ⁇ . ⁇ simulations, in step 71.
- calibration of the CV, Vt and body effect 1, ⁇ 1 ⁇ ) simulations is achieved using a quantum mechanical model and a poly-depletion model.
- the next operation is the calibration of the I ⁇ V ⁇ values for the long channel device, in step 72.
- calibration of the I d V g simulation curve(s) is achieved by calibrating the parameters of amobility model.
- the simulated V, value is checked, in step 73.
- FIG. 7 is a flowchart showing the optimization used in accordance with the present invention.
- a plurality of values is used initially. These include the parameter(s) domain, and more specifically the parameter domam minimum value(s) set 131, the parameter domain maximum value(s) set 133, a set of parameter initial value(s) 135, desired scalar value(s) 136, and desired curve value(s) 137.
- a set of stopping criteria 138 is used in order to determine when to te ⁇ ninate optimization.
- a response is one or more measured characteristics of the process and device under consideration.
- a response can be a set of scalar value(s) 153, such as threshold voltage or saturation current.
- a response may also be curve response(s) 155, such as I d V ? or I d V d . For calibration purposes, it is desired to compare simulated response values against experimental response values.
- a delta response is a scalar value that quantifies the difference between simulated and experimental values for a given response. hen the response is a scalar value, the delta response is considered to be the difference between the simulated and the experimental values.
- the delta response is considered to be a measure of difference between the curves such as an integral of that difference, an integral of the magnitude of that difference, or the difference between both curves within a particular domain.
- several delta responses can be defined by defining different domains.
- an optimization task can be characterized as finding a set of parameter values within a certain domain. The parameter values allow minimization of a weighted sum of a set of delta responses.
- the optimization task is solved using a heuristic iterative process, such as illustrated in Figures 9 and 10.
- the heuristic iterative process is used to obtain a better parameter setting at each iteration. This heuristic process converges to a local optimum because, as implied by the heuristic process, finding a global optimum is not guaranteed.
- one or more stopping criteria from the set 138 are provided.
- the set of stopping criteria 138 may include quality of the solution, computational resources, and closeness to a local optimum.
- the set of stopping criteria 138 may include a specified maximum on the number of iterations without further improvement, which relates to the quality of the solution.
- the set of stopping criteria 138 may include a maximum number of iterations, a maximum number of simulations or a maximum time of simulation, which relate to the computing resources.
- the closeness of an intermediate solution to the local optimum value relates to the quality of the RSMs (Response Surface Models) versus the dimension of the domain of interest. In this manner, it is possible to achieve optimization to permit proper calibration, without resorting to unreasonable calculations.
- FIG 8 is a flowchart showing details of a procedure used to obtain an initial solution according to one embodiment of the present invention.
- a decision 181 is first made as to whether an initial value is available. If ah initial value is not available ("no"), a design of experime ⁇ t(s) (DoE) is created, in step 183.
- DoE defines a set of different simulations where parameters take different values within the global domain. Those simulations are run, in step 185, and a response surface model (RSM) is created for each response, in step 186.
- the RSM(s) computed in step 186 are used to resolve one or more optimum values using the RSMs, in step 187. The optimum values are found within the global domain using the RSM(s).
- step 188 This is followed by running a simulation using the optimum value(s), in step 188. From all parameter settings computed until that point, the best parameter value(s) is selected, in step 189, and this value(s) is used to provide an initial solution, in step 190. If an initial value is determined to be available ("yes") in step 181, that initial value is used to provide an initial solution, in step 190. The initial solution 1 0 is provided to initiate a local search heuristic, in step 191.
- FIG 9 is a flowchart showing details of a local search heuristic algorithm used in accordance with an embodiment of the present invention.
- An initial value provided in step 190 in Figure 8, must be available.
- the current best available solution is selected, in step 201, using appropriate criteria.
- a DoE is designed or created around the best available solution, in step 202.
- the DoE is created using a domain of interest, which initially can be within a predetermined value of the global domain. By way of example, the domain of interest can be within 10 percent of the center of the global domain.
- the domain of interest can then be modified in accordance with the perceived quality of the RSM(s).
- the simulations generated by the DoE are run, in step 203, and a response surface module (RSM) is created for each response, in step 204.
- the RSM(s) is used to determine optimum parameter values within the domain of interest, in step 205.
- a simulation is run, in step 208, which provides a best local solution, in step 209.
- the best local solution, provided in step 209 is compared with the best available solution, provided in step 201. If, as is likely, the best local solution is better than the best available solution, the best local solution is improved using the RSM(s), in step 211.
- the parameter domain of interest is updated, in step 212, according to the quality of the RSM(s).
- the updated parameter domain of interest is evaluated, in step 213 , to determine if any of the set of stopping criteria 138 ( Figure 7) has been activated. If the answer to the query in step 213 is "yes”, the procedure is finished, in step 214. If the answer to the query in step 213 is "no”, the procedure is repeated, beginning at step 210-
- Figure 10 is a flow chart showing details of an algorithm used to optimize the best local solution in accordance with one embodiment of the present invention.
- the optimum parameter value(s) (step 208 in Figure 9) is used to select a best local solution, in step 209 ( Figure 9). Optimization of the best local solution is an iterative process.
- the parameter domain of interest is expanded, in step 232, and is used to determine an optimum value within the new parameter domain of interest using the RSM(s), in step 233.
- a simulation is run using the new optimum value(s) for the expanded parameter domain, in step 234.
- the simulation result(s) is compared to the current optimum value, in steps 235 and 236.
- step 209 If the new optimum value is better ("yes"), a new best local solution is provided, in step 209, the parameter domain of interest is expanded, in step 232, and the procedure is repeated. If the answer to the query in step 236 is "no", the parameter domain is (re)defined as the original parameter domain, in step 237 (optional), and the current optimum value is used to provide an improved best local solution, in step 241.
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Abstract
A methodology for calibration of TCAD simulations includes determining a sequence in which values for parameters of physical models are to be determined from comparison of simulation results and experimental measurements. A particular sequence of individual calibration steps is necessary to determine calibration parameters from the measurements. Automatization of the individual calibration steps by computer optimization increases the efficiency of the method.
Description
CALIBRATION SOFTWARE TOOL AND METHOD
Field of the Invention
This invention relates to the simulation of design processes for semiconductor processing and technology, and more particularly to calibration of parameters to be used in the numerical modeling of semiconductor device behavior and semiconductor fabrication processes and technologies.
Background of the Invention Since the early 1960's, technology simulation has played a crucial role in the evolution of semiconductor integrated circuit (IC) technology. The initial simulation of fundamental operating principles of key structures, for example, bipolar andMOS transistors, has provided critical insight into the phenomena associated with the scaling of devices and has led to the development of large scale integration. At present, technology simulation is best vi ewed within the framework of an overall
IC Electronic Computer-Aided Design (ECAD) system. Starting from the basic fabrication input, - the individual process "recipes" and data to generate lithographic masks and layouts « these systems attempt to model a complete circuit from the physical structure of its components through to the estimation of overall system performance. As part of the overall ECAD framework, a Technology Computer-Aided Design (TCAD) system's main components are typically a process simulator and a device simulator, with appropriate interfaces that mimic experimental setups as closely as possible.
The process simulator tasks are the simulation of semiconductor device fabrication processes, which may include substrate formation, ion implantation, thermal diffusion, thermal oxidation, depositing of materials, lithography operations, etching of materials, etching of trenches and vias, surface passivation, packaging, or other similar processes. The principal outputs of a process simulator are complete structural descriptions of structures (geometry, material definitions, impurity profiles, contact placement).
The device simulator's task is to analyze the electrical behavior of the most basic of IC building blocks, the individual transistors or even small sub-circuits, at a very fundamental level. As such, the simulator uses as inputs the individual structural definitions. The device simulator's principal outputs are terminal currents and voltages.
In principle, given recipes and a set of masks, the TCAD tools themselves can build virtual device structures and then predict performance of entire circuits to a very high
degree of accuracy. Modern process and device simulators are capable of rapid characterization, on the order of many structures per hour, as compared to experiments where one is sometimes fortunate to obtain a new structure within a period of a couple of months. At present, TCAD is extensively used during all stages of semiconductor devices and systems manufacturing, from the design phase to process control, when the technology has matured into mass production. Examples of this are discussed by R. W. Dutton and M.R. Pinto, "The use of computer aids in IC techology evolution", Proc. IEEE, vol.74, no. 12 (December 1986) pp. 1730-1740, and by H. Hosack, "Process modeling and process control needs for process synthesis of ULSI devices", (in) ULSI Science and Technoloev (1995). As a result of its application, TCAD offers enormous acceleration of the prototyping process for devices, integrated circuits and systems, because expensive manufacturing and metrology can be reduced to a miriimum, or even become superfluous. Existing technologies, which are accurately represented in a TCAD environment, can be extrapolated into regions of more aggressively scaled-down design rules.
Successful TCAD modeling depends on several factors: realistic physical models, adequate numerical methods for the analysis of the physical model, and robust and reliable software.
The physical models that are used are typically empirical models that are suitable for numerical simulation on a computer and that adequately describe the physical effects which are relevant for the physical modeling of the semiconductor process or device. Each physical model typically has a number of parameters, which do not necessarily directly relate to fundamental physical parameters, but have to be determined from experiments- Model parameters in general need to be determined for each typical family of processes, if quantitatively correct results are expected. The process of deteπτιining these parameters is called calibration.
Calibration poses several difficulties: In the complete process and device simulation of a semiconductor technology, a large number of physical models with model parameters are used. It is quite difficult, however, to determine these parameters in a straightforward way from measurements, because only limited possibilities exist for experimental measurements. From the available experimental measurements, the model parameters can not be viewed as independent. It is therefore essential to establish a sequence in individual steps within a calibration can be performed for a given semiconductor technology. The
particular sequence of the individual steps depends on the semiconductor technology for which the simulation is to be calibrated. Another difficulty of cahbration is the large amounts of time and manpower effort that are necessary to perform a calibration, because no established methodologies of calibration exist and the procedure requires a large amount of manual work. In the prior art, a cahbration team would typically spend four to six months to calibrate a semiconductor process. This is the average time one should expect for two engineers involved in this work. Much of this time is spent in changing parameters and resimulating a response. This approach is inefficient, but is commonly employed.
Furthermore, increasing of the number of people on a calibration project does not directly solve this problem, because calibration of different parameters is a sequential process, and these calibrations cannot be performed independently. In addition, the cost of a large calibration team can be excessive and fluctuation of the number of projects over the time creates logistical problems. A new technical worker performing calibrations typically requires six to twelve months of training. Despite this, semiconductor manufacturers require more and more calibration projects to be performed within a short time. If a semiconductor company cannot rely on calibrated software tools for better predictability, the company should may reconsider its interest in using such software tools.
It is desirable to change the work so that the calibration team is able to focus primarily on understanding of the process, on the most important steps for calibration, and on the physics and the models used in simulation. Therefore, once a set of calibrated parameters becomes available, the remaining work focuses on understanding whether this set is meaningful.
Methodologies to automatize calibration along with software tools to efficiently perform the calibration reduce the time required to calibrate a design technology in an efficient manner and make the calibration less dependent on particular experts. By way of example it would be desirable to provide a set of calibrated parameters delivered to the customer in two weeks or less.
In particular, it is desirable to provide a technique which is suitable for the calibration of a very deep submicron MOS processes, since these activities represent a major market for TCAD. The approach applies also to other semiconductor technologies.
Summary of the Invention
According to the present invention, simulation is used to provide an indication of many of those characteristics at a lower cost than the cost of performing an actual experiment. This is especially important if a large number of experiments (variation of sseveral semiconductor process or design parameters) is necessary in order to improve a semiconductor device.
In accordance with the invention, a semiconductor technology simulation is optimized by defining a measurable target, performing experimental measurements, and applying a calibration algorithm to determine a set of calibrated parameters for the models in the semiconductor technology simulation using the experimental measurements as target. In accordance with the invention, a methodology for calibrating semiconductor processes and devices includes providing a required set of data for the semiconductor processes and devices, establisliing a simulation file, simulating and calibrating at least one oxide thickness, calibrating one-dimensional, as-implanted concentration profiles, simulating and calibrating diffused concentration profiles, and simulating and calibrating the electrical characteristics of the devices.
Values that can be measured during the manufacturing process are used as target values, including implanted concentration profiles and diffused concentration profiles after particular steps. In one embodiment, the desired experimental data includes SIMS measurements for the as-implanted profiles, major Dt (diffusion time) steps in the process, and at the end of the process, sheet resistance for CMOS wells, extension and source/drain, SRP for the highly doped areas, oxide thickness, TEM cross section of the gate and of the edge of the gate, and recipes for process steps including recipes used in forming concentration ramps. "SIMS" refers to secondary ion mass spectrometry and the results of SIMS are STMS profiles. "SRP" refers to spreading resistance, and "TEM" refers to transmission electron microscopy.
The establishment of the simulation file includes determining physical models and choosing model parameters of the physical model as parameters to be varied. The calibration of the initial oxide thickness includes entering a target oxide thickness, establishing a variable in the main step of the recipe, changing the variable value until the target is reached.
For efficiency, an as-implanted profile can be approximated analytically, for example, using the Pearson4 formula. The coefficients for the analytical formulas are
extracted from profiles obtained from SLMS measurements and/or from results obtained from Monte Carlo simulation.
Calibration of the diffused profiles is preferably accomplished by selecting the parameters in the process, estabhshing the parameter ranges, reading the STMS profiles, running the process with an initial set of parameter values, comparing the simulation to the SIMS measurements for every step, changing the parameter values in order to fit a first profile at a first Dt step where the SIMS data are available, and continuing this procedure for the subsequent profiles until the end of the process is reached.
According to the present invention, various characteristics of semiconductor devices are used for calibration of a technology. According to one embodiment, the electrical parameters of a long channel device include the transfer characteristics VtL0W (threshold voltage measured at low drain voltage), Vtracι., (threshold voltage measured at high drain voltage), IdVd (drain current versus gate voltage for different gate voltages), IdNK (drain current versus gate voltage), body effect LVg(Isub) (variation of the IdVK characteristics with the substrate bias), Iωb (substrate current), and CN (capacitance versus voltage measurement). In addition, SCE (Short Channel Effect) and RSCE (Reverse Short Channel Effect) values are calibrated for devices of different lengths by simulating IdNs curves at low and high drain voltages and by optimization with related data as targets, calibrating IdNd by using IdNd curve data as targets; and calibrating 1^ by using Isllb curve data as targets and optimizing the results. "CV" refers to capacitance/voltage ratio, usually of a transistor gate. According to the present invention, a calibration includes experimentation, computer simulation and determination of optimal parameter values for physical models by computer optimization. The experiment gives measurements as output characteristics. The simulation provides simulation results as output characteristics, and uses a large number of physical models to model physical effects to within a certain level of accuracy. The physical models may have one or more unknown model parameters. In calibration, optimal values for the unknown model parameters are determined using a "fitting" procedure. Target values are obtained as measured characteristics of a semiconductor device. Fitting and/or optimization in the widest sense is performed so that simulation results match target characteristics. Once a calibration has been performed, experiments with varying process andor design parameter values are made economically and with good predictivity by simulation instead of by actual experiment. According to the present invention, predictivity is a measure of the quality of matching between simulation results and a correspondin ig
experiment. The quality of a calibration is determined both by accuracy of the calibration (how well the actually performed experiments match the simulation) and by predictivity of the calibration.
According to a particular aspect of the present invention, a calibration methodology includes a general, systematic approach for CMOS calibration with a particular choice of calibration targets. A particular sequence of calibration targets, and a corresponding sequence of optimization, are particularly well suited for automatization is achieved through computer simulation models and model parameters. Choice of these models and parameters requires some experience on the part of the calibration expert, but according to the present invention, screening procedures used in the optimizer can help to eliminate less important parameters.
According to another particular aspect of the present invention, an optimization algorithm is provided. The use of optimization is well suited for application on computationally expensive and difficult simulations. A screening technique enhances significance of parameters by determming which parameters are more relevant for results and for predictablility. The optimization algorithm combines DoE (design of experiment) techniques, which are effective in handling expensive experiments that can be handled in parallel, with an iterative system for optimization. Automatic, iterative fitting is more accurate than the results achieved with prior art manual techniques. In accordance with the present invention, calibration simulations are performed by computer and further automated by use of computer optimization. In accordance with the invention, automated calibration provides expertise concerning semiconductor processes and device characterization and leaves the low productivity, time consuming work to the software tool. The technique is suitable for the calibration of a submicron MOS process although the inventive techniques are also useful for any semiconductor and submicron fabrication processes.
According to another particular aspect of the present invention, by using an optimization technique, relatively expensive cahbration methodology is facilitated and becomes more affordable. The calibration according to the present invention is much less tedious than manual calibration, and is faster and cheaper because it requires less human interaction.
Brief Description of the Drawings
Figure 1 is a flow chart showing calibration adaptable to optimization in accordance with a preferred embodiment of the invention.
Figure 2 is a flow chart showing a sequence of operations in calibrating a complete semiconductor manufacturing process when using the calibration method in accordance with a preferred embodiment of the invention.
Figure 3 is a flow chart showing details of a single c-dibration step according to one embodiment of the present invention.
Figures 4A and 4B are a flow chart showing details of a process calibration performed in accordance with an embodiment of the invention for a particular semiconductor manufacturing process.
Figure 5 is a flow chart showing details of the calibration of diffused profiles according to one embodiment of the invention- Figure 6 is a flow chart showing details of calibration of the long channel device simulation according to one embodiment of the invention.
Figure 7 is a flow chart showing parameter optimization used in accordance with the invention.
Figure 8 is a flow chart showing details of obtaining an initial solution according with embodiment of the invention. Figure 9 is a flow chart showing details of a local search heuristic algorithm used in accordance with one embodiment of the invention.
Figure 10 is a flow chart showing details of an algorithm used to optimize the best local solution in accordance with the embodiment of Figure 9.
Detailed Description of the Preferred Embodiments
Figure 1 is a flow chart illustrating use of calibration that is adaptable to optimization. Measurements are taken of a desired characteristic IdVE in step 3, and these measurements are applied to define an experiment, in step 4. This experiment yields experimental results in step 5. Physical models and physical parameters, provided in step 6, are used in step 7 to perform a simulation, and this yields simulated results, in step 8. The simulated results are compared with experimental results to yield a calibration, in step 9, of the simulation. The calibration is achieved by matching simulated results, found in step 8, with the experimental results, found in step 5. Calibration of the technology is optimized by repeatedly changing physical models or physical model parameters and performing the simulation until the comparison is satisfactory.
Referring to Figure 2, there is shown a flow chart of the sequence of operations in calibrating a submicron MOS semiconductor fabrication process according to one embodiment of the present invention. Referring to Figure 2, data desired for calibration are first defined in step 11. Such data includes, for example, data obtained between individual steps in the manufacturing process, such as SIMS and SRP for a semiconductor well structure of source/drain implants, extension and source/drain data, STMS and SRP data for the highly doped areas, TEM cross section of the gate, edge data for the gate, recipes for process steps, including ramp data, and oxide thickness data for oxidization steps. Furthermore, the data include electrical measurements on a number of fully processed structures with different gate lengths, such as long channel transistor values and short channel transistor values. Once these data have been collected, a simulation file is set up and cahbration of the semiconductor manufacturing process begins, with calibration of the oxide thickness, in step 12. For the implanted profiles, it may be advantageous to use Monte Carlo (MC) simulation, in which event the Monte Carlo simulation should be calibrated with the as-implanted profiles, in step 13. Thereafter, the as-implanted profiles, as obtained from SIMS measurements or from MC simulation, may, in step 13, be approximated with analytical approximations, such as the Pearson4 formula. Next, the diffused profiles are calibrated, in step 14. Calibration for the long channel device is then performed, in step 15, followed by calibration operations for SCE and RSCE on devices with different channel lengths, in step 16. Next Nj is calibrated on all devices, in step 17. Finally Isul) is calibrated, in step 18. At some points in the overall calibration process, a recalibration of earlier-found values may be required, if parameters of the completed step
influence the results of the earlier steps or parameters which were used in earlier steps have been calibrated in the completed step. By way of example, in some cases it may be necessary to modify diffusion parameters to perform the calibration of the SCE and RSCE values. As a consequence, the calibration of the diffused profiles may have to be repeated one or more times.
Referring to Figure 3, there is shown a flow chart with details of an individual calibration step according to one embodiment of the invention. The calibration includes determining one or more physical models to be used, in step 21. A simulation file is established, b step 22. Parameters of the physical models and initial values which significantly influence the simulation results are selected as variables for calibration, in step 23. A simulation of a particular experiment is performed, in step 24, and the results are compared, in step 25, with measurements from experiments, obtained in step 26. A determination is made whether the quality of the simulation is sufficient, in step 27. When the quality is sufficient, the values for the model parameters are accepted, in step 29, as calibrated model parameters. If the quality is not sufficient, the values are varied, in step 28, and steps 24, 25, 26 and 27 are reperformed until the quality is sufficient By way of example, the oxide thickness is calibrated in this way, choosing parameters of the oxidation models as variables and the measured oxide thickness as a target for the simulated oxide thickness. Figures 4A and 4B are a flow chart depicting details of the calibration of Figure 2 according to one embodiment of the present invention. The initial data required for the process are defined in step 31. These data include SIMS for as-implanted profiles and SIMS data and possibly SRP data after the major Dt steps in the process, as well as oxide thickness values. Furthermore, a complete description of the manufacturing process as process recipe data, is required. The simulation and calibration of the oxide thickness is performed in step 32, according to the method shown in Figure 3, The initial data defined in step 31 may be used for extraction, in step 33, of parameters for an analytical description of the implantation profile, such as the Pearson4 formula. Extraction of the analytical profile parameters provides an output file containing the parameters for a formula describing the concentration of impurity as a function of the depth in the silicon. The next operation is the calibration of the diffused profiles, in step 34. According to the present invention, the calibration of the diffused profiles for each profile individually as it appears during the process, the results being used as a constraint for the calibration of subsequent profiles.
Alternatively, a general optimization may be performed on all the profiles simultaneously. The next operation is the calibration of a long channel device, in step 35, in which the electrical data required for the device calibration are introduced. The electrical data used includes, for example, the transistor characteristics: VtL0W, VtfflGlI, IdNd, LVg, l^ Jm ^ Iaub, and CV characteristics. The SCE and RSCE values are calibrated, in step 36. This cahbration typically involves four to five devices with different gate lengths. The algorithm according to one embodiment of the present invention is achieved by simulation of ldVg curves at low and high drain voltages and optimization with the related data as targets. By way of example, where five devices are of interest, the optimization can run over ten or more different curves. After each calibration operation for the SCE and RSCE, calibration of diffused profiles (step 34) may have to be repeated, and one or more diffusion parameters may have to be modified, as determined in step 37. This results in some rather long loops of optimization for this calibration operation.
If the diffusion parameters need not be modified, in step 37, the CV cahbration is verified and SCE and RSCE value(s) are properly calibrated, as indicated by the loop of step 38 back to step 35. The next operation is the calibration of ldVd for all devices, in step 39. The algorithm according to the invention includes using IdVd curves data as targets, with four curves typically representing each device. If five devices are examined, the optimization has to be performed with at least 20 curves. Once the calibration is done, the IdVg curves are checked and, if necessary, recalibrated, in step 40. The next operation includes the calibration of 1^ for all devices, in step 41 The algorithm according to the invention includes using ^ curve data as targets. Usually, three curves represent each device. Where five devices are of interest, the optimization has to be performed for at least 15 curves. Once the calibration is done, the IdVK curves and the ϊ^ ά curves are checked, in steps 42 and 43. If necessary, a recalibration at an earb'er step is performed, as indicated in steps 42 and 43. Once the algorithm passes all checks in steps 37, 38, 40, 42 and 43, the calibrated physical model parameters set represents the result of the calibration, in step 44.
Figure 5 is a flow chart showing details of the process calibration using the approach of performing the cahbration of the diffused profiles as they come in the process according to one embodiment of the invention. This approach takes into account the history of the process. The calibration begins with the profile at a first Dt step for the STMS data, in step 51. Cahbration of diffused profiles is achieved by selecting the physical models, selecting the model parameters to be varied and selecting for each parameter a default value with a
selected range, in step 52. The process is run in a one-dimensional (1-D) mode, in step 53. Output from the simulated 1-D process is compared, in step 54, to STMS profiles and, optionally, to SRP profiles for the highly doped areas, according to cahbration rules provided by the user. The SIMS data include, by way of example, well, channel, and extension values. If the quality of the fit is determined to be sufficient, in step 55, a calibrated simulation profile is obtained, in step 57. Otherwise, the parameters are then adjusted or changed, in step 56, and the processes of simulation (step 53) and comparison (step 54) are repeated. The process is repeated, through step 59, for each of the profiles throughout the process, with each iteration providing an calibrated profile (step 57) as well as an output in the form of a calibrated model parameter set (step 58). For each subsequent Dt step, cahbration for the next profile is (re)begun, in step 60. The calibrated profile serves as an initial condition and constraint for the calibration. In this manner, the profiles are recalibrated until the end of the process. The process terminates, at step 61, after analyzing the last profile. According to one embodiment of the present invention, the parameters are changed in order to fit the profiles, changing the parameters with the first profile as a constraint. According to one embodiment of the invention, the parameters used for the profile number n are not changed for the profile number n+1. In a second technique, the parameters set up for the profile n at the Dt step number j, can vary at the Dt step number j+i (i>0) for the profile n, and also for the calibration of the profile n+m (rn>0). In this case, the calibration software tool integrates the external knowledge of calibration in order to modify a parameter at the step j+i for the profile n+m without disregarding the previous calibrations. By way of example, in order to fit a profile it may be preferable to change the coupling ratio of the point-defect dopant pairs, requiring a change of the interstitial generation factor of a previous implantation step, in order to maintain the same TED (Transient Enhanced Diffusion) effect.
Referring to Figure 6, there is shown a flow chart with details of calibration the long channel according to one embodiment of the present invention. Once the required data are available, the calibration of the long channel begins with the cahbration of a CV, V, and body effect I^lβ.^ simulations, in step 71. By way of example, calibration of the CV, Vt and body effect 1,^ 1^) simulations is achieved using a quantum mechanical model and a poly-depletion model. The next operation is the calibration of the I^V^ values for the long channel device, in step 72. By way of example, calibration of the IdVg simulation curve(s)
is achieved by calibrating the parameters of amobility model. After the calibration, the simulated V, value is checked, in step 73. If the match between simulated and measured Vt is not satisfactory, the system returns to step 71 to (re)calibrate V,. If the simulated Vt is acceptable, in step 73, the calibration of LVd is completed, in step 74. Figure 7 is a flowchart showing the optimization used in accordance with the present invention. A plurality of values is used initially. These include the parameter(s) domain, and more specifically the parameter domam minimum value(s) set 131, the parameter domain maximum value(s) set 133, a set of parameter initial value(s) 135, desired scalar value(s) 136, and desired curve value(s) 137. In addition, a set of stopping criteria 138 is used in order to determine when to teπninate optimization. These values are provided to an iterative optimization software tool 141. The iterative optimization tool 141 provides outputs, which consist of a set of best parameter value(s) 151, a set of best scalar response(s) 153, and a set of best curve response(s) 155. The optimization allows a determination of one or more parameter settings that satisfies specified calibration requests. In this context, a calibration request would include restrictions within the parameter domain and a desired characteristic of the response(s) under consideration. The parameters are scalar variables, which modify a device manufacturer process flow or modify the behavior of the device. Parameters are finite values defined within a particular domain. Consequently, the set of best parameter value(s) 151 must fit within a set of domains defined by the parameter domain minimum value(s) 131 and the parameter domain maximum value(s) 133. A response is one or more measured characteristics of the process and device under consideration. A response can be a set of scalar value(s) 153, such as threshold voltage or saturation current. A response may also be curve response(s) 155, such as IdV? or IdVd. For calibration purposes, it is desired to compare simulated response values against experimental response values.
In establishing the solutions, a delta response is a scalar value that quantifies the difference between simulated and experimental values for a given response. hen the response is a scalar value, the delta response is considered to be the difference between the simulated and the experimental values. When the response is a curve, the delta response is considered to be a measure of difference between the curves such as an integral of that difference, an integral of the magnitude of that difference, or the difference between both curves within a particular domain. Particularly for the same curve, several delta responses can be defined by defining different domains.
In the context of calibration, an optimization task can be characterized as finding a set of parameter values within a certain domain. The parameter values allow minimization of a weighted sum of a set of delta responses. The optimization task is solved using a heuristic iterative process, such as illustrated in Figures 9 and 10. The heuristic iterative process is used to obtain a better parameter setting at each iteration. This heuristic process converges to a local optimum because, as implied by the heuristic process, finding a global optimum is not guaranteed. In order to terminate the iterative process, one or more stopping criteria from the set 138 are provided. The set of stopping criteria 138 may include quality of the solution, computational resources, and closeness to a local optimum. In addition, the set of stopping criteria 138 may include a specified maximum on the number of iterations without further improvement, which relates to the quality of the solution. In addition, the set of stopping criteria 138 may include a maximum number of iterations, a maximum number of simulations or a maximum time of simulation, which relate to the computing resources. The closeness of an intermediate solution to the local optimum value relates to the quality of the RSMs (Response Surface Models) versus the dimension of the domain of interest. In this manner, it is possible to achieve optimization to permit proper calibration, without resorting to unreasonable calculations.
Figure 8 is a flowchart showing details of a procedure used to obtain an initial solution according to one embodiment of the present invention. A decision 181 is first made as to whether an initial value is available. If ah initial value is not available ("no"), a design of experimeπt(s) (DoE) is created, in step 183. The DoE defines a set of different simulations where parameters take different values within the global domain. Those simulations are run, in step 185, and a response surface model (RSM) is created for each response, in step 186. The RSM(s) computed in step 186 are used to resolve one or more optimum values using the RSMs, in step 187. The optimum values are found within the global domain using the RSM(s). This is followed by running a simulation using the optimum value(s), in step 188. From all parameter settings computed until that point, the best parameter value(s) is selected, in step 189, and this value(s) is used to provide an initial solution, in step 190. If an initial value is determined to be available ("yes") in step 181, that initial value is used to provide an initial solution, in step 190. The initial solution 1 0 is provided to initiate a local search heuristic, in step 191.
Figure 9 is a flowchart showing details of a local search heuristic algorithm used in accordance with an embodiment of the present invention. An initial value, provided in step
190 in Figure 8, must be available. At the beginning of each iteration, the current best available solution is selected, in step 201, using appropriate criteria. A DoE is designed or created around the best available solution, in step 202. The DoE is created using a domain of interest, which initially can be within a predetermined value of the global domain. By way of example, the domain of interest can be within 10 percent of the center of the global domain. The domain of interest can then be modified in accordance with the perceived quality of the RSM(s). The simulations generated by the DoE are run, in step 203, and a response surface module (RSM) is created for each response, in step 204. The RSM(s) is used to determine optimum parameter values within the domain of interest, in step 205. A simulation is run, in step 208, which provides a best local solution, in step 209. In step 210, the best local solution, provided in step 209, is compared with the best available solution, provided in step 201. If, as is likely, the best local solution is better than the best available solution, the best local solution is improved using the RSM(s), in step 211. The parameter domain of interest is updated, in step 212, according to the quality of the RSM(s). The updated parameter domain of interest is evaluated, in step 213 , to determine if any of the set of stopping criteria 138 (Figure 7) has been activated. If the answer to the query in step 213 is "yes", the procedure is finished, in step 214. If the answer to the query in step 213 is "no", the procedure is repeated, beginning at step 210-
Figure 10 is a flow chart showing details of an algorithm used to optimize the best local solution in accordance with one embodiment of the present invention. The optimum parameter value(s) (step 208 in Figure 9) is used to select a best local solution, in step 209 (Figure 9). Optimization of the best local solution is an iterative process. At each iteration, the parameter domain of interest is expanded, in step 232, and is used to determine an optimum value within the new parameter domain of interest using the RSM(s), in step 233. A simulation is run using the new optimum value(s) for the expanded parameter domain, in step 234. The simulation result(s) is compared to the current optimum value, in steps 235 and 236. If the new optimum value is better ("yes"), a new best local solution is provided, in step 209, the parameter domain of interest is expanded, in step 232, and the procedure is repeated. If the answer to the query in step 236 is "no", the parameter domain is (re)defined as the original parameter domain, in step 237 (optional), and the current optimum value is used to provide an improved best local solution, in step 241.
The above description is of a particular embodiment of the invention. According to one embodiment of the present invention, key parameters are selected, which are then used
to perform a match over a large number of data curves. The algorithm according to the invention has been optimized in order to avoid infinite loops and illogical results.
Claims
1. A method of calibration of one or more parameters for a semiconductor process, the method comprising: providing data to be used to perform a calibration for a semiconductor process; providing a simulation file on a computer for the process; providing data for at least one concentration profile for at least one implanted dopant for the process; calibrating a concentration profile for at least one diffused dopant for the process; providing data for at least one electrical characteristic for the process; calibrating at least one long channel semiconductor device value, using the at least one electrical characteristic; calibrating at least one of a short channel effect value and a reverse short channel effect value for the process; calibrating at least one curve of a drain current Id versus a drain voltage Na for the process; and calibrating at least one substrate current value Isub for the process.
2. The method of claim 1, further comprising providing said simulation file by a process comprising: providing an initial calibration; providing a value of the initial calibration as a target value; providing at least one variable parameter in a recipe for said process; and changing a value of the variable parameter until a selected value for said process is equal to the target value.
3. The method of claim 1, further comprising providing said simulation file by a process comprising: calibrating an initial oxide thickness for said process, and providing an oxide thickness value as a target value; providing at least one variable parameter in a recipe for said process; and changing a value of the variable parameter until a selected value for said process is equal to the target value.
4. The method of claim 1, further comprising calibrating said diffused dopant profile by a calibration process comprising: selecting at least one parameter for said process and providing a parameter range for the at least one selected parameter; and simulating said process using a default value for the at least one selected parameter that lies in the parameter range.
5. The method of claim 1, further comprising providing data for said implanted dopant profile using SIMS data, sheet resistance for a selected well, extension, and source/drain, and SPR data.
6. The method of claim 1, further comprising providing data at least one oxide thickness value for said process.
7. The method of claim 1, further comprising using at least one of TEM cross section for a gate and for edge of a gate for said calibration of said profile.
8. The method of claim 1, further comprising providing, as said data for said electrical characteristic, at least one of data for Ntτχ>w, NtHiGH, IdNd, IdNg, body effect, substrate current Isub and CN.
9. The method of claim 1, further comprising calibrating said diffused dopant profile by a calibration process comprising: providing a SIMS profile; comparing at least one simulation value with a value obtained from the SIMS profile; and changing a value of at least one parameter in order to obtain agreement of the at least one simulation value with the SIMS profile value.
10. The method of claim 1, further comprising calibrating said at least one of said short channel effect and said reverse short channel effect.
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CN101739469B (en) * | 2008-11-06 | 2011-08-24 | 上海华虹Nec电子有限公司 | Method for extracting parameters of stress effect model of MOS transistors |
CN102184879A (en) * | 2011-05-03 | 2011-09-14 | 中国科学院上海微系统与信息技术研究所 | TCAD simulation calibration method of SOI field effect transistor |
US9262575B2 (en) | 2014-02-10 | 2016-02-16 | International Business Machines Corporation | Circuit-level abstraction of multigate devices using two-dimensional technology computer aided design |
-
2001
- 2001-01-18 WO PCT/EP2001/000549 patent/WO2001057740A2/en active Application Filing
Non-Patent Citations (3)
Title |
---|
DAS A ET AL: "An advanced MOSFET design approach and a calibration methodology using inverse modeling that accurately predicts device characteristics" ELECTRON DEVICES MEETING, 1997. TECHNICAL DIGEST., INTERNATIONAL WASHINGTON, DC, USA 7-10 DEC. 1997, NEW YORK, NY, USA,IEEE, US, 7 December 1997 (1997-12-07), pages 687-690, XP010265598 ISBN: 0-7803-4100-7 * |
HEEMYONG PARK ET AL: "Systematic calibration of process simulators for predictive TCAD" SIMULATION OF SEMICONDUCTOR PROCESSES AND DEVICES, 1997. SISPAD '97., 1997 INTERNATIONAL CONFERENCE ON CAMBRIDGE, MA, USA 8-10 SEPT. 1997, NEW YORK, NY, USA,IEEE, US, 8 September 1997 (1997-09-08), pages 273-275, XP010245325 ISBN: 0-7803-3775-1 * |
LE CARVAL G ET AL: "Methodology for predictive calibration of TCAD simulators" SIMULATION OF SEMICONDUCTOR PROCESSES AND DEVICES, 1997. SISPAD '97., 1997 INTERNATIONAL CONFERENCE ON CAMBRIDGE, MA, USA 8-10 SEPT. 1997, NEW YORK, NY, USA,IEEE, US, 8 September 1997 (1997-09-08), pages 177-180, XP010245301 ISBN: 0-7803-3775-1 * |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101739469B (en) * | 2008-11-06 | 2011-08-24 | 上海华虹Nec电子有限公司 | Method for extracting parameters of stress effect model of MOS transistors |
CN102184879A (en) * | 2011-05-03 | 2011-09-14 | 中国科学院上海微系统与信息技术研究所 | TCAD simulation calibration method of SOI field effect transistor |
US9262575B2 (en) | 2014-02-10 | 2016-02-16 | International Business Machines Corporation | Circuit-level abstraction of multigate devices using two-dimensional technology computer aided design |
US9607684B2 (en) | 2014-02-10 | 2017-03-28 | International Business Machines Corporation | Circuit-level abstraction of multigate devices using two-dimensional technology computer aided design |
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