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WO2001052075A1 - Simplified packet discard in atm switch - Google Patents

Simplified packet discard in atm switch Download PDF

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Publication number
WO2001052075A1
WO2001052075A1 PCT/US2001/000723 US0100723W WO0152075A1 WO 2001052075 A1 WO2001052075 A1 WO 2001052075A1 US 0100723 W US0100723 W US 0100723W WO 0152075 A1 WO0152075 A1 WO 0152075A1
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WO
WIPO (PCT)
Prior art keywords
buffer
cells
cell
packet discard
atm
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/US2001/000723
Other languages
French (fr)
Inventor
Eugene L. Parrella
Subhash C. Roy
Ian Ramsden
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Transwitch Corp
Original Assignee
Transwitch Corp
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Filing date
Publication date
Application filed by Transwitch Corp filed Critical Transwitch Corp
Publication of WO2001052075A1 publication Critical patent/WO2001052075A1/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04QSELECTING
    • H04Q11/00Selecting arrangements for multiplex systems
    • H04Q11/04Selecting arrangements for multiplex systems for time-division multiplexing
    • H04Q11/0428Integrated services digital network, i.e. systems for transmission of different types of digitised signals, e.g. speech, data, telecentral, television signals
    • H04Q11/0478Provisions for broadband connections
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00Packet switching elements
    • H04L49/50Overload detection or protection within a single switching element
    • H04L49/505Corrective measures
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/54Store-and-forward switching systems 
    • H04L12/56Packet switching systems
    • H04L12/5601Transfer mode dependent, e.g. ATM
    • H04L2012/5638Services, e.g. multimedia, GOS, QOS
    • H04L2012/5646Cell characteristics, e.g. loss, delay, jitter, sequence integrity
    • H04L2012/5647Cell loss
    • H04L2012/5648Packet discarding, e.g. EPD, PTD
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/54Store-and-forward switching systems 
    • H04L12/56Packet switching systems
    • H04L12/5601Transfer mode dependent, e.g. ATM
    • H04L2012/5678Traffic aspects, e.g. arbitration, load balancing, smoothing, buffer management
    • H04L2012/5681Buffer or queue management
    • H04L2012/5682Threshold; Watermark
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00Packet switching elements
    • H04L49/20Support for services
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00Packet switching elements
    • H04L49/30Peripheral units, e.g. input or output ports

Definitions

  • the invention relates to Asynchronous Transfer Mode (ATM) telecommunications switching. More particularly, the invention relates to a method and apparatus for discarding cells representing packets and portions of packets in order to enhance the efficiency of packet traffic over the ATM network.
  • ATM Asynchronous Transfer Mode
  • the first commercial digital voice communications system was installed in 1962 in Chicago, Illinois.
  • the system was called "Tl” and was based on the time division multiplexing (TDM) of twenty-four telephone calls on two twisted wire pairs.
  • the digital bit rate of the Tl system was 1.544 Mbit/sec ( ⁇ 200 bps) , which was, in the nineteen sixties, about the highest data rate that could be supported by a twisted wire pair for a distance of approximately one mile.
  • the cables carrying the Tl signals were buried underground and were accessible via manholes, which were, at that time in Chicago, spaced approximately one mile (actually, 6000 ft.) apart. Thus, analog amplifiers with digital repeaters were conveniently located at intervals of approximately one mile.
  • the Tl system is still widely used today and forms a basic building block for higher capacity communication systems including T3 which transports twenty-eight Tl signals.
  • packet switching In the early 1970s, another technology was deployed to support data networks. The technology was called "packet switching". Unlike the Tl and T3 networks, packet switching was designed for data communications only. In packet switching, a "packet" of data includes a header, a payload, and a cyclic redundancy check (CRC) .
  • the header includes addressing information as well as an indication of the length of the payload.
  • the payload contains the actual data which is being transmitted over the network.
  • the CRC is used for error detection.
  • the receiver of the packet performs a calculation with the bits in the packet and compares the result of the calculation to the CRC value. If the CRC value is not the same as the result of the calculation, it means that the packet was damaged in transit.
  • the damaged packet is discarded and the receiver sends a message to the transmitter to resend the packet.
  • WANs wide area networks
  • X.25 One popular packet switching scheme for wide area networks (WANs) , known as X.25, utilizes a packet which has a fixed payload of 128 octets.
  • Other packet switching schemes allow variable length packets up to 2,000 octets.
  • Frame Relay is an example of a WAN packet switching scheme which utilizes variable sized packets
  • Ethernet is an example of a local area network (LAN) packet switching scheme which utilizes variable sized packets.
  • TCP/IP transmission control protocol
  • IP internet protocol
  • ATM Asynchronous Transfer Mode
  • ATM was originally conceived as a carrier of integrated traffic, e.g. voice, data, and video.
  • ATM utilizes fixed length packets (called "cells") of 53 octets (5 octets header and 48 octets payload) .
  • cells fixed length packets
  • ATM may be implemented in either a LAN or a WAN.
  • most of the data traffic over the ATM network originates and terminates via another type of network having packets much larger than the fixed length ATM cell.
  • CBR constant bit rate
  • VBR variable bit rate
  • UBR unspecified bit rate
  • ABR available bit rate
  • CBR service is given a high priority and is used for streaming data such as voice and video where a loss of cells would cause a noticeable degradation of the stream.
  • UBR and ABR services are given a low priority and are used for data transfers such as email, file transfer, and web browsing where sudden loss of bandwidth (bursty bandwidth) can be tolerated.
  • ATM switches typically include multiple buffers, queues, or FIFOs for managing the flow of ATM cells through the switch. Generally, a separate buffer is provided for each outlet from the switch. However, it is also known to have separate buffers at the inlets to the switch. Buffer thresholds are set to prevent buffer overflow. If the number of cells in a buffer exceeds the threshold, no more cells are allowed to enter the buffer. Cells attempting to enter a buffer which has reached its threshold will be discarded.
  • ATM provides an error checking mechanism for detecting damaged and missing cells and requesting retransmission of damaged and missing cells, this operates only when the data source is sending data in individual ATM cells. If the data source is sending data in packets which are segmented into cells by an ATM switch, there is no way to have a damaged or missing cell retransmitted. A single damaged or missing cell from a packet will require that all of the cells for the packet be retransmitted. This phenomenon can result in a tremendous waste of network resources. For example, data originating via an Ethernet network may utilize packets having up to 1,500 octets. Segmentation of an Ethernet packet may require up to 32 ATM cells. If a single cell is lost or damaged, all 32 cells will need to be retransmitted. Thus, wasted bandwidth is magnified by a factor of as much as 32.
  • PPD partial packet discard
  • EPD early packet discard
  • VCs virtual connections
  • PPD and EPD attempt to ensure a level of "fairness" in determining which cells are discarded.
  • One method of ensuring fairness is to provide a separate buffer for each virtual connection (VC) .
  • all the VCs share a common memory, but "per VC accounting" is performed so that only cells from the affected VC are discarded. Both methods of assuring fairness require the use of additional memory which would not be required otherwise.
  • Prior art Figure 1 schematically illustrates a prior art method of discarding cells with fairness.
  • Cells for four virtual connections (VC#1 through VC#4) are shown flowing in a stream across the top of the figure. Normal cells are shown in light shading and cells which contain end of packet (EOP) information are shown in bold shading.
  • EOP end of packet
  • a vertical bar indicates the time at which partial packet discard (PPD) is initiated, i.e. when the buffer fullness reaches a threshold.
  • PPD partial packet discard
  • a single ATM switch typically can handle up to either 64,000 or 128,000 VCs simultaneously.
  • Per-VC accounting requires approximately 3 bits of memory per-VC. Although this may not seem like much memory by today's standards, it can be quite significant in the manufacture of single-chip ATM switches as implementation of per-VC could, e.g., triple the cost of manufacture.
  • the method of the present invention includes setting up a separate buffer for each service class for each port in an ATM switch, setting a "fullness" threshold for each buffer, and discarding cells from the buffer without regard to the particular VC to which the cell belongs when the buffer reaches or exceeds the fullness threshold. While discarding cells according to SPD, cells containing end of packet (EOP) information are not discarded. When SPD ends, no more cells are discarded. Unlike the prior art, since no accounting is made per VC, there is no way of knowing which VCs are still supplying cells for a damaged packet.
  • SPD Simple Packet Discard
  • the inventors have discovered that once a single virtual channel (VC) enters the EPD or PPD state, the other VCs in the same service class typically also enter the EPD or PPD state.
  • the inventors have established statistically that goodput achieved by their method is statistically the same as or similar to that achieved with per-VC queuing or accounting when the number of connections supported in the buffer is a moderate amount, such as at the edge of the network.
  • the apparatus of the invention includes an ATM switch having a plurality of ports, each port having an associated buffer memory, each buffer memory being configurable into a plurality of buffers, a separate buffer for each class of service of the traffic flowing through the port.
  • the apparatus further includes a memory manager which allocates shared memory to manage the buffers and to discard cells from buffers according to the method of the invention.
  • an ATM switch is implemented on a single chip which includes thirty-two ports cross coupled by the aforementioned CELLBUS® shared bus switch architecture.
  • the CELLBUS® protocol calls for repackaging individual ATM cells into slightly larger packages ("modified cells") which include internal routing information for routing the cells from one port to another.
  • modify cells the CELLBUS® controller reads its virtual path indicator and virtual channel indicator (VPI/VCI) , determines for which port it is destined and to what service class it belongs.
  • the CELLBUS® controller attaches internal routing information to the cell and sends it via the CELLBUS® cross connection protocol to the appropriate buffer.
  • a second controller is used to manage the buffers, including the discard of cells, and output the buffers using a UTOPIA interface.
  • Figure 1 is a schematic illustration of packet discard according to the prior art
  • FIG. 2 is a simplified schematic block diagram of an ATM switch according to the invention.
  • FIG 3 is a chart of the CELLBUS® modified ATM cell according to the invention.
  • Figure 4 is a simplified flow chart illustrating operation of the method of the invention.
  • Figure 5 is a schematic illustration similar to Figure 1 which illustrates the differences between the prior art and the present invention.
  • an apparatus 10 for performing the method of the invention has a plurality of (e.g. sixteen) inlet ports 12a-12p, a corresponding plurality of outlet ports 14a-14p, a bus 16, a bus controller 18, inlet buffers 20, a UTOPIA interface 22, outlet buffers 24, and an outlet buffer and UTOPIA interface controller 26.
  • the inlet ports 12a-12p are coupled to the bus 16 via buffer interfaces 20 which generally buffer inlet information on a per-port basis.
  • the bus 16 and the interface 20 are coupled to the controller 18 which controls traffic through the switch so that traffic entering the switch via an inlet port is directed to the appropriate outlet port according to a CELLBUS ® protocol which is described more fully in previously incorporated U.S. Patent Number 5,901,146.
  • the outlet ports 14a-14p are coupled to the bus 16 via a mux/demux UTOPIA interface 22 and outlet buffers 24.
  • the outlet buffers are preferably implemented as a memory, with up to four buffers being set up for each port; i.e., one buffer for each service class for each outlet port. For example, if outlet port 14a is carrying CBR, UBR, VBR, and ABR traffic, four buffers (e.g. 24a-l, 24a-2, 24a-3, 24a-4) will be set up for port 14a, regardless of the number of VCs passing through port 14a.
  • the bus controller 18 reads the virtual path indicator and virtual channel indicator (VPI/VCI) for each cell entering the switch, determines (typically via the use of a translation table 40) for which output port the cell is destined and to what service class it belongs (i.e., table 40 not only provides a VPI/VCI translation, but preferably also includes service class information) .
  • VPI/VCI virtual path indicator and virtual channel indicator
  • the bus controller 18 attaches internal routing information to each incoming cell in an internal routing field of the modified ATM cell (clock cycle one of Fig. 3) based on the service class and output port, and grants access to the bus 16 in the grant field (clock cycle fifteen of Fig. 3) based on a desired arbitration scheme (as described in previously incorporated U.S. Patent #5,901,146). Based on the internal routing field, the cell is forwarded to the appropriate buffer in manners well known to those skilled in the art.
  • the method of the invention provides that cells be discarded from buffers if congestion is detected (if buffer fullness reaches a set threshold) , e.g. because a VC exceeds its appropriate rate.
  • Cell "discard” may be accomplished in several ways, including preventing or disabling cells from entering the buffer, or actually discarding cells from the buffer once entered. The presently preferred way is to prevent cells from entering the buffer.
  • the discarded cells generally will be the "last-in” cells, although if desired, other cells including the "first-in” cells could be discarded.
  • the management of the buffers 24 is performed by a second controller 26 which is responsible for monitoring the threshold (fullness) of each buffer, entering the packet discard mode of the invention when a buffer reaches its threshold, and for outputting cells from the buffers via the UTOPIA interface 22 to the ports 14a-14p.
  • the second controller monitors the fullness of each buffer by comparing a threshold value to the running cell count which is kept as a statistic for each queue.
  • the second controller 26 checks the payload type indicator (PTI) field of the incoming cell (found in clock cycle 2 of the modified ATM cell of Fig.
  • PTI payload type indicator
  • the controller 26 may strip out the internal routing field and other non-standard bytes of the modified ATM cell according to any known technique.
  • the forwarding of cells from the four buffers to each respective port may be performed according to any scheduling scheme desired (e.g., a weighted round robin schedule giving more or less guaranteed time to the higher priority traffic and less time to the lower priority traffic) .
  • scheduling scheme e.g., a weighted round robin schedule giving more or less guaranteed time to the higher priority traffic and less time to the lower priority traffic.
  • a separate buffer for each service class of traffic through the outlet port is set up at 102.
  • Each buffer is monitored at 104 by the controller 26 to determine whether its fullness has exceeded the set threshold. If it is determined by controller 26 at 104 that a buffer has filled beyond its threshold, the buffer is placed into the simple packet discard mode.
  • the simple packet discard mode at 106, a determination is made by the controller 26 as to whether the payload type indicator (PTI) of the cell indicates that the cell represents an end of packet (EOP) .
  • PTI payload type indicator
  • EOP end of packet
  • the cell is forwarded (passed through) at 108 to the buffer and stored therein (i.e., the cell is not discarded) . If the cell is not an EOP cell, at 110 the cell is discarded. While in simple packet discard mode, the status of the buffer is monitored at 112 by the controller 26 to determine whether the fullness of the buffer has dropped below the threshold. If it has been so determined at 112, the buffer is taken out of simple packet discard mode at 114 and the method returns to 104 to determine whether the buffer must be put in simple packet discard mode again. It will be appreciated that the method steps described above are performed for every buffer which is subject to packet discard mode.
  • the invention was described as using a first controller for controlling the CELLBUS® protocol on the input side, and a second controller for controlling the simplified packet discard mechanism of the invention with respect to the output buffers, as well as controlling the UTOPIA output protocol, it will be appreciated that a single (micro)processor or controller, or additional (micro) processors and controllers can be utilized, and where more than one controller or microprocessor is utilized, they may be directly coupled to each other.
  • the invention is described as providing four separate buffers (one for each class of ATM traffic) for each output port, it will be appreciated by those skilled in the art, that if additional classes of ATM traffic are defined, the number of buffers per port could be increased if desired.

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)

Abstract

A method of packet discard in an ATM switch includes establishi ng a buffer for each service class (102), monitoring each buffer for congestion (104), entering a packet discard mode when the buffer is congested and discarding only cells which are not end-of-packet cell (106, 108, 110), exiting the packet discard mode when the buffer is no longer congested (112, 114).

Description

SIMPLIFIED PACKET DISCARD IN ATM SWITCH
This application is related to the following co-owned patents and pending applications, the complete disclosures of which are hereby incorporated by reference herein: Serial Number 09/263,289, filed March 5, 1999 for "Method And Apparatus For Managing Multiple ATM Cell Queues"; U.S. Patent Number 5,893,162 for "Methods and Apparatus for Allocation and Management of Shared Memory with Data in Memory Stored as Multiple Linked Lists"; U.S. Patent Number 5,901,146 for "Asynchronous Data Transfer and Source Traffic Control System" (the CELLBUS® technology) .
BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to Asynchronous Transfer Mode (ATM) telecommunications switching. More particularly, the invention relates to a method and apparatus for discarding cells representing packets and portions of packets in order to enhance the efficiency of packet traffic over the ATM network.
2. State of the Art
The first commercial digital voice communications system was installed in 1962 in Chicago, Illinois. The system was called "Tl" and was based on the time division multiplexing (TDM) of twenty-four telephone calls on two twisted wire pairs. The digital bit rate of the Tl system was 1.544 Mbit/sec (±200 bps) , which was, in the nineteen sixties, about the highest data rate that could be supported by a twisted wire pair for a distance of approximately one mile. The cables carrying the Tl signals were buried underground and were accessible via manholes, which were, at that time in Chicago, spaced approximately one mile (actually, 6000 ft.) apart. Thus, analog amplifiers with digital repeaters were conveniently located at intervals of approximately one mile. The Tl system is still widely used today and forms a basic building block for higher capacity communication systems including T3 which transports twenty-eight Tl signals.
In the early 1970s, another technology was deployed to support data networks. The technology was called "packet switching". Unlike the Tl and T3 networks, packet switching was designed for data communications only. In packet switching, a "packet" of data includes a header, a payload, and a cyclic redundancy check (CRC) . The header includes addressing information as well as an indication of the length of the payload. The payload contains the actual data which is being transmitted over the network. The CRC is used for error detection. The receiver of the packet performs a calculation with the bits in the packet and compares the result of the calculation to the CRC value. If the CRC value is not the same as the result of the calculation, it means that the packet was damaged in transit. According to the packet switching scheme, the damaged packet is discarded and the receiver sends a message to the transmitter to resend the packet. One popular packet switching scheme for wide area networks (WANs) , known as X.25, utilizes a packet which has a fixed payload of 128 octets. Other packet switching schemes allow variable length packets up to 2,000 octets. Frame Relay is an example of a WAN packet switching scheme which utilizes variable sized packets and Ethernet is an example of a local area network (LAN) packet switching scheme which utilizes variable sized packets.
Concurrent with the development of packet switching several groups around the world began to consider standards for the interconnection of computer networks and coined the term "internetworking". The leading pioneers in internetworking were the founders of ARPANET (the Advanced Research Projects Network). ARPA, a U.S. Department of Defense organization, developed and implemented the transmission control protocol (TCP) and the internet protocol (IP) . The TCP/IP code was dedicated to the public domain and was rapidly adopted by universities, private companies, and research centers around the world. An important feature of IP is that it allows fragmentation operations, i.e. the segmentation of packets into smaller units. This is essential to allow networks which utilize large packets to be coupled to networks which utilize smaller packets. Today, TCP/IP is the foundation of the Internet. It is used for email, file transfer, and for browsing the Worldwide Web. Moreover, the popularity of TCP/IP is so great that it is now being used for voice and video as well as data transmission.
Perhaps the most awaited, and now fastest growing technology in the field of telecommunications is known as Asynchronous Transfer Mode (ATM) technology. ATM was originally conceived as a carrier of integrated traffic, e.g. voice, data, and video. ATM utilizes fixed length packets (called "cells") of 53 octets (5 octets header and 48 octets payload) . ATM may be implemented in either a LAN or a WAN. For ideal data transfer, ATM is used end to end from the data source to the data receiver. In present practice, however, most of the data traffic over the ATM network (including TCP/IP traffic) originates and terminates via another type of network having packets much larger than the fixed length ATM cell. Thus, data packets entering the ATM network must be segmented into ATM cells. These cells must be reassembled into packets as the data exits the ATM network. These processes, known as SAR (segmentation and reassembly) are performed in ATM switches at the edges of the ATM network.
Current ATM service is offered in different categories according to a user's needs. Some of these categories include constant bit rate (CBR) , variable bit rate (VBR) , unspecified bit rate (UBR) , and available bit rate (ABR) . CBR service is given a high priority and is used for streaming data such as voice and video where a loss of cells would cause a noticeable degradation of the stream. UBR and ABR services are given a low priority and are used for data transfers such as email, file transfer, and web browsing where sudden loss of bandwidth (bursty bandwidth) can be tolerated.
ATM switches typically include multiple buffers, queues, or FIFOs for managing the flow of ATM cells through the switch. Generally, a separate buffer is provided for each outlet from the switch. However, it is also known to have separate buffers at the inlets to the switch. Buffer thresholds are set to prevent buffer overflow. If the number of cells in a buffer exceeds the threshold, no more cells are allowed to enter the buffer. Cells attempting to enter a buffer which has reached its threshold will be discarded.
The occasional loss of a single cell from a voice or video data stream may easily go unnoticed or simply appear as a small amount of "static" and has no effect on the efficient operation of the ATM network because cells lost from a voice or video data stream are not retransmitted. Cells lost from a non-streaming data transfer, on the other hand, almost always must be retransmitted. Data transfers such as email, file transfer, and web browsing all require complete data reception and thus, damaged or discarded cells must be retransmitted.
An interesting problem arises when packets are segmented into and reassembled from ATM cells in the presence of cell damage or cell loss . Although ATM provides an error checking mechanism for detecting damaged and missing cells and requesting retransmission of damaged and missing cells, this operates only when the data source is sending data in individual ATM cells. If the data source is sending data in packets which are segmented into cells by an ATM switch, there is no way to have a damaged or missing cell retransmitted. A single damaged or missing cell from a packet will require that all of the cells for the packet be retransmitted. This phenomenon can result in a tremendous waste of network resources. For example, data originating via an Ethernet network may utilize packets having up to 1,500 octets. Segmentation of an Ethernet packet may require up to 32 ATM cells. If a single cell is lost or damaged, all 32 cells will need to be retransmitted. Thus, wasted bandwidth is magnified by a factor of as much as 32.
The effective throughput of correctly received packets is referred to in the art as "goodput" . Two schemes are used to improve goodput: partial packet discard (PPD) and early packet discard (EPD) . According to the PPD scheme, when a cell from a packet is dropped from a switch buffer, all but the last cell from the packet are discarded. The last cell is not discarded because it contains the packet delimiter and CRC which are used by the destination to delimit the packet boundaries and determine that the packet should be discarded. PPD prevents the remaining cells in a damaged packet from being sent, but some damaged portion of a packet survives and reaches the destination. EPD operates in the same manner as PPD but also discards entire packets if a switch buffer has reached a threshold.
In practice, most damaged packets are the result of a missing cell rather than a damaged cell. Further, cells are more likely to be discarded in switches at the edge of the ATM network, where SAR takes place, than in switches deep within the network.
As mentioned above, there is typically one buffer per port (input, output, or both) in an ATM switch. However, the cells passing through a particular port may represent several virtual connections (VCs) . If one of the VCs exceeds its nominal bit rate, causing the buffer to reach a fullness threshold, all of the VCs in the affected port will suffer the discard of cells. Most implementations of PPD and EPD attempt to ensure a level of "fairness" in determining which cells are discarded. One method of ensuring fairness is to provide a separate buffer for each virtual connection (VC) . According to another method, all the VCs share a common memory, but "per VC accounting" is performed so that only cells from the affected VC are discarded. Both methods of assuring fairness require the use of additional memory which would not be required otherwise.
Prior art Figure 1 schematically illustrates a prior art method of discarding cells with fairness. Cells for four virtual connections (VC#1 through VC#4) are shown flowing in a stream across the top of the figure. Normal cells are shown in light shading and cells which contain end of packet (EOP) information are shown in bold shading. At the right hand side of the figure, a vertical bar indicates the time at which partial packet discard (PPD) is initiated, i.e. when the buffer fullness reaches a threshold. According to this example, it has been determined that VC#1 and VC#2 have violated their contracts, and for fairness reasons cells from VC#1 and VC#2 will be discarded, but cells from VC#3 and VC#4 will not be discarded. Thus, after the start of PPD, all of the cells from VC#1 and VC#2 except for EOP cells are discarded. The second line of the figure illustrates the resulting data stream after packets are discarded. At the left hand side of the figure a vertical bar indicates the time at which PPD is exited, i.e. when the buffer fullness has dropped below the threshold. Those skilled in the art will appreciate that upon exiting PPD, cells from the affected VCs will continue to be discarded until an EOP cell is detected.
A single ATM switch typically can handle up to either 64,000 or 128,000 VCs simultaneously. Per-VC accounting requires approximately 3 bits of memory per-VC. Although this may not seem like much memory by today's standards, it can be quite significant in the manufacture of single-chip ATM switches as implementation of per-VC could, e.g., triple the cost of manufacture.
SUMMARY OF THE INVENTION
It is therefore an object of the invention to provide a method and apparatus for packet discard in an ATM switch which provides fairness without the need for per-VC queuing or accounting.
In accord with these objects which will be discussed in detail below, the method of the present invention, referred to by the inventors as Simple Packet Discard (SPD) , includes setting up a separate buffer for each service class for each port in an ATM switch, setting a "fullness" threshold for each buffer, and discarding cells from the buffer without regard to the particular VC to which the cell belongs when the buffer reaches or exceeds the fullness threshold. While discarding cells according to SPD, cells containing end of packet (EOP) information are not discarded. When SPD ends, no more cells are discarded. Unlike the prior art, since no accounting is made per VC, there is no way of knowing which VCs are still supplying cells for a damaged packet. The inventors have discovered that once a single virtual channel (VC) enters the EPD or PPD state, the other VCs in the same service class typically also enter the EPD or PPD state. The inventors have established statistically that goodput achieved by their method is statistically the same as or similar to that achieved with per-VC queuing or accounting when the number of connections supported in the buffer is a moderate amount, such as at the edge of the network.
The apparatus of the invention includes an ATM switch having a plurality of ports, each port having an associated buffer memory, each buffer memory being configurable into a plurality of buffers, a separate buffer for each class of service of the traffic flowing through the port. The apparatus further includes a memory manager which allocates shared memory to manage the buffers and to discard cells from buffers according to the method of the invention.
According to a presently preferred embodiment of the invention, an ATM switch is implemented on a single chip which includes thirty-two ports cross coupled by the aforementioned CELLBUS® shared bus switch architecture. The CELLBUS® protocol calls for repackaging individual ATM cells into slightly larger packages ("modified cells") which include internal routing information for routing the cells from one port to another. As each cell enters the switch, the CELLBUS® controller reads its virtual path indicator and virtual channel indicator (VPI/VCI) , determines for which port it is destined and to what service class it belongs. The CELLBUS® controller attaches internal routing information to the cell and sends it via the CELLBUS® cross connection protocol to the appropriate buffer. A second controller is used to manage the buffers, including the discard of cells, and output the buffers using a UTOPIA interface.
Additional objects and advantages of the invention will become apparent to those skilled in the art upon reference to the detailed description taken in conjunction with the provided figures.
BRIEF DESCRIPTION OF THE DRAWINGS
Figure 1 is a schematic illustration of packet discard according to the prior art;
Figure 2 is a simplified schematic block diagram of an ATM switch according to the invention;
Figure 3 is a chart of the CELLBUS® modified ATM cell according to the invention; Figure 4 is a simplified flow chart illustrating operation of the method of the invention; and
Figure 5 is a schematic illustration similar to Figure 1 which illustrates the differences between the prior art and the present invention.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
Referring now to Figure 2, an apparatus 10 for performing the method of the invention has a plurality of (e.g. sixteen) inlet ports 12a-12p, a corresponding plurality of outlet ports 14a-14p, a bus 16, a bus controller 18, inlet buffers 20, a UTOPIA interface 22, outlet buffers 24, and an outlet buffer and UTOPIA interface controller 26. The inlet ports 12a-12p are coupled to the bus 16 via buffer interfaces 20 which generally buffer inlet information on a per-port basis. The bus 16 and the interface 20 are coupled to the controller 18 which controls traffic through the switch so that traffic entering the switch via an inlet port is directed to the appropriate outlet port according to a CELLBUS® protocol which is described more fully in previously incorporated U.S. Patent Number 5,901,146.
As seen in Fig. 2, the outlet ports 14a-14p are coupled to the bus 16 via a mux/demux UTOPIA interface 22 and outlet buffers 24. The outlet buffers are preferably implemented as a memory, with up to four buffers being set up for each port; i.e., one buffer for each service class for each outlet port. For example, if outlet port 14a is carrying CBR, UBR, VBR, and ABR traffic, four buffers (e.g. 24a-l, 24a-2, 24a-3, 24a-4) will be set up for port 14a, regardless of the number of VCs passing through port 14a. Similarly numbered buffers shown in Figure 2 represent a total of sixty-four buffers, four for each of the sixteen ports, although, if desired, if an outlet port is carrying less than four types of traffic, fewer buffers may be set up for that port. According to the invention, the bus controller 18 reads the virtual path indicator and virtual channel indicator (VPI/VCI) for each cell entering the switch, determines (typically via the use of a translation table 40) for which output port the cell is destined and to what service class it belongs (i.e., table 40 not only provides a VPI/VCI translation, but preferably also includes service class information) . In the preferred embodiment of the invention, the bus controller 18 attaches internal routing information to each incoming cell in an internal routing field of the modified ATM cell (clock cycle one of Fig. 3) based on the service class and output port, and grants access to the bus 16 in the grant field (clock cycle fifteen of Fig. 3) based on a desired arbitration scheme (as described in previously incorporated U.S. Patent #5,901,146). Based on the internal routing field, the cell is forwarded to the appropriate buffer in manners well known to those skilled in the art.
As mentioned above, the method of the invention provides that cells be discarded from buffers if congestion is detected (if buffer fullness reaches a set threshold) , e.g. because a VC exceeds its appropriate rate. Cell "discard" may be accomplished in several ways, including preventing or disabling cells from entering the buffer, or actually discarding cells from the buffer once entered. The presently preferred way is to prevent cells from entering the buffer. The discarded cells generally will be the "last-in" cells, although if desired, other cells including the "first-in" cells could be discarded.
The management of the buffers 24 is performed by a second controller 26 which is responsible for monitoring the threshold (fullness) of each buffer, entering the packet discard mode of the invention when a buffer reaches its threshold, and for outputting cells from the buffers via the UTOPIA interface 22 to the ports 14a-14p. According to the preferred embodiment of the invention, the second controller monitors the fullness of each buffer by comparing a threshold value to the running cell count which is kept as a statistic for each queue. In addition, as is described hereinafter in more detail, if any particular buffer is placed in packet discard mode, the second controller 26 checks the payload type indicator (PTI) field of the incoming cell (found in clock cycle 2 of the modified ATM cell of Fig. 3) to see whether the cell is an end of packet cell, as EOP cells are not discarded. In outputting cells from the buffers 24 through the UTOPIA interface 22, the controller 26 may strip out the internal routing field and other non-standard bytes of the modified ATM cell according to any known technique. In addition, the forwarding of cells from the four buffers to each respective port may be performed according to any scheduling scheme desired (e.g., a weighted round robin schedule giving more or less guaranteed time to the higher priority traffic and less time to the lower priority traffic) . These various schemes are well known in the art. Those skilled in the art will also realize that various methods of monitoring buffer thresholds and the entering and exiting of a packet discard mode are also well know in the art. The novel method of the present invention involves how a packet discard mode is carried out once it is determined that a buffer has reached a fullness threshold as well as how the discard mode should be exited when the buffer fullness drops below the threshold.
Turning now to Figure 4, the preferred method of the invention starts at 100 and for each outlet port in use, a separate buffer for each service class of traffic through the outlet port is set up at 102. Each buffer is monitored at 104 by the controller 26 to determine whether its fullness has exceeded the set threshold. If it is determined by controller 26 at 104 that a buffer has filled beyond its threshold, the buffer is placed into the simple packet discard mode. In the simple packet discard mode, at 106, a determination is made by the controller 26 as to whether the payload type indicator (PTI) of the cell indicates that the cell represents an end of packet (EOP) . If the cell is an EOP cell, the cell is forwarded (passed through) at 108 to the buffer and stored therein (i.e., the cell is not discarded) . If the cell is not an EOP cell, at 110 the cell is discarded. While in simple packet discard mode, the status of the buffer is monitored at 112 by the controller 26 to determine whether the fullness of the buffer has dropped below the threshold. If it has been so determined at 112, the buffer is taken out of simple packet discard mode at 114 and the method returns to 104 to determine whether the buffer must be put in simple packet discard mode again. It will be appreciated that the method steps described above are performed for every buffer which is subject to packet discard mode. Those skilled in the art will appreciate that some service classes may not be subject to packet discard and that when buffers for those service classes fill to their threshold, they will be serviced more frequently to the detriment of other lower priority service classes. It will further be appreciated that the threshold examined at 104 in Figure 4 for entering simple packet discard mode is not necessarily the same as the threshold examined at 112 for exiting simple packet discard mode. According to a presently preferred embodiment, discard mode is entered when there are only twenty-seven slots left in the buffer and discard mode is exited when the buffer is half empty.
The results of the method of the invention are illustrated in Figure 5 which can be compared to prior art Figure 1 to see that different results are obtained. When a buffer enters simple packet discard mode, all cells, except for EOP cells, are discarded from the buffer regardless of which VC or VCs are responsible for the congestion in the buffer. When the buffer fullness drops below the threshold, simple packet discard mode is exited and all cells are retained without any further discard of cells. Unlike the prior art methods, no attempt is made to discard cells "fairly". Moreover, unlike the prior art, the method of the invention does not wait for the last cell of a packet (EOP) of a VC to be received before exiting the packet discard mode for that VC because no per-VC accounting is performed. Comparing Figures 1 and 4, it will be seen that according to the method of the invention, it is possible that more cells may be discarded using the simplified packet discard mechanism of the invention rather than the partial packet discard mechanism of the prior art. As a result, buffer congestion may be eliminated more quickly (when many VCs share the same buffer) . On the other hand, as soon as buffer congestion is eliminated, the method of the present invention immediately ceases discarding cells, thereby allowing some cells belonging to damaged packets to be transmitted. In the long run, however, the method of the present invention provides the same or better preservation of bandwidth through the ATM network. Moreover, the method of the present invention can be performed with significantly less hardware which, as mentioned above, significantly reduces the cost of small ATM switches.
There have been described and illustrated herein a method and apparatus for simplified packet discard in an ATM switch. While particular embodiments of the invention have been described, it is not intended that the invention be limited thereto, as it is intended that the invention be as broad in scope as the art will allow and that the specification be read likewise. Thus, while the invention was described as utilizing the CELLBUS® switching protocol and architecture with respect to incoming data, it will be appreciated that the invention applies to other types of ATM switches, including switches which use a switch fabric. Also, while the invention was described as utilizing a UTOPIA interface on the output side, it will be appreciated that the invention applies to other types of output interface protocols and architectures. Further, while the invention was described as using a first controller for controlling the CELLBUS® protocol on the input side, and a second controller for controlling the simplified packet discard mechanism of the invention with respect to the output buffers, as well as controlling the UTOPIA output protocol, it will be appreciated that a single (micro)processor or controller, or additional (micro) processors and controllers can be utilized, and where more than one controller or microprocessor is utilized, they may be directly coupled to each other. In addition, while the invention is described as providing four separate buffers (one for each class of ATM traffic) for each output port, it will be appreciated by those skilled in the art, that if additional classes of ATM traffic are defined, the number of buffers per port could be increased if desired. Likewise, it is possible (although not preferred) to define fewer classes of ATM traffic, or to utilize a single buffer for more than one class of traffic (e.g., CBR and VBR) . Further yet, while the buffer memory of the invention was described as preferably constituting a single memory which utilizes linked lists to implement multiple buffers, it will be appreciated that separate hardware buffers, or different memory-type buffers could be utilized. It will therefore be appreciated by those skilled in the art that yet other modifications could be made to the provided invention without deviating from its spirit and scope as so claimed.

Claims

Claims :
1. A method of packet discard in an ATM switch servicing ATM traffic comprised of ATM cells, said method comprising: a) establishing a buffer for each service class or group of service classes per outlet port in the switch without establishing per-VC accounting or per-VC queuing; b) monitoring each buffer for congestion; c) entering a packet discard mode for a buffer when the buffer is congested, the packet discard mode including discarding cells from or preventing cells from being received by the buffer regardless of VC until the buffer is no longer congested; and d) exiting the packet discard mode when the buffer is no longer congested.
2. A method according to claim 1, wherein: said discarding cells includes determining whether a cell to be discarded is an end-of-packet (EOP) cell, and discarding only cells which are not EOP cells .
3. A method according to claim 1, wherein: said step of monitoring each buffer includes monitoring each buffer with respect to a buffer fullness threshold, said step of entering packet discard mode includes entering packet discard mode when said buffer fullness meets or exceeds said threshold; and said step of exiting the packet discard mode includes exiting when said buffer fullness no longer meets or exceeds said threshold.
4. A method according to claim 3, wherein: said step of monitoring each buffer includes monitoring each buffer with respect to a first buffer fullness threshold for entering packet discard mode and monitoring each buffer with respect to a second buffer fullness threshold for exiting packet discard mode.
5. A method according to claim 4, wherein: said first buffer fullness threshold is greater than second buffer fullness threshold.
6. A method according to claim 5, wherein: said discarding cells includes determining whether a cell to be discarded is an end-of-packet (EOP) cell, and discarding only cells which are not EOP cells.
7. A method according to claim 1, wherein: said establishing comprises generating a separate buffer for each class of traffic.
8. A method according to claim 7, wherein: said establishing comprises generating at least four buffers for each outlet port of the switch.
9. A method according to claim 1, further comprising: receiving the ATM cells from a plurality of input ports of the
ATM switch; modifying the ATM cells by inserting local switch addresses into internal routing fields of the ATM cells, said local switch addresses addressing buffers for the outlet ports of the switch; and routing the ATM cells to their appropriate buffers based on said internal local switch addresses .
10. A method of switching ATM cells having virtual channel identifiers through an ATM switch having a plurality of input ports and a plurality of output ports, said method comprising: a) buffering the ATM cells received at the plurality of input ports; b) establishing a plurality of output buffers, one for each service class or group of service classes per outlet port in the switch, at least a plurality of the plurality of output buffers buffering cells having different virtual channel identifiers; c) providing each cell buffered at the input ports with an internal routing field, said internal routing field containing a local switch address corresponding to one of said plurality of output buffers; d) directing cells to said plurality of output buffers based on said local switch address; e) monitoring the fullness of each of said output buffers; and f) discarding cells directed to an output buffer which has met or exceeded a fullness threshold regardless of the virtual channel identifier of the cell.
11. A method according to claim 10, wherein: said discarding cells includes determining whether a cell to be discarded is an end-of-packet (EOP) cell, and discarding only cells which are not EOP cells.
12. A method according to claim 11, wherein: said establishing comprises generating a separate buffer for each class of traffic.
13. A method according to claim 11, wherein: said establishing comprises generating at least four buffers for each outlet port of the switch.
14. An apparatus for packet discard in an ATM switch, comprising: a) memory means for establishing a buffer for each service class per outlet port in the switch; b) monitoring means for monitoring each buffer for congestion, said monitoring means coupled to said memory means; c) packet discard means for entering a packet discard mode for a buffer when the buffer is congested, the packet discard means including cell discarding means for discarding cells from the buffer or preventing cells from being received by the buffer regardless of virtual channel identifier of the cell until the buffer is no longer congested, said packet discard means coupled to said memory means and to said monitoring means; and d) exiting means for exiting the packet discard mode when the buffer is no longer congested, said exiting means coupled to said packet discard means and to said monitoring means .
15. An apparatus according to claim 14, wherein: said discarding means includes means for determining whether a cell to be discarded is an end-of-packet (EOP) cell, and for discarding only cells which are not EOP cells.
16. An apparatus according to claim 14, wherein: said monitoring means includes means for monitoring each buffer with respect to a buffer fullness threshold, said packet discard means includes means for entering packet discard mode when said buffer fullness meets or exceeds said threshold, and said exiting means includes means for exiting when said buffer fullness no longer meets or exceeds said threshold.
17. An apparatus according to claim 16, wherein: said monitoring means includes means for monitoring each buffer with respect to a first buffer fullness threshold for entering packet discard mode and means for monitoring each buffer with respect to a second buffer fullness threshold for exiting packet discard mode.
18. An apparatus according to claim 17, wherein: said first buffer fullness threshold is greater than second buffer fullness threshold.
19. An apparatus according to claim 16, wherein: said discarding means includes means for determining whether a cell to be discarded is an end-of-packet (EOP) cell, and for discarding only cells which are not EOP cells.
20. An apparatus according to claim 14, wherein: said memory means comprises a separate buffer for each class of traffic received at each outlet port.
21. An apparatus according to claim 14, wherein: said memory means comprises at least four buffers for each outlet port of the switch.
22. An apparatus according to claim 14, further comprising: buffer means for receiving the ATM cells from a plurality of input ports of the ATM switch; cell modification means for modifying the ATM cells by inserting local switch addresses into internal routing fields of the ATM cells, said local switch addresses addressing buffers for the outlet ports of the switch; and routing means for routing the ATM cells to their appropriate buffers based on said internal local switch addresses.
PCT/US2001/000723 2000-01-11 2001-01-10 Simplified packet discard in atm switch Ceased WO2001052075A1 (en)

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Citations (4)

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Publication number Priority date Publication date Assignee Title
US5764641A (en) * 1995-09-08 1998-06-09 Cisco Systems, Inc. Early and integrated tail packet discard system
US6092108A (en) * 1998-03-19 2000-07-18 Diplacido; Bruno Dynamic threshold packet filtering of application processor frames
US6122252A (en) * 1996-06-21 2000-09-19 Hitachi, Ltd. Packet switching device and cell transfer control method
US6163528A (en) * 1997-11-12 2000-12-19 Nec Corporation Selective cell discard system in ATM switch

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5764641A (en) * 1995-09-08 1998-06-09 Cisco Systems, Inc. Early and integrated tail packet discard system
US6122252A (en) * 1996-06-21 2000-09-19 Hitachi, Ltd. Packet switching device and cell transfer control method
US6163528A (en) * 1997-11-12 2000-12-19 Nec Corporation Selective cell discard system in ATM switch
US6092108A (en) * 1998-03-19 2000-07-18 Diplacido; Bruno Dynamic threshold packet filtering of application processor frames

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