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WO2000069152A1 - Signaling method for invoking a test mode in a network interface unit - Google Patents

Signaling method for invoking a test mode in a network interface unit Download PDF

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Publication number
WO2000069152A1
WO2000069152A1 PCT/US2000/006122 US0006122W WO0069152A1 WO 2000069152 A1 WO2000069152 A1 WO 2000069152A1 US 0006122 W US0006122 W US 0006122W WO 0069152 A1 WO0069152 A1 WO 0069152A1
Authority
WO
WIPO (PCT)
Prior art keywords
port
test
voltage
circuit
twisted pair
Prior art date
Application number
PCT/US2000/006122
Other languages
French (fr)
Inventor
Gregory L. Bella
Original Assignee
Westell Technologies, Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US09/307,871 external-priority patent/US6181775B1/en
Priority claimed from US09/433,011 external-priority patent/US6278769B1/en
Application filed by Westell Technologies, Inc. filed Critical Westell Technologies, Inc.
Priority to AU40073/00A priority Critical patent/AU4007300A/en
Publication of WO2000069152A1 publication Critical patent/WO2000069152A1/en

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Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04MTELEPHONIC COMMUNICATION
    • H04M11/00Telephonic communication systems specially adapted for combination with other electrical systems
    • H04M11/06Simultaneous speech and data transmission, e.g. telegraphic transmission over the same conductors
    • H04M11/062Simultaneous speech and data transmission, e.g. telegraphic transmission over the same conductors using different frequency bands for speech and other data
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04MTELEPHONIC COMMUNICATION
    • H04M1/00Substation equipment, e.g. for use by subscribers
    • H04M1/24Arrangements for testing
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04MTELEPHONIC COMMUNICATION
    • H04M3/00Automatic or semi-automatic exchanges
    • H04M3/22Arrangements for supervision, monitoring or testing
    • H04M3/26Arrangements for supervision, monitoring or testing with means for applying test signals or for measuring
    • H04M3/28Automatic routine testing ; Fault testing; Installation testing; Test methods, test equipment or test arrangements therefor
    • H04M3/30Automatic routine testing ; Fault testing; Installation testing; Test methods, test equipment or test arrangements therefor for subscriber's lines, for the local loop
    • H04M3/301Circuit arrangements at the subscriber's side of the line
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04MTELEPHONIC COMMUNICATION
    • H04M3/00Automatic or semi-automatic exchanges
    • H04M3/22Arrangements for supervision, monitoring or testing
    • H04M3/2209Arrangements for supervision, monitoring or testing for lines also used for data transmission

Definitions

  • the present invention is directed to remotely monitoring and evaluating a twisted pair transmission line, such as that used m telephone line communication. It is especially directed to communication systems, such as an asynchronous digital subscriber line ("ADSL") which use a telephone line for communication between a customer and a central office.
  • ADSL asynchronous digital subscriber line
  • Asymmetric Digital Subscriber Line is a technology which allows for simultaneous voice and data traffic to coexist over a communication channel comprising a standard telephone transmission line.
  • the standard telephone transmission lines comprise an unshielded twisted pair of copper wire having a gauge of 22-26AWG. Twisted pairs, which can be used to connect a central telephone system (a 'central' unit) to a subscriber's telephone (a 'remote' unit) can support bandwidths of up to 2MHz through the use of digital signal processing (DSP) technology. Thus, they can be used for bandwidth-intensive applications, such as internet access and video-on demand, as well as for carrying voice traffic. Frequency division multiplexing is used so that a plurality of signals, each occupying a different frequency band, can be simultaneously sent over the same transmission line .
  • the voice traffic band comprises a number of frequency sub-bands, or channels, ranging from DC to 20 KHz.
  • the analog voiceband frequency is typically specified as 200-4000 Hz.
  • Customer specified additions may include phone operation up to 8 KHz and 12-16 KHz billing tones.
  • DC to 30 Hz frequencies are typically assigned for auxiliary analog signaling purposes, such as ringing the telephone, dial pulsing and on/off hook signaling.
  • ADSL data traffic bandwidth for CAP (car ⁇ erless amplitude and phase) modulation is typically from 35 KHz - 1.5 MHZ.
  • upstream data traffic i.e., remote unit to central unit
  • downstream traffic i.e., central unit to remote unit
  • the telephone company TELCO
  • TELCO the telephone company
  • the telephone company must determine whether the line is suitable for ADSL communication. This is typically done by testing the lines between the TELCO' s central office or substation, and the customer's site. In cases where the ADSL service is provided to the customer's residence, this often means testing the line at the point of entry to the building in which the customer's dwelling is located.
  • TELCO After initiation of ADSL service, there are occasions m which the customer experiences problems in ADSL communication. In those instances, then TELCO must determine whether the trouble lies with the TELCO' s equipment or with the customer's equipment. To make this determination, a TELCO representative may visit the customer's site to test whether the twisted pair line from the customer's site to the TELCO central office or substation is working properly, and also to test whether the customer's equipment is working properly. This requires considerable expense due to the time taken by the repairman.
  • the present invention is directed to an apparatus and method for remotely testing the TELCO' s ADSL equipment, without having to travel to the customer's site. It uses an interface unit which is installed proximate to the customer's equipment, which can be selectively operated from a remote location to test the TELCO' s ADSL equipment.
  • a device in accordance with the present invention is installed between the customer's port and the TELCO' s port at the point where the line enters the customer's site.
  • a device m accordance with the present invention operates m one of two modes : a monitor mode and a test mode .
  • a monitor mode a subcircuit of the device looks for a request signal asking the device to switch from the monitor mode to the test mode.
  • a valid request signal is received from the central office on the twisted pair, the device is switched into the test mode.
  • the test mode has two phases. In the first phase, a signal generator of the device isolates the customer equipment and transmits a test signal from the unit back to the central station on the twisted pair. A timer circuit associated with the device allows this first phase to proceed for a predetermined period of time. In the second phase, the device isolates customer-end filter circuitry so as to directly test the customer's POTS equipment .
  • the device includes a voltage regulator which provides an operating voltage for the remaining components and subcircuits of the device.
  • Fig. 1 presents a block diagram of an ADSL system incorporating a network interface unit
  • Fig. 2 presents a block diagram of an embodiment of a network interface unit
  • Fig. 3 presents a block diagram of the normal mode m which the network interface unit of Fig. 2 operates;
  • Fig. 4 presents a block diagram of the test mode m which the network interface unit of Fig. 2 operates;
  • Fig. 5 presents a detailed diagram of the network interface unit of Fig. 2.
  • Fig. 6 presents a block diagram of an ADSL system incorporating a network interface unit m accordance with the present invention
  • Fig. 7 presents a block diagram of a device m accordance with the present invention.
  • Fig. 8 presents a .block diagram of a device of Fig. 7 m the normal mode
  • Fig. 9 presents a block diagram of a device of Fig. 7 m the first phase of the test mode
  • Fig. 10 presents a block diagram of a device of Fig. 7 m the second phase of the test mode
  • Fig. 11 presents a detailed diagram of the network interface unit m accordance with the present invention.
  • Fig. 12 presents a circuit diagram of the high impedance bypass circuit of the network interface unit of Fig. 11;
  • Fig. 13 presents the bypass circuitry for a lowpass POTS filter
  • Fig. 14 presents an alternative detector/power circuit.
  • Fig. 1 shows an ADSL system 10 which incorporates a device m accordance with the present invention.
  • the ADSL system 10 comprises a transmission line 12 which extends between a central office 14 and a customer's site 16.
  • the ADSL system 10 includes a network interface unit 18 (NIU) which is physically located near the customer' s equipment 16 and interfaces the customer equipment to the transmission line 12.
  • NNIU network interface unit 18
  • the network interface unit 18 is dual ported with one side connected to a network interface port 22 and the other side connected to the customer port 24.
  • the purpose of locating a network interface unit close to the customer's site is to allow the central office 14 to test whether its transmission equipment and the transmission line 12 are functioning properly without having to visit the customer's site. This testing is made possible by the design and function of the Network Interface Unit.
  • Fig. 2 shows a functional block diagram of the NIU.
  • the NIU comprises a request signal detector 30, a pair of line-control switches 32a, 32b, a voltage protection circuit 34, a test signal generator 36, a power supply 38, and a reset control circuit 40.
  • the NIU has a first port 22a comprising terminals 22b, 22c on the network side and a second port 24a comprising corresponding terminals 24b, 24c on the customer side.
  • the request signal detector 30 is a high impedance circuit connected across the network port which is configured to detect a valid request signal sent by the central office.
  • the request signal may take any number of forms.
  • the detector 30 recognizes that a valid request signal has been received, it outputs a first control signal on lines 42a, 42b, m order to switch the NIU from the monitor mode to the test mode .
  • Switches 32a and 32b connect the voltage nodes 44a, 44b at the network side port 22a to the customer side port 24a, when the NIU is m the monitor mode.
  • m the monitor mode the presence of the NIU is transparent to the customer equipment and the central office only sees a high impedance monitor circuit 18a shunted across the transmission lines 12.
  • the switches 32a, 32b Upon receiving the first control signal on lines 42a, 42b from the request signal detector 30, the switches 32a, 32b break the connection between the network port to the customer port, and instead establish a connection to the circuitry of the NIU to form a test circuit 18b.
  • switches 32a, 32b are activated at the same time m response to receipt of a valid request signal, the switches 32a, 32b may be implemented as a single double-pole double-throw electronic switch which selectively connects a pair of input lines to either of two pairs of output lines. Whether m the monitor mode or m the test mode, the terminals 22b, 22c of the network side port 22a serve as first and second voltage nodes having an input voltage therebetween.
  • the voltage protection circuit 34 is activated and serves to prevent an over voltage condition across the transmission line which might otherwise destroy the NIU.
  • the power supply 38 is activated and outputs a DC operating voltage V s which is used to drive the test signal generator 36 and the reset control circuit 40.
  • V s DC operating voltage
  • the NIU' s power supply 38 draws its power from the office battery voltage. Therefore, the power supply 38 does not need to be provided with a local battery or other power source .
  • the test signal generator 36 outputs a signal and this signal is sent down the transmission line 12 back to the central office.
  • the test signal maybe a narrow band tone, a broad band sweep or may take on any of an infinite number of spectral characteristics.
  • the test signal's waveform may be sinusoidal, triangular, a square wave, or take on one of any number of different shapes. In the preferred embodiment, however, a 300 KHz square wave is generated by the test signal generator 36 and is received at the central office or other facility for analysis with known equipment such as spectrum analyzers and computers using established analytical techniques. This allows the central office to determine a number of parameters including 300 KHz insertion loss, harmonic insertion loss, return loss, phase distortion and predicted ADSL line data rate.
  • the reset control circuit 40 serves to return the switches 32a, 32b back to the monitor mode from the test mode after a predetermine lapse of time.
  • the reset control circuit 40 limits the duration that the test signal is sent to the central office. This duration must be of sufficient length to allow the central office to assess the performance of the ADSL system between the central office to the customer's port.
  • the reset control circuit allows the test signal generator to send a signal for the predetermined period of time of 30 seconds. At the end of this period, the reset control circuit 40 sends a reset control signal on lines 46a, 46b to switches 32a, 32b respectively. In response to the reset control signal, the switches 32a, 32b reconnect the network port to the customer port, and disable the test signal generator and other components of the NIU.
  • Fig. 5 shows an embodiment of an NIU. It is first noted m Fig. 5 that the switches of Fig. 2 are implemented by means of dual pole double throw latching relay whose contacts are designated Kl/A and Kl/B, both contacts being simultaneously activated m response to a signal received at one of two coils associated with the relay -- a "set" coil and a "reset” coil. Each contact of the relay Kl selectively connects one member of the twisted pair to a corresponding element . In the monitor mode, the relay connects the network side port 22a with the customer side port 24a. Under these conditions the voltage protection circuit 34, the test signal generator 36, the power supply 38, and the reset control circuit 40 are all disabled. However the request signal detector 30 is always enabled and monitors the signal coming on the transmission line.
  • the request signal detector 30 provides an input impedance of R7 plus the collective impedance of the remainder of a circuit comprising the detector 30.
  • R7 is preferably 2MHz and so m the monitor mode, the input impedance of the NIU is at least 2 M ⁇ .
  • Such an impedance level meets the requirements of some telephone companies, although a lower impedance level of, say, 500 K ⁇ meets the requirements of other telephone companies.
  • the time constants formed by R7, C9 and R8 , CIO are selected to filter out a 20 Hz ringing signal so that the request signal detector does not false trigger due to the voltage reversal associated with a ringing signal .
  • the central office outputs a quiescent transmission line battery voltage of a predetermined polarity across the twisted pair 12.
  • the magnitude of the voltage is nominally 48 volts, although it may vary from between 42-65 volts.
  • the transmission line battery voltage is used by the NIU both to trigger the request signal detector as well as power the remaining circuitry of the NIU.
  • the request signal detector triggers on a reverse voltage condition, e.g., -48 volts, on the twisted pair for a predetermined period of time.
  • the circuit of Fig. 5 requires a reverse voltage condition of at least 1.5 seconds, although the circuit can easily be configured to respond to some other minimum duration.
  • the central office outputs a request signal comprising a reverse voltage of this duration on the twisted pair 12.
  • capacitors C9 and CIO charge up to the quiescent transmission line DC voltage (typically a 48 volt feed from the central office) . Therefore, the voltage at PNP transistor Q3 ' s emitter and base are also at the quiescent transmission line DC voltage and so Q3 initially does not conduct.
  • CIO cannot discharge due to diode CR5.
  • capacitor C9 first discharges through R7 and, due to the reverse voltage, then begins to charge with a polarity opposite to that of CIO. CIO, however, does not discharge under the reverse voltage condition because of bypass diode CR9.
  • the voltage protection circuit 34 comprises clamping circuit VR1 which acts as an open circuit at voltages below + 100 volts. When the voltage between the twisted pair 12 exceeds ⁇ 100 volts, clamping circuit acts as a short circuit between relay contacts Kl/A and Kl/B. When the current through the relay drops below the holding current, the clamping circuit once more becomes an open circuit .
  • the power supply 38 includes a bridge circuit CR1 arranged m electrical parallel with the voltage protection circuit 34. When the relay Kl is set, bridge circuit CR1 begins to conduct and provides a current through inductor LI . The current then flows through resistor Rl and into base lead of NPN transistor Ql .
  • transistor Ql Because the base-collector voltage is reversed biased, transistor Ql begins to conduct with a current flowing through capacitor C3 and inductor L2 back to the bridge circuit CR1. In the course of charging up C3 , the positive node of C3 connected to the emitter of Ql reaches a level of +2 volts. This level of +2 volts is maintained so long as the relay Kl is set and some voltage of either polarity is provided at the first port. Thus, the emitter voltage of Ql , where it connects to capacitor C3 , is kept steady at +2 volts, and this voltage is tapped to provide the input voltage to drive the remainder of the NIU circuit.
  • CR2 is preferably implemented as a TL431 and serves to ensure that the base-emitter voltage of Ql never exceeds a predetermined value, thereby regulating the voltage and Ql ' s emitter.
  • Inductors LI and L2 isolate the remainder of the power supply 38 from the signal generator 36 by effectively blocking AC signals.
  • the power supply is run off of the line voltage of the twisted pair, onto which a signal from the test signal generator is placed.
  • the test signal generator m the preferred embodiment is implemented by means of a LMC555 timer Ul .
  • This timer is configured to output a square wave having a frequency of 300KHz.
  • the frequency output by the timer is determined selected by the specific values of R12, R5 and C5.
  • the 300 KHz frequency is used because it is a standard frequency used to benchmark ADSL system performance. However, if desired, other frequencies above 35 KHz can also be used as the test signal.
  • the output of the LMC555 timer Ul is sent to an output driver formed by transistors Q5 , Q6, current limiting base resistors R13, R14 and speed-up capacitors Cll and C12 which preserve charge to quickly turn on/turn off Q5 and Q6.
  • the output driver is used to insulate the output pm of the 555 timer from the impedance load of transistor Tl .
  • the output driver acts as a trigger which outputs a signal acceptable for transmission back to the central office.
  • the test signal generated by the output driver passes through R6 and C6 before it is applied to transformer Tl prior to transmission.
  • the test signal then passes through AC coupling capacitors CI, C2 which block DC, before the test signal is applied to the transmission line via relay contacts of relay Kl .
  • Voltage protection element VR2 ensures that the signal applied to coil Tl stays below a predetermined value, m this case 5 volts.
  • the reset control circuit 40 is implemented using a second LMC555 timer U2 , and so the reset control circuit and the reset control circuit can be formed from a single 556 dual -timer.
  • the LMC555 timer U2 triggers the RESET coil of the relay Kl after 30 seconds. It should be noted, however, that the 30 second value is determined by the specific values used for R4 and C7.
  • the OUT pm on the 555 timer U2 outputs a signal which passes through base resistor R3 and into the case lead of transistor Q2. This turns on transistor Q2 , thereby resetting relay Kl .
  • the effect of the signal generator 36 no longer impacts the signal on the transmission line and the transmission line itself returns to the monitor mode m which the request signal detector 30 further awaits a valid request signal.
  • Table 1 lists the component values of the inductors, resistors and capacitors m the circuit of Fig. 5, while Table 2 provides information about the remaining components.
  • the device described above can be used whenever it is desirable to temporarily isolate equipment connected to a twisted pair transmission line for testing purposes.
  • the present device can be used m conjunction with a variety of narrowband and broadband communication systems which use a twisted pair.
  • changing the signal generator to output different test signals may allow one to test the suitability of the twisted pair for a wide variety of communication services.
  • Fig. 6 shows an ADSL system 110 similar to that shown m Fig. 1.
  • the system of Fig. 6 includes central office equipment 114, the twisted pair transmission line 112, network interface port 122, ADSL line tester circuit 118, customer POTS port 124, customer POTS equipment 116 and customer ADSL modem port 126, the last of which connects to an ADSL modem 128.
  • Fig. 7 shows a block diagram of the ADSL line tester circuit 118 of the present invention.
  • the tester circuit 118 comprises a network interface unit 119a coupled at input nodes N4 , N5 and output nodes N6 , N7 to a low pass filter 119b via dual contact relays K2 and K3.
  • Relay K2 selectively connects the output of the network interface unit 119a withm tester 118 to the twisted-pair side of the ADSL low pass filter 119b and the ADSL modem 128.
  • Relay K3 selectively connects the POTS side of the ADSL low pass filter 119b to the customer POTS port 124.
  • Relay contacts K2/A and K3/A are connected by bypass line 129a while relay contact K2/B and K3/B are connected by bypass line 129b. Therefore, when dual contact relays K2 and K3 are reset, the output of the network interface unit 119a bypasses both the ADSL low pass filter and the ADSL modem, and is directly connected to customer POTS port 124.
  • Fig. 8 shows the normal operating mode for the ADSL line tester 118 of the present invention.
  • a high impedance monitor circuit 118a monitors the twisted pair for a battery voltage reversal for two seconds from the central office, as described above with respect to Fig. 3.
  • the twisted pair from the network interface port 122 is thus connected to the twisted pair side of the ADSL low pass filter 119b and also to the ADSL modem port 126.
  • Fig. 9 shows a block diagram of the effective circuit during the first phase of the test mode.
  • the ADSL low pass filter 119b and the ADSL modem 128 are isolated and a test circuit 118b is activated.
  • the test circuit 118b, m which a test signal is sent back to the central office as described above with reference to the test signal generator 36 of Fig. 5, allows the central office to check the twisted pair between the central office and the customer's premises.
  • This first phase lasts for a first predetermined period of time.
  • the first predetermined period of time lasts 30 seconds, although a ..ide range of test signal times may be employed, as discussed aoove with respect to timer Ul .
  • the line tester 118 exits the first phase of the test mode and enters the second phase.
  • Fig. 10 shows a block diagram of the effective circuit during the second phase of the test mode.
  • the network interface port 122 is directly connected to the customer POTS port . This is preferably done by bypassing tne ADSL low pass filter 119b and disconnecting the ADSL modem 128.
  • the second phase lasts for a second predetermined period of time which, m the preferred embodiment, lasts for about 3 minutes, although this duration may be adjusted to any desired value, as discussed below.
  • the central office can send one or more signals to test the customer's POTS equipment without worrying about the effects of the ADSL low pass filter or the ADSL modem.
  • the two test phases help the central office diagnose problems with a subscriber's service.
  • the twisted pair line is tested to establish a oase line.
  • the second test phase which uses the twisted pair line, provides measurements about the already-tested twisted pair series with the customer's POTS equipment. The just-measured characteristics of the twisted pair can then be "backed out" of the system response of the twisted-pair/customer POTS take together, so as to evaluate or diagnose customer equipment.
  • the central office may simply look for capacitance on the line to see whether the customer's phone is hooked. Diagnostics of otner sorts may also be performed, especially m those cases where the customer's telephones can intelligently respond to query signals sent by the central office during the second phase of the test mode .
  • Fig. 11 presents a detailed circuit diagram of the ADSL line tester 118.
  • the ADSL line tester 118 of Fig. 11 is similar to that shown Fig. 5, but also includes a 300 V voltage protection circuit VR3 connected across the network interface port, a high impedance bypass reset circuit 150 having nodes NI and N2 connected to the two terminals of the network interface port 122 (and thus to the tip & ring lines, respectively) , and a node N3 receiving a signal from the top of inductor LI.
  • the ADSL line tester also includes the bypass circuitry for selectively bypassing the ADSL low pass filter 119b, as discussed Fig. 7.
  • the circuit of Fig. 11 also includes minor differences m the power subcircuit 138 and the reset subcircuit 140.
  • the power subcircuit 138 preferably outputs a supply voltage of +5 volts. This contrasts with the preferred supply voltage of +2 volts used the circuit of Fig. 5.
  • the power subcircuit of Fig. 11 has R15 and R16 connected between the emitter of Ql and ground. Since CR2 provides a 2.5 volt reference across R15, and since R16 is the same as R15, the voltage at Ql ' s emitter, from where the supply voltage is taken, is maintained at +5 volts. It should be kept mind, however, that many alternate approaches may be taken to provide the desired output voltage, and that other output voltages may be provided by appropriate choices for R15 and R16.
  • the power subcircuit of Fig. 11 also includes capacitor C15. Capacitor C15 helps filter out the 300 KHz (or other) test signal which is coupled back into the twisted pair during the test mode.
  • reset circuit 140 differs somewhat from the reset circuit 40 shown m Fig. 5.
  • reset circuit 140 uses a second transistor Q7 whose emitter is connected to the base of Q2 This arrangement nelps increase the current flow through Q2 , so as to reliably reset all three dual contact relays Kl , K2 and K3 , when U2 times out, preferably after 30 seconds as discussed above.
  • the reset circuit 140 also includes current limiting resistor R17 connected to the collector Q7 for protection.
  • Fig. 12 shows a detailed diagram of the high impedance bypass reset circuit 150 of Fig. 11.
  • the bypass circuit 150 is connected across the network interface port at nodes NI , N2 m series with resistors R18 and R19, respectively.
  • the bypass circuit 50 also receives an input from the power circuit 138
  • capacitor C16 discharges through resistors R22 and R23. After discharging to a sufficient degree, Q8 shuts off, capacitor C16 charges up again and the cycle is repeated. Therefore, as the line tester is m the normal operating mode, C16 constantly charges and then discharges via CR10.
  • inductor LI When the circuit of Fig. 11 enters the first phase of the test mode, inductor LI is active, relay Kl is reset (enter test mode) , and node N3 is high. With node N3 high, the base of Q8 is forward biased and so Q8 turns on, thereby turning on Q9, and current flows through CR11, R25 and R24, as before. Q8 stays on so long as node N3 is high - i.e., until Kl is reset by reset circuit 140 -- about 30 seconds after entering the first phase of the test mode. Until Kl is reset, capacitor C16 cannot charge since Q8 is conducting and current flows through R5.
  • relay Kl After the 30 second long first phase of the test mode, relay Kl is reset, and so are relays K2 and K3. Resetting relays K2 and K3 results a bypass of the ADSL low pass filter 119b, thereby enabling the second phase of the test mode. Soon after Kl is reset, node N3 floats, causing Q8 and Q9 turn off. At this instant, capacitor C16 is still discharged. However, with Q8 and Q9 off, the base of Q8 floating, and R5 no longer conducting, capacitor C16 begins to charge once again. Capacitor C16 charges until there is sufficient voltage to cause CR10 to conduct and turn on Q8 once again.
  • the second phase of the test mode lasts from the time that node N3 floats and Q8 turns off with relays K2 and K3 reset ( bypass) until the relays are set when Q8 begins conducting once again.
  • the second phase of the test mode lasts about 3 minutes.
  • Fig. 13 shows the preferred embodiment of the ADSL low pass filter 119b, which is bypassed durmg the second phase of the test mode.
  • the ADSL low pass filter is further described m commonly owned U.S. Appl ' n No. 09/083,162, whose contents are incorporated by reference to the extent necessary to understand the present invention.
  • relays K2 and K3 are reset, thereby bypassing the ADSL low pass filter and the ADSL modem port 126. This allows one to test customer's POTS equipment connected to customer POTS port 124 from the central office.
  • Tables 3 and 4 present the values for the various components found m Figs. 11-13, excepting those which are identical Fig. 5.
  • battery voltage reversal is performed for signaling schemes other than for entering a test mode. These signaling schemes can include such things as caller line ID and even battery reversal during ringing. Therefore, reversing a battery voltage to cause the NIU to enter a test mode may not always be an option.
  • an alternative to reversing the battery voltage is to simply shut the voltage off for a predetermined period of time, and then turn it back on again. This can be done, for example, by either open- circuitmg the twisted pair or by shorting the twisted pair for a brief period of time. And preferably, this is performed at, or proximate to, the central office.
  • Fig. 14 shows an alternative power/detector circuit 238 which detects a five-second shut-off of the battery voltage followed by resumption of the normal battery voltage.
  • Circuit 238 is similar to power supply 38 seen m Fig. 5 and Fig. 11.
  • resistor R107 and capacitor C100 act as a low pass filter to only charge on DC voltage. This filter filters out a 20 Hz ringing signal so as not to false trigger when the customer phone is rung.
  • C100 will charge to the nominal DC voltage on the line which, m the customer on-hook condition, is typically about 48V. When the customer goes off hook (to make a call perhaps) , C100 will charge/discharge to the off- hook DC voltage of around 3-10 volts.
  • the battery removal circuitry of Fig. 14 is designed not to false trip m response to either a voltage transition from on-hook to off-hook, or under battery reversal conditions.
  • BR1 rectifies the DC voltage so as to present a known polarity to the battery removal circuitry while CR100 and CR101 act as protection for the battery removal circuitry the event of a high voltage across the tip and ring lines.
  • ClOl, C102 and C103 will also charge up to the DC voltage applied to the line.
  • a very small current will flow through R100 and the base of Q100. This keeps Q100 saturate, thereby drawing current through R101.
  • the total leakage current draw of this circuit is required to be very low. In this state, the entire circuit draws under 20 ⁇ A. Since Q100 is saturated, current is diverted from the base of Q100, thereby keeping it the cutoff region (i.e., "off”) .
  • ClOl When the battery is removed at the central office, ClOl will discharge through R100 and Q100. After about 5 seconds at 48V, or 2.5 seconds at 3V, ClOl will discharge to such an extent that it can no longer supply current to Q100. When this happens, Q100 will turn off (i.e., be m cutoff), allowing the current through R101 to flow to the base of Q101. And since
  • C102 has a larger capacitance than ClOl, C102 has enough stored charge to ensure that Q101 will turn even after ClOl turns on. CR103 ensures that C102 will not discharge back through ClOl.
  • Q101 goes into the active region (i.e., turns on)
  • Q102 is likewise brought into the active region, thus turning Q101 on even stronger.
  • the SCR comprised of Q102, Q101 and R102 will latch on, with both Q1C1 and Q102 saturated.
  • current limiter comprised of Q103, R103, CR104, CR105, CR106 and R104.
  • the current limiter will limit the current through the relay and the SCR to a safe value of about 100 mA.
  • the current limiter protects the relay and the SCR when C103 is charged up at 48V.
  • current limiter turns on, current flows through the latching relay set coil, drawing current from C103 This actuates Kl , causing the overall circuit to enter test mode #1.
  • a nominal minimum voltage-off time of five seconds is used, it should be kept m mind that this duration can be changed by using different component values for C100, ClOl and R100. It is preferable, however, that the minimum voltage-off time exceed spikes due to lightning and other such transients.
  • Tables 5 and 6 present the component values for the circuit of Fig. 12.
  • the devices described above may be implemented on a printed circuit board using discrete components and portions may even be implemented as an application-specific integrated circuit (ASIC) .
  • ASIC application-specific integrated circuit
  • portions of the signal generator circuit and reset control circuit, among other components of the device can be replaced by a microprocessor or other programmable unit, albeit at greater expense, using current technology.

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Abstract

A network interface device (18) intended to be placed approximate to the customers equipment (16) and remote from a central office (14) of a telephone company ('TELCO'). The purpose of the network interface device (18) is to allow the twisted pair transmission line (12) between the central office (14) and the customer's port (124) to be selectively switched from a normal monitoring mode into a test mode. The test mode has two phases. In the first phase, the NIU (18) transmits a signal back to the central office (14). This allows the central office (14) to determine whether there are any problems with the transmission line (12), the potential bandwidth for the transmission line and related parameters concerning the efficacy and suitability of the transmission line for a variety of the communication services. In the second phase, which is entered into upon completion of the first phase, the customer-end ADSL low pass filter is bypassed to that the central office can test the customer's POTS equipment (16).

Description

SIGNALING METHOD FOR INVOKING A TEST MODE IN A NETWORK
INTERFACE UNIT
TECHNICAL FIELD
The present invention is directed to remotely monitoring and evaluating a twisted pair transmission line, such as that used m telephone line communication. It is especially directed to communication systems, such as an asynchronous digital subscriber line ("ADSL") which use a telephone line for communication between a customer and a central office.
BACKGROUND OF THE INVENTION
Asymmetric Digital Subscriber Line (ADSL) is a technology which allows for simultaneous voice and data traffic to coexist over a communication channel comprising a standard telephone transmission line. Typically, the standard telephone transmission lines comprise an unshielded twisted pair of copper wire having a gauge of 22-26AWG. Twisted pairs, which can be used to connect a central telephone system (a 'central' unit) to a subscriber's telephone (a 'remote' unit) can support bandwidths of up to 2MHz through the use of digital signal processing (DSP) technology. Thus, they can be used for bandwidth-intensive applications, such as internet access and video-on demand, as well as for carrying voice traffic. Frequency division multiplexing is used so that a plurality of signals, each occupying a different frequency band, can be simultaneously sent over the same transmission line .
The voice traffic band comprises a number of frequency sub-bands, or channels, ranging from DC to 20 KHz. The analog voiceband frequency is typically specified as 200-4000 Hz. Customer specified additions may include phone operation up to 8 KHz and 12-16 KHz billing tones. In addition, DC to 30 Hz frequencies are typically assigned for auxiliary analog signaling purposes, such as ringing the telephone, dial pulsing and on/off hook signaling.
ADSL data traffic bandwidth for CAP (carπerless amplitude and phase) modulation is typically from 35 KHz - 1.5 MHZ. Of this, upstream data traffic (i.e., remote unit to central unit) uses the 35 KHz-191 KHz band, while the downstream traffic (i.e., central unit to remote unit) uses the 240 KHz-1.5 MHZ band. Before providing the customer with ADSL service, the telephone company ("TELCO") must determine whether the line is suitable for ADSL communication. This is typically done by testing the lines between the TELCO' s central office or substation, and the customer's site. In cases where the ADSL service is provided to the customer's residence, this often means testing the line at the point of entry to the building in which the customer's dwelling is located. After initiation of ADSL service, there are occasions m which the customer experiences problems in ADSL communication. In those instances, then TELCO must determine whether the trouble lies with the TELCO' s equipment or with the customer's equipment. To make this determination, a TELCO representative may visit the customer's site to test whether the twisted pair line from the customer's site to the TELCO central office or substation is working properly, and also to test whether the customer's equipment is working properly. This requires considerable expense due to the time taken by the repairman.
SUMMARY OF THE INVENTION The present invention is directed to an apparatus and method for remotely testing the TELCO' s ADSL equipment, without having to travel to the customer's site. It uses an interface unit which is installed proximate to the customer's equipment, which can be selectively operated from a remote location to test the TELCO' s ADSL equipment. A device in accordance with the present invention is installed between the customer's port and the TELCO' s port at the point where the line enters the customer's site.
A device m accordance with the present invention operates m one of two modes : a monitor mode and a test mode . In the monitor mode a subcircuit of the device looks for a request signal asking the device to switch from the monitor mode to the test mode. When a valid request signal is received from the central office on the twisted pair, the device is switched into the test mode. The test mode has two phases. In the first phase, a signal generator of the device isolates the customer equipment and transmits a test signal from the unit back to the central station on the twisted pair. A timer circuit associated with the device allows this first phase to proceed for a predetermined period of time. In the second phase, the device isolates customer-end filter circuitry so as to directly test the customer's POTS equipment . The device includes a voltage regulator which provides an operating voltage for the remaining components and subcircuits of the device.
BRIEF DESCRIPTION OF THE DRAWINGS
The present invention can better be understood through the attached figures m which: Fig. 1 presents a block diagram of an ADSL system incorporating a network interface unit;
Fig. 2 presents a block diagram of an embodiment of a network interface unit;
Fig. 3 presents a block diagram of the normal mode m which the network interface unit of Fig. 2 operates;
Fig. 4 presents a block diagram of the test mode m which the network interface unit of Fig. 2 operates;
Fig. 5 presents a detailed diagram of the network interface unit of Fig. 2. Fig. 6 presents a block diagram of an ADSL system incorporating a network interface unit m accordance with the present invention;
Fig. 7 presents a block diagram of a device m accordance with the present invention;
Fig. 8 presents a .block diagram of a device of Fig. 7 m the normal mode;
Fig. 9 presents a block diagram of a device of Fig. 7 m the first phase of the test mode; Fig. 10 presents a block diagram of a device of Fig. 7 m the second phase of the test mode;
Fig. 11 presents a detailed diagram of the network interface unit m accordance with the present invention;
Fig. 12 presents a circuit diagram of the high impedance bypass circuit of the network interface unit of Fig. 11;
Fig. 13 presents the bypass circuitry for a lowpass POTS filter; and
Fig. 14 presents an alternative detector/power circuit.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT
Fig. 1 shows an ADSL system 10 which incorporates a device m accordance with the present invention. The ADSL system 10 comprises a transmission line 12 which extends between a central office 14 and a customer's site 16. In addition, the ADSL system 10 includes a network interface unit 18 (NIU) which is physically located near the customer' s equipment 16 and interfaces the customer equipment to the transmission line 12.
As shown m the figures, the network interface unit 18 is dual ported with one side connected to a network interface port 22 and the other side connected to the customer port 24. The purpose of locating a network interface unit close to the customer's site is to allow the central office 14 to test whether its transmission equipment and the transmission line 12 are functioning properly without having to visit the customer's site. This testing is made possible by the design and function of the Network Interface Unit.
Fig. 2 shows a functional block diagram of the NIU. As seen m Fig. 2, the NIU comprises a request signal detector 30, a pair of line-control switches 32a, 32b, a voltage protection circuit 34, a test signal generator 36, a power supply 38, and a reset control circuit 40. As seen m Fig. 5, the NIU has a first port 22a comprising terminals 22b, 22c on the network side and a second port 24a comprising corresponding terminals 24b, 24c on the customer side. The request signal detector 30 is a high impedance circuit connected across the network port which is configured to detect a valid request signal sent by the central office. The request signal may take any number of forms. For instance, it could be a coded sequence of pulses sent from the central office. Alternatively, it may be a signal having predetermined spectral and amplitude characteristics. In the preferred embodiment, however, the request signal is a battery reversal condition having a predetermined duration. Once the detector 30 recognizes that a valid request signal has been received, it outputs a first control signal on lines 42a, 42b, m order to switch the NIU from the monitor mode to the test mode .
Switches 32a and 32b connect the voltage nodes 44a, 44b at the network side port 22a to the customer side port 24a, when the NIU is m the monitor mode. Thus, m the monitor mode the presence of the NIU is transparent to the customer equipment and the central office only sees a high impedance monitor circuit 18a shunted across the transmission lines 12. Upon receiving the first control signal on lines 42a, 42b from the request signal detector 30, the switches 32a, 32b break the connection between the network port to the customer port, and instead establish a connection to the circuitry of the NIU to form a test circuit 18b. Because switches 32a, 32b are activated at the same time m response to receipt of a valid request signal, the switches 32a, 32b may be implemented as a single double-pole double-throw electronic switch which selectively connects a pair of input lines to either of two pairs of output lines. Whether m the monitor mode or m the test mode, the terminals 22b, 22c of the network side port 22a serve as first and second voltage nodes having an input voltage therebetween.
When switches 32a, 32b are toggled into the test mode, other components of the NIU are activated. First, the voltage protection circuit 34 is activated and serves to prevent an over voltage condition across the transmission line which might otherwise destroy the NIU. In addition, the power supply 38 is activated and outputs a DC operating voltage Vs which is used to drive the test signal generator 36 and the reset control circuit 40. The NIU' s power supply 38 draws its power from the office battery voltage. Therefore, the power supply 38 does not need to be provided with a local battery or other power source .
The test signal generator 36 outputs a signal and this signal is sent down the transmission line 12 back to the central office. The test signal maybe a narrow band tone, a broad band sweep or may take on any of an infinite number of spectral characteristics. The test signal's waveform may be sinusoidal, triangular, a square wave, or take on one of any number of different shapes. In the preferred embodiment, however, a 300 KHz square wave is generated by the test signal generator 36 and is received at the central office or other facility for analysis with known equipment such as spectrum analyzers and computers using established analytical techniques. This allows the central office to determine a number of parameters including 300 KHz insertion loss, harmonic insertion loss, return loss, phase distortion and predicted ADSL line data rate.
The reset control circuit 40 serves to return the switches 32a, 32b back to the monitor mode from the test mode after a predetermine lapse of time. Thus, the reset control circuit 40 limits the duration that the test signal is sent to the central office. This duration must be of sufficient length to allow the central office to assess the performance of the ADSL system between the central office to the customer's port. In the preferred embodiment, the reset control circuit allows the test signal generator to send a signal for the predetermined period of time of 30 seconds. At the end of this period, the reset control circuit 40 sends a reset control signal on lines 46a, 46b to switches 32a, 32b respectively. In response to the reset control signal, the switches 32a, 32b reconnect the network port to the customer port, and disable the test signal generator and other components of the NIU. Fig. 5 shows an embodiment of an NIU. It is first noted m Fig. 5 that the switches of Fig. 2 are implemented by means of dual pole double throw latching relay whose contacts are designated Kl/A and Kl/B, both contacts being simultaneously activated m response to a signal received at one of two coils associated with the relay -- a "set" coil and a "reset" coil. Each contact of the relay Kl selectively connects one member of the twisted pair to a corresponding element . In the monitor mode, the relay connects the network side port 22a with the customer side port 24a. Under these conditions the voltage protection circuit 34, the test signal generator 36, the power supply 38, and the reset control circuit 40 are all disabled. However the request signal detector 30 is always enabled and monitors the signal coming on the transmission line.
As seen m Fig. 5, the request signal detector 30 provides an input impedance of R7 plus the collective impedance of the remainder of a circuit comprising the detector 30. As shown m Table 1, R7 is preferably 2MHz and so m the monitor mode, the input impedance of the NIU is at least 2 MΩ. Such an impedance level meets the requirements of some telephone companies, although a lower impedance level of, say, 500 KΩ meets the requirements of other telephone companies. Regardless of the input impedance due to R7 , the time constants formed by R7, C9 and R8 , CIO are selected to filter out a 20 Hz ringing signal so that the request signal detector does not false trigger due to the voltage reversal associated with a ringing signal .
As is known to those skilled m the art, the central office outputs a quiescent transmission line battery voltage of a predetermined polarity across the twisted pair 12. The magnitude of the voltage is nominally 48 volts, although it may vary from between 42-65 volts. The transmission line battery voltage is used by the NIU both to trigger the request signal detector as well as power the remaining circuitry of the NIU. In the preferred embodiment, the request signal detector triggers on a reverse voltage condition, e.g., -48 volts, on the twisted pair for a predetermined period of time. The circuit of Fig. 5 requires a reverse voltage condition of at least 1.5 seconds, although the circuit can easily be configured to respond to some other minimum duration. Thus, to switch from the monitor mode to the test mode, the central office outputs a request signal comprising a reverse voltage of this duration on the twisted pair 12.
When m the monitor mode, capacitors C9 and CIO charge up to the quiescent transmission line DC voltage (typically a 48 volt feed from the central office) . Therefore, the voltage at PNP transistor Q3 ' s emitter and base are also at the quiescent transmission line DC voltage and so Q3 initially does not conduct. When a reverse battery condition occurs, CIO cannot discharge due to diode CR5. However, under the reverse voltage condition, capacitor C9 first discharges through R7 and, due to the reverse voltage, then begins to charge with a polarity opposite to that of CIO. CIO, however, does not discharge under the reverse voltage condition because of bypass diode CR9. When the voltage difference between CIO (which remains at about 48 volts during the reverse voltage condition) and C9 exceeds the Zener voltage of CR6 (51 volts m the preferred embodiment) , Q3 begins to go into the active region. Since Q3 ' s collector is connected to Q4 ' s base, Q4 also becomes active. When transistor Q4 turns on, its collector current causes Q3 to turn on even harder, sending both transistors into saturation. This results m CIO discharging through resistor Rll and the SET coil of the relay Kl . After approximately 2 ms , the relay Kl sets, thereby disconnecting the customer from the transmission line 12 and engaging the test circuit.
Once relay Kl has been set by detector 30, the remainder of the NIU is activated. The voltage protection circuit 34 comprises clamping circuit VR1 which acts as an open circuit at voltages below + 100 volts. When the voltage between the twisted pair 12 exceeds ± 100 volts, clamping circuit acts as a short circuit between relay contacts Kl/A and Kl/B. When the current through the relay drops below the holding current, the clamping circuit once more becomes an open circuit . The power supply 38 includes a bridge circuit CR1 arranged m electrical parallel with the voltage protection circuit 34. When the relay Kl is set, bridge circuit CR1 begins to conduct and provides a current through inductor LI . The current then flows through resistor Rl and into base lead of NPN transistor Ql . Because the base-collector voltage is reversed biased, transistor Ql begins to conduct with a current flowing through capacitor C3 and inductor L2 back to the bridge circuit CR1. In the course of charging up C3 , the positive node of C3 connected to the emitter of Ql reaches a level of +2 volts. This level of +2 volts is maintained so long as the relay Kl is set and some voltage of either polarity is provided at the first port. Thus, the emitter voltage of Ql , where it connects to capacitor C3 , is kept steady at +2 volts, and this voltage is tapped to provide the input voltage to drive the remainder of the NIU circuit. CR2 is preferably implemented as a TL431 and serves to ensure that the base-emitter voltage of Ql never exceeds a predetermined value, thereby regulating the voltage and Ql ' s emitter. Inductors LI and L2 isolate the remainder of the power supply 38 from the signal generator 36 by effectively blocking AC signals. Thus, m the present invention, the power supply is run off of the line voltage of the twisted pair, onto which a signal from the test signal generator is placed.
The test signal generator m the preferred embodiment is implemented by means of a LMC555 timer Ul . This timer is configured to output a square wave having a frequency of 300KHz. The frequency output by the timer is determined selected by the specific values of R12, R5 and C5. In the preferred embodiment, the 300 KHz frequency is used because it is a standard frequency used to benchmark ADSL system performance. However, if desired, other frequencies above 35 KHz can also be used as the test signal.
The output of the LMC555 timer Ul is sent to an output driver formed by transistors Q5 , Q6, current limiting base resistors R13, R14 and speed-up capacitors Cll and C12 which preserve charge to quickly turn on/turn off Q5 and Q6. The output driver is used to insulate the output pm of the 555 timer from the impedance load of transistor Tl .
The output driver acts as a trigger which outputs a signal acceptable for transmission back to the central office. In this instance, the test signal generated by the output driver passes through R6 and C6 before it is applied to transformer Tl prior to transmission. The test signal then passes through AC coupling capacitors CI, C2 which block DC, before the test signal is applied to the transmission line via relay contacts of relay Kl . Voltage protection element VR2 ensures that the signal applied to coil Tl stays below a predetermined value, m this case 5 volts.
The reset control circuit 40 is implemented using a second LMC555 timer U2 , and so the reset control circuit and the reset control circuit can be formed from a single 556 dual -timer. In the preferred embodiment of Fig. 5, the LMC555 timer U2 triggers the RESET coil of the relay Kl after 30 seconds. It should be noted, however, that the 30 second value is determined by the specific values used for R4 and C7. After 30 seconds the OUT pm on the 555 timer U2 outputs a signal which passes through base resistor R3 and into the case lead of transistor Q2. This turns on transistor Q2 , thereby resetting relay Kl . Once relay Kl has been reset, the effect of the signal generator 36 no longer impacts the signal on the transmission line and the transmission line itself returns to the monitor mode m which the request signal detector 30 further awaits a valid request signal.
Table 1 lists the component values of the inductors, resistors and capacitors m the circuit of Fig. 5, while Table 2 provides information about the remaining components.
Figure imgf000014_0001
Table 1 - Component Values for Inductors, Resistors & Capacitors m Filter Circuit of Fig. 5
Figure imgf000015_0001
Table 2 - Other Components m Circuit of Fig.
The device described above can be used whenever it is desirable to temporarily isolate equipment connected to a twisted pair transmission line for testing purposes. Thus, instead of only being useful for ADSL services, the present device can be used m conjunction with a variety of narrowband and broadband communication systems which use a twisted pair.
In such case, changing the signal generator to output different test signals may allow one to test the suitability of the twisted pair for a wide variety of communication services.
Fig. 6 shows an ADSL system 110 similar to that shown m Fig. 1. The system of Fig. 6 includes central office equipment 114, the twisted pair transmission line 112, network interface port 122, ADSL line tester circuit 118, customer POTS port 124, customer POTS equipment 116 and customer ADSL modem port 126, the last of which connects to an ADSL modem 128.
Fig. 7 shows a block diagram of the ADSL line tester circuit 118 of the present invention. The tester circuit 118 comprises a network interface unit 119a coupled at input nodes N4 , N5 and output nodes N6 , N7 to a low pass filter 119b via dual contact relays K2 and K3. Relay K2 selectively connects the output of the network interface unit 119a withm tester 118 to the twisted-pair side of the ADSL low pass filter 119b and the ADSL modem 128. Relay K3 selectively connects the POTS side of the ADSL low pass filter 119b to the customer POTS port 124. Relay contacts K2/A and K3/A are connected by bypass line 129a while relay contact K2/B and K3/B are connected by bypass line 129b. Therefore, when dual contact relays K2 and K3 are reset, the output of the network interface unit 119a bypasses both the ADSL low pass filter and the ADSL modem, and is directly connected to customer POTS port 124.
Fig. 8 shows the normal operating mode for the ADSL line tester 118 of the present invention. In the normal operating mode, a high impedance monitor circuit 118a monitors the twisted pair for a battery voltage reversal for two seconds from the central office, as described above with respect to Fig. 3. The twisted pair from the network interface port 122 is thus connected to the twisted pair side of the ADSL low pass filter 119b and also to the ADSL modem port 126.
Upon reception of a voltage reversal condition lasting two seconds, the line tester 118 switches into a test mode having two phases . Fig. 9 shows a block diagram of the effective circuit during the first phase of the test mode. In the first phase of the test mode, the ADSL low pass filter 119b and the ADSL modem 128 are isolated and a test circuit 118b is activated. The test circuit 118b, m which a test signal is sent back to the central office as described above with reference to the test signal generator 36 of Fig. 5, allows the central office to check the twisted pair between the central office and the customer's premises. This first phase lasts for a first predetermined period of time. Preferably, the first predetermined period of time lasts 30 seconds, although a ..ide range of test signal times may be employed, as discussed aoove with respect to timer Ul . At the end of the first predetermined period of time, the line tester 118 exits the first phase of the test mode and enters the second phase. Fig. 10 shows a block diagram of the effective circuit during the second phase of the test mode. In the second phase, the network interface port 122 is directly connected to the customer POTS port . This is preferably done by bypassing tne ADSL low pass filter 119b and disconnecting the ADSL modem 128. The second phase lasts for a second predetermined period of time which, m the preferred embodiment, lasts for about 3 minutes, although this duration may be adjusted to any desired value, as discussed below. During the second phase of the test mode, the central office can send one or more signals to test the customer's POTS equipment without worrying about the effects of the ADSL low pass filter or the ADSL modem.
Together, the two test phases help the central office diagnose problems with a subscriber's service. In the first test phase, the twisted pair line is tested to establish a oase line. The second test phase, which uses the twisted pair line, provides measurements about the already-tested twisted pair series with the customer's POTS equipment. The just-measured characteristics of the twisted pair can then be "backed out" of the system response of the twisted-pair/customer POTS take together, so as to evaluate or diagnose customer equipment.
For instance, m the second phase of the test mode, the central office may simply look for capacitance on the line to see whether the customer's phone is hooked. Diagnostics of otner sorts may also be performed, especially m those cases where the customer's telephones can intelligently respond to query signals sent by the central office during the second phase of the test mode .
Fig. 11 presents a detailed circuit diagram of the ADSL line tester 118. The ADSL line tester 118 of Fig. 11 is similar to that shown Fig. 5, but also includes a 300 V voltage protection circuit VR3 connected across the network interface port, a high impedance bypass reset circuit 150 having nodes NI and N2 connected to the two terminals of the network interface port 122 (and thus to the tip & ring lines, respectively) , and a node N3 receiving a signal from the top of inductor LI. The ADSL line tester also includes the bypass circuitry for selectively bypassing the ADSL low pass filter 119b, as discussed Fig. 7. In addition to the foregoing differences from the circuit of Fig. 5, the circuit of Fig. 11 also includes minor differences m the power subcircuit 138 and the reset subcircuit 140.
In the circuit of Fig. 11, the power subcircuit 138 preferably outputs a supply voltage of +5 volts. This contrasts with the preferred supply voltage of +2 volts used the circuit of Fig. 5. To put out a supply voltage of +5 volts, the power subcircuit of Fig. 11 has R15 and R16 connected between the emitter of Ql and ground. Since CR2 provides a 2.5 volt reference across R15, and since R16 is the same as R15, the voltage at Ql ' s emitter, from where the supply voltage is taken, is maintained at +5 volts. It should be kept mind, however, that many alternate approaches may be taken to provide the desired output voltage, and that other output voltages may be provided by appropriate choices for R15 and R16. In addition to R15, R16, the power subcircuit of Fig. 11 also includes capacitor C15. Capacitor C15 helps filter out the 300 KHz (or other) test signal which is coupled back into the twisted pair during the test mode.
In the circuit of Fig. 11, the reset circuit 140, too, differs somewhat from the reset circuit 40 shown m Fig. 5. First, reset circuit 140 uses a second transistor Q7 whose emitter is connected to the base of Q2 This arrangement nelps increase the current flow through Q2 , so as to reliably reset all three dual contact relays Kl , K2 and K3 , when U2 times out, preferably after 30 seconds as discussed above. The reset circuit 140 also includes current limiting resistor R17 connected to the collector Q7 for protection.
Fig. 12 shows a detailed diagram of the high impedance bypass reset circuit 150 of Fig. 11. The bypass circuit 150 is connected across the network interface port at nodes NI , N2 m series with resistors R18 and R19, respectively. The bypass circuit 50 also receives an input from the power circuit 138
Figure imgf000019_0001
When the circuit of Fig. 11 is the normal operating mode (no testing) , node N3 floats and capacitor C16 charges via resistor R20 and C17 charges via resistor R22. C16 charges for a predetermined period of time which depends on the particular values of C16 and R20, until the voltage across CR10 exceeds the breakdown voltage, which is preferably about 18 V. When the breakdown voltage of CR10 is exceeded, transistor Q8 turns on, causing transistor Q9 to turn on, resulting m a latch with Q8. With Q8 on, current flows through Zener diode CR11, and resistors R25, R24 and relays K2 and K3 receive a Set signal, maintaining them the 'no bypass" condition. Under these conditions, capacitor C16 discharges through resistors R22 and R23. After discharging to a sufficient degree, Q8 shuts off, capacitor C16 charges up again and the cycle is repeated. Therefore, as the line tester is m the normal operating mode, C16 constantly charges and then discharges via CR10.
When the circuit of Fig. 11 enters the first phase of the test mode, inductor LI is active, relay Kl is reset (enter test mode) , and node N3 is high. With node N3 high, the base of Q8 is forward biased and so Q8 turns on, thereby turning on Q9, and current flows through CR11, R25 and R24, as before. Q8 stays on so long as node N3 is high - i.e., until Kl is reset by reset circuit 140 -- about 30 seconds after entering the first phase of the test mode. Until Kl is reset, capacitor C16 cannot charge since Q8 is conducting and current flows through R5.
After the 30 second long first phase of the test mode, relay Kl is reset, and so are relays K2 and K3. Resetting relays K2 and K3 results a bypass of the ADSL low pass filter 119b, thereby enabling the second phase of the test mode. Soon after Kl is reset, node N3 floats, causing Q8 and Q9 turn off. At this instant, capacitor C16 is still discharged. However, with Q8 and Q9 off, the base of Q8 floating, and R5 no longer conducting, capacitor C16 begins to charge once again. Capacitor C16 charges until there is sufficient voltage to cause CR10 to conduct and turn on Q8 once again. After Q8 turns on, Q9 also turns on, current flows through R25 and relays K2 and K3 are set, returning the ADSL line tester 118 to the normal operating mode. Thus, the second phase of the test mode lasts from the time that node N3 floats and Q8 turns off with relays K2 and K3 reset ( bypass) until the relays are set when Q8 begins conducting once again. With the preferred values of R20 and C16, the second phase of the test mode lasts about 3 minutes.
Fig. 13 shows the preferred embodiment of the ADSL low pass filter 119b, which is bypassed durmg the second phase of the test mode. The ADSL low pass filter is further described m commonly owned U.S. Appl ' n No. 09/083,162, whose contents are incorporated by reference to the extent necessary to understand the present invention. During the second phase of the test mode, relays K2 and K3 are reset, thereby bypassing the ADSL low pass filter and the ADSL modem port 126. This allows one to test customer's POTS equipment connected to customer POTS port 124 from the central office. Tables 3 and 4 present the values for the various components found m Figs. 11-13, excepting those which are identical Fig. 5.
Figure imgf000021_0001
Table 3 - Component Values for Resistors & Capacitors in Figs. 11-13 (excepting those identical in the circuit of Fig. 5)
Figure imgf000022_0001
Table 4 - Other Components m Figs. 11-13 (excepting those identical m the circuit of Fig. 5)
In some countries, battery voltage reversal is performed for signaling schemes other than for entering a test mode. These signaling schemes can include such things as caller line ID and even battery reversal during ringing. Therefore, reversing a battery voltage to cause the NIU to enter a test mode may not always be an option. In such case, an alternative to reversing the battery voltage is to simply shut the voltage off for a predetermined period of time, and then turn it back on again. This can be done, for example, by either open- circuitmg the twisted pair or by shorting the twisted pair for a brief period of time. And preferably, this is performed at, or proximate to, the central office.
Fig. 14 shows an alternative power/detector circuit 238 which detects a five-second shut-off of the battery voltage followed by resumption of the normal battery voltage. Circuit 238 is similar to power supply 38 seen m Fig. 5 and Fig. 11. In Fig. 14, resistor R107 and capacitor C100 act as a low pass filter to only charge on DC voltage. This filter filters out a 20 Hz ringing signal so as not to false trigger when the customer phone is rung. C100 will charge to the nominal DC voltage on the line which, m the customer on-hook condition, is typically about 48V. When the customer goes off hook (to make a call perhaps) , C100 will charge/discharge to the off- hook DC voltage of around 3-10 volts. The battery removal circuitry of Fig. 14 is designed not to false trip m response to either a voltage transition from on-hook to off-hook, or under battery reversal conditions.
In the circuit of Fig. 14, BR1 rectifies the DC voltage so as to present a known polarity to the battery removal circuitry while CR100 and CR101 act as protection for the battery removal circuitry the event of a high voltage across the tip and ring lines. ClOl, C102 and C103 will also charge up to the DC voltage applied to the line. In this state, a very small current will flow through R100 and the base of Q100. This keeps Q100 saturate, thereby drawing current through R101. The total leakage current draw of this circuit is required to be very low. In this state, the entire circuit draws under 20 μA. Since Q100 is saturated, current is diverted from the base of Q100, thereby keeping it the cutoff region (i.e., "off") . When the battery is removed at the central office, ClOl will discharge through R100 and Q100. After about 5 seconds at 48V, or 2.5 seconds at 3V, ClOl will discharge to such an extent that it can no longer supply current to Q100. When this happens, Q100 will turn off (i.e., be m cutoff), allowing the current through R101 to flow to the base of Q101. And since
C102 has a larger capacitance than ClOl, C102 has enough stored charge to ensure that Q101 will turn even after ClOl turns on. CR103 ensures that C102 will not discharge back through ClOl. When Q101 goes into the active region (i.e., turns on), Q102 is likewise brought into the active region, thus turning Q101 on even stronger. At this point, the SCR comprised of Q102, Q101 and R102 will latch on, with both Q1C1 and Q102 saturated. When the SCR latches on, current will flow through the current limiter comprised of Q103, R103, CR104, CR105, CR106 and R104. The current limiter will limit the current through the relay and the SCR to a safe value of about 100 mA. The current limiter protects the relay and the SCR when C103 is charged up at 48V. When the current limiter turns on, current flows through the latching relay set coil, drawing current from C103 This actuates Kl , causing the overall circuit to enter test mode #1.
Although m the preferred embodiment of Fig. 14, a nominal minimum voltage-off time of five seconds is used, it should be kept m mind that this duration can be changed by using different component values for C100, ClOl and R100. It is preferable, however, that the minimum voltage-off time exceed spikes due to lightning and other such transients. Tables 5 and 6 present the component values for the circuit of Fig. 12.
Figure imgf000024_0001
Table 5 - Component Values for Resistors & Capacitors Fig. 12
Figure imgf000025_0001
Table 6 - Other Components m Fig. 12
The devices described above may be implemented on a printed circuit board using discrete components and portions may even be implemented as an application-specific integrated circuit (ASIC) . In addition, as is known to those skilled m the art, portions of the signal generator circuit and reset control circuit, among other components of the device, can be replaced by a microprocessor or other programmable unit, albeit at greater expense, using current technology.
Therefore, while the above invention has been described with reference to certain preferred embodiments, it should be kept m m d that the scope of the present invention is not limited to these. One skilled m the art may find variations of these preferred embodiments which, nevertheless, fall withm the spirit of the present invention, whose scope is defined by the claims set forth below.

Claims

THE CLAIMSWhat is claimed is:
1. A network interface device operable m one of a normal monitor mode and a test mode and configured to interface a twisted pair transmission line to customer equipment m a communication system, said network interface device comprising: a first port comprising first and second terminals establishing respective first and second voltage nodes; first and second switches electrically connected to said first and second terminals, respectively; a second port comprising third and fourth terminals selectively connected to respective first and second terminals via respective first and second switches, said second port being connected to the first port when the device is m the monitor mode, and being disconnected from the first port when the device is m the test mode; and a detector circuit connected electrical parallel across said first and second voltage nodes and configured to detect a test request signal and output a first control signal to said first and second switches upon detection of said test request signal, to thereby switch the device from the monitor mode to the test mode and disconnect the second port from the first port ; characterized that the test request signal to which the detector circuit responds to place the device the test mode comprises a change battery voltage applied across the voltage nodes.
2. The device of claim 1, wherein the test request signal to which the detector circuit responds comprises a reversal of a pre-existing battery voltage.
3. The device of claim 1, wherein the test request signal to which the detector circuit responds comprises a removal of a pre-existing battery voltage for a first predetermined period of time, followed by re-application of said pre-existing battery voltage.
4. The device of claim 1, wherein the detector circuit provides an input impedance of at least 500 KΩ.
5. The device of claim 1, wherein the detector circuit provides an input impedance of at least 2 MΩ.
6. The device of claim 1, further comprising: a power supply circuit connected to said first port via said first and second switches, and arranged to output a DC supply voltage when the device is the test mode, said power supply circuit being powered by a voltage applied across the first and second voltage nodes; and a signal generator circuit coupled to said first port via said first and second switches, and configured to output a predetermined test signal to said first port, when the device is m the test mode, said signal generator being powered by said DC supply voltage from said power supply circuit; and a control circuit configured to output a second control signal to said first and second switches to return the device to the monitor mode from the test mode.
7. The device of claim 6, wherein said control circuit comprises : a first timer circuit configured to output said second control signal a predetermined period of time after said signal generator circuit has begun to output said predetermined test signal to said first port.
8. The device of claim 7, wherein said signal generator circuit comprises: a second timer circuit configured to output a square wave having a predetermined frequency to the first port, when the device is the test mode.
9. The device of claim 6, wherein said signal generator circuit comprises: a timer circuit configured to output a square wave having a predetermined frequency to the first port, when the device is m the test mode.
10. The device of claim 6, further comprising: a voltage protection circuit connected m electrical parallel with said power supply circuit.
11. The device of claim 6, wherein said first and second switches comprise a latching relay having a pair of dual contacts, said relay comprising: a first coil coupled to said detector circuit, said first coil being responsive to said first control signal to connect said first port to said signal generator circuit and disconnect said first port from said second port, and a second coil coupled to said control circuit, said second coil being responsive to said second control signal to connect said first port to said second port and disconnect said second port from said signal generator circuit .
12. A communication system comprising: a network interface device according to any of claims 1-
11 ; and a twisted pair transmission line connected at a first end to a central office and at a second end to the first port of said network interface device.
13. A method of invoking a test mode a telephone system comprising a central office connected to customer equipment via a twisted pair transmission line across which a predetermined voltage is normally applied, the method comprising: changing said predetermined voltage across the twisted pair transmission line to thereby electrically isolate said customer equipment from the twisted pair transmission line, said step of changing being performed at a location remote from said customer equipment.
14. The method of claim 13, wherein changing the predetermined voltage comprises: reversing the polarity of the predetermined voltage at the central office.
15. The method of claim 13, wherein changing the predetermined voltage comprises : removing said predetermined voltage across said twisted pair transmission line for a first predetermined period of time; and re-apply g said predetermined voltage upon conclusion of said first predetermined period of time.
16. The method of claim 15, wherein the step of removing said predetermined voltage comprises shortmg said twisted pair at the central office.
17. The method of claim 15, wherein the step of removing said predetermined voltage comprises forming an open circuit across said twisted pair at the central office.
18. A method of remotely testing a communication system comprising a central office, customer equipment and a twisted pair transmission line connecting the two, said central office normally maintaining a first battery voltage across said twisted pair transmission line, the method comprising the steps of: changing the first battery voltage across the twisted pair transmission line to thereby electrically isolate the customer's equipment from said twisted pair transmission line; receiving a first test signal sent along the twisted pair transmission line from a point physically proximate to said customer's equipment; and analyzing said received test signal to assess the performance of the twisted pair transmission line.
19. The method of claim 18, wherein said test signal comprises a square wave having a frequency between 35 KHz and 1.5 MHz.
20. The method of claim 18, wherein said test signal comprises a square wave having a frequency of 300 KHz.
21. The method of claim 18, wherein changing the first battery voltage comprises reversing the first battery voltage for a predetermined period of time.
22. The method of claim 18, wherein changing the first battery voltage comprises removing the first battery voltage for a first predetermined period of time and thereafter re- applymg the first battery voltage.
23. The method of claim 18, further comprising: bypassing a first electronic component connected m series with a second electronic component, for a predetermined period of time to thereby test said second electronic component while isolated from said first electronic component.
24. A network interf ce device operable m one of a normal monitor mode and a test mode having a first test phase and a second test phase, said network interface device configured to interface a twisted pair transmission line to customer equipment a communication system, said network interface device comprising: a first port comprising first and second terminals establishing respective first and second voltage nodes; first and second switches electrically connected to said first and second terminals, respectively; a detector circuit connected m electrical parallel across said first and second voltage nodes and configured to detect a test request signal, said detector circuit being further configured to output a first control signal to said first and second switches upon detection of said test request signal, to thereby place the device m the test mode; a power supply circuit connected to said first port via said first and second switches, and arranged to output a DC supply voltage when the device is m the test mode, said power supply circuit being powered by a voltage applied across the first and second voltage nodes; and a signal generator circuit coupled to said first port via said first and second switches, and configured to output a predetermined test signal to said first port for a predetermined first period of time, when the device is m a first phase of the test mode, said signal generator circuit being powered by said DC supply voltage from said power supply circuit; and a bypass circuit configured to electrically isolate at least one electronic component connected m series with a second electronic component during a second phase of the test mode, to thereby permit testing of said second component ; wherein the test request signal to which the detector circuit responds to place the device m the test mode comprises a change battery voltage applied across the voltage nodes.
25. The device of claim 24, wherein the test request signal to which the detector circuit responds comprises a reversal of a pre-existing battery voltage.
26. The device of claim 24, wherein the test request signal to which the detector circuit responds comprises a removal of a pre-existing battery voltage for a first predetermined period of time, followed by re-application of said pre-existing battery voltage.
AMENDED CLAIMS
[received by the International Bureau on 5 October 2000 (05.10.2000) original claims 1-26 replaced by amended claims 1-32 (11 pages)]
1. A two-wire POTS/xDSL network interface device operable in one of a normal monitor mode and a test mode and configured to interface a twisted pair transmission line to customer equipment in a communication system, said network interface device comprising: a bidirectional first port comprising first and second terminals establishing respective first and second voltage nodes; first and second switches electrically connected to said first and second terminals, respectively; a bidirectional second port comprising third and fourth terminals selectively connected to respective first and second terminals via respective first and second switches, said second port being connected to the first port when the device is in the monitor mode, and being disconnected from the first port when the device is in the test mode; and a detector circuit connected in electrical parallel across said first and second voltage nodes and configured to detect a test request signal and output a first control signal to said first and second switches upon detection of said test request signal, to thereby switch the device from the monitor mode to the test mode and disconnect the second port from the first port; characterized in that the test request signal to which the detector circuit responds to place the device in the test mode comprises a change in battery voltage applied across the voltage nodes.
2. The device of claim 1, wherein the test request signal to which the detector circuit responds comprises a reversal of a pre-existing battery voltage.
3. The device of claim 1, wherein the test request signal to which the detector circuit responds comprises a removal of a pre-existing battery voltage for a first predetermined period of time, followed by re-application of said preexisting battery voltage.
4. The device of claim 1, wherein the detector circuit provides an input impedance of at least 500 KΩ .
5. The device of claim 1, wherein the detector circuit provides an input impedance of at least 2 MΩ.
6. The device of claim 1, further comprising: a power supply circuit connected to said first port via said first and second switches, and arranged to output a DC supply voltage when the device is in the test mode, said power supply circuit being powered by a voltage applied across the first and second voltage nodes; and a signal generator circuit coupled to said first port via said first and second switches, and configured to output a predetermined test signal to said first port, when the device is in the test mode, said signal generator being powered by said DC supply voltage from said power supply circuit; and a control circuit configured to output a second control signal to said first and second switches to return the device to the monitor mode from the test mode.
7. The device of claim 6, wherein said control circuit comprises : a first timer circuit configured to output said second control signal a predetermined period of time after said signal generator circuit has begun to output said predetermined test signal to said first port .
8. The device of claim 7, wherein said signal generator circuit comprises: a second timer circuit configured to output a square wave having a predetermined frequency to the first port, when the device is in the test mode.
9. The device of claim 6, wherein said signal generator circuit comprises : a timer circuit configured to output a square wave having a predetermined frequency to the first port, when the device is in the test mode.
10. The device of claim 6, further comprising: a voltage protection circuit connected in electrical parallel with said power supply circuit.
11. The device of claim 6, wherein said first and second switches comprise a latching relay having a pair of dual contacts, said relay comprising: a first coil coupled to said detector circuit, said first coil being responsive to said first control signal to connect said first port to said signal generator circuit and disconnect said first port from said second port, and a second coil coupled to said control circuit, said second coil being responsive to said second control signal to connect said first port to said second port and disconnect said second port from said signal generator circuit .
12. A communication system comprising: a network interface device according to any of claims 1- 11 ; and a twisted pair transmission line connected at a first end to a central office and at a second end to the first port of said network interface device.
13. A method of invoking a test mode in a telephone system comprising a central office connected to customer equipment via a twisted pair transmission line across which a predetermined voltage is normally applied, the method comprising : changing said predetermined voltage across the twisted pair transmission line to thereby electrically isolate said customer equipment from the twisted pair transmission line by removing said predetermined voltage across said twisted pair transmission line for a first predetermined period of time and then re-applying said predetermined voltage upon conclusion of said first predetermined period of time.
14. The method of claim 13, wherein the step of removing said predetermined voltage comprises shorting said twisted pair at the central office.
15. The method of claim 13, wherein the step of removing said predetermined voltage comprises forming an open circuit across said twisted pair at the central office.
16. A network interface device operable in one of a normal monitor mode and a test mode having a first test phase and a second test phase, said network interface device configured to interface a twisted pair transmission line to customer equipment in a communication system, said network interface device comprising: a first port comprising first and second terminals establishing respective first and second voltage nodes; first and second switches electrically connected to said first and second terminals, respectively; a detector circuit connected in electrical parallel across said first and second voltage nodes and configured to detect a test request signal, said detector circuit being further configured to output a first control signal to said first and second switches upon detection of said test request signal, to thereby place the device in the test mode; a power supply circuit connected to said first port via said first and second switches, and arranged to output a DC supply voltage when the device is in the test mode, said power supply circuit being powered by a voltage applied across the first and second voltage nodes; and a signal generator circuit coupled to said first port via said first and second switches, and configured to output a predetermined test signal to said first port for a predetermined first period of time, when the device is in a first phase of the test mode, said signal generator circuit being powered by said DC supply voltage from said power supply circuit; and a bypass circuit configured to electrically isolate at least one electronic component connected in series with a second electronic component during a second phase of the test mode, to thereby permit testing of said second component; wherein the test request signal to which the detector circuit responds to place the device in the test mode comprises a removal of a pre-existing battery voltage for a first predetermined period of time, followed by re-application of said pre-existing battery voltage.
17. A network interface device operable in one of a normal monitor mode and a test mode having a line test phase and a customer equipment test phase, said network interface device configured to interface a twisted pair transmission line to customer equipment in a communication system, said network interface device comprising: a first port comprising first and second terminals establishing respective first and second voltage nodes; a second port comprising third and fourth terminals selectively connected to respective first and second terminals via respective first and second switches, said second port being connected to the first port when the device is in the monitor mode and also in the customer equipment test phase, and being disconnected from the first port when the device is in the line test phase; a third port connected to the first port when the device is in the monitor mode and being disconnected from the first port when the device is in the test mode; at least one xDSL filter situated between the first and second switches, and the second port; a detector circuit connected in electrical parallel across said first and second voltage nodes and configured to detect a request signal, said detector circuit being further configured to output a first control signal to said first and second switches upon detection of said request signal, to thereby place the device in the test mode; a power supply circuit connected to said first port via said first and second switches, and arranged to output a DC supply voltage when the device is in the test mode, said power supply circuit being powered by a voltage applied across the first and second voltage nodes; a signal generator circuit coupled to said first port via said first and second switches, and configured to output a predetermined test signal to said first port for a predetermined first period of time, when the device is in the line test phase, said signal generator circuit being powered by said DC supply voltage from said power supply circuit; and a bypass circuit configured to allow a signal passing between the first and second ports to bypass the at least one xDSL filter during the customer equipment test phase.
18. The device of claim 17, wherein the request signal to which the detector circuit responds, comprises a polarity reversal of the office battery voltage.
19. The device of claim 17, wherein the xDSL filter is an xDSL lowpass filter.
20. The device of claim 17, wherein the third port is isolated from the first port during both the line test phase and the customer equipment test phase.
21. The device of claim 17, wherein the bypass circuit electrically isolates the xDSL filter from both the first port and the second port, during the customer equipment test phase.
22. The device of claim 17, wherein the bypass circuit comprises a pair of dual relays, a first pair connected between the first port and the filter, and a second pair connected between the filter and the second port .
23. A method of remotely testing customer equipment from a central office, the central office being connected to the customer equipment via a twisted pair transmission line and a network interface device including at least one xDSL filter, with the customer equipment being connected in electrical series with the at least one xDSL filter during normal operation, the method comprising: applying a request signal along the twisted pair transmission line to invoke a test mode; in response to the request signal, automatically isolating from the twisted pair transmission line, the at least one xDSL filter, the customer equipment and a port connectable to an xDSL modem; sending a first test signal via the twisted pair transmission line back to the central office to thereby test the twisted pair transmission line while it is disconnected from the at least one xDSL filter, the customer equipment and the port, during a line test phase; and automatically bypassing the at least one xDSL filter such that the twisted pair transmission line remains connected to the customer equipment, and testing the customer equipment while the customer equipment is unaffected by the at least one xDSL filter and the port, during a customer equipment test phase .
24. The method of claim 23, wherein the step of applying a request signal comprises reversing the office battery voltage .
25. The method of claim 23, wherein the xDSL filter is an xDSL lowpass filter.
26. The method of claim 23, wherein the port is connected to an xDSL modem.
27. A network interface device operable in one of a normal monitor mode and a test mode having a line test phase and a customer equipment test phase, said network interface device configured to interface a twisted pair transmission line to customer equipment in a communication system, said network interface device comprising: a first port comprising first and second terminals establishing respective first and second voltage nodes; a second port comprising third and fourth terminals selectively connected to respective first and second terminals via respective first and second switches, said second port being connected to the first port when the device is in the monitor mode and also in the customer equipment test phase, and being disconnected from the first port when the device is in the line test phase; a third port connected to the first port when the device is in the monitor mode and being disconnected from the first port when the device is in the test mode; at least one xDSL filter situated between the first and second switches, and the second port; a detector circuit connected in electrical parallel across said first and second voltage nodes and configured to detect a request signal, said detector circuit being further configured to output a first control signal to said first and second switches upon detection of said request signal, to thereby place the device in the test mode; and a bypass circuit configured to allow a signal passing between the first and second ports to bypass the at least one xDSL filter during the customer equipment test phase.
28. A network interface device operable in one of a normal monitor mode and a test mode having a line test phase and a customer equipment test phase, said network interface device configured to interface a twisted pair transmission line to customer equipment in a communication system, said network interface device comprising: a first port configured to connect to a twisted pair transmission line; a second port connected to the first port when the device is in the monitor mode and also in the customer equipment test phase, and being disconnected from the first port when the device is in the line test phase; a third port connected to the first port when the device is in the monitor mode and being disconnected from the first port when the device is in the test mode; at least one xDSL filter situated between the first port and the second port ; a detector circuit connected to terminals of the first port and configured to detect a request signal sent along the twisted pair transmission line, said detector circuit being further configured to place the device in the test mode, in response to the request signal; and a bypass circuit configured to allow a signal passing between the first and second ports to bypass the at least one xDSL filter during the customer equipment test phase.
29. The device of claim 28, wherein the request signal to which the detector circuit responds, comprises a polarity reversal of the office battery voltage.
30. The device of claim 28, wherein the xDSL filter is an xDSL lowpass filter.
31. The device of claim 28, wherein the third port is isolated from the first port during both the line test phase and the customer equipment test phase .
32. The device of claim 28, wherein the bypass circuit comprises a pair of dual relays, a first pair connected between the first port and the filter, and a second pair connected between the filter and the second port .
PCT/US2000/006122 1999-05-10 2000-03-09 Signaling method for invoking a test mode in a network interface unit WO2000069152A1 (en)

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US09/307,871 US6181775B1 (en) 1998-11-25 1999-05-10 Dual test mode network interface unit for remote testing of transmission line and customer equipment
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Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4641299A (en) * 1984-09-21 1987-02-03 At&T Company Mechanized loop testing using a local metallic access port
US5345496A (en) * 1991-02-27 1994-09-06 Gpt Limited Remote line test facility
US5471517A (en) * 1993-09-09 1995-11-28 Fujitsu Limited Subscriber system testing method
US5553059A (en) * 1993-03-11 1996-09-03 Integrated Network Corporation Network interface unit remote test pattern generation
US5604785A (en) * 1992-07-01 1997-02-18 Raychem Limited Remotely actuated switch and protection circuit
US5636260A (en) * 1994-03-29 1997-06-03 Gpt Limited Telecommunication customer interface

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4641299A (en) * 1984-09-21 1987-02-03 At&T Company Mechanized loop testing using a local metallic access port
US5345496A (en) * 1991-02-27 1994-09-06 Gpt Limited Remote line test facility
US5604785A (en) * 1992-07-01 1997-02-18 Raychem Limited Remotely actuated switch and protection circuit
US5553059A (en) * 1993-03-11 1996-09-03 Integrated Network Corporation Network interface unit remote test pattern generation
US5471517A (en) * 1993-09-09 1995-11-28 Fujitsu Limited Subscriber system testing method
US5636260A (en) * 1994-03-29 1997-06-03 Gpt Limited Telecommunication customer interface

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