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WO2000006795A1 - Cvd tungsten deposition on oxide substrates - Google Patents

Cvd tungsten deposition on oxide substrates Download PDF

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Publication number
WO2000006795A1
WO2000006795A1 PCT/US1999/016450 US9916450W WO0006795A1 WO 2000006795 A1 WO2000006795 A1 WO 2000006795A1 US 9916450 W US9916450 W US 9916450W WO 0006795 A1 WO0006795 A1 WO 0006795A1
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WO
WIPO (PCT)
Prior art keywords
layer
substrate
range
depositing
tungsten
Prior art date
Application number
PCT/US1999/016450
Other languages
French (fr)
Inventor
Maitreyee Mahajani
Steve G. Ghanayem
Original Assignee
Applied Materials, Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Applied Materials, Inc. filed Critical Applied Materials, Inc.
Publication of WO2000006795A1 publication Critical patent/WO2000006795A1/en

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Classifications

    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/02Pretreatment of the material to be coated
    • C23C16/0272Deposition of sub-layers, e.g. to promote the adhesion of the main coating
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/06Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of metallic material
    • C23C16/08Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of metallic material from metal halides
    • C23C16/14Deposition of only one other metal element
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/28556Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table by chemical means, e.g. CVD, LPCVD, PECVD, laser CVD
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors

Definitions

  • the present invention relates to chemical vapor deposition, and more particularly, to the chemical bonding between silicon (Si) and tungsten (W) and the deposition of tungsten on a substrate.
  • VLSI Very large scale integration
  • the increasing device count (or density) has been accomplished by shrinking the minimum device feature size so that features are less than one micrometer (l ⁇ m) in size.
  • Low resistance interconnects using metal films become necessary in such structures to maintain speed performance in the device circuitry.
  • Metals such as aluminum (Al), tungsten (W), copper (Cu) and the like have proven useful as interconnect materials.
  • Tungsten (W) has become preferred in many instances as the first metal deposited on a substrate because of its thermal characteristics, relatively low resistivity, resistance to electro-migration and good step coverage.
  • Chemical vapor deposition (CVD) of tungsten has largely been employed using tungsten hexafluoride (WF 6 ) as a precursor in gaseous form.
  • Blanket or selective deposition of a tungsten layer on an oxide surface can be performed by employing a reducing agent, such as hydrogen (H 2 ), silane (SiH 4 ) or a mixture of these with the WF 6 .
  • tungsten typically does not adhere well to an oxide layer. Therefore, a "glue” layer, typically a nitride of titanium or tantalum, is first deposited on the oxide layer and then the tungsten is deposited thereover as shown in Figure 1. This allows the WF 6 to be reduced by the "glue” layer to provide good adherence to the substrate being processed.
  • the "glue” layer is typically deposited in a separate chamber, such as a CVD or PVD chamber, prior to the deposition of the W layer. Thus, an extra step in the manufacturing process is required to deposit this "glue" layer. Each additional process step increases the cost of manufacturing and may expose the substrate to contamination during its transfer between chambers.
  • a single CVD chamber is employed to deposit W onto an oxide substrate without the use of a traditional "glue" layer.
  • An amo ⁇ hous layer of silicon (Si) is preferably deposited in situ in the CVD chamber prior to the W nucleation and deposition steps to provide good adherence of the W to the substrate.
  • a plasma is struck in the CVD chamber over the substrate to be processed using a silicon source gas, such as silane, and an inert gas, such as argon (Ar).
  • a thin amorphous Si layer is thereby formed over the oxide layer on the substrate.
  • the thin amorphous Si layer is then able to provide a reducing surface on which the WF 6 gas, or other W precursor source, can nucleate to initiate and then continue the W deposition process.
  • Good adhesion to the substrate is achieved in this manner at the SiO 2 /Si/W interface (comparable to that using a TiN "glue" layer).
  • the WF 6 is reduced to the tungsten metal and the silicon is oxidized to the volatile SiF 4 . This reaction is believed to improve the adhesion of the W to the oxide layer through the amorphous silicon layer.
  • the WF 6 is also reduced by SiH 4 and H 2 to achieve continued deposition of W.
  • the amorphous Si layer also serves to protect the substrate form the corrosive effects of the WF 6 . Further, an unexpectedly good result of lowering the overall W film stress from that typically achieved using a traditional "glue" layer.
  • Figure 1 is a schematic cross sectional view of a substrate having a Tungsten (W) layer deposited over a TiN layer according to the prior art.
  • W Tungsten
  • Figure 2 is a schematic cross sectional view of a typical CVD substrate processing chamber used to employ the techniques of the invention.
  • Figure 3 is a schematic cross sectional view showing the deposition of a thin amo ⁇ hous Si layer over a substrate according to the invention.
  • Figure 4 is a schematic cross sectional view showing the deposition of tungsten (W) over the thin Si layer of Figure 3 according to the invention.
  • FIG. 2 a schematic cross sectional view of a typical CVD processing chamber of the type used to perform techniques of the invention is shown.
  • An example of such a chamber is WxZ chamber available from Applied Materials, Inc. in Santa Clara, California.
  • the CVD chamber 10 generally includes a chamber body 20 which defines a processing region 22 bounded at an upper limit by a gas distribution assembly 24 and at a lower limit by a substrate support member 26.
  • a vacuum system 21 connected at a lower end of the chamber body 20 maintains an operating pressure in the process region 22 by exhausting the process region 22 via a port 23.
  • the gas distribution assembly 24 is disposed on a lid 27 and comprises a top mounted gas feedthrough 28 coupled to a base plate 30 at a lower end, a faceplate 32 having apertures 33 formed therein, and a perforated blocker plate 34 disposed between the faceplate 32 and the base plate 30.
  • a conduit 35 provides a gas pathway through the base plate 30.
  • Quick disconnect hoses 36 are connected to the gas feedthrough 28 to supply a heating fluid to an annular fluid passageway 38 formed in the base plate 30.
  • Inlet/outlet channels 40 provide a pathway for delivering the fluid to the annular passageway.
  • a cover 39 mounted to the lid 27 shields the gas delivery system 24. Seals, such as o-ring seals 37, maintain the vacuum integrity of chamber 30.
  • Gas sources 41 are connected to the chamber bottom to supply process gases and carrier gases to the gas distribution assembly 24.
  • a mixing chamber 43 may be located upstream from the processing region 22 to mix various gases prior their delivery into the chamber and the rate of gas delivery is regulated by flow controllers 45.
  • the substrate support member 26 generally comprises a substrate support surface 42 and stem 44 disposed through the chamber bottom. A plurality of grooves 47 formed in the substrate support surface 42 are connected to vacuum pump 49 to provide a backside vacuum to a substrate to hold the substrate during processing.
  • An actuator 46 moves the substrate support member 26 between a lowered loading/unloading position and a raised processing position.
  • Lift pins 48 slidably disposed through the substrate support member 26 are adapted to receive a substrate in the lowered loading/unloading position.
  • the substrate support member 26 contains a resistive heating element (not shown) to heat a substrate during processing. Alternatively, lamps and other known devices can be used to heat the substrate.
  • the chamber 10 is shown containing a substrate 50 on the substrate support member 26.
  • Figure 2 shows the substrate 50 in a raised processing position.
  • the substrate 50 has its temperature controlled by a temperature control system (not shown) which controls current flow to the resistive heating elements.
  • Processing gases are supplied from the containers 41 to the processing region 22 through the gas distribution assembly 26.
  • the gases are routed through the feedthrough 28 to the blocker plate 34 via the conduit 35.
  • the blocker plate 34 acts as an initial dispersion stage wherein the gases are uniformly distributed. Holes (not shown) in the blocker plate 34 then channel the gases onto an upper surface of the faceplate 32.
  • the gas is delivered into the processing region 22 by the apertures 33 formed in the faceplate 32.
  • a plasma may be generated by delivering a signal, such as an RF signal, to the faceplate 32 while grounding the substrate support member 26.
  • a negative bias may be applied to the substrate 50 by coupling the substrate support member 26 to a signal source. Electric fields inside the processing region may be controlled via an RF power source 52.
  • the CVD processing chamber 10 of Figure 4 is not intended to represent any particular CVD processing system, but rather to generically illustrate typical chambers which are employed in the industry to coat or deposit various materials on substrates. Other chambers may be used to advantage for the present invention.
  • FIG 1 the prior art use of a "glue" layer prior to the deposition of a tungsten layer is shown schematically.
  • the typical tungsten deposition process sequence includes a step of depositing a thin titanium nitride layer (TiN) over the surface of an oxide substrate in a separate chamber. This "glue" layer of TiN then allows deposition of a blanket layer of tungsten (W) thereover as previously discussed in a separate processing chamber.
  • TiN titanium nitride layer
  • a thin amo ⁇ hous silicon layer (Si in Figure 3) is first deposited on the substrate in the processing chamber rather than the titanium nitride "glue" layer.
  • a plasma is struck in an argon/silicon gas mixture introduced into the chamber. This plasma is shown in Figure 3 as a (SiH 4 + Ar) cloud over the substrate.
  • the silicon in the SiH 4 is deposited under the set of preferred temperature, pressure, spacing controlled parameters given below:
  • the temperature can be in the range of 200 to 550°C
  • the pressure T in the range of lOOmTorr to 15Torr
  • the spacing of the gas plate from the substrate in the range of 300 to 900 mils
  • the RF power in the range of 50 to 5000W
  • the Ar flow in the range of 50 to lOOOsccm
  • the SiH 4 flow rate in the range of 5 to 500sccm.
  • other silicon source gases can be used.
  • the time of the process can range from about 10 seconds to about 5 minutes depending on the desired process.
  • FIG. 4 shows a substrate having a W layer deposited over the Si layer according to the techniques of the invention. During the deposition process, it is believed that the WF 6 is reduced to the tungsten metal and the silicon is oxidized to the volatile SiF 4 . This reaction is believed to improve the adhesion of the W to the oxide layer through the amo ⁇ hous silicon layer. Additionally, it is believed that the WF 6 is also reduced by SiH 4 and H 2 .
  • a substrate temperature between about 200°C and 400°C can produce an excellent surface with a sheet resistance (RJ in the range of 10-15 ⁇ /sq (where R s is defined as p/t m for a unit square, where p is the resistivity and t m is the thickness of the conductor).
  • R s is defined as p/t m for a unit square, where p is the resistivity and t m is the thickness of the conductor.
  • W layers deposited according to the invention have shown to have adhered to the substrate comparable to that achieved using a traditional "glue" layer prior to the W deposition. Further, by first depositing Si, the substrate is protected from the corrosive effects of WF 6 .
  • a single CVD chamber such as that described with respect to Figure 2 can be used to deposit both the Si layer and the W layer.
  • the chamber 10 is adapted to control all relevant parameters, such as the temperature (°C) control, the pressure (T) control, via exhaust 35, the electric field control via RF supply 38, electrode 39 and bias electrode 40, the spacing (of substrate to gas supply, etc.) via lift pins 33 and the type and rate of processing gasses introduced via inlets 34 and distribution controls 34A.

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Abstract

The present invention discloses a method for depositing a conductor, such as tungsten (W), onto a substrate. The method generally includes depositing an amorphous silicon layer on an oxide substrate and then depositing a conductive film, such as tungsten, thereover. The silicon is believed to provide a nucleation surface for subsequent metal deposition and to provide protection for the substrate from the deleterious effects of the surface reaction between silicon and tungsten hexafluoride.

Description

CVD TUNGSTEN DEPOSITION ON OXIDE SUBSTRATES
BACKGROUND OF THE INVENTION Field of the Invention
The present invention relates to chemical vapor deposition, and more particularly, to the chemical bonding between silicon (Si) and tungsten (W) and the deposition of tungsten on a substrate.
Background of the Related Art
In the manufacture of semiconductor electronic devices, ever increasing density of individual devices on substrates has been achieved. Very large scale integration (VLSI) having 105 devices or more per chip have become the norm rather than the exception. The increasing device count (or density) has been accomplished by shrinking the minimum device feature size so that features are less than one micrometer (lμm) in size. Low resistance interconnects using metal films become necessary in such structures to maintain speed performance in the device circuitry. Metals such as aluminum (Al), tungsten (W), copper (Cu) and the like have proven useful as interconnect materials. Tungsten (W) has become preferred in many instances as the first metal deposited on a substrate because of its thermal characteristics, relatively low resistivity, resistance to electro-migration and good step coverage.
Chemical vapor deposition (CVD) of tungsten has largely been employed using tungsten hexafluoride (WF6) as a precursor in gaseous form. Blanket or selective deposition of a tungsten layer on an oxide surface can be performed by employing a reducing agent, such as hydrogen (H2), silane (SiH4) or a mixture of these with the WF6.
However, tungsten typically does not adhere well to an oxide layer. Therefore, a "glue" layer, typically a nitride of titanium or tantalum, is first deposited on the oxide layer and then the tungsten is deposited thereover as shown in Figure 1. This allows the WF6 to be reduced by the "glue" layer to provide good adherence to the substrate being processed. The "glue" layer is typically deposited in a separate chamber, such as a CVD or PVD chamber, prior to the deposition of the W layer. Thus, an extra step in the manufacturing process is required to deposit this "glue" layer. Each additional process step increases the cost of manufacturing and may expose the substrate to contamination during its transfer between chambers.
Therefore, there remains a need for a process to deposit a tungsten film on a substrate which demonstrates good adherence to the substrate.
SUMMARY OF THE INVENTION
According to the techniques of the present invention generally, a single CVD chamber is employed to deposit W onto an oxide substrate without the use of a traditional "glue" layer. An amoφhous layer of silicon (Si) is preferably deposited in situ in the CVD chamber prior to the W nucleation and deposition steps to provide good adherence of the W to the substrate. A plasma is struck in the CVD chamber over the substrate to be processed using a silicon source gas, such as silane, and an inert gas, such as argon (Ar). A thin amorphous Si layer is thereby formed over the oxide layer on the substrate. The thin amorphous Si layer is then able to provide a reducing surface on which the WF6 gas, or other W precursor source, can nucleate to initiate and then continue the W deposition process. Good adhesion to the substrate is achieved in this manner at the SiO2/Si/W interface (comparable to that using a TiN "glue" layer). During the deposition process, it is believed that the WF6 is reduced to the tungsten metal and the silicon is oxidized to the volatile SiF4. This reaction is believed to improve the adhesion of the W to the oxide layer through the amorphous silicon layer. Additionally, it is believed that the WF6 is also reduced by SiH4 and H2 to achieve continued deposition of W. The amorphous Si layer also serves to protect the substrate form the corrosive effects of the WF6. Further, an unexpectedly good result of lowering the overall W film stress from that typically achieved using a traditional "glue" layer.
BRIEF DESCRIPTION OF THE DRAWINGS
So that the manner in which the above recited features, advantages and objects of the present invention are attained and can be understood in detail, a more particular description of the invention, briefly summarized above, may be had by reference to the embodiments thereof which are illustrated in the appended drawings. It is to be noted, however, that the appended drawings illustrate only typical embodiments of this invention and are therefore not to be considered limiting of its scope, for the invention may admit to other equally effective embodiments.
Figure 1 is a schematic cross sectional view of a substrate having a Tungsten (W) layer deposited over a TiN layer according to the prior art.
Figure 2 is a schematic cross sectional view of a typical CVD substrate processing chamber used to employ the techniques of the invention.
Figure 3 is a schematic cross sectional view showing the deposition of a thin amoφhous Si layer over a substrate according to the invention.
Figure 4 is a schematic cross sectional view showing the deposition of tungsten (W) over the thin Si layer of Figure 3 according to the invention.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT
Referring initially to Figure 2, a schematic cross sectional view of a typical CVD processing chamber of the type used to perform techniques of the invention is shown. An example of such a chamber is WxZ chamber available from Applied Materials, Inc. in Santa Clara, California. The CVD chamber 10 generally includes a chamber body 20 which defines a processing region 22 bounded at an upper limit by a gas distribution assembly 24 and at a lower limit by a substrate support member 26. A vacuum system 21 connected at a lower end of the chamber body 20 maintains an operating pressure in the process region 22 by exhausting the process region 22 via a port 23. The gas distribution assembly 24 is disposed on a lid 27 and comprises a top mounted gas feedthrough 28 coupled to a base plate 30 at a lower end, a faceplate 32 having apertures 33 formed therein, and a perforated blocker plate 34 disposed between the faceplate 32 and the base plate 30. A conduit 35 provides a gas pathway through the base plate 30. Quick disconnect hoses 36 are connected to the gas feedthrough 28 to supply a heating fluid to an annular fluid passageway 38 formed in the base plate 30. Inlet/outlet channels 40 provide a pathway for delivering the fluid to the annular passageway. A cover 39 mounted to the lid 27 shields the gas delivery system 24. Seals, such as o-ring seals 37, maintain the vacuum integrity of chamber 30.
Gas sources 41 are connected to the chamber bottom to supply process gases and carrier gases to the gas distribution assembly 24. A mixing chamber 43 may be located upstream from the processing region 22 to mix various gases prior their delivery into the chamber and the rate of gas delivery is regulated by flow controllers 45.
The substrate support member 26 generally comprises a substrate support surface 42 and stem 44 disposed through the chamber bottom. A plurality of grooves 47 formed in the substrate support surface 42 are connected to vacuum pump 49 to provide a backside vacuum to a substrate to hold the substrate during processing. An actuator 46 moves the substrate support member 26 between a lowered loading/unloading position and a raised processing position. Lift pins 48 slidably disposed through the substrate support member 26 are adapted to receive a substrate in the lowered loading/unloading position. The substrate support member 26 contains a resistive heating element (not shown) to heat a substrate during processing. Alternatively, lamps and other known devices can be used to heat the substrate.
The chamber 10 is shown containing a substrate 50 on the substrate support member 26. Figure 2 shows the substrate 50 in a raised processing position. The substrate 50 has its temperature controlled by a temperature control system (not shown) which controls current flow to the resistive heating elements. Processing gases are supplied from the containers 41 to the processing region 22 through the gas distribution assembly 26. The gases are routed through the feedthrough 28 to the blocker plate 34 via the conduit 35. The blocker plate 34 acts as an initial dispersion stage wherein the gases are uniformly distributed. Holes (not shown) in the blocker plate 34 then channel the gases onto an upper surface of the faceplate 32. The gas is delivered into the processing region 22 by the apertures 33 formed in the faceplate 32. A plasma may be generated by delivering a signal, such as an RF signal, to the faceplate 32 while grounding the substrate support member 26. Alternatively, a negative bias may be applied to the substrate 50 by coupling the substrate support member 26 to a signal source. Electric fields inside the processing region may be controlled via an RF power source 52.
The CVD processing chamber 10 of Figure 4 is not intended to represent any particular CVD processing system, but rather to generically illustrate typical chambers which are employed in the industry to coat or deposit various materials on substrates. Other chambers may be used to advantage for the present invention. Referring to Figure 1 , the prior art use of a "glue" layer prior to the deposition of a tungsten layer is shown schematically. As discussed above, the typical tungsten deposition process sequence includes a step of depositing a thin titanium nitride layer (TiN) over the surface of an oxide substrate in a separate chamber. This "glue" layer of TiN then allows deposition of a blanket layer of tungsten (W) thereover as previously discussed in a separate processing chamber.
According to the techniques of the present invention, a thin amoφhous silicon layer (Si in Figure 3) is first deposited on the substrate in the processing chamber rather than the titanium nitride "glue" layer. A plasma is struck in an argon/silicon gas mixture introduced into the chamber. This plasma is shown in Figure 3 as a (SiH4 + Ar) cloud over the substrate. The silicon in the SiH4 is deposited under the set of preferred temperature, pressure, spacing controlled parameters given below:
Temperature (°C) 425
Pressure (Torr) 7.5
Spacing (Mils) 400
Time (sec) 80
RF power (watts) 175
Ar (seem) 300
SiH4 (seem) 50
While the preferred value of these parameters is given above, it will be understood by those skilled in the art, that a range of parameters may also be used successfully within the spirit and scope of the invention. For example, the temperature can be in the range of 200 to 550°C, the pressure T in the range of lOOmTorr to 15Torr, the spacing of the gas plate from the substrate in the range of 300 to 900 mils, the RF power in the range of 50 to 5000W, the Ar flow in the range of 50 to lOOOsccm and the SiH4 flow rate in the range of 5 to 500sccm. Additionally, other silicon source gases can be used. The time of the process can range from about 10 seconds to about 5 minutes depending on the desired process.
Once the thin Si layer is deposited in the CVD processing chamber, the WF6 gas is introduced into the chamber 30 and the chamber parameters changed to those normally used in W deposition using WF6 gas. Figure 4 shows a substrate having a W layer deposited over the Si layer according to the techniques of the invention. During the deposition process, it is believed that the WF6 is reduced to the tungsten metal and the silicon is oxidized to the volatile SiF4. This reaction is believed to improve the adhesion of the W to the oxide layer through the amoφhous silicon layer. Additionally, it is believed that the WF6 is also reduced by SiH4 and H2. Generally, a substrate temperature between about 200°C and 400°C can produce an excellent surface with a sheet resistance (RJ in the range of 10-15 Ω/sq (where Rs is defined as p/tm for a unit square, where p is the resistivity and tm is the thickness of the conductor). In practice, W layers deposited according to the invention have shown to have adhered to the substrate comparable to that achieved using a traditional "glue" layer prior to the W deposition. Further, by first depositing Si, the substrate is protected from the corrosive effects of WF6.
Examination and testing of substrates processed according to the invention has shown the unexpectedly good result of a reduction in the overall W film stress from that achieved in W deposition over TiN performed at a lower temperature (in the range of about 360°C to 400°C). A typical film stress in the vicinity of 1.8 x 1010 dynes/cm2 is achieved on a TiN glue coating and W deposition in the temperature range from 360°C to 400°C. Using the amoφhous Si deposition technique of the present invention and deposition of W thereover, a film stress of 2xl09 dynes/cm2 (or a factor of 10 reduction) can be achieved.
In the techniques of the present invention, a single CVD chamber such as that described with respect to Figure 2 can be used to deposit both the Si layer and the W layer. The chamber 10 is adapted to control all relevant parameters, such as the temperature (°C) control, the pressure (T) control, via exhaust 35, the electric field control via RF supply 38, electrode 39 and bias electrode 40, the spacing (of substrate to gas supply, etc.) via lift pins 33 and the type and rate of processing gasses introduced via inlets 34 and distribution controls 34A.
While the foregoing is directed to the preferred embodiment of the present invention, other and further embodiments of the invention may be devised without departing from the basic scope thereof, and the scope thereof is determined by the claims that follow.

Claims

CLAIMS:
1. A method for depositing tungsten on a substrate, comprising: positioning a substrate in a processing chamber; adjusting the operating parameters of said CVD processing chamber to values in the range optimized for depositing a thin silicon (Si) layer, from a first introduced processing gas mixture of a silicon source and an inert gas, onto the oxide surface of said substrate to be processed for a first predetermined time; and re-adjusting the operating parameters of said CVD processing chamber to those in the range optimized for deposition of tungsten (W) onto said thin Si layer from a second introduced processing gas mixture containing a W source for a second pre-determined time.
2. The method of claim 1 wherein the amoφhous silicon layer is deposited over an oxide deposited on the substrate.
3. The method of claim 2 wherein the oxide is silicon dioxide (SiO2).
4. The method of claim 1 wherein the silicon source is silane (SiH4) and the inert gas is argon (Ar).
5. The method of claim 1 wherein the tungsten source is hexafluoride (WF6).
6. The method of claim 5 wherein the CVD reaction in the second deposition step is reduction of WF6 by generally the process
2WF6 + 3Si* → 2W* + 3SiF4 where Si* and W* indicate layers.
7. The method of claim 1 wherein the operating parameters of said CVD processing chamber are optimized for depositing a thin Si layer onto the oxide layer by having the temperature in the range of 350° C to 550° C.
8. The method of claim 1 wherein the operating parameters of said CVD processing chamber are optimized for depositing a thin Si layer onto the oxide layer by having the pressure in the range lOOmTorr to 15Torr.
9. The method of claim 1 wherein the operating parameters of said CVD processing chamber are optimized for depositing a thin Si layer onto the oxide layer by having the first processing gas comprise a mixture of Argon and Silane (Ar + SiH4) in the ratio range of 10/1 to 5/1.
10. The method of claim 1 wherein the operating parameters of said CVD processing chamber are optimized for depositing a thin Si layer onto the oxide layer by having the first processing gas comprise a mixture of Argon and Silane (Ar + SiH4) in the ratio of 6/1.
11. The method of claim 1 wherein the first predetermined time is in the range of 10 seconds to 5 minutes.
12. The method of claim 1 wherein the first predetermined time is most preferably in the range of 1 minute to 2 minutes.
13. The method of claim 1 wherein the first predetermined time is in the range of 1 minute to 2 minutes.
PCT/US1999/016450 1998-07-27 1999-07-22 Cvd tungsten deposition on oxide substrates WO2000006795A1 (en)

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WO2002088419A1 (en) * 2001-04-30 2002-11-07 Infineon Technologies Ag Method for production of a metallic or metal-containing layer
WO2017106660A1 (en) * 2015-12-19 2017-06-22 Applied Materials, Inc. Conformal amorphous silicon as nucleation layer for w ald process
US10480066B2 (en) 2015-12-19 2019-11-19 Applied Materials, Inc. Metal deposition methods
US10854461B2 (en) 2015-12-19 2020-12-01 Applied Materials, Inc. Tungsten deposition without barrier layer
US10991586B2 (en) 2015-12-19 2021-04-27 Applied Materials, Inc. In-situ tungsten deposition without barrier layer
US11244824B2 (en) 2017-10-09 2022-02-08 Applied Materials, Inc. Conformal doped amorphous silicon as nucleation layer for metal deposition

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Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2002088419A1 (en) * 2001-04-30 2002-11-07 Infineon Technologies Ag Method for production of a metallic or metal-containing layer
US6960524B2 (en) 2001-04-30 2005-11-01 Infineon Technologies Ag Method for production of a metallic or metal-containing layer
WO2017106660A1 (en) * 2015-12-19 2017-06-22 Applied Materials, Inc. Conformal amorphous silicon as nucleation layer for w ald process
US9978685B2 (en) 2015-12-19 2018-05-22 Applied Materials, Inc. Conformal amorphous silicon as nucleation layer for W ALD process
US10480066B2 (en) 2015-12-19 2019-11-19 Applied Materials, Inc. Metal deposition methods
US10854461B2 (en) 2015-12-19 2020-12-01 Applied Materials, Inc. Tungsten deposition without barrier layer
US10851454B2 (en) 2015-12-19 2020-12-01 Applied Materials, Inc. Metal deposition methods
TWI716511B (en) 2015-12-19 2021-01-21 美商應用材料股份有限公司 Conformal amorphous silicon as nucleation layer for w ald process
US10991586B2 (en) 2015-12-19 2021-04-27 Applied Materials, Inc. In-situ tungsten deposition without barrier layer
US11244824B2 (en) 2017-10-09 2022-02-08 Applied Materials, Inc. Conformal doped amorphous silicon as nucleation layer for metal deposition

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