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WO1999049499A3 - Method for connecting and supporting a csp housing connection with an integrated circuit - Google Patents

Method for connecting and supporting a csp housing connection with an integrated circuit Download PDF

Info

Publication number
WO1999049499A3
WO1999049499A3 PCT/FR1999/000669 FR9900669W WO9949499A3 WO 1999049499 A3 WO1999049499 A3 WO 1999049499A3 FR 9900669 W FR9900669 W FR 9900669W WO 9949499 A3 WO9949499 A3 WO 9949499A3
Authority
WO
WIPO (PCT)
Prior art keywords
integrated circuit
support
supporting
connection pads
csp
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/FR1999/000669
Other languages
French (fr)
Other versions
WO1999049499A2 (en
Inventor
Patrick Courant
Claude Petit
Yves Stricot
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Bull SAS
Original Assignee
Bull SAS
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Bull SAS filed Critical Bull SAS
Priority to EP99909071A priority Critical patent/EP1027731A2/en
Publication of WO1999049499A2 publication Critical patent/WO1999049499A2/en
Publication of WO1999049499A3 publication Critical patent/WO1999049499A3/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • H10W74/129—

Landscapes

  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Combinations Of Printed Boards (AREA)
  • Coupling Device And Connection With Printed Circuit (AREA)

Abstract

The invention concerns a method for electrical connection between an integrated circuit (10) housing connection pads (9i) and a CSP housing output terminals (18), which consists in connecting the integrated circuit (10) connection pads (9i) to a connecting support (1) arranged opposite and on a different level from the connecting pads (9i) via electrical conductors (8i) arranged on the connecting support (1). The method is characterised in that, after the support (1) has been arranged opposite the integrated circuit (10), it consists in moving at least part (7i) of the support to bring it in the proximity of the integrated circuit (10) connection pads (9i), and in connecting the conductors (8i) supported by the support part (7i) of the support (1) on the integrated circuit (10) connection pads (9i). The invention is particularly applicable to CSP housing interconnection technique (18).
PCT/FR1999/000669 1998-03-24 1999-03-22 Method for connecting and supporting a csp housing connection with an integrated circuit Ceased WO1999049499A2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
EP99909071A EP1027731A2 (en) 1998-03-24 1999-03-22 Method for connecting and supporting a csp housing connection with an integrated circuit

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR98/03602 1998-03-24
FR9803602A FR2776836A1 (en) 1998-03-24 1998-03-24 CONNECTION METHOD AND SUPPORT FOR CONNECTING A CSP HOUSING WITH AN INTEGRATED CIRCUIT

Publications (2)

Publication Number Publication Date
WO1999049499A2 WO1999049499A2 (en) 1999-09-30
WO1999049499A3 true WO1999049499A3 (en) 2000-06-15

Family

ID=9524420

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/FR1999/000669 Ceased WO1999049499A2 (en) 1998-03-24 1999-03-22 Method for connecting and supporting a csp housing connection with an integrated circuit

Country Status (3)

Country Link
EP (1) EP1027731A2 (en)
FR (1) FR2776836A1 (en)
WO (1) WO1999049499A2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10005494A1 (en) * 2000-02-08 2001-08-16 Infineon Technologies Ag Electronic component used in semiconductor device comprises semiconductor chip having integrated circuits and metallic contact surfaces, and housing from which contact humps protrude

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5258330A (en) * 1990-09-24 1993-11-02 Tessera, Inc. Semiconductor chip assemblies with fan-in leads
JPH0637233A (en) * 1992-07-16 1994-02-10 Hitachi Ltd Semiconductor integrated circuit device and manufacturing method thereof
US5602419A (en) * 1993-12-16 1997-02-11 Nec Corporation Chip carrier semiconductor device assembly

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5258330A (en) * 1990-09-24 1993-11-02 Tessera, Inc. Semiconductor chip assemblies with fan-in leads
JPH0637233A (en) * 1992-07-16 1994-02-10 Hitachi Ltd Semiconductor integrated circuit device and manufacturing method thereof
US5602419A (en) * 1993-12-16 1997-02-11 Nec Corporation Chip carrier semiconductor device assembly

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
PATENT ABSTRACTS OF JAPAN vol. 018, no. 255 (E - 1548) 16 May 1994 (1994-05-16) *

Also Published As

Publication number Publication date
FR2776836A1 (en) 1999-10-01
WO1999049499A2 (en) 1999-09-30
EP1027731A2 (en) 2000-08-16

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