UST940015I4 - Transmission line analysis and design process - Google Patents
Transmission line analysis and design process Download PDFInfo
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- UST940015I4 UST940015I4 US51189274A UST940015I4 US T940015 I4 UST940015 I4 US T940015I4 US 51189274 A US51189274 A US 51189274A US T940015 I4 UST940015 I4 US T940015I4
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- transmission line
- equations
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- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
- G06F17/10—Complex mathematical operations
- G06F17/11—Complex mathematical operations for solving equations, e.g. nonlinear equations, general mathematical optimization problems
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- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/36—Circuit design at the analogue level
Definitions
- the user of the process introduces into a computer system, which is initialized with a program for carrying out the analysis and design process, input information consisting of a symbolic representation of a transmission line network.
- User input information is first arranged in a data storage means and is then converted into a plurality of arrays, pointers, and tables, as needed by the process to operate on the input information.
- a set of tableau equations which represent the transmission line network are solved in a hierarchial loop structure.
- the time increments are of variable size depending on the rate of convergence in the solution of the equations.
- actual input signal values into the transmission lines in the network are utilized in the process of extrapolating or interpolating for the output signal values of those transmission lines at a later time point during a. Newtonian iteration.
- the solution vector is introduced into an optimization process which controls re-cxecution of the process.
- the resulting solution vector is then used to control the fabrication of a mask generating device for realizing the layout of a network containing transmission line structures for the optimized design.
- FIG. 1 A first figure.
- FIG. 1 A first figure.
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Abstract
THIS IS A PROCESS FOR ANALYZING AND DESIGNING ELECTRICAL NETWORKS CONTAINING COUPLED AND UNCOUPLED LOSSLESS TRANSMISSION LINES. SUCH NETWORKS ARE REFERRED TO AS TRANSMISSION LINE NETWORKS. THE USER OF THE PROCESS INTRODUCES INTO A COMPUTER SYSTEM, WHICH IS INITIALIZED WITH A PROGRAM FOR CARRYING OUT THE ANALYSIS AND DESIGN PROCESS, INPUT INFORMATION CONSISTING OF A SYMBOLIC REPRESENTATION OF A TRANSMISSION LINE NETWORK. USER INPUT INFORMATION IS FIRST ARRANGED IN A DATA STORAGE MEANS AND IS THEN CONVERTED INTO A PLURALITY OF ARRAYS, POINTERS, AND TABLES, AS NEEDED BY THE PROCESS TO OPERATE ON THE INPUT INFORMATION. THEN A SET OF TABLEAU EQUATIONS WHICH REPRESENT THE TRANSMISSION LINE NETWORK ARE SOLVED IN A HIERARCHIAL LOOP STRUCTURE. WITHIN THE ITERATIONS EXECUTED IN THE TIME LOOPS, THE TIME INCREMENTS ARE OF VARIABLE SIZE DEPENDING ON THE RATE OF CONVERGENCE IN THE SOLUTION OF THE EQUATIONS. IN ADDITION, ACTUAL INPUT SIGNAL VALUES INTO THE TRANSMISSION LINES IN THE NETWORK ARE UTILIZED IN THE PROCESS OF EXTRAPOLATING OR INTERPOLATING FOR THE OUTPUT SIGNAL VALUES OF THOSE TRANSMISSION LINES AT A LATER TIME POINT DURING A NEWTONIAN ITERATION. AFTER SOLVING THE SET OF TABLEAU EQUATIONS, THE SOLUTION VECTOR IS INTRODUCED INTO AN OPTIMIZATION PROCESS WHICH CONTROLS RE-EXECUTION OF THE PROCESS. UPON OPTIMIZATION BEING ACHIEVED, THE RESULTING SOLUTION VECTOR IS THEN USED TO CONTROL THE FABRICATION OF A MASK GENERATING DEVICE FOR REALIZING THE LAYOUT OF A NETWORK CONTAINING TRANSMISSION LINE STRUCTURES FOR THE OPTIMIZED DESIGN.
Description
DEFEh'dll/"E PUBHGATlN UNITED STATES PATENT AND TRADEMARK OFFICE Published at the request of the applicant or owner in accordance with the Notice of Dec. 16, 1969, S69 0.6-. 687. The abstracts of Defensive Publication applications are identified by distinctly numbered series and areal-ranged chronologically. The heading of each abstract indicates the number of pages of specification, including claims and sheets of drawings contained in the application as originally filed. The files of these applications are available to the public for inspection and reproduction may be purchased for 30 cents a sheet.
Defensive Publication applications have not been examined as to the merits of alleged invention. The Patent and Trademark Office makes no assertion as to the novelty of the disclosed subject matter.
PUBLISHED NOVEMBER 4, 1975 TMiMlJlS TRANSMEMQN UNE ANALYSES AND DEMGN PRUCESS Qhnng W. Ho, Mahopac, and Terrence R. Scott, Foughheepsie, NA L, assignors to international Business Machines Corporation, Arrnonls, NJY.
Continuation of ahandoned application er. No. 360,244, May 14, W73. This application @ct. 3, 1974, Ser. No. SlLWZ lint. 6i. G061? 15/06, 15/56 US. Cl. 444-1 17 directs Drawing. 52 Pages Specification INPUT USER DATA DISSOLVHi'G TINPUT PROCESSING FORMING TOPOLOOICAL MATRICES OBTAIN USER SPECIFIED CONTROL STATEHEIITS OBTAIN USER SPECIFIED TRAKiSMISSIUN LINE IIIiTIIIL OOiiDlTIOiTS OBTAIN USER REOUESTfiD 20 OUTPUTE; ORI i/ITS WRITE SUBROUTINES GENERATE SOLUTION MATRIX WRITE DATA This is a process for analyzing and designing electrical networks containing coupled and uncoupled losslcss transmission lines. Such networks are referred to as transmission line networks. The user of the process introduces into a computer system, which is initialized with a program for carrying out the analysis and design process, input information consisting of a symbolic representation of a transmission line network. User input information is first arranged in a data storage means and is then converted into a plurality of arrays, pointers, and tables, as needed by the process to operate on the input information. Then a set of tableau equations which represent the transmission line network are solved in a hierarchial loop structure. Within the iterations executed in the time loops, the time increments are of variable size depending on the rate of convergence in the solution of the equations. In addition, actual input signal values into the transmission lines in the network are utilized in the process of extrapolating or interpolating for the output signal values of those transmission lines at a later time point during a. Newtonian iteration. After solving the set of tableau equations, the solution vector is introduced into an optimization process which controls re-cxecution of the process. Upon optimization being achieved, the resulting solution vector is then used to control the fabrication of a mask generating device for realizing the layout of a network containing transmission line structures for the optimized design.
TRANSMISSION LINE ANALYSIS AND DESIGN PROCESS Original Filed Oct. 3, 1974 Sheet 1 of 17 FIG.1A
NOV, 4, 1975 c. w. H0 et a1. I T940,015
TRANSMISSION LINE ANALYSIS AND DESIGN PROCESS Original Filed Oct. 3, 1974 Sheet 2 of 17 GROUND CONDUCTOR CONDUCTOR 1.4
F IG. 3
" LINE 1 LINE 1 i THREE- CONDUCTOR INTA NXOZ LINEZ PARALLEL LINEZ NXH2 E TRANSMISSION I LINE I NW LINE3 LINE5 NOV. 4, 1975 c. W. HO et a1. T940 015 TRANSMISSION LINE ANALYSIS AND DESIGN PR Orlglnal Flled Oct. 3, 1974 OCESS Sheet 3 of 17 F 4 I NXOI T NXIII l RXOI JJCXOI I5 2 r5 l 12 E CXIII T EIIII 9 EouTI IQNXIIZ T TAITA Rx02 I YV V k1 RxII2 I 1 .Imxoz j cxuz 5/I EIN E Q B yEouTz A NX03 NX113 II ,I0 4 I RXOME EOUT3 T E|N3 MODELOF +-I I THREE CONDUCTOR PARALLEL TRANSMISSION LIIIE INPUT USER DATA I0 I H6 5 DISSOLVING INPUT I PROCESSING FORMING TOPOLOGICAL MATRICES 14 I OBTAIN USER SPECIFIED -16 CONTROL STATEMENTS I OBTAIN usER SPECIFIED -18 TRANSMISSION LINE INITIAL CONDITIONS I OBTAIN usER REQUESTED -20 OUTPUT & FORMATS I IIIRITE SUBROUTINES 22 I wRITE DATA -26 Nev. 4, 1975 c. W. HO et a1.
TRANSMISSION LINE ANALYSIS AND DESIGN PROCESS Sheet 4 of 17 FIG. 6A
FIG.
FIG.
22m; NSC; 2.30m; mzm; mzHm; EH; zE N83; :32; -52; M89; 55; 2:2; 8x; moi; 5X"; M503 M505 :EIH MZEH NZHH 2:5 7;: I
TRANSMISSION LINE ANALYSIS AND DESIGN PROCESS Original Filed Oct. 3, 1974 Sheet 5 of 17 FIGI 68 Ol 254567890 2 7J4567 009 fl lmwmwm wwwzznflznlzzzzzldlulu Neva 4, 1975 c. w. H0 et a1.
TRANSMISSION LINE ANALYSIS AND DESIGN PROCESS Sheet 6 of 17 On'ginal Filed Oct. 3, 1974 \zlsz h 01 22: 8 3+2;
2+2; 2 m Q E; A o 2 T J I m $22: $22: 2E3 H53 :52 A A T ENIE NNN E N A 2 $23. F 20500237: $22M 22; 22m 225 $2: 2:38 SO 52% 2 5a mob-m TMEZ/ with NOV 4, 1975 c. W. HO et a1. T940,015
TRANSMISSION LINE ANALYSIS AND DESIGN PROCESS Original Filed Oct. 3, 1974 Sheet 7 of 17 Fl 6. 8 OPT TLAP l l I I l TEIGEN \102 EXEC -104 SENSITY 4 FLETCHER- 2 T T i l TLSAVE M06 F0 H2 INGRT H4 TLUSE -i20 GAUSS SWITCH INITAL -H0 WEIGHT H6 ENTRY i'aififi'x iuiiflfi DEFINE [204 TEIGEN D=C2-LMATRX-C2 i glfigN/lLZdEUdD 2O6 i C2i= U l\ U 208 i DELAY=lL r210 RETURN Nov. 4, 1975 c. w. H0 et a1. T940,015
TRANSMISSION LINE ANALYSIS AND DESIGN PROCESS Original Filed Oct. 3, 1974 Sheet 8 of 17 EAIIRI H50 READ INITIAL CONDITION A5? I E68 9 OPT READ L006 154 READ ILIIIEs .I55
READ DELAY #156 READ ZMATR'X --I58 READ CMATRX -160 READ LMATRX MAG? READ LOCVI H164 READ NOLINE 1 READ IPLGTH M168 CALL TEIGEN CALL ExEc sEIIsIIY FLETCHER IRAAIsIIII DESIGN n8 DAIA ID MASK 172 174 l GENERATOR IS OPTIMIZATION FINISHED '2 YES Nov. 4, 1975 FIG.H EXEC C. W. HO et a1. TRANSMISSION LINE ANALYSIS AND Original Filed Oct. 3, 1974 ENTRY CALL TSLAVE DESIGN PROCESS Sheet 9 of 17 CALL INCRT NO I RETURN YES IS 1 NEDGE YES CALL F0 CALL TLSAVE CALL GAUSS INDX=2 NOV. 4, 1975 c. W. HO et a1. T940,015
TRANSMISSION LINE ANALYSIS AND DESIGN PROCESS Original Filed Oct. 3. 1974 Sheet 10 of 17 552 ENTRY ENTRY I 5 I 4 ENTRY2 35o- INITIALIZE I I TEST CONVERGENCE 556 I3 I 0F ITERATIONICOMPARE 559 IYEs N0 so T0 s2 T0 DEFINE e AI -2 A1 360 404\ IS e 5 e MAX? 5s2\ 406 ISK24. 410 YES [NO 564 IYES N0 368 366\ Af-=-AI/2 E TEST TRUNCATION ERRoR e V I COMPARE so TO $1 I T 4I5- Is e 5 egMAX? I Ar- Ar/Z 5I4- CALL WEIGHT l I A 576 EXTRAPOJILATE 4i5\ ISAI 2 IITDELT? YES NO CALL TLUSE 4Ie AI=2IITDELT I TESTTRUNCATION. ERROR e 480 I COMPARE SL T0 so SAVE SOLUTION vEcIoR sI- so 382- ISezeMAX.
584-IEs NO 386 422- Is IzI MAX. AI- AI/2 @387 NO YES E I RETURN TO RETURN TO s230 /388 EXEC 2 EXEC 3 CALCULATE INDUCTOR II fm CAPACITOR EQUIVALENT souRcEs FIG. 12
RETURN TO EXEC I INGRT Nov. 4, 1975 C. W. HO et a1. TRANSMISSION LINE ANALYSIS AND I DESIGN PROCESS Original Filed Oct. 3, 1974 Sheet 11 of 17 500 INITIAL ENTRY FIG. I L2IW E 13A JTIME =0 502 |=|G TOLD I0 135 ENTRY IS INDX=1 P504 NO 506- YES 508 JOVER =0 JOVER=O? JPASS RETURN CALL SWITCH /510 t TOLD NO YES 514 II=0 /522 FIRST PASS NO YES CALL INITAL J16 I=I+1 /524 I I RETURN Is I NTL /526 NO YES TL|NES(I1)=TL|NES(I1)-1 IIIIIE=IIIIIE-I C. W. HO et a1.
TRANSMISSION LINE ANALYSIS AND DESIGN PROCESS On'ginal Filed Oct. 3, 1974 Sheet 12 of 17 IS I NTL? YES TLINES (I1 9 =15 JTIME JTIME+1 STIMEUTIME) =x /559 TOLD =r IS JOVER=0 RETURN YES I=1, NLNL YTEMP(I)=0 RETURN Nov. 4, 1975 c. W. H0 et a1. T940,015
TRANSMISSION LINE ANALYSIS AND DESIGN PROCESS Original Filed Oct. 3, 1974 Sheet 14 of 17 INITAL ENTRY f 600 STIME (1) =DMAX STIME (2)=o 602 608 I I NTL 2 NO YES RETURN TLlNES(I1+7) TLINES (11+8) TLINES (I1+9) I2=IABS (TUNES (I1+1))2 I4 =TLINES (I1+6)-1 NOV. 4, 1975 c. W. H0 et a1. T940,015
TRANSMISSION LINE ANALYSIS AND DESIGN PROCESS Original Filed Oct. 3, 1974 Shet 16 of 17 FIG. I
VEIN
TRANSMISSION LINE ANALYSIS AND DESIGN PROCESS Original Filed Oct. 3, 1974 Sheet 17 of 17 FIG. 18
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US51189274 UST940015I4 (en) | 1974-10-03 | 1974-10-03 | Transmission line analysis and design process |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US51189274 UST940015I4 (en) | 1974-10-03 | 1974-10-03 | Transmission line analysis and design process |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| UST940015I4 true UST940015I4 (en) | 1975-11-04 |
Family
ID=24036889
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| US51189274 Pending UST940015I4 (en) | 1974-10-03 | 1974-10-03 | Transmission line analysis and design process |
Country Status (1)
| Country | Link |
|---|---|
| US (1) | UST940015I4 (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4271478A (en) | 1978-04-21 | 1981-06-02 | Siemens Aktiengesellschaft | Method and apparatus for measuring the transmission characteristics in electrical communication systems |
| US5031111A (en) * | 1988-08-08 | 1991-07-09 | Trw Inc. | Automated circuit design method |
| US5404310A (en) * | 1989-10-17 | 1995-04-04 | Kabushiki Kaisha Toshiba | Method and apparatus for power-source wiring design of semiconductor integrated circuits |
| US5410490A (en) * | 1991-09-03 | 1995-04-25 | Hewlett-Packard Company | Electromigration verification method and apparatus |
-
1974
- 1974-10-03 US US51189274 patent/UST940015I4/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4271478A (en) | 1978-04-21 | 1981-06-02 | Siemens Aktiengesellschaft | Method and apparatus for measuring the transmission characteristics in electrical communication systems |
| US5031111A (en) * | 1988-08-08 | 1991-07-09 | Trw Inc. | Automated circuit design method |
| US5404310A (en) * | 1989-10-17 | 1995-04-04 | Kabushiki Kaisha Toshiba | Method and apparatus for power-source wiring design of semiconductor integrated circuits |
| US5410490A (en) * | 1991-09-03 | 1995-04-25 | Hewlett-Packard Company | Electromigration verification method and apparatus |
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