USRE25342E - logue - Google Patents

Description

March 5, 1963 FIG. 1

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FIG 3 INVENTOR JOSEPH C. LOGUE ATFORNE Y United States Patent Ofilice Re. 25,342 Reissued Mar. 5, 1963 25,342 TRANE'EISTGR CHRCUHT WETH DEUDLE CLAMP SHUNTENG WUTPUT Ti PlEVENT @ATURA- TEGN Joseph C. Logue, Poughlaeepsie, N.Y., assignor to international Business ll tachines (forteration, New York, N.Y., a corporation oi New Yoru @riginal No. 2,&"i72,594, dated Feb. 3, 1959, Scr. No. senses, Dec. 31, W53. Application for reissue Mar. 24, 196%, Ser. No. 17,445

8 (Zlaims. (Cl. 361-885) Matter enclosed in heavy brackets E 3 appears in the original patent but forms no part oi this reissue specification; matter printed in italics indicates the additions made by reissue.

This invention relates to transistor circuits adapted for operation with signal pulses of large magnitude, such as bistable circuits.

When transistors are used in circuits employing large signal pulses, the transistors are in many cases operated in one of two stable output states which are characterized by widely separated current and potential conditions. The output states are commonly described as the on and ot? states, the terms respectively defining high current and low current states. The transistors are usually required to shift back and forth from one state to the other quickly in response to a relatively small input signal.

A transistor may be described as a body of semi-conductive material having an ohmic contact commonly referred to as a base electrode and two asymmetric contacts commonly referred to as emitter and collector electrodes. The semi-conductive material is classified as either n-type or p-type, depending upon Whether the majority current carriers in it are electrons or holes. The emitter electrode supplies to the semi-conductive body minority current carriers. By minority current carriers, it is meant that if semi-conductive body is n-type, so that the normal current carriers in it are electrons, then the emitter supplies holes. 011 the other hand, if the semi-conductive body is p-type, then the emitter supplies electrons. Some of the minority carriers so supplied move to the collector electrode. The arrival of such carries at the collector electrode is accompanied by a rel-ease of majority carriers from the collector, flowing toward the base. Under certain conditions of transistor operation, specifically high collector current and low collector voltage, the collector is unable to attract all the carriers supplied by the emitter, so that excess minority carriers are stored in the body, and a further increment of emitter current does not produce a corresponding increment of collector current. The transistor is then said to be saturated.

A given transistor can operate over a wide range of values of collector current for each value of collector potential, depending upon the emitter current and the load impedance connected in its output (usually its collector) circuit. For a fixed linear load impedance, however, there is only one value of collector current for each value of collector potential. The locus of these values of collector current on the collector current-potential plane is commonly termed the load line. For a linear impedance, the load line is straight, and intersects the region of saturation. The maximum value of collector current, for a fixed linear impedance occurs when the transistor is saturated.

in large signal circuits of the prior art, it has been customary to design the circuits to get maximum current during the on condition of the transistor, so that the on condition is a condition of saturation. In such a situation, when the transistor is shifted to its oil condition in response to an input signal, the collector current does not immediately drop to its normal ofi value, but

decreases slowly until the accumulation of minority carriers which characterizes the saturation condition has been cleared away. The time required for these excess carriers to be cleared away is commonly referred to as the fall time of the transistor. A protracted fall time is undesir-able, since it represents a period in which the transistor is less sensitive than normal to incoming signals.

There is shown and described in the copending U.S. patent application of Edward L. Peterson, In, Serial No. 401,567, filed December 31, 1953, now Pat. No. 2,878,398, issued March 17, 1959, entitled Electric Circuits Including Transistors, a transistor circuit including a composite load impedance such that the transistor has different effective impedance loads in different operating ranges. It has now been discovered that principles similar to those described in the Peterson application may be applied to the present problem to provide a transistor circuit which does not operate under saturation conditions and which consequently has :a short fall" time.

An object of the present invention is to provide a transistor circuit having a short fall time.

.Another object is to provide a large signal transistor circuit including means for preventing saturation of the tnansistor under on conditions.

Another object is to provide a transistor circuit having means for preventing saturation of the transistor.

Another object is to provide a transistor circuit having a low output impedance when the transistor is in the on condition. A further object is to provide a transistor circuit having an output voltage in the on condition which is relatively independent of the transistor characteristics.

The foregoing and other objects of the invention are attained in the circuit described herein by connecting an asymmetric impedance unit and a [batteryg voltage source in series in a branch circuit which is connected to the collector electrode of the transistor in common with Eparallelsi the conventional load resistor and its associated Ebattery] voltage source. The [battery] voltage source in the branch circuit containing the asymmetric impedance unit is made substantially smaller than the potential of the [battery] voltage source in series with the load resistance.

A transistor circuit having :a load so designed, Eie] cg, a load resistor in series with a Ebattery] voltage source end parallel with a branch comp-rising an asymmetric impedance unit and another {battery} voltage source, may have, if the impedances and Ebatteriesfi sources are properly selected, a load line which does not intersect the region of saturation.

Other objects and advantages of the invention will become apparent from a consideration of the following specification, taken together with the accompanying drawln the drawing:

FIG. 1 is a wiring diagram of one form of transistor circuit embodying my invention;

FIG. 2 is a gnaphical illustration of a family of collector currentpotential characteristics for the circuit of FIG. 1; and

HG. 3 is a wiring diagram of a modified form of circuit embodying the invention.

Referring to FIG. 1, there is shown a transistor I having a base electrode 1b, a collector electrode 1c and an emitter electrode to. The emitter electrode 1c is connected to ground. Input terminals 3 and 4 are connected respectively to the base 1b through a resistor 2 and to ground. Connect-ed between the collector electrode 1c and ground are two {parallel} branch circuits. Gne of these branch circuits includes a load resistor 5 and abattery 5 in series. The other branch circuit includes an asym- 3 metric impedance unit 7 and a battery 8 in series. Output terminals 9 and 1d are respectively connected to the collector electrode 1c and to ground.

The battery 8 has a smaller potential than the battery 6. The resistor 5 is chosen so that the potential drop across it when the transistor is in its on condition is greater than the difference between the potentials of the batteries 6 and 3. With the asymmetric unit 7 poled as shown in the drawing, the potential difference across the asymmetric unit in the on condition is in a direction to send a cunrent through it in its low impedance direction.

When the transistor is off, the potential drop across resistor 5 is small-er than the difierence between the potentials of the batteries 6 and 8, the potential dilference cross the asymmetric unit 7 is of the opposite polarity, and the iiow of current through it is substantially prevented.

FIG. 2 illustrates a family of collector current-potential characteristics for the transistor 1. Each curve in FIG. 2 is drawn for a fixed value of [emitter] base current. [exemplary values of which are indicated by legend in the drawing] There is superimposed on this family of curves a load line 11, representing the locus of all operating points of the transistor 1 when provided with a collector-[base] emitter load circuit including only resistor 5 and battery 6. The slope of load line 11 is determined by the impedance of resistor 5. Its location is determined by the potential E of battery 6, which sets the point where the load line crosses the horizontal axis (zero collector current, I

Also superimposed on the family of curves in FIG. 2 is a load line 12, representing the locus of all operating points of transistor 1 when provided with a collector- {base} emitter load circuit including only asymmetric unit 7 and battery 3. The slope of load line 12 is determined by the forward impedance of unit 7, and its location by the potential E of battery 8. It may be seen that current is conducted through asymmetric unit 7 only when the collector potential, V becomes more positive than the negative terminal of battery 8.

When the collector potential V is more negative than the negative terminal of battery 8, a current flows through asymmetric impedance unit 7 in its reverse or high impedance direction. This current is very small, and may be neglected without substantial error. It is therefore not graphically represented in FIG. 2.

The region of saturation, as illustrated graphically in FIG. 2, is that region to the right of the load line 12 where the constant [emitter] base current curves depart from linearity and curve upwardly toward the origin.

The composite load line in FIG. 2 for the circuit of FIG. 1 follows the line 11 from its intersection with the horizontal axis to its intersection with line 12, and then follows line 12 downwardly. For any value of V smaller than E the current value on load line 11 is so small compared to the current value on load line 12 that the former may be neglected.

It may therefore be seen that all practical operating points for the transistor 1 in the circuit of FIG. 1 lie outside its region of saturation. Consequently the fall" time of the transistor, when the input signal is removed is reduced to a very short period. By connecting a load resistor, an asymmetric unit, and two batteries as shown in FIG. 1, the same results may be secured with any transistor. Certain conditions must be observed, however, with regard to the selection of battery potentials, as follows: (1) the potential of battery 6 must be greater than the potential of battery 8; (2) the potential drop across resistor must vary through a range extending on both sides of the difference between the potentials of batteries 6 and 8; and (3) the forward impedance of asymmetric impedance unit 7 must be so related to the potential of battery E that the load line 12 is outside the saturation region. There are no specific limits of impedance or potential required to meet the last condition, but it is desirable that the forward impedance of asymmetric unit 7 be as small as possible, so that load line 12 will be as nearly vertical as possible.

The invention has been described above as applied to a transistor having a base input. it is equally applicable to transistors having emitter inputs. FIG. 3 illustrates such a circuit. Since each of the circuit elements in FIG. 3 is the substantial equivalent of the corresponding element in FIG. 1, the same reference numerals have been used. in illustrating graphically the characteristics of the circuit of H6. 3, each curve in the collector potential current plane will be drawn for a constant value of [basefi emitter current.

The operation of the circuit of FIG. 3 is considered to be obvious from the foregoing description of the FIG. 1 circuit, and it will not be further described.

This invention is of value in any circuit utilizing signals which are on for appreciable lengths of time (i.e., 3 or more microseconds). Where signal pulses of 1 microsecond or less are used, few minority carriers are stored because of the short times involved, and no fall time problem arises.

The circuits shown and described are indicated as for a point contact transistor of n-type semi-conductive material. It will readily be recognized that the invention is equally applicable to point contact transistors of p-type material and to junction transistors. It will also be recognized that the batteries 6 and 8 may be any means 0 providing unidirectional potentials.

While I have shown and described certain preferred embodiments of my invention, other modifications will readily occur to those skilled in the art and I therefore intend my invention to be limited only by the appended claims.

I claim:

1. An electric circuit for large signal operation, com prising a transistor having a semi-conductive body, a first base electrode in ohmically conductive relation with said body, and second and third electrodes in conductive relation with said body at localities spaced from each other and from said base electrode, aid body providing asymmetrically conductive current paths between said second and third electrodes and said base electrode; a signal input circuit connected between said base electrode and said second electrode, said input circuit including a junction and a source of signal energy shiftable between a signal condition in which it supplies electrical energy at a substantial potential and of a polarity to produce a current flow through the asymmerically conductive current path between said second electrode and said base electrode in the low impedance direction thereof and a no-signal condition in which it supplies substantially no energy of said polarity; load circuit means comprising two parallel branch circuits connected between said third electrode and said junction; one of said branch circuits comprising a load resistor, a first source of unidirectional electrical energy, and means connecting said resistor and said source in series between said third electrode and said junction, said first source having a polarity to bias the asymmetrically conductive path between said third electrode and said base electrode for current flow in its high impedance direction; the current from said signal source in its signal condition being effective to increase the current flow through said last-mentioned path from said first source, said increased current flow being effective to increase the potential drop across said load resistor and thereby to reduce the potential of said third electrode with respect to said junction, said semi-conductive body being subject to a saturation condition when the signal source is in its signal condition and the potential of said third electrode with respect to said junction falls below a characteristic value; the other of said two parallel branch circuits consisting of a second source of unidirectional electrical energy having a potential smaller than said first source but greater than said characteristic value, means directly connecting said junction to'the terminal of the second source having the same polarity as the terminal of the first source connected to said junction, an asymmetrically conductive diode connected directly beneath said third electrode and the other terminal of said second source, said diode having substantially zero impedance in its low impedance direction and poled so thatcurrent from said second source flows therethrough in said low impedance direction, said diode and said second source cooperating to prevent excursions of the potential of said third electrode substantially below that of said second source, and thereby to prevent establishment of said saturation condition in said semi-conductive body, and means for taking an output between said third electrode and said junction.

2. An electric circuit for large signal operation, comprising a transistor having a semiconductive body, a first base electrode in olzmically conductive relation with aid body, and second and third electrodes in conductive relation with said body at localities spaced from each other and from said base electrode, said body providing asymmetrically conductive current paths between said second and third electrodes and said base electrode; a signal input circuit connected between said base electrode and said second electrode, said input circuit including a junction and a source of signal energy shiftable between a signal condition in which. it supplies electrical energy at a substantial potential and of a polarity to produce a current flow through the asymmetrically conductive current path between said second electrode and said base electrode in the low impedance direction thereof and a no-signal condition in which it supplies substantially no energy of said polarity; load circuit means comprising a load resistor, a source of unidirectional electrical energy, and means connecting aid resistor and said source in series between said third electrode and said junction, said source of unidirectional electrical energy having a polarity to bias the asym metrically conductive path between said third electrode and said base electrode for current flow in its high impedance direction; the current from said signal source in its signal condition being effective to increase thecurrent flow through said last-mentioned path from said source of unidirectional electrical energy, said increased current flow being efiective to increase the potential drop across said load resistor and thereby to reduce the potential of said third electrode with respect to said function, said semi-conductive body being subject to a saturation condition when the signal source is in its signal condition and the potential of said third electrode falls below a characteristic value; means for providing a unidirectional voltage having a magnitude smaller than said source of unidirectional electrical energy but greater than said characteristic value, said means having two ends, one end being connected in series with the base electrode on asymmetrically conductive diode connected directly between said third electrode and the other end of said unidirectional voltage means, said diode having substantially zero impedance in its low impedance direction and poled so that current from said unidirectional voltage means flows therethrough in said low impedance direction, said diode and said unidirectional voltage means cooperating to prevent excursions of the potential of said third electrode substantially below that of said zmidirectional voltage means, and thereby to prevent establishment of said saturation condition in said semi-conductive body, and mean for taking an output between said third electrode and said junction.

3. A non-saturating large signal transistor circuit comprising; a transistor having base, emitter, and collector electrodes, a signal input circuit connected between said base and emitter electrodes, said input circuit including a source of signal energy shiftable between a signal condition at a substantial potential and of a polarity to produce a current flow between said base and emitter electrodes and a no-signal condition in which it supplies substantially no energy of said polarity, a source of unidirectional elec- 6 tricalenergy, a load impedance, and means connecting said load impedance in series between said collector electrade and said source of unidirectional electrical energy, said transistor being subject to a saturation condition when the signal source is in its signal condition whereby the potential of said collector falls below a characteristic value, means for providing a unidirectional voltage having a magnitude smaller than said source of unidirectional electrical energy but greater than said characteristic value,

.said means having two ends, one end being connected in serie with the base electrode, an asymmetrically conductive diode connected directly between said collector and the other end of said unidirectional voltage means, said diode having substantially zero impedance in its low impedance direction and poled so that current from said unidirectional voltage means flows therethrough in said low impedance direction, said diode and said unidirectional voltage means cooperating to prevent excursions of the potential of said collector substantially below that of said unidirectional voltage means, thereby to prevent csrablishment of said saturation condition in said transistor, and means for taking an output across said load impedance and said source of unidirectional electrical energy.

4. In combination: a semi-conductor amplifier element having at least emitter, collector and base electrodes; means for applying signals between said base and emitter electrodes; and means for maintaining a collector-to-base potential of a predetermined polarity such as to reversebias said collector element and of at least a predetermined minimum magnitude, said means comprising an impedance element having at least two terminals and having one of said terminal connected to said base electrode, and means for short-circuiting said impedance element whenever the magnitude of said collector-to-base potential tends to decrease below said minimum magnitude, said last-named means comprising a unilaterally conductive device having a first terminal connected to said collector electrode and a second terminal, said device being so poled as to be substantially non-conducting when the potential at said first terminal thereof is of said predetermined polarity with respect to the potential at said second terminal thereof, and to become conducting when the potential at said first terminal thereof tends to assume an opposite polarity with respect to the potential at said second terminal thereof, and means for taking an output at the collector independent of the asymmetrically conductive device.

5. The apparatus of claim 4 further characterized in that said unilaterally conductive device is a crystal diode.

6. The apparatus of claim 4 further characterized in that said impedance element is a resistor.

7. A semiconductor amplifying system comprising a transistor having emitter, collector and base elements, circuit means for connecting said transistor such that said collector element is normally biased in the reverse direction with respect to said base element and such that collector saturation is produced in said transistor by voltages of greater than a predetermined magnitude applied be-- tween said base element and said emitter element in the direction to forward bias said emitter element, means for applying between said base element and said emitter element varying voltages having magnitudes intermittently greater than said predetermined magnitude, and an asymmetrically conductive device connected between said base element and said collector element and normally biased in its less conductive condition but responsive to said application of said voltages of greater titan said predetermined magnttude to assume its more conductive condition, thereby to prevent said collector from becoming forward biased with respect to said base element, and mean for taking an output at the collector independent of the asymmetrically conductive device.

8. A semiconductor amplifying system comprising a transistor having emitter, collector and base elements, circuit means for connecting said transistor such that said 7 collector element is normally biased in the reverse direction with respect to said base element and such that collector saturation is produced in said transistor by voltages of greater than a predetermined magnitude applied between said base element and said emitter element in the direction to forward bias said emitter element, means for applying between said base element and said emitter element varying voltages having magnitudes intermittently greater than said predetermined magnitude, and an asymmetrically conductive device connected between said base element and said collector element and normally biased in its less conductive condition but responsive to said application of said voltages of greater than said predetermined magnitude to assume its more conductive condition, thereby to prevent said collector from becoming forward biased with respect to said base element, and means for taking an output at the collector independent of the asymmetrically conductive device.

References Cited in the file of this patent or the original patent UNITED STATES PATENTS OTHER REFERENCES A Method of Designing Transistor Trigger Circuits, Williams et 211., Institute of Electrical Engineering, vol. 100, part HI, 1953, pages 228-248.

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