US8854115B2 - Preventing electronic device counterfeits - Google Patents
Preventing electronic device counterfeits Download PDFInfo
- Publication number
- US8854115B2 US8854115B2 US13/897,165 US201313897165A US8854115B2 US 8854115 B2 US8854115 B2 US 8854115B2 US 201313897165 A US201313897165 A US 201313897165A US 8854115 B2 US8854115 B2 US 8854115B2
- Authority
- US
- United States
- Prior art keywords
- electronic device
- authorization
- cycle
- operations
- perform
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01H—ELECTRIC SWITCHES; RELAYS; SELECTORS; EMERGENCY PROTECTIVE DEVICES
- H01H85/00—Protective devices in which the current flows through a part of fusible material and this current is interrupted by displacement of the fusible material when this current becomes excessive
- H01H85/02—Details
- H01H85/04—Fuses, i.e. expendable parts of the protective device, e.g. cartridges
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
- G06F21/71—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
- G06F21/73—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information by creating or determining hardware identification, e.g. serial numbers
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/30—Authentication, i.e. establishing the identity or authorisation of security principals
- G06F21/44—Program or device authentication
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
- G11C17/14—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM
- G11C17/16—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM using electrically-fusible links
Definitions
- systems and methods for authenticating electronic devices may perform one or more operations including, but not limited to: receiving at least one code associated with an authorization to perform one or more manufacturing life-cycle operations for at least one electronic device; and blowing one or more fuses of the at least one electronic device according to the at least one code associated with an authorization to perform one or more manufacturing life-cycle operations for the at least one electronic device.
- FIG. 1 illustrates an electronic device configured for authentication
- FIG. 2 illustrates a system for electronic device authentication
- FIG. 3 illustrates a method for electronic device authentication.
- the present disclosures provide systems and methods for authenticating electronic devices.
- various mechanisms may be employed to authenticate an electronic device.
- an electronic device 100 may include one or more fuse elements 101 configured to be selectively blown according to one or more authorization codes associated with a particular phase of the manufacturing life-cycle of the electronic device 100 .
- a given set of fuse elements 101 may be associated with particular phase of the manufacturing life-cycle of the electronic device 100 .
- a first set of fuse elements 101 A may be associated with a fabrication phase of the manufacturing life-cycle of the electronic device 100 .
- a second set of fuse elements 101 B may be associated with a device testing and verification phase of the manufacturing life-cycle of an electronic device 100 .
- a third set of fuse elements 101 C may be associated with an assembly of a package including the electronic device 100 .
- a fourth set of fuse elements 101 D may be associated with an assembly of a circuit board including a package containing the electronic device 100 . While described herein as distinct sets of independent fuse elements 101 dedicated to specific portions of the manufacturing life-cycle of the electronic device 100 , it is fully contemplated that the fuse elements 101 associated with a given manufacturing life-cycle phase may be networked together (e.g. in series or parallel) with additional fuse elements 101 associated with that manufacturing life-cycle phase or any other manufacturing life-cycle phase.
- the fuse elements 101 of an electronic device 100 may be operably coupled to circuitry configured to selectively blow one or more of the fuse elements 101 .
- U.S. Pat. No. 6,396,759 provides an exemplary system for selectively controlling a set of fuses associated with an integrated circuit for the purpose of trimming the circuit by blowing one or more fuse elements. Such a system may be repurposed for selectively blowing one or more of the fuse elements 101 according to an authorization code as described below.
- the system 200 may include an electronic device design entity 201 .
- the electronic device design entity 201 may include one or more design systems for the design of an electronic device 100 .
- the electronic device design entity 201 may employ a device design system 202 (e.g. a computer-aided design (CAD) system such as a SPICE design and simulation system) to generate electronic device design specifications 203 .
- CAD computer-aided design
- These design specifications 203 may be transmitted (e.g. communications network infrastructure such as the internet) to a device manufacturing entity 204 .
- the device manufacturing entity 204 may include a device fabrication module 205 employing device fabrication systems (e.g. deposition, removal, patterning, electrical property modification, etc.) to create an electronic device 100 (e.g. a semiconductor device) according to the design specifications 203 .
- the electronic device design entity 201 may have an interest in maintaining the exclusivity of production of the electronic device 100 .
- the electronic device design entity 201 may maintain an authentication code database 206 .
- the authentication code database 206 may store one or more authentication codes 207 associated with one or more phases of the manufacturing life-cycle of an electronic device 100 .
- the authentication code 207 may also be vendor specific.
- any number of electronic device design entities 201 may provide independent authentication codes 207 (e.g. authentication code 207 A, authentication code 207 B, authentication code 207 C, authentication code 207 D) to the respective entities of the manufacturing life-cycle of an electronic device 100 (e.g. a device manufacturing entity 204 , a device testing entity 209 , a package assembly entity 211 , a board assembly entity 214 , and the like).
- independent authentication codes 207 e.g. authentication code 207 A, authentication code 207 B, authentication code 207 C, authentication code 207 D
- the device manufacturing entity 204 may receive an authentication code 207 A and blow one or more fuse elements 101 A of the electronic device 100 according to the authentication code 207 A.
- the electronic device 100 may be transferred to an authentication module 208 A.
- the authentication module 208 A may include circuitry (e.g. such as that described in U.S. Pat. No. 6,396,759) which may be operably coupled to an electronic device 100 to selectively blow one or more of the fuse elements 101 A of the electronic device 100 . Further, the authentication module 208 A may be provided with and/or retrieve an authentication code 207 A from the authentication code database 206 of the electronic device design entity 201 .
- the authentication module 208 A may be configured to map the authentication code 207 A to a fuse blowing scheme to be applied to the fuse elements 101 A of the electronic device 100 that are associated with the fabrication phase operations of the manufacturing life-cycle.
- the authentication code 207 A may be an alpha-numerical value that may be converted to a binary value by the authentication module 208 A.
- the fuse elements 101 A of the electronic device 100 may be blown according to that binary value (e.g. fuses associated with a “1” value are blown; fuses associated with a “0” value are maintained, or vice versa).
- the authentication module 208 A may apply voltages to those selected fuse elements 101 A sufficient to blow those fuse elements 101 B thereby encoding the authentication code 207 A in the electronic device 100 to generate an electronic device 100 ′ that is authenticated for the device fabrication phase of the electronic device 100 .
- the system 200 may further include a device testing entity 209 .
- the device testing entity 209 may include one or more device testing systems 210 (e.g. scatterometry verification testing, imaging testing, functionality testing, and other means of testing know to one skilled in the art) configured to determine compliance of the electronic device 100 ′ with the design specifications 203 . Following confirmation of compliance of the electronic device 100 ′ with the design specifications 203 , the electronic device 100 ′ may be provided to an authentication module 208 B.
- device testing systems 210 e.g. scatterometry verification testing, imaging testing, functionality testing, and other means of testing know to one skilled in the art
- the device testing entity 209 may receive an authentication code 207 B and blow one or more fuse elements 101 B of the electronic device 100 ′ according to the authentication code 207 B.
- authentication module 208 B may include circuitry which may be operably coupled to an electronic device 100 ′ to selectively blow one or more of the fuse elements 101 B of the electronic device 100 ′. Further, the authentication module 208 B may be provided with and/or retrieve an authentication code 207 B from the authentication code database 206 . The authentication module 208 B may be configured to map the authentication code 207 B to a fuse blowing scheme to be applied to the fuse elements 101 B of the electronic device 100 that are associated with the testing phase of the manufacturing life-cycle. For example, in a simple case, the authentication code 207 B may be an alpha-numerical value that may be converted to a binary value by the authentication module 208 B.
- the fuse elements 101 B of the electronic device 100 ′ may be blown according to that binary value (e.g. fuses associated with a “1” value are blown; fuses associated with a “0” value are maintained).
- the authentication module 208 B may apply voltages to those selected fuse elements 101 B sufficient to blow those fuse elements 101 B thereby encoding the authentication code 207 B in the electronic device 100 ′ to generate an electronic device 100 ′′ that is authenticated for the device testing phase of the manufacturing life-cycle.
- the system 200 may further include a package assembly entity 211 .
- the package assembly entity 211 may include one or more package assembly systems 212 (e.g. wire-bond or flip chip integration systems) configured to incorporate the electronic device 100 ′′ into a package including one or more additional previously authenticated electronic devices 100 ′′ to form an authenticated device package 213 .
- the device package 213 may be provided to an authentication module 208 C.
- the package assembly entity 211 may receive an authentication code 207 C and blow one or more fuse elements 101 C of the electronic device 100 ′′ according to the authentication code 207 C.
- authentication module 208 C may include circuitry which may be operably coupled to one or more electronic devices 100 ′′ to selectively blow one or more of the fuse elements 101 C of the electronic devices 100 ′′. Further, the authentication module 208 C may be provided with and/or retrieve an authentication code 207 C from the authentication code database 206 . The authentication module 208 C may be configured to map the authentication code 207 C to a fuse blowing scheme to be applied to the fuse elements 101 C of the electronic devices 100 ′′ that are associated with the package assembly phase of the manufacturing life-cycle. For example, in a simple case, the authentication code 207 C may be an alpha-numerical value that may be converted to a binary value by the authentication module 208 C.
- the fuse elements 101 C of the electronic device 100 ′′ may be blown according to that binary value (e.g. fuses associated with a “1” value are blown; fuses associated with a “0” value are maintained).
- the authentication module 208 C may apply voltages to those selected fuse elements 101 C sufficient to blow those fuse elements 101 C thereby encoding the authentication code 207 C in the electronic device 100 ′′ to generate a device package 213 including electronic devices 100 ′′′ that are authenticated for the package assembly phase of the manufacturing life-cycle.
- the system 200 may further include a board assembly entity 214 .
- the board assembly entity 214 may include one or more board assembly systems 215 configured to incorporate a device package 213 including electronic devices 100 ′′′ with one or more additional device packages 213 including authenticated electronic devices 100 ′′′ to form an board assembly 216 .
- the board assembly 216 may be provided to an authentication module 208 D.
- the board assembly entity 214 may receive an authentication code 207 D and blow one or more fuse elements 101 D of the electronic device 100 ′′′ according to the authentication code 207 D.
- the authentication module 208 D may include circuitry which may be operably coupled to one or more electronic devices 100 ′′′ of the board assembly 216 to selectively blow one or more of the fuse elements 101 D of the electronic devices 100 ′′′. Further, the authentication module 208 D may be provided with and/or retrieve an authentication code 207 D from the authentication code database 206 . The authentication module 208 D may be configured to map the authentication code 207 D to a fuse blowing scheme to be applied to the fuse elements 101 D of the electronic devices 100 ′′′ that are associated with the board assembly phase of the manufacturing life-cycle.
- the authentication code 207 D may be a may be an alpha-numerical value that may be converted to a binary value by the authentication module 208 D.
- the fuse elements 101 D of the electronic device 100 ′′′ may be blown according to that binary value (e.g. fuses associated with a “1” value are blown; fuses associated with a “0” value are maintained).
- the authentication module 208 D may apply voltages to those selected fuse elements 101 D sufficient to blow those fuse elements 101 D thereby encoding the authentication code 207 D in the electronic device 100 ′′ to generate electronic devices 100 ′′′′ that are authenticated for the board assembly phase of the manufacturing life-cycle.
- the authentication codes 207 provided by an electronic device design entity 201 to an entity at a given phase in the manufacturing life-cycle of may be unique to the electronic device design entity 201 (e.g. in a case of multiple instances of system 200 , each electronic device design entity 201 may provide authentication codes 207 distinct from any other electronic device design entity 201 ), unique to the design specifications 203 for the electronic device 100 provided by the electronic device design entity 201 (e.g. in a case of use of multiple design specifications 203 in a common system 200 , each of the design specifications 203 may be associated with distinct authentication codes 207 ), unique to a phase of the manufacturing life-cycle (e.g.
- common authentication codes 207 may be provided to all such entities), unique to specific vendor at a given phase of the manufacturing life-cycle (e.g. in a case where design specifications 203 are provided to multiple manufacturing life-cycle entities at a common phase of the manufacturing life-cycle (e.g. fabrication), distinct authentication codes 207 may be provided to each entities), unique to a lot of electronic devices 100 , unique to a single electronic device 100 or any other specified association between an authentication code 207 and an electronic device 100 .
- Examples of a signal bearing medium include, but may be not limited to, the following: a recordable type medium such as a floppy disk, a hard disk drive, a Compact Disc (CD), a Digital Video Disk (DVD), a digital tape, a computer memory, etc.; and a transmission type medium such as a digital and/or an analog communication medium (e.g., a fiber optic cable, a waveguide, a wired communications link, a wireless communication link (e.g., transmitter, receiver, transmission logic, reception logic, etc.), etc.).
- a recordable type medium such as a floppy disk, a hard disk drive, a Compact Disc (CD), a Digital Video Disk (DVD), a digital tape, a computer memory, etc.
- a transmission type medium such as a digital and/or an analog communication medium (e.g., a fiber optic cable, a waveguide, a wired communications link, a wireless communication link (e.g., transmitter, receiver, transmission logic,
- an implementer may opt for a mainly hardware and/or firmware vehicle; alternatively, if flexibility may be paramount, the implementer may opt for a mainly software implementation; or, yet again alternatively, the implementer may opt for some combination of hardware, software, and/or firmware.
- any vehicle to be utilized may be a choice dependent upon the context in which the vehicle will be deployed and the specific concerns (e.g., speed, flexibility, or predictability) of the implementer, any of which may vary.
- Those skilled in the art will recognize that optical aspects of implementations will typically employ optically oriented hardware, software, and or firmware.
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Computer Security & Cryptography (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Software Systems (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Mathematical Physics (AREA)
- Semiconductor Integrated Circuits (AREA)
Abstract
Description
Claims (14)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US13/897,165 US8854115B2 (en) | 2013-03-05 | 2013-05-17 | Preventing electronic device counterfeits |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US201361772889P | 2013-03-05 | 2013-03-05 | |
US13/897,165 US8854115B2 (en) | 2013-03-05 | 2013-05-17 | Preventing electronic device counterfeits |
Publications (2)
Publication Number | Publication Date |
---|---|
US20140253222A1 US20140253222A1 (en) | 2014-09-11 |
US8854115B2 true US8854115B2 (en) | 2014-10-07 |
Family
ID=51487125
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US13/897,165 Expired - Fee Related US8854115B2 (en) | 2013-03-05 | 2013-05-17 | Preventing electronic device counterfeits |
Country Status (1)
Country | Link |
---|---|
US (1) | US8854115B2 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US11232190B2 (en) * | 2018-11-01 | 2022-01-25 | Trustonic Limited | Device attestation techniques |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9639494B2 (en) * | 2013-11-01 | 2017-05-02 | Nvidia Corporation | Setting a PCIE Device ID |
GB201700367D0 (en) * | 2017-01-10 | 2017-02-22 | Trustonic Ltd | A system for recording and attesting device lifecycle |
IL256108B (en) | 2017-12-04 | 2021-02-28 | Elbit Systems Ltd | System and method for detecting usage condition and authentication of an article of manufacture |
US11907409B2 (en) * | 2021-09-29 | 2024-02-20 | Dell Products L.P. | Dynamic immutable security personalization for enterprise products |
Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6396759B1 (en) | 2000-04-28 | 2002-05-28 | Agere Systems Guardian Corp. | Semiconductor device with test fuse links, and method of using the test fuse links |
US7210634B2 (en) * | 2004-02-12 | 2007-05-01 | Icid, Llc | Circuit for generating an identification code for an IC |
US20120069119A1 (en) | 2010-03-18 | 2012-03-22 | Triune Ip Llc | Marking Verification System |
US8242831B2 (en) | 2009-12-31 | 2012-08-14 | Intel Corporation | Tamper resistant fuse design |
US20120216050A1 (en) | 2011-02-23 | 2012-08-23 | Cavium, Inc. | Microcode authentication |
US20130046981A1 (en) | 2011-08-17 | 2013-02-21 | Vixs Systems, Inc. | Secure provisioning of integrated circuits at various states of deployment, methods thereof |
US8683210B2 (en) * | 2008-11-21 | 2014-03-25 | Verayo, Inc. | Non-networked RFID-PUF authentication |
-
2013
- 2013-05-17 US US13/897,165 patent/US8854115B2/en not_active Expired - Fee Related
Patent Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6396759B1 (en) | 2000-04-28 | 2002-05-28 | Agere Systems Guardian Corp. | Semiconductor device with test fuse links, and method of using the test fuse links |
US7210634B2 (en) * | 2004-02-12 | 2007-05-01 | Icid, Llc | Circuit for generating an identification code for an IC |
US8683210B2 (en) * | 2008-11-21 | 2014-03-25 | Verayo, Inc. | Non-networked RFID-PUF authentication |
US8242831B2 (en) | 2009-12-31 | 2012-08-14 | Intel Corporation | Tamper resistant fuse design |
US20120069119A1 (en) | 2010-03-18 | 2012-03-22 | Triune Ip Llc | Marking Verification System |
US20120216050A1 (en) | 2011-02-23 | 2012-08-23 | Cavium, Inc. | Microcode authentication |
US20130046981A1 (en) | 2011-08-17 | 2013-02-21 | Vixs Systems, Inc. | Secure provisioning of integrated circuits at various states of deployment, methods thereof |
Non-Patent Citations (2)
Title |
---|
Gorman, Celia, "The Financial Risks of Counterfeit Semiconductors", printed from Blogs//The Risk Factor, Apr. 9, 2012, 1 page. |
Lee, Jolie, "DoD Testing Plant DNA to Fight Counterfeit Parts", Feb. 9, 2012, 1 page. |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US11232190B2 (en) * | 2018-11-01 | 2022-01-25 | Trustonic Limited | Device attestation techniques |
Also Published As
Publication number | Publication date |
---|---|
US20140253222A1 (en) | 2014-09-11 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US11533187B2 (en) | Device birth certificate | |
US11243513B2 (en) | Controlling transport of physical objects based on scanning of encoded images | |
TWI744373B (en) | Embedding foundational root of trust using security algorithms | |
US11087104B2 (en) | Automatically updating database records regarding materials used in manufacturing based on scanning of encoded images | |
US8854115B2 (en) | Preventing electronic device counterfeits | |
US11521156B2 (en) | Trustable product delivery with RFID and smart chip | |
US20220070006A1 (en) | Methods, devices and system for the security-protected provision of sets of data | |
US10108925B1 (en) | Chip tracking with marking database | |
CN107683479A (en) | Checking guiding based on NAND | |
US20180198628A1 (en) | Techniques for genuine device assurance by establishing identity and trust using certificates | |
WO2021169455A1 (en) | Blockchain-based material inventory data providing method, apparatus and system | |
CN109727132A (en) | Acquisition methods, device, electronic equipment and the storage medium of block chain common recognition node | |
US9762391B2 (en) | Chip authentication technology using carbon nanotubes | |
US10007815B2 (en) | Production method, RFID transponder, authentication method, reader device and computer program product | |
CN113806816A (en) | Electronic file management method and device based on block chain and electronic equipment | |
US20200356640A1 (en) | Encoding images on physical objects to trace specifications for a manufacturing process | |
US11528152B2 (en) | Watermarking for electronic device tracking or verification | |
Calzada et al. | Heterogeneous integration supply chain integrity through blockchain and CHSM | |
US10402248B2 (en) | Method for controlling error rate of device-specific information and program for controlling error rate of device-specific information | |
US20220229938A1 (en) | Method and System for Integrity Protected Distributed Ledger for Component Certificate Attestation | |
US20230037023A1 (en) | Registration Device, Verification Device, Identification Device, and Individual Identification System | |
US10298406B1 (en) | Security integrated circuit | |
US11196575B2 (en) | On-chipset certification to prevent spy chip | |
CN113868691A (en) | Authorized operation method and device of block chain based on cloud-native technology | |
NL1044006B1 (en) | Method, system and chip for centralised authentication |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
AS | Assignment |
Owner name: LSI CORPORATION, CALIFORNIA Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:MERCHANT, SAILESH M.;AZIMI, KOUROS;REEL/FRAME:030437/0879 Effective date: 20130517 |
|
AS | Assignment |
Owner name: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AG Free format text: PATENT SECURITY AGREEMENT;ASSIGNORS:LSI CORPORATION;AGERE SYSTEMS LLC;REEL/FRAME:032856/0031 Effective date: 20140506 |
|
AS | Assignment |
Owner name: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:LSI CORPORATION;REEL/FRAME:035390/0388 Effective date: 20140814 |
|
AS | Assignment |
Owner name: LSI CORPORATION, CALIFORNIA Free format text: TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT RIGHTS (RELEASES RF 032856-0031);ASSIGNOR:DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT;REEL/FRAME:037684/0039 Effective date: 20160201 Owner name: AGERE SYSTEMS LLC, PENNSYLVANIA Free format text: TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT RIGHTS (RELEASES RF 032856-0031);ASSIGNOR:DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT;REEL/FRAME:037684/0039 Effective date: 20160201 |
|
FEPP | Fee payment procedure |
Free format text: MAINTENANCE FEE REMINDER MAILED (ORIGINAL EVENT CODE: REM.) |
|
LAPS | Lapse for failure to pay maintenance fees |
Free format text: PATENT EXPIRED FOR FAILURE TO PAY MAINTENANCE FEES (ORIGINAL EVENT CODE: EXP.); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY |
|
STCH | Information on status: patent discontinuation |
Free format text: PATENT EXPIRED DUE TO NONPAYMENT OF MAINTENANCE FEES UNDER 37 CFR 1.362 |
|
FP | Lapsed due to failure to pay maintenance fee |
Effective date: 20181007 |