US7821939B2 - Method, system, and computer program product for adaptive congestion control on virtual lanes for data center ethernet architecture - Google Patents
Method, system, and computer program product for adaptive congestion control on virtual lanes for data center ethernet architecture Download PDFInfo
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- US7821939B2 US7821939B2 US11/861,564 US86156407A US7821939B2 US 7821939 B2 US7821939 B2 US 7821939B2 US 86156407 A US86156407 A US 86156407A US 7821939 B2 US7821939 B2 US 7821939B2
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L47/00—Traffic control in data switching networks
- H04L47/10—Flow control; Congestion control
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L47/00—Traffic control in data switching networks
- H04L47/10—Flow control; Congestion control
- H04L47/25—Flow control; Congestion control with rate being modified by the source upon detecting a change of network conditions
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L47/00—Traffic control in data switching networks
- H04L47/10—Flow control; Congestion control
- H04L47/29—Flow control; Congestion control using a combination of thresholds
Definitions
- IBM® is a registered trademark of International Business Machines Corporation, Armonk, N.Y., U.S.A. Other names used herein may be registered trademarks, trademarks or product names of International Business Machines Corporation or other companies.
- the present invention relates generally to traffic control, and, in particular, to adaptive congestion control.
- Data Center Ethernet is an emerging industry standard which proposes modifications to existing networks, in an effort to position Ethernet as the preferred convergence fabric or all types of data center traffic.
- a recent study has found that Ethernet is the convergence fabric, with I/O consolidation in a Data Center as shown in FIG. 1 .
- This consolidation is expected to simplify platform architecture and reduce overall platform costs. More details of proposals for consolidation are described in “Proposal for Traffic Differentiation in Ethernet Networks,” which may be found at http://www.ieee802.org/1/files/public/docs2005/new-wadekar-virtual%20-links-0305.pdf.
- DCE also referred to as enhanced Ethernet and low latency Ethernet
- TCP/IP Transmission Control Protocol/Internet Protocol
- DCE is intended to operate without necessitating the overhead of TCP/IP. This offers a much simpler, low cost approach that does not require offload processing or accelerators.
- Lossless networks prevent buffer overflows, offer faster response time to recover corrupted packets, do not suffer from loss-induced throughput limitations and allow burst traffic flow to enter the network without delay, at full bandwidth. It is important to note that these functions do not affect TCP/IP, which is above the DCE level. Some other form of flow control and congestion resolution is needed to address these concerns.
- FIGS. 2A-2D The example illustrated in these figures shows a switch fabric with three layers of cascaded switching (switch layer 1 , switch layer 2 , and switch layer 3 ) and their associated traffic flows. While three switch layers are shown for simplicity of illustration, it should be appreciated that a switch fabric may contain many more switch layers.
- FIG. 2A traffic flows smoothly without congestion.
- FIG. 2B if a sufficient fraction of all the input traffic targets the same output port, that output link may saturate, forming a “hot spot” 210 . This causes the queues on the switches feeding the link to fill tip. If the traffic pattern persists, available buffer space on the switches may be exhausted. This, in turn, may cause the previous stage of switching to saturate its buffer space, forming additional hot spots 220 and 230 as shown in FIG. 2C . The congestion eventually may back up all the way to the network input nodes, forming hot spots 240 - 256 . This is referred to as congestion spread or tree saturation.
- One or more saturation trees may develop at the same time and spread through the network very quickly. In a fully formed saturate tree, every packet must cross at least one saturated switch on its way through the network. The network, as a whole, can suffer a catastrophic loss of throughput as a result.
- One proposed solution involves detecting potential buffer overflow condition at the switch and broadcasting a message downstream to the destination, then back to the source, requesting that the data rate be throttled back. This approach takes time. Also, it relies on a preset threshold in the switch for detecting when a buffer is nearing saturation. Bursts of traffic may cause the switch to exceed its threshold level quickly and to die down again just as quickly. A single threshold based on traffic volume is unable to compensate fast enough under these conditions.
- DCE is intended to mix different data traffic patterns (voice, storage, streaming video, ad other enterprise data) onto a single network. This makes it much more likely that DCE will encounter hotspot congestion, since the traffic pattern is less predictable.
- a method, system, and computer program product are provided for adaptive congestion control in a Data Center Ethernet (DCE) network.
- Packets are received over at least one virtual lane in the DCE network.
- An absolute or relative packet arrival rate is computed over a time period.
- the absolute or relative packet arrival rate is compared to at least a first threshold and a second threshold. If the absolute or relative packet arrival rate exceeds the first threshold, the packet transmission rate is caused to decrease. If the absolute or relative packet arrival rate is less than a second threshold, the packet transmission rate is caused to increase.
- FIG. 1 illustrates proposed consolidation of traffic in a Data Center Ethernet (DCE) network
- FIGS. 2A-2D illustrate congestion “hot spots” that occur in conventional credit-based flow control networks.
- FIG. 3 illustrates a method for adaptive congestion control according to an exemplary embodiment.
- FIG. 4A illustrates a change in offsets between transmission of packets and receipt of packets.
- FIG. 4B illustrates a method for adaptive congestion control according to another embodiment.
- FIG. 5 illustrates an exemplary system for adaptive congestion control according to an exemplary embodiment.
- FIG. 6 illustrates an exemplary system for implementing adaptive congestion control using a computer program product according to exemplary embodiments.
- the packet arrival rate is dynamically computed and compared to thresholds, instead of simply counting the total number of accumulated packets in a switch buffer. This allows a potential congestion condition to be more quickly detected and to be responded to as appropriate. In cases where the congestion builds up slowly, this approach may also wait until it becomes necessary to throttle back the packet transmission rate. This approach also allows recovery to be performed more quickly after the congestion has passed, and the links are throttled back up to their full operating rates.
- DCE Data Center Ethernet
- each packet is assigned a packet sequence number (PSN).
- PSN packet sequence number
- the PSN may include 24 bits reserved in the packet header with an optional 3 bit session identifier. Schemes to assign these numbers and to re-initialize the sequence of valid PSNs when a link is re-established are described, e.g., in commonly assigned U.S. patent application Ser. No. 11/426,421, herein incorporated by reference.
- FIG. 3 illustrates a method for adaptive congestion control in a DCE network according to an exemplary embodiment.
- a packet is received at a switch over a virtual lane at step 310 .
- a determination is made wither the packet has a valid PSN at step 320 . This determination may be made, e.g., in a switch (Such as the switch 510 a shown in FIG. 5 ). If the packet does not bear a valid PSN, an error is generated at step 325 , and the process returns to step 310 . If the packet does bear a valid PSN, a determination is made whether a counter timer is running at step 330 . If not, a counter timer is started and incremented by one at step 340 .
- a counter timer is running, it is incremented by one at step 345 .
- the counter timer is incremented when each successive packet bearing a valid PSN arrives.
- the absolute packet arrival rate is computed. There is no need to check for sequential PSNs at this point, since only the packet arrival rate is being measured.
- the absolute packet arrival rate may be computed over a fixed interval of time or a variable length time window.
- the absolute packet arrival rate is compared to various thresholds at steps 360 - 368 . This comparison may be performed in the switch.
- a message is sent, e.g., from the switch, to a source node (e.g., the source node 520 shown in FIG. 5 ) to throttle down the packet transmission rate at step 372 .
- a source node e.g., the source node 520 shown in FIG. 5
- the input may be throttled down alter waiting a predetermined amount of time at step 374 .
- the process may also be reversed, so that if the absolute packet arrival rate is determined to be less than a predetermined threshold at step 366 , indicating that the packet arrival rate is decreasing slowly, a command can be sent to the source node to increase the packet transmission rate after a predetermined amount of time at step 376 . If the absolute packet arrival rate is determined to be less than a lower threshold at step 368 , indicating that the packet arrival rate is decreasing quickly, the source node may be caused to increase the packet transmission rate quickly at step 378 .
- time stamping of DCE packet headers may be used instead of a counter to determine a relative packet arrival rate for use in comparison with thresholds.
- FIG. 4A illustrates how there may be changes (delta) in the offset from the time a packet is transmitted until it is received over time for various packets.
- the offset between packet transmission times and packet receipt times may be measured over a period of time and used as an indication of a relative packet transmission rate.
- the offset may be measured by detecting a time stamp put on a packet header at the time of transmission (e.g., from a switch) indicating a time of transmission of the packet and determining a time at which the packet is received (e.g., at another switch).
- the offset is the difference in time between the time of transmission and the time of receipt.
- the time stamp may be put on the header of the packet as it exits a node, e.g., a switch.
- Changes in the offset may indicate whether the packet arrival rate is increasing or decreasing over a period of time.
- the relative packet arrival rate may be computed based on the offsets between packet transmission times and packet arrival times, and measures may be taken to cause the packet arrival rate to increase or decrease by comparing the computed relative packet arrival rate to various thresholds as explained below with reference to FIG. 4B . This allows a centralized manager within the network to determine congestion points or whether the source packet injection rate is just slow.
- This embodiment does not require synchronization of receive and transmit clocks anywhere in the network (including the source, destination and internal nodes and switches), as only offsets between transmission and arrival times are used to compute a relative packet arrival rate.
- the offset in time between transmission of a packet and receipt of a packet may be a negative value.
- FIG. 4B illustrates a method for adaptive congestion control in a DCE network using a time stamp approach according to an exemplary embodiment.
- a packet is received at a switch over a virtual lane at step 410 .
- An offset from the time the packet was transmitted and the time the packet is received is determined at step 420 as described above.
- the relative packet arrival rate is computed based on the offsets between transmission times and arrival times for a number of packets over a period of time.
- the relative packet arrival rate may be computed over a fixed interval of time or a variable length time window. Similar to the process shown in FIG. 3 , the relative packet arrival rate is compared to various thresholds at steps 460 - 468 . This comparison may be performed in the switch.
- a message is sent a source node (e.g., the source node 520 shown in FIG. 5 ) to throttle down the packet transmission rate at step 472 .
- a source node e.g., the source node 520 shown in FIG. 5
- the input may be throttled down after waiting a predetermined amount of time at step 474 .
- the process may also be reversed, so that if the relative packet arrival rate is determined to be less than a predetermined threshold at step 466 , indicating that the packet arrival rate is decreasing slowly, a command can be sent to the source node to increase the packet transmission rate after a predetermined amount of time at step 476 . If the relative packet arrival rate is determined to be less than a lower threshold at step 468 , indicating that the relative packet arrival rate is decreasing quickly, the source node may be caused to increase the packet transmission rate quickly at step 478 .
- the processes depicted in FIGS. 3 and 4B may be implemented in a switch by control logic and/or a computer processor performing instructions encoded on a computer readable medium, such as CD-ROM disks or floppy disks, included in a computer program product.
- a computer readable medium such as CD-ROM disks or floppy disks
- the approaches described above may be implemented on every node in a network at each switch. In this way, bursts of traffic that are a potential cause of congestion may be responded too more quickly. Also, recovery may be performed more quickly when the congestion passes.
- FIG. 5 illustrates an exemplary system for adaptive congestion control according to an exemplary embodiment.
- packets are transmitted between a source node 520 and a destination node 530 via switches 510 a and 510 b and a DCE fabric of links 540 .
- switches 510 a and 510 b are shown in FIG. 5 for simplicity of illustration, it should be appreciated that there may be many more switches.
- Packet arrival rates may be measured/computed and compared with thresholds in the switches 510 a and 510 b , as described above.
- the switches may cause the source node (or the destination node, if traffic is being sent from the destination node) to increase/decrease the packet transmission rate as needed.
- different threshold levels may be set for different rates of traffic increase/decrease. If the traffic transmission rate is increased slowly, for example, there may be a pause before requesting that the source throttle down the input data rate. Similarly, if traffic transmission rate is decreased slowly, there may be a pause before requesting the source to throttle up the input data rate. In this way, the maximum amount of data is kept in the pipeline for a long as possible, making more efficient use of the available network bandwidth.
- the maximum allowed receive buffer allocation may be adjusted, depending on the packet arrival rate and thresholds. Also, according to exemplary embodiments, faster recovery from congestion conditions may be achieved in comparison to simply measuring the total number of packets. This enables proactive prevention of formation of congestion trees and optimizes network throughput and efficiency.
- this approach may be implemented on a per-lane basis system that transmits several virtual traffic flows across a common high speed connection. In this way, a burst of traffic on one virtual lane will not cause congestion for other traffic streams that share the same physical connection.
- This load balancing is particularly beneficial for mixed traffic types.
- the allocation of the receive buffer size may be adjusted based on increases and decreases in packet arrival rates. It is even possible to implement a feedback loop for dynamically allocating traffic among different virtual lanes depending on the level of congestion.
- FIGS. 3 and 4B may be implemented in a switch by control logic and/or a computer processor performing instructions encoded on a computer readable medium, such as CD-ROM disks or floppy disks, included in a computer program product.
- a computer readable medium such as CD-ROM disks or floppy disks
- FIG. 6 An exemplary system for implementing the processes on a computer program product is shown in FIG. 6 .
- FIG. 6 illustrates an exemplary system for implementing adaptive congestion control using a computer program product according to exemplary embodiments.
- the system includes a computer 600 in contact with a signal bearing medium 640 via an input/output interface 630 .
- the signal bearing medium 640 may include instructions for performing the adaptive congestion control techniques described above implemented as, e.g., information permanently stored on non-writable storage media (e.g., read-only memory devices within a computer, such as CD-ROM disks readable by a CD-ROM drive), alterable information stored on a writeable storage media (e.g., floppy disks within a diskette drive or hard-disk drive), information conveyed to a computer by a communications medium, such as through a computer or telephone network, including wireless and broadband communications networks, such as the Internet, etc.
- non-writable storage media e.g., read-only memory devices within a computer, such as CD-ROM disks readable by a CD-ROM drive
- the computer includes a processor 610 that executes the instructions for performing the adaptive congestion control technique contained, e.g., on the signal bearing medium 640 and communicated to the computer via the input/output interface 630 .
- the instructions for performing adaptive congestion control may be stored in a memory 620 or may be retained on the signal bearing medium 640 .
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Priority Applications (11)
Application Number | Priority Date | Filing Date | Title |
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US11/861,564 US7821939B2 (en) | 2007-09-26 | 2007-09-26 | Method, system, and computer program product for adaptive congestion control on virtual lanes for data center ethernet architecture |
PCT/EP2008/061715 WO2009040229A1 (en) | 2007-09-26 | 2008-09-04 | Method, system, and computer program product for adaptive congestion control on virtual lanes for data center ethernet architecture |
BRPI0816013-9A BRPI0816013B1 (en) | 2007-09-26 | 2008-09-04 | method, equipment and physical method support for adaptive congestion control on virtual lanes for data center ethernet architecture |
CA2699325A CA2699325C (en) | 2007-09-26 | 2008-09-04 | Method, system, and computer program product for adaptive congestion control on virtual lanes for data center ethernet architecture |
KR1020107006355A KR101104004B1 (en) | 2007-09-26 | 2008-09-04 | Method, system, and computer program product for adaptive congestion control on virtual lanes for data center ethernet architecture |
CN2008801082567A CN101803316B (en) | 2007-09-26 | 2008-09-04 | Methods, systems and apparatus for adaptive congestion control on virtual lanes for data center Ethernet architectures |
JP2010526237A JP5159889B2 (en) | 2007-09-26 | 2008-09-04 | Method, system, and computer program product for adaptive congestion control over virtual lanes of data center ethernet architecture |
MX2010003014A MX2010003014A (en) | 2007-09-26 | 2008-09-04 | METHOD, SYSTEM AND PRODUCT OF COMPUTER PROGRAM FOR ADAPTABLE CONGESTION CONTROL IN VIRTUAL RAILS FOR DATA CENTER ETHERNET ARCHITECTURE. |
EP08803685.0A EP2195980B1 (en) | 2007-09-26 | 2008-09-04 | Method, system and computer program product for adaptive congestion control on virtual lanes for data centre ethernet architecture |
TW097136513A TWI429242B (en) | 2007-09-26 | 2008-09-23 | Method, system and computer program product for adaptive congestion control of virtual channel of data center Ethernet architecture |
IL204679A IL204679A (en) | 2007-09-26 | 2010-03-23 | Method, system and computer program product for adaptive congestion control on virtual lanes for data center ethernet architecture |
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US10645033B2 (en) | 2017-03-27 | 2020-05-05 | Mellanox Technologies Tlv Ltd. | Buffer optimization in modular switches |
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US11973696B2 (en) | 2022-01-31 | 2024-04-30 | Mellanox Technologies, Ltd. | Allocation of shared reserve memory to queues in a network device |
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TW200922221A (en) | 2009-05-16 |
KR20100072210A (en) | 2010-06-30 |
EP2195980A1 (en) | 2010-06-16 |
BRPI0816013A2 (en) | 2018-05-22 |
CN101803316B (en) | 2012-07-11 |
WO2009040229A1 (en) | 2009-04-02 |
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IL204679A (en) | 2013-03-24 |
JP5159889B2 (en) | 2013-03-13 |
CA2699325A1 (en) | 2009-04-02 |
BRPI0816013B1 (en) | 2020-10-20 |
CA2699325C (en) | 2016-03-15 |
CN101803316A (en) | 2010-08-11 |
KR101104004B1 (en) | 2012-01-06 |
US20090080334A1 (en) | 2009-03-26 |
TWI429242B (en) | 2014-03-01 |
WO2009040229A4 (en) | 2009-05-14 |
IL204679A0 (en) | 2010-11-30 |
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