US7088781B2 - Tone ordered discrete multitone interleaver - Google Patents
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- US7088781B2 US7088781B2 US09/766,255 US76625501A US7088781B2 US 7088781 B2 US7088781 B2 US 7088781B2 US 76625501 A US76625501 A US 76625501A US 7088781 B2 US7088781 B2 US 7088781B2
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0045—Arrangements at the receiver end
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0059—Convolutional codes
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0071—Use of interleaving
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/26—Systems using multi-frequency codes
- H04L27/2601—Multicarrier modulation systems
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L5/00—Arrangements affording multiple use of the transmission path
- H04L5/003—Arrangements for allocating sub-channels of the transmission path
- H04L5/0044—Allocation of payload; Allocation of data channels, e.g. PDSCH or PUSCH
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L5/00—Arrangements affording multiple use of the transmission path
- H04L5/14—Two-way operation using the same type of signal, i.e. duplex
- H04L5/143—Two-way operation using the same type of signal, i.e. duplex for modulated signals
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/26—Systems using multi-frequency codes
- H04L27/2601—Multicarrier modulation systems
- H04L27/2626—Arrangements specific to the transmitter only
Definitions
- the present invention generally relates to communications and modems, and more particularly to a tone ordered discrete multitone interleaver system and method for efficiently minimizing noise distortion and enhancing data transmission communications.
- forward error correction coding techniques also known as convolutional coding
- data bits are encoded by adding redundant bits systematically to the data bits so that, normally, only predetermined transitions from one sequential group of bits (corresponding to a symbol, or baud) to another are allowed. There is an inherent correlation between these redundant bits over consecutive bauds.
- each baud is tentatively decoded and then analyzed based on past history, and the decoded bits are corrected, if necessary.
- TCM trellis coded modulation
- a TCM encoder is situated at the transmitter, and a TCM decoder is situated at the receiver.
- TCM is highly desirable since it combines the operations of modulation and error coding to provide effective error control coding without sacrificing power and bandwidth efficiency.
- the TCM decoder essentially averages the noise over more than one of the symbols. However, noise that is correlated over the constraint length of the trellis code will effectively degrade performance. In many cases, correlated noise causes the trellis decoder to perform worse than if the receiver employed no trellis coding at all.
- U.S. Pat. No. 5,659,578 to Alamouti et al. and U.S. Pat. No. 4,677,625 to Betts et al. describe the concept of TCM.
- the latter describes a distributed trellis encoder that can be used to spread symbols associated with a data stream over time across successive symbol (baud) periods. This distributed encoder significantly improves performance by making the transmissions less susceptible to errors resulting from imposition of correlated noise.
- U.S. Pat. Nos. 5,659,578 and 4,677,625 are entirely incorporated herein by reference.
- DSL Digital Subscriber Line
- ITU International Telecommunication Union
- G.992.1 Series G Transmission Systems and Media, Digital Systems and Networks, Digital Transmission Systems—Access Networks ADSL Transceivers, and G.992.2 Splitterless ADSL transceivers.
- G.992.1 and G.992.2 are available from the ITU, Geneva, Switzerland, at http://vww.itu.int and are entirely incorporated herein by reference.
- DMT is a Frequency Division Multiplex (FDM) type of modulation in which an incoming bit stream is multiplexed into a number of sub-carriers or sub-channels.
- DMT as used in ADSL enables a digital subscriber technology capable of delivering high-speed digital information over existing unshielded twisted pair copper telephone lines
- DMT encodes data on multiple sub-carriers, referred to as tones, that are then converted to time domain signals for transmission by an Inverse Discrete Fourier Transform (IDFT).
- IDFT Inverse Discrete Fourier Transform
- An additional level of line coding e.g. QAM, can be employed within each of the tones.
- a DMT trellis encoder generally codes between adjacent tones.
- DMT uses a Discrete Fourier Transform (DFT) to demodulate the tones.
- DFT Discrete Fourier Transform
- the DMT 16-state trellis code constraint length is approximately four 4-dimensional symbols. Four-dimensional symbols are encoded as two 2-dimensional constellations on two tones. Four 4-dimensional symbols are thus encoded over eight tones. DFT suffers from performance limitations including sinx/x coupling of energy between adjacent tones. DMT convolutional encoders operate “serially” on mapped constellations such that consecutively generated constellations are mapped to adjacent tones. (Sin x)/x coupling allows noise on one tone to affect adjacent tones. Correlated noise on adjacent tones, particularly that within the DMT code constraint length, contributes to multiple metric calculations in the trellis decoder. Correlated noise in consecutive metric calculations causes negative gain and can result in a worse performance than if no coding was employed.
- DSL technologies are still in a state of infancy and are being improved over time by engineers and designers.
- the industry still needs ways to further enhance DSL communications and, in particular, ways to minimize the adverse effects of impulse noise and correlated noise.
- a heretofore unaddressed need exists in the industry to address the aforementioned deficiencies and inadequacies.
- the present invention provides a system for a tone ordered discrete multitone interleaver and a method for tone ordered interleaving across DMT tones. Several embodiments of tone ordered discrete multitone interleaving are described below.
- the tone ordered discrete multitone trellis interleaver spreads trellis symbols across several carrier tones such that the metrics in the receiver are not correlated.
- the depth of the interleaver will determine the number of tones used to spread the symbol. Noise impacting adjacent tones will not appear in the metric calculations until a number of trellis symbols later. The number being equal to the depth of the interleaver.
- the tone ordered discrete multitone trellis interleaver causes the symbols to skip over correlated noise.
- the system can be implemented in a transmitter and a receiver as follows.
- the tone ordered discrete multitoned interleaver includes a tone ordering element capable of assigning bits to a plurality of tones, and a bit and gain table, capable of designating that within a portion of the plurality of tones, a variable plurality of bits is assigned to each of the plurality of tones, and wherein the variable plurality of bits assigned to each of the plurality of tones is different from the variable plurality of bits assigned to each adjacent tone.
- the tone ordered discrete multitone deinterleaver receiver includes a bit ordering element that performs a complimentary re-ordering of the data coded by the transmitter.
- the present invention can also be viewed as providing a method for transmitting tone ordered discrete multitoned interleaved data.
- the method of transmitting data can be broadly summarized by the steps of: receiving bits and relative gain information designating a variable plurality of bits to be assigned to each of a plurality of tones, wherein the variable plurality of bits to be assigned to each of the plurality of tones is different from the variable plurality of bits to be assigned to each adjacent tone; and assigning bits to the plurality of tones based on the bits and relative gain information.
- the method of receiving data involves the step of reordering the data encoded by the tone ordered discrete multitoned interleaver.
- the tone ordered discrete multitone trellis interleaver provides improved coding gain.
- the tone ordered discrete multitone trellis interleaver provides these advantages without an increase in delay since the interleaving occurs between tones rather than between symbols in time.
- FIG. 1 is a block diagram of an ADSL transceiver system including an ADSL remote transceiver and an ADSL central transceiver.
- FIG. 5 is a block diagram of an ADSL DMT receiver that resides in the ADSL remote transceiver and the ADSL central transceiver of FIG. 1 .
- the ADSL DMT receiver includes a bit ordering element.
- the tone ordered discrete multitone interleaver system and associated methods will be specifically described hereafter in the context of a transmitter and a receiver at each end of DSL communication channel.
- the tone ordered discrete multitone system and associated methods as described in this context are intended to be possible nonexclusive examples of implementations. Numerous other embodiments are envisioned and are possible, as will be apparent to those with skill in the art.
- the tone ordered discrete multitone interleaver system of the present invention allows trellis coding over multiple DMT tones.
- the tone ordered discrete multitone interleaver system is particularly suited for use in connection with modems at opposing ends of telephone connections (wire pairs) extending between a central office (CO; defined as any facility having a telephone switch) associated with a telephone company and a customer premises (CP).
- CO central office
- CP customer premises
- the modems can employ any suitable modulation scheme, for example but not limited to, that prescribed by the industry standard V.34 that has been promulgated by the International Telecommunications Union (ITU). Many CPs already have two-wire pairs connecting them to the CO.
- ITU International Telecommunications Union
- the tone ordered discrete multitone interleaver system can effectively average the noise over multiple tones, for example, eight different tones, yielding better performance and longer DSL reach between the CO and CP equipment. In some cases, the tone ordered discrete multitone interleaver system provides data throughput where none was possible otherwise.
- the transmitters and receivers can be implemented in hardware, software, firmware, or a combination thereof.
- all of the component parts of each, except the amplifier and transformer elements are implemented in firmware that is stored in a memory (EPROM) and that is executed by a suitable instruction execution system, particularly, a digital signal processor (DSP) or general purpose microprocessor.
- DSP digital signal processor
- the software/firmware can be stored and transported on any computer readable medium.
- the hardware components can be implemented with any or a combination of the following technologies, which are all well known in the art: a discrete logic circuit(s) having logic gates for implementing logic functions upon data signals, an application specific integrated circuit (ASIC) having appropriate combinational logic gates, a programmable gate array(s) (PGA), a field programmable gate array (FPGA), etc.
- ASIC application specific integrated circuit
- PGA programmable gate array
- FPGA field programmable gate array
- the tone ordered discrete multitone interleaver may be particularly useful when discrete multitone interleaving, as described herein and in related application Ser. No. 09/736,353, is implemented in an ASIC.
- the computer-readable medium would include the following: an electrical connection (electronic) having one or more wires, a portable computer diskette (magnetic), a random access memory (RAM) (electronic), a read-only memory (ROM) (electronic), an erasable programmable readonly memory (EPROM or Flash memory) (electronic), an optical fiber (optical), and a portable compact disc read-only memory (CDROM) (optical).
- an electrical connection having one or more wires
- a portable computer diskette magnetic
- RAM random access memory
- ROM read-only memory
- EPROM or Flash memory erasable programmable readonly memory
- CDROM portable compact disc read-only memory
- the computer-readable medium could even be paper or another suitable medium upon which the program is printed, as the program can be electronically captured, via for instance optical scanning of the paper or other medium, then compiled, interpreted or otherwise processed in a suitable manner if necessary, and then stored in a computer memory.
- FIGS. 1–4 show one embodiment of the tone ordered discrete multitone interleaver.
- FIG. 5 shows one embodiment of the tone ordered discrete multitone deinterleaver for deinterleaving data processed by the tone ordered discrete multitone interleaver.
- FIG. 1 shows a block diagram of an ADSL DMT transceiver system 100 showing the basic functional blocks and interfaces.
- the ADSL transceiver system includes an ALDSL remote transceiver (ADSL Transceiver-R) 102 , a channel 104 , and an ADSL central transceiver (ADSL Transceiver-C) 106 .
- the ADSL Transceiver-R 102 is typically housed in an ADSL DMT modem 112 .
- the ADSL Transceiver-C 106 is typically housed in a Digital Subscriber Line Access Multiplexer (DSLAM) 124 .
- DSL DMT transceiver system 100 shows a transmission system and method for data transport. Remote power feeding, which may be provided by the ADSL Transceiver-C, 106 is not shown.
- the ADSL Transceiver-R 102 includes an ADSL DMT transmitter 200 , described in detail below and shown in FIG. 2 .
- the ADSL Transceiver-R 102 includes an ADSL DMT transmitter 200 , described in detail below and shown in FIG. 2 .
- the detailed description is provided from the perspective of passing information from the transmitter in the ADSL Transceiver-R 102 to the receiver in the ADSL Transceiver-C 106 .
- Those skilled in the art will recognize an analogous analysis applies to the transmission of information from the ADSL Transceiver-C 106 to the ADSL Transceiver-R 102 .
- loop interface remote terminal end 120 The output of the loop interface remote terminal end 120 is passed through the channel 104 to the loop interface central office end (U-C) 122 .
- loop interface central office end 122 may be Synchronous Transfer Mode (STM) bit sync based or Asynchronous Transfer Mode (ATM) cell based.
- FIG. 2 is a block diagram of an ADSL DMT transmitter 200 that resides in the ADSL Transceiver-R 102 and the ADSL Transceiver-C 106 of FIG. 1 .
- the basic functional blocks of the ADSL DMT transmitter 200 are shown in FIG. 2 .
- the components shown in FIG. 2 are not all required to construct a DMT transmitter. Instead, the components are models for facilitating the construction of DMT signal waveforms. Those waveforms may be constructed in a variety of ways including by hardware, software, and firmware.
- the ADSL DMT transmitter 200 receives input(s) from service modules 108 or remote network(s) 110 .
- the multiplexor synchronous control element (Mux/Sync Control) 202 accepts the inputs and converts the inputs into multiplexed and synchronized data frames (mux data frames).
- the multiplexor synchronous control element 202 generates the mux data frames at a nominal 4 k baud.
- the FEC is generally a Reed-Solomon coder.
- the scramblers, within the Scrambler & FECs 204 are applied to the binary data streams without reference to any framing or symbol synchronizations. Descrambling in the ADSL DMT receiver 502 can likewise be performed independent of symbol synchronization.
- the interleaved path is processed by an interleaver 206 in addition to a scrambler and FEC 204 .
- the interleaver 206 convolutionally interleaves the Reed-Solomon codewords.
- the depth of the interleaving is a variable power of 2.
- the FEC can reliably correct occasional errors if the data is interleaved. However, the FEC is not effective in correcting all (sin x)/x distortion.
- Both binary data stream paths are also processed by cyclical redundancy checks (CRCs) that are not shown in FIG. 2 .
- the output of both paths is in the form of FEC data frames generated at the DMT symbol rate.
- An FEC data block may span more than one DMT symbol.
- the fast and interleaved paths lead to the tone ordering element 208 .
- the tone ordering element 208 combines data frames from the fast and the interleaved paths into combined tone ordered data symbols on tones.
- the tone ordering element 208 first places bits from the fast and interleaved paths into an original bit table b i and then orders the bits in an ordered bit table b′ i .
- the original bit table b i and the ordered bit table b′ i table may be any system, computer program, hardware device, memory element, or logic device, that organizes information in a readily retrievable manner.
- the number of bits per tone and the relative gains to be used for every tone are calculated by the ADSL DMT receiver 502 and sent to the ADSL DMT transmitter 200 according to a protocol defined by ITU standards.
- the pairs of numbers, representing the bits per tone and the relative gains, are typically stored in ascending order of frequency or tone number i, in a bit and gain table.
- the bit and gain table may be any system, computer program, hardware device, memory element, or logic device, that organizes information in a readily retrievable manner.
- the bit and gain table may be two separate systems that are coordinated by any other device so that bit and gain information is available for the assignment of bits to tones.
- bit and gain table is one means of providing bits and relative gain information.
- bits and relative gain information the word “information” refers to “bits” and “relative gains” (information regarding the assignment of bits and the relative gains to be used for every tone)—in contrast to an interpretation of the phrase as “logical bits plus relative gain information.”
- FIG. 3 is a graph showing an exemplar non-interleaving assignment of bits to tones as might be made by the tone ordering element 208 in the prior art or when the dynamically selectable tone ordering discrete multitone interleaver is not operational.
- adjacent tones often carry the same number of information bits. Since all tones carrying the same number of information bits b i are trellis encoded consecutively by the constellation encoder and gain scaler 210 , adjacent tones are generally not interleaved in the prior art.
- the power gain scalars can be modified to compensate for the constellation density.
- An increase in power on some tones increases the density of those tones while a decrease in power on other tones decreases their density. This option results in a higher overall data rate.
- the tone ordered discrete multitone interleaver may be dynamically discriminatory.
- the receiver may identify specific sets of tones that are degraded by correlated noise and apply the tone ordered discrete multitone interleaver only to those tones. If the dynamically discriminatory tone ordered discrete multitone interleaver is enabled, then the trellis encoder, within the constellation encoder and gain scaler 210 , will process the bits on selected tones in a new non-sequential order.
- tone ordered discrete multitone interleaver boosts power in one or more tones
- a reduction in power in other tones will be required in order to return the system to equilibrium.
- any system for selecting points out of order by switching the input to the convolutional encoder will effectively interleave the DMT data symbols. Selecting points out of order may be done on consecutive points or may be done randomly.
- the tone ordered data symbols are passed to the constellation encoder and gain scaler 210 .
- the constellation encoder and gain scaler 210 converts the tone ordered data frames into coded bits on DMT tones.
- the constellation encoder and gain scaler 210 includes a convolutional encoder coset mapper as described in ITU (International Telecommunication Union) Recommendations G.992.1, Section 7.8.
- the constellational encoder, within the constellation encoder and gain scaler 210 is similar to a Quadrature Amplitude Modulation (QAM) encoder.
- QAM Quadrature Amplitude Modulation
- the performance of the constellation encoder and gain scaler 210 is improved by block processing Wei's 16-state, 4-dimensional trellis code.
- the coded bits on DMT tones from the constellation encoder and gain scaler 210 are passed on to the Inverse Discrete Fourier Transformer (IDFT) 212 .
- IDFT Inverse Discrete Fourier Transformer
- the IDFT 212 combines the QAM constellations and converts the bits on the DMT tones to output samples.
- the output samples are converted to a serial stream by the parallel/serial buffer 214 .
- the serial stream from the parallel/serial buffer 214 is passed to a digital to analog converter (DAC) 216 .
- the DAC 216 and associated analog processing blocks construct a continuous transmit voltage waveform corresponding to the discrete digital input samples from the IDFT 212 .
- the analog signal passes through the splitter 114 and the loop interface remote terminal end 120 and enters the channel 104 .
- FIG. 5 is a block diagram of an ADSL DMT receiver 502 that resides in the ADSL remote transceiver 102 and the ADSL central transceiver 106 of FIG. 1 .
- FIG. 5 includes a tone ordered discrete multitone deinterleaver for decoding and deinterleaving DMT symbols coded and interleaved by the tone ordered discrete multitone interleaver of FIGS. 1 and 2 .
- the ADSL DMT receiver 502 receives an input signal at a splitter 126 from the channel 104 and through the loop interface central office end 122 .
- the signal includes narrowband signals that are split by the splitter 126 and sent to the narrow band network 130 .
- the broadband portion of the signal from the channel 104 is processed by an analog to digital (ADC) converter 504 and a serial/parallel converter 506 and demodulated by a Discrete Fourier Transformer (DFT) element 508 .
- DFT element 508 includes complimentary gain scaling to that in the transmitter constellation encoder and gain scaler 210 .
- the DFT element 508 passes the demodulated signal to convolutional decoder 510 .
- the convolutional decoder 510 includes a Viterbi decoder.
- the convolutional decoder 510 passes the output to a bit ordering element 514 .
- the bit ordering element 514 performs a complementary re-ordering procedure from that performed by the tone ordering element 208 including performing a complimentary reordering procedure from that performed by the tone ordered discrete multitone interleaver. Those skilled in the art are able to determine the reordering procedure based on the performance of the tone ordering element 208 .
- the fast and the interleaved portions of the signal are segregated and sent down separate paths to the multiplexor synchronous control element 520 .
- the interleaved path is processed by a deinterleaver 516 and an FEC and De-Scrambler 518 .
- the fast path is only processed by an FEC and De-Scrambler 518 .
- the multiplexor synchronous control element 520 passes the deinterleaved and convolutionally decoded signal to the broadband network 128 .
- FIGS. 1 , 2 and 5 there may be additional components involved in processing signals beyond those shown in the FIGS. 1 , 2 and 5 .
- These additional components do not alter the basic invention as described in FIGS. 1–5 .
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Abstract
Description
-
- First, From the bit and gain table, find the set of all i with the number of bits per tone bi=k; and
- Second, assign bi to the ordered bit table b′i in ascending order of i.
Claims (25)
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US11/496,353 US7418048B2 (en) | 1999-12-15 | 2006-07-31 | Tone ordered discrete multitone interleaver |
US12/144,108 US20090034663A1 (en) | 1999-12-15 | 2008-06-23 | Tone Ordered Discrete Multitone Interleaver |
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US09/736,353 US7099401B2 (en) | 1999-12-15 | 2000-12-14 | Discrete multitone interleaver |
US09/766,255 US7088781B2 (en) | 1999-12-15 | 2001-01-17 | Tone ordered discrete multitone interleaver |
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US20050201480A1 (en) * | 2004-03-05 | 2005-09-15 | Jain Raj K. | Trellis modulation protocols for a VDSL system |
US20050213718A1 (en) * | 2004-03-29 | 2005-09-29 | Stmicroelectronics Ltd. | Efficient tone ordering for multitone transmission |
US20060269010A1 (en) * | 1999-12-15 | 2006-11-30 | Betts William L | Tone ordered discrete multitone interleaver |
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US7269209B2 (en) * | 2002-02-08 | 2007-09-11 | Broadcom Corporation | Discrete multitone transmission and reception |
US20030215000A1 (en) * | 2002-05-20 | 2003-11-20 | Hansen Carl C. | Pseudo-random bit mapping for multitone transceivers |
US7496134B2 (en) * | 2004-02-04 | 2009-02-24 | Texas Instruments Incorporated | Computationally and memory efficient tone ordering scheme |
EP1800429B1 (en) * | 2004-09-22 | 2014-05-14 | Texas Instruments Incorporated | Tone ordering in discrete multitone (dmt) modems |
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US7414958B2 (en) * | 2004-03-29 | 2008-08-19 | Stmicroelectronics Ltd. | Efficient tone ordering for multitone transmission |
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US20080065971A1 (en) * | 2006-08-25 | 2008-03-13 | Innovation Specialists, Llc | Distributed block coding (DBC) |
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US20060269010A1 (en) | 2006-11-30 |
US20090034663A1 (en) | 2009-02-05 |
US20010031011A1 (en) | 2001-10-18 |
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