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US3803450A - Diode-resistor addressing apparatus and method for gaseous discharge panels - Google Patents

Diode-resistor addressing apparatus and method for gaseous discharge panels Download PDF

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Publication number
US3803450A
US3803450A US00260686A US26068672A US3803450A US 3803450 A US3803450 A US 3803450A US 00260686 A US00260686 A US 00260686A US 26068672 A US26068672 A US 26068672A US 3803450 A US3803450 A US 3803450A
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US
United States
Prior art keywords
selection
sustainer
conductor
diode
panel
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Expired - Lifetime
Application number
US00260686A
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English (en)
Inventor
R Trogdon
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Techneglas LLC
Original Assignee
Owens Illinois Inc
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Filing date
Publication date
Application filed by Owens Illinois Inc filed Critical Owens Illinois Inc
Priority to US00260686A priority Critical patent/US3803450A/en
Priority to DE2328466A priority patent/DE2328466A1/de
Priority to IT50445/73A priority patent/IT985310B/it
Priority to CA173,363A priority patent/CA1003926A/en
Priority to FR7320639A priority patent/FR2188298B1/fr
Priority to GB2715773A priority patent/GB1437211A/en
Priority to JP48063428A priority patent/JPS5935030B2/ja
Application granted granted Critical
Publication of US3803450A publication Critical patent/US3803450A/en
Assigned to OWENS-ILLINOIS TELEVISION PRODUCTS INC. reassignment OWENS-ILLINOIS TELEVISION PRODUCTS INC. ASSIGNMENT OF ASSIGNORS INTEREST. Assignors: OWENS-ILLINOIS, INC., A CORP. OF OHIO
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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/28—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels
    • G09G3/288—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels
    • G09G3/296—Driving circuits for producing the waveforms applied to the driving electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/28—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels
    • G09G3/288—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels
    • G09G3/297—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels using opposed discharge type panels

Definitions

  • ABSTRACT There is disclosed a diode-resistor addressing appara- 22 Filed:
  • the present invention is directed to method and apparatus for supplying operating voltage to cross conductor matrices of gaseous discharge display panels.
  • Such panels are disclosed in detail in Baker, et al., U.S. Pat. No. 3,499,167 and Bitzer, et al., U.S. Pat. 3,559,199.
  • Baker, et al., patent such a panel is constituted by a pair of glass plate member s joined in spaced apart relation by spacer sealant member.
  • Each glass plate member carries a dielectrically coated multiple conductor array, the row and column conductors typically being orthogonally related with the crossing points of the conductors in such matrix being addressable by application of operating voltages to the respective conductors in such arrays locating the cross points.
  • operating voltages are constituted by address pulse voltages and sustainer voltages and, typically, in such systems, the sustainer voltage is applied one-half to the row conductors and one-half to the column conductors.
  • the significant part of the circuit cost for operating such display panels is the cost of circuitry associated with each individual conductor or electrode on the panel. It is possible to provide for operating such panels with only a single diode and a single resistor for each panel conductor. Though the circuit principles being considered in accordance with the present invention can be applied to both axes, it is especially suitable for providing the two level signals for the Y or column electrodes on such panels. According to the invention, the sustainer voltage on the Y or column electrode arrays of the panel are adjusted in coincidence with the application of write and erase voltage pulses to the opposite electrode array in the panel.
  • FIG. 1A is a diagramatic block diagram of a gaseous discharge display panel and system for supplying operating potentials thereto incorporating the invention.
  • FIGS. 1B and 1C show waveform diagrams of the voltages applied to the X electrode and Y electrodes, respectively;
  • FIG. 2 is a partial circuit diagram showing the diode-resistor array for supplying the operating potential shown in FIG. 1C to the Y'panel electrode;
  • FIG. 3 is a waveform diagram of the X and Y sustain sources shown in accordance with a feature of the invention.
  • FIGS. 4 shows the partial schematic diagram (FIG. 4B incorporating a portion'of FIG. 2) with the driving input of the diode groups and resistor groups incorporating the invention.
  • a gaseous discharge display panel 10 is constituted by a pair of supportplates 11 and 12 each carrying a separate conductor array 13 and 14, respectively.
  • the conductor array 13" is designated the Y electrode or column conductor array and the conductor array 14 being designated the row or X conductor array.
  • the row or X electrode array 14 is driven from a resistor-diode selection matrix 16 which may be conventional and receives itsinput control and data or information signals from data and control circuit 20. It will be noted that resistor-diode selection circuit 16 is electrically floated upon an X electrode sustainer supply 21 which is also controlled by signals from data and control 20.
  • the Y electrode array 13 is supplied with discharge condition manipulating and sustaining voltage from a diode-resistor array 17 which is shown in greater detail in FIG. 2.
  • the sustainer voltage supply 22 for the column or Y electrode array, in accordance with the invention, is modified by the diode-resistor array in a manner shown in FIG. 1C. It will be appreciated that the'showing of V separate from the diode-resistor array 17 is for purposes of illustration.
  • the X electrode signal with write and erase pulses shown in FIG. 1B is operated in the normal addressing fashion with the write pulse shown in FIG. 1B being a pulse voltage algebraically added to the square wave sustainer voltage and, the erase pulse is essentially a narrow erase pulse which is likewise algebraically added to the sustainer voltage on the X electrode system, it being illustrated in its normal time position relative to the sustainer signal voltage on the X electrodes.
  • the erase pulse is a narrow pulse applied between the pull down and pull up versions of the sustainer signal on the X electrode.
  • a low impedance is provided for driving the panel electrodes by having the least positive sustainer signal so that the diodes Di and D shown in FIG. 2 are forward biased. That is, if the diode current is greater than the panel discharge current and the panel charging current (the panel is essentially a capacitive load), then the electrode voltage is clamped at essentially zero volts.
  • the sustaining signal level is most positive, the impedance driving the electrodes is low for only one direction of current flow. This is normally sufficient, but if for a special situation, a low impedance were required for both directions of current flow, the bias technique for the least positive sustainer can also be used for the more positive level.
  • FIG. 1C A biased technique for least positive sustainer levels is shown in FIG. 1C and is the addressing scheme illustrated in FIG. 2.
  • the panel output to the panel electrode is connected to the node point between the resistor R and diode D for each addressing point.
  • the diodes D provide a return path to ,the sustainer supply-
  • the su'stainervoltage applied to the panel Y electrodes is also used during address times to the X electrodes in the panel.
  • the conductor 45 is not driven by the up sustainer input so that the voltage on the down sustainer input 46 pulses the resistor R 44 so that the voltage at the nodal point connected to the panel supplies the selected write signal (the dotted line shown in FIG. 1C below the words selected write) to the, selected Y electrodes of the panel.
  • the portion of the signal labelled selected write is not generated, e. g., prevented, by the diode-resistor matrix 17.
  • Power is dissipated in the resistors according to the bias current required to maintain the desired low impedance.
  • the power required for this purpose may be reduced by having bias current available only when required, as indicated by the signal levels in FIG. 3. As shown in FIG. 3, to reduce power it is important that the sustainer bias level b of the Y sustainer source encompass the sustainer transition st and panel discharge current of the X sustainer source.
  • diode-resistor array of FIG. 2 is shown with driving inputs to the diode groups and resistor groups in FIG. 4. Note that in accordance with the invention both diode driving signals and resistor driving signals, which are normally used for addressing, are also used to supply sustaining signals.
  • the transistor driven diode matrix of FIG. 4A may be used to control the diode-resistor matrix of FIG. 48.
  • Each vertical select transistor V and each horizontal select transistor HQ are supplied with on-off control signals in accordance with a code permutation to control gate diodes D and D respectively at each diode matrix intersection.
  • Each such diode matrix intersection of FIG. 4A is connected to a horizontal selection line in the diode-resistor matrix to thereby bias each diode D at selected times and for selectable time intervals to constitute the up sustainer input.
  • the resistors R in the diode-resistor matrix are pulsed by transistors RP which constitutes the down sustainer inputs.
  • each said selection matrix including a plurality of gate elements, connected in a multiplex array, each gate element having a common nodal point connected to an individual conductor in one of said arrays, and through which nodal point said operating voltages are applied to each individual conductor, one half cycle of said conductor arrays and the other half cycle of said sustaining voltage being applied to the other of said conductor arrays, the improvement com.- prising means for controlling at least one of said selection matrices to supply the one half cycle of said square wave sustaining voltage to the conductor array supplied thereby and further control means for controlling the half cycle of sustaining voltage applied to said other conductor array, in. cooperation with said write and erase pulse voltages applied to the opposite conductor array connected to the
  • the invention defined in claim 1 including first means connected to said at least one selection matrice to apply an up sustainer control signal thereto to cause an increase in potential at all nodal points in said at least one selection matrice and second means con nected to said at least one selection matrice to apply a down sustainer control signal thereto to cause a decrease in potential at all said nodal points to thereby produce said square wave sustainer voltage.
  • said first means includes a diode matrix constituted by a plurality of diode gate pairs, with intermediate points between said pairs being connected to supply said up sustainer signal.
  • said second means includes a plurality of transistor switch means each individually controllable and connected to said at least one selection matrice to provide said down sustainer control signal.
  • control means includes a diode matrix having horizontal and vertical selection conductors, a pair of diodes constituting gates at each intersection thereof, means connected to said horizontal and vertical selection conductors for supplying permutated signals thereto for controlling the conduction and non-conduction conditions of said pair of diodes, and means connecting an intermediate point on each said diodes to said at least one selection matrix to control same thereby.
  • each said gate element is constituted by a single resistor and a single diode for each panel electrode.
  • one conductor axis has a sustainer bias which encompasses the sustainer transition for the opposite electrode axis.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Plasma & Fusion (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Control Of Gas Discharge Display Tubes (AREA)
US00260686A 1972-06-07 1972-06-07 Diode-resistor addressing apparatus and method for gaseous discharge panels Expired - Lifetime US3803450A (en)

Priority Applications (7)

Application Number Priority Date Filing Date Title
US00260686A US3803450A (en) 1972-06-07 1972-06-07 Diode-resistor addressing apparatus and method for gaseous discharge panels
IT50445/73A IT985310B (it) 1972-06-07 1973-06-05 Sistema di indirizzamento per pannelli di presentazione di dati a scarica in gas
DE2328466A DE2328466A1 (de) 1972-06-07 1973-06-05 Vorrichtung zur adressierung von gasentladungs-anzeigefeldern
FR7320639A FR2188298B1 (it) 1972-06-07 1973-06-06
CA173,363A CA1003926A (en) 1972-06-07 1973-06-06 Diode-resistor addressing apparatus and method for gaseous discharge panels
GB2715773A GB1437211A (en) 1972-06-07 1973-06-07 Gaseous discharge panels
JP48063428A JPS5935030B2 (ja) 1972-06-07 1973-06-07 ガス放電表示パネルに動作電圧を給する装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US00260686A US3803450A (en) 1972-06-07 1972-06-07 Diode-resistor addressing apparatus and method for gaseous discharge panels

Publications (1)

Publication Number Publication Date
US3803450A true US3803450A (en) 1974-04-09

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US00260686A Expired - Lifetime US3803450A (en) 1972-06-07 1972-06-07 Diode-resistor addressing apparatus and method for gaseous discharge panels

Country Status (7)

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US (1) US3803450A (it)
JP (1) JPS5935030B2 (it)
CA (1) CA1003926A (it)
DE (1) DE2328466A1 (it)
FR (1) FR2188298B1 (it)
GB (1) GB1437211A (it)
IT (1) IT985310B (it)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3894264A (en) * 1972-12-29 1975-07-08 Fujitsu Ltd Method for driving a plasma display panel
US3919591A (en) * 1973-06-29 1975-11-11 Ibm Gas panel with improved write-erase and sustain circuits and operations
US3967157A (en) * 1974-02-07 1976-06-29 Nippon Electric Company, Ltd. Driving circuit for a gas discharge display panel
US3969715A (en) * 1973-06-01 1976-07-13 Ibm Corporation Gas panel with improved write circuit and operation
US4027196A (en) * 1975-11-12 1977-05-31 International Business Machines Corporation Bilateral selective burst erase system
US6403403B1 (en) * 2000-09-12 2002-06-11 The Aerospace Corporation Diode isolated thin film fuel cell array addressing method
US20050145982A1 (en) * 2004-01-05 2005-07-07 Victorio Chavarria Integrated fuse for multilayered structure
US20120176180A1 (en) * 2009-03-04 2012-07-12 Salman Saed Passive resistive-heater addressing network

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL227219A (it) * 1957-04-27
US3308433A (en) * 1963-01-10 1967-03-07 Rca Corp Switching matrix
FR1555180A (it) * 1967-02-28 1969-01-24
US3727102A (en) * 1970-08-03 1973-04-10 Owens Illinois Inc Selection and addressing circuitry for matrix type gas display panel
US3665401A (en) * 1971-04-19 1972-05-23 Owens Illinois Inc Switching circuits and method for resistor elements in conductor selection matrices

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3894264A (en) * 1972-12-29 1975-07-08 Fujitsu Ltd Method for driving a plasma display panel
US3969715A (en) * 1973-06-01 1976-07-13 Ibm Corporation Gas panel with improved write circuit and operation
US3919591A (en) * 1973-06-29 1975-11-11 Ibm Gas panel with improved write-erase and sustain circuits and operations
US3967157A (en) * 1974-02-07 1976-06-29 Nippon Electric Company, Ltd. Driving circuit for a gas discharge display panel
US4027196A (en) * 1975-11-12 1977-05-31 International Business Machines Corporation Bilateral selective burst erase system
US6403403B1 (en) * 2000-09-12 2002-06-11 The Aerospace Corporation Diode isolated thin film fuel cell array addressing method
US20050145982A1 (en) * 2004-01-05 2005-07-07 Victorio Chavarria Integrated fuse for multilayered structure
US6946718B2 (en) 2004-01-05 2005-09-20 Hewlett-Packard Development Company, L.P. Integrated fuse for multilayered structure
US20120176180A1 (en) * 2009-03-04 2012-07-12 Salman Saed Passive resistive-heater addressing network
US8907718B2 (en) * 2009-03-04 2014-12-09 Sensortechnics GmbH Passive resistive-heater addressing network

Also Published As

Publication number Publication date
IT985310B (it) 1974-11-30
JPS5935030B2 (ja) 1984-08-25
CA1003926A (en) 1977-01-18
JPS4963332A (it) 1974-06-19
GB1437211A (en) 1976-05-26
FR2188298A1 (it) 1974-01-18
FR2188298B1 (it) 1978-11-17
DE2328466A1 (de) 1973-12-20

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AS Assignment

Owner name: OWENS-ILLINOIS TELEVISION PRODUCTS INC., SEAGATE,

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST.;ASSIGNOR:OWENS-ILLINOIS, INC., A CORP. OF OHIO;REEL/FRAME:004772/0648

Effective date: 19870323

Owner name: OWENS-ILLINOIS TELEVISION PRODUCTS INC.,OHIO

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:OWENS-ILLINOIS, INC., A CORP. OF OHIO;REEL/FRAME:004772/0648

Effective date: 19870323