US3768409A

US3768409A - Binary explosive logic network

Info

Publication number: US3768409A
Application number: US00305642A
Authority: US
Inventors: F Menz; S Redmond
Original assignee: US Department of Navy
Current assignee: US Department of Navy
Priority date: 1972-11-10
Filing date: 1972-11-10
Publication date: 1973-10-30
Anticipated expiration: 1990-10-30

Abstract

An explosive logic network with two inputs wherein initiation of either the first input, the second input or the first and second inputs simultaneously results in a first output, a second output or a third output, respectively.

Description

waited States Patent Menz et a1. Oct. 30, 1973 [541 BINARY EXPLOSIVE LOGIC NETWORK 3,016,831 1/1962 Coursen l02/D1G. 2 3,430,564 3/1969 Silvia 81 211.. 102/22 [75] Inventors: Fredr'c Menz Rldgecrest; 3,496,868 2 1970 Silvia et a1. 102 22 Stephen Redmond, Chma Lake, 3,669,021 6 1972 Spencer et a1. 102 010. 2 both Of Calif.

{73] Assignee: The United States of America as Primary Examiner Benjamin A. Borchdt represented y the Secretary of the Assistant ExaminerC. T. Jordan Navy washmgton AttorneyR. S. Sciascia et a1. 22 Filed: Nov. 10, 1972 211 App]. No.: 305,642

57 ABSTRACT [52] US. Cl. 102/22, l02/DIG. 2 An explosive logic network with two inputs wherein [51 llil. Cl. F421) 3/10 initiation of either the first input the Second input or [58] held of Search 102/702 R1 DIG 2 the first and second inputs simultaneously results in a first output, a second output or a third output, respec- [56] References Cited tively UNITED STATES PATENTS 7/1960 Coursen 102/22 2 Claims, 4 Drawing Figures PAIENTEDucr 30 um 53.768L409 sum 10F 3 WARHEAD ELECTRICAL EXPLOSIVE SELECTED BINARY INPUT OUTPUT EXPLOSIVE T0 FROM NOT MORE OUTPUT THAN TWO DETONATOR S Fig.|

SHEET 2 OF 3 PATENIED M2130 1373 BC A AE g AD WAS

BINARY EXPLOSIVE LOGIC NETWORK BACKGROUND OF THE INVENTION 1. This invention pertains to multi-input-multi-output explosive logic circuits.

2. In the past, explosive logic elements such as the one disclosed in the patent to Silvia et al., US. Pat. No. 3,430,564, require time delays along the explosive path in order to provide a number of outputs greater than the number of inputs to logic elements. The present invention requires activation of single inputs alone or simultaneous activation of single inputs. By eliminating the need for time delays in the explosive circuits, the present invention has greatly increased the reliability and decreased the complexity of the explosive channel matrix and the design of a given explosive logic circuit.

SUMMARY OF THE INVENTION The present invention is a two-input-three-output explosive logic element employing Boolean logic. The primary advantage of the present invention is that it does not require the input to be initiated in a particular order in order to obtain a particular output, but rather requires only that the input be initiated individually or that a plurality of inputs be initiated simultaneously. The further advantage of the present invention is that the logic circuits can be pyramided so that a large number of output points becomes available with only a few input points. This is desirable in that each input point requires a detonator, and the fewer detonators the greater the safety of the device.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 shows schematically how the invention fits into an aimable warhead system;

FIG. 2 shows schematically how the invention may be pyramided;

FIG. 3 shows a physical layout of the invention; and

FIG. 4 is a schematic of the invention.

DESCRIPTION OF THE PREFERRED EMBODIMENT The physical representation of the invention as seen in FIG. 3 shows two inputs, A; and B,. Referring to A,- it is seen that explosive paths extend in both directions from A; with one deadending at an explosive null gate and the other passing through an explosive diode and branching out. One branch passes to the back end of another explosive diode and terminates, while the other two branches extend to a destructive crossover. Since one path has been broken at the explosive null gate the other path extends across the destructive crossover and branches out into two branches of different length. The shorter branch passes through an explosive null gate and beats the other branch to an explosive crossover thereby giving an A output.

If input B, only is initiated, two explosive paths extend from B One path is to an explosive null gate where it is terminated while the other one passes through an explosive diode and then branches out into the back end of another explosive diode where it is terminated. The other branch again branches out with each path converging to a destructive crossover. The paths are of different lengths with the shorter path passing through an explosive null gate and through the destructive crossover to output B and cutting off the other path.

If inputs A. and B; are detonated simultaneously, it is seen that one path from each of them passes to an explosive null gate and is terminated and also cuts off the path which it intersects. The other path from A, and B,- both pass through their respective explosive diodes and units into a single path which branches. One branch terminates at an explosive null gate while the other branch passes through a destructive crossover and again branches out with one of the branches terminating at a destructive null gate and the other branch passing on to output A,,, B,,. The network of FIGS. 3 and 4 is shown symbolically in FIG. 2 as a semicircle with inputs coming into the straight side and outputs extending from the curved side. It can be seen in FIG. 2 how ten of the circuits of the present invention may be pyramided or stacked so that a total of five inputs can produce fifteen different outputs if any single input is employed along or with any one of the other inputs. This network would require only five miniaturized detonators, which when in the safe condition would be out of line with the five inputs to the logic network.

A fuze would, after target detection, detonate any one or any combination of two detonators at approximately the same time. The explosive logic circuit would very quickly select the correct line initiation system of the warhead causing the synergistic effects of the fragments and blast to be directed toward the target in the manner similar to that disclosed in U. S. Pat. application Ser. No. 182,196, filed Sept. 20, I971.

The circuit channels can be molded to relatively small sizes and then loaded hydro-statically with secondary explosives such as PBXC-303(I), approaching that of an explosive integrated circuit.

What is claimed is:

1. An explosive logic element comprising:

first and second inputs;

a first and second explosive path extending from said first input;

said first path being shorter than said second path;

said first path terminating at an explosive null gate;

said second path passing through an explosive diode and branching off into third, fourth and fifth explosive paths;

said fourth path passing through a second explosive diode in a reverse direction and thereby terminatsaid third path terminating at said explosive null gate where said first path terminated; and

said fifth path extending across a destructive crossover and branching into sixth and seventh explosive paths;

said seventh path being longer than said sixth path and said sixth and seventh paths crossing each other at a destructive crossover whereby said sixth path reaches a first output and said seventh path is terminated at said second explosive crossover.

2. The device of claim 1 further comprising:

a second input said second input branching into an eighth explosive path and into said fourth explosive path; said eighth explosive path terminating at a second explosive null gate and said fourth explosive path passing through said second explosive diode and branching into said second, third and fifth paths;

said second path passing through said first explosive diode in a reverse manner and thereby terminating;

said third path terminating at a second output;

whereby introduction of a detonation wave into said a simultaneous introduction of a detonation wave first input results in an output at said first output, into said first and second input results in a third disintroduction of a detonation wave into said second tinct output.

input results in an output at said second output and

Claims

1. An explosive logic element comprising: first and second inputs; a first and second explosive path extending from said first input; said first path being shorter than said second path; said first path terminating at an explosive null gate; said second path passing through an explosive diode and branching off into third, fourth and fifth explosive paths; said fourth path passing through a second explosive diode in a reverse direction and thereby terminating; said third path terminating at said explosive null gate where said first path terminated; and said fifth path extending across a destructive crossover and branching into sixth and seventh explosive paths; said seventh path being longer than said sixth path and said sixth and seventh paths crossing each other at a destructive crossover whereby said sixth path reaches a first output and said seventh path is terminated at said second explosive crossover.

2. The device of claim 1 further comprising: a second input said second input branching into an eighth explosive path and into said fourth explosive path; said eighth explosive path terminating at a second explosive null gate and said fourth explosive path passing through said second explosive diode and branching into said second, third and fifth paths; said second path passing through said first explosive diode in a reverse manner and thereby terminating; said third path terminating at a second output; whereby introduction of a detonation wave into said first input results in an output at said first output, introduction of a detonation wave into said second input results in an output at said second output and a simultaneous introduction of a detonation wave into said first and second input results in a third distinct output.