US3599227A

US3599227A - Electro-arc printing system

Info

Publication number: US3599227A
Application number: US777009A
Authority: US
Inventors: Earl H Cobb
Original assignee: Individual
Current assignee: Individual
Priority date: 1968-11-19
Filing date: 1968-11-19
Publication date: 1971-08-10
Anticipated expiration: 1988-08-10

Abstract

An input typewriter-output printer system where characters originate from either a keyboard or computer and are encoded to binary form to be recognized by an AND gate circuit. The outputs of the AND gates are fed to a matrix generator that activates high-voltage gates to form characters. Each character is parallel fed along a fixed line that is in alignment with electrosensitive paper upon which the characters are printed by arcing through to a conducting platen divided into segments by insulators, each segment corresponding to one of the parallel characters on the fixed line. A binary up-down counter controlling the voltage to the segments sequentially completes the arcing circuit of the parallel characters through the paper.

Description

United States Patent 1 3,599,227

lmcntur Earl H. (ebb 1434.157 5,1969 Macuvskt 34mm 451 t E i b mite lt d v 1470563 911969 Qtarr 1 8/30 X w Primary Exammer- Bernard Konick "f: l flpl 7 i 9 Assistant Exammer --Gary M. Hoffman Med I 68 A1l0rneys--Harry Av Herbert Jr. and Julian L. Siege] Patented Aug-10.1971

l d! ELECTRO-ARC PRINTING SYSTEM 3 Claims. 4 Drawing Figs.

ABSTRACT: An input typewriter-output prlnter system CL 4 Y 346/74 where characters originate from either a keyboard or com- 178/30 puter and are encoded to binary form to be recognized by an [5 l J Int. Cl r v t v r r r r w r Gold 15/06, AND gate Circuit h outputs f h AND gates are fed to a l5/34 matrix generator that activates high-voltage gates to form lSUl held M Search 346/74 5 characters. Each character is parallel fed along a fixed line 74 74 74 74 SC; 178/30 that is in alignment with electrosensitive paper upon which the characters are printed by arcing through to a conducting Refflences Cited platen divided into segments by insulators, each segment cor- UNITED STATES PATENTS responding to one of the parallel characters on the fixed line. 2.5 l 3 I 12 6/1950 Shepherd 346/74 X A binary up-down counter controlling the voltage to the seg- 2,919,171 12/1959 Epstein et al. 346/74 ments sequentially completes the arcing circuit of the parallel 2.930.847 3/1960 Metzger 346/74 X characters through the paper.

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INVENTOR.

3 N2 wsuiwmka m v w kwsaww MESS. swun hon ELECTRO-ARC PRINTING sY sTEM BACKGROUND OF THE INVENTION This invention relates to an electroarc printing system and more particularly to a combination input typewriter-computer readout printer.

Presently most computers, data processors and communication (digital data) systems must utilize two devices to perform the data in/out functions of each system. These devices usually consist of a typewriter for data insertion to the system and a low or high-speed printer which performs the data print out function for the system. Two devices are necessary for the data in/data out function because the machine that performs the data in functions has the disadvantage of being mechanically actuated in some fashion. The mechanical operations are time consuming and thereby do not have the capability for high-speed printing as demanded to accomplish the data out function.

The gated line matrix electroarc printing process of the present invention permits the design of a flexible typewriterprinter combination device which will perform both the data in/out system functions. The electronic typewriter-printer combination device is capable of accepting and performing the low and high-speed data-printing functions on demand from an operator of a machine data buffer or computer. Being primarily electronic in operation, mechanical movements are minimized with an attendant large increase in reliability and ease of maintenance.

SUMMARY OF THE INVENTION The gated line matrix electroarc printing process permits both low and high printing speeds by electronically gating high voltage (arcing) pulses through electrosensitive paper using a fixed line wire array that has multiple characters. The electronic gating circuitry sequentially gates each character for printing and is capable of countdown (backspacing) when the printing character is an error. The binary-coded character arrives at the character-printing circuit in parallel binary form and triggers (SETS) appropriate bistable multivibrators. The SET and RESET outputs of the multivibrators are applied as inputs to character recognition AND gates. Each binarycoded character received activates one of the AND gates. The activated AND gate provides a signal to a dot matrix generator that determines the character geometry of dots to be printed. The output of the dot matrix generatorwhich represents the required dots to be printed triggers dot print gates which provide high voltage isolation for the dot matrix generator and provide a high voltage grounding path for the print pulse.

A timing pulse is received each time a binary coded character is generated which steps a Gray (up-down) counter. The output of the counter is applied to count recognition AND gates. Each count in the counter activates one of the recognition gates which triggers the appropriate high voltage print pulse gate. The output of the high voltage gate is applied to a character platen which'provides a print pulse arcing path through electrosensitive paper to the fixed line matrix array and characters are serially printed on the line. The physical location of the character to be printed is determined by the count in the Gray counter.

It is therefore an object ofthe invention to provide a novel electroarc printing system.

It is another object to provide an electroarc'printing system that prints at both high and low printing speeds.

It is still another object to provide a combination typewriter for data insertion into a computer system and a readout printer.

It is still another object to provide an electroarc printing system that is capable of backspacing to correct errors. It is still another object to provide an electroarc printing system having a fixed printing head and using electronic steering where only the paper moves, thereby eliminating the costly mechanical movement ofa moving printing head.

As shown in FIG. 1, keyboard 11 performs a character,

generation function and provides data and synchronizing signals to system 13, character printing circuit 15, and timing circuit 17. The system can include a data processor or a digital data communications system. Timing circuit 17 accepts synchronizing signals from system 13 and keyboard circuit 1 l and generates time base referencesignals for activating other circuits. Paper control 19 is a circuit activated by timing circuit l7.and performs the paper start, stop, and rate of paper advance functions. Character-printing circuit I5 is fed by system 13 and keyboard circuit 1 l to provide data input while timing circuit 17 provides the time base gating signals. Character printing circuit 15 converts the binary data input into a character printing dot matrix code and generates high voltage printing pulses.

As shown in FIG. 2, the character printing circuit has inputs consisting of binary coded character data from the system or keyboard, timing pulses from the timing circuit (one pulse per' character) and backspace pulses from the keyboard circuit (one pulse for each typist error). Character recognition circuit 101 receives and recognizes each specific binary coded character. Gray counter 103 which is a counter capable of counting either forward .or backward, resets character recognition circuit 101 after each character is recognized and printed. Each character recognized presents an activated signal to dot matrix generator 105 which utilizes diodes to channel the received signal to the appropriate points or dots in the matrix for each character-printing configuration. Dot matrix generator 105 provides gating signals to the appropriate dot print gates 107 which isolate the high-voltage printpulse from dot matrix generator 105. The output of dot print gates 107 appear .on fixed line matrix array 109 which contains multiple character arrays of 4X6, 5X7, many other rectangular array. 3

Gray counter 103, an up-down counter, counts the time pulses received and applies outputs to count recognition gates lll.-Gray counter 103 also counts down'upon receipt of a backspace pulse from the keyboard,-which.is received only if a typing error occurs and the typist desired to correct it.-Count recognition gates Ill recognize the count in Gray counter 103 and activate the appropriate high voltage pulse gates of circuit 113, which is a circuit-that is sequentially gated'by the count in Gray counter 103 through count recognition gates Ill. -When'gated, the output is a high voltage vpulse (such as between 400 and 600 volts) tocharacter platen I-l5.

Character platen is aligned with fixed line matrixarray 109 and the appropriate character from the line array is printed on electrosensitive paper 117 which passes therebetween.

As shown .in FIGS. 3a and 3b, the character'printing circuit requires binary coded characters and timing pulse .input signals for operation where each character from the keyboard or system iscoded to activate, as shown in this example, six bistable multivibrators 121 having six pairs of outputs and producing 2 or 64 binary characters. Initially the multivibrators are in the reset state. These six pairs of outputsare fed to character recognition circuit 101 which comprises 6.4 AND gates. The 64 outputs fromcharacter recognition circuit 101 are-.fed to dot matrix generator 105 which produces 24 outputs to be formedinto a 4X6 matrix. lf.a 5 7or XXY array is desired, then there would be 35 or XY outputs, respectively. 24 outputs are fed to dot print gates 107 which gate the necessary high voltage from high" voltage source 108. Siliconcontrolled rectifiers can be used for the gates. The high volt age outputs are fed to fixed linematrix array 109 which is a series of 4X6 arrays. Each high voltage output is fed in parallel to the same dot position in each of 64 arrays on fixed line matrix array 109. While high voltage appears in the same character pattern on all of the 64 arrays on fixed line matrix array 109, the only characters to be printed are those in alignment with an activated segment of character platen 115 which is made of conducting material but is divided into 64 segments by insulators 117. The segments are sequentially activated by six-stage Gray counter 103 initially with the count of zero and which can count up to 2 or 64. The 12 outputs of Gray counter 103 are fed to count recognition circuit 111 which comprises 64 AND gates the outputs of which are fed to 64 high-voltage pulse gates 113 which can be silicon-controlled rectifiers. The gated outputs are in turn connected to the 64 segments of character platen 115. When a segment is activated by a gated high voltage, an arc circuit is completed and an impression is made on electrosensitive paper 119. Paper control 19 activated by timing pulses control the paper start, stop, and rate of advance. Operation of the invention would be possible bynot having a voltage impressed upon platen 115. Printing would be achieved by adjusting the voltage to fixed line matrix array 109 high enough to arc through electrosensitive paper 119 with platen 115 at ground potential.

Although the invention has been described with reference to a particular embodiment, it will be understood to those skilled in the art that the invention is capable of a variety of alternative embodiments within the spirit and scope of the appended claims.

I claim: V t

1. An electroarc character-printing system comprising:

a. binary input means;

b. means for recognizing characters fed by the binary input means;

c. a matrix generator having inputs from the character recognizing means and a plurality of outputs representing characters;

d. electrosensitive paper positioned adjacent to the output of the matrix generator;

e. terminal means for completing an arc circuit through the paper;

f. a voltage source connected to the terminal means;

g. a plurality of insulators dividing the terminal means into segments;

b. means for selecting a segment for printing; and

i. the segment selection means comprising a counter and a plurality of count recognition AND gates fed by the counter for recognizing the count thereof, the outputs of the count recognition gates being fed one each to the plurality of segments for the sequential activation thereof.

2. an electroarc printing system according to claim 1 which further comprises:

a. a high voltage source; and

b. a plurality of high-voltage gates interposed between the high voltage source and one each of the plurality of segments of the terminal means, the high-voltage gates being activated by one each of the plurality of AND gates.

3. An electroarc printing system according to claim 1 wherein the counter is an up-down counter for backspacing.

Claims

1. An electroarc character-printing system comprising: a. binary input means; b. means for recognizing characters fed by the binary input means; c. a matrix generator having inputs from the character recognizing means and a plurality of outputs representing characters; d. electrosensitive paper positioned adjacent to the output of the matrix generator; e. terminal means for completing an arc circuit through the paper; f. a voltage source connected to the terminal means; g. a plurality of insulators dividing the terminal means into segments; h. means for selecting a segment for printing; and i. the segment selection means comprising a counter and a plurality of count recognition AND gates fed by the counter for recognizing the count thereof, the outputs of the count recognition gates being fed one each to the plurality of segments for the sequential activation thereof.

2. An electroarc printing system according to claim 1 which further comprises: a. a high voltage source; and b. a plurality of high-voltage gates interposed between the high voltage source and one each of the plurality of segments of the terminal means, the high-voltage gates being activated by one each of the plurality of AND gates.