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US3334245A - Presettable bistable circuits - Google Patents

Presettable bistable circuits Download PDF

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Publication number
US3334245A
US3334245A US405312A US40531264A US3334245A US 3334245 A US3334245 A US 3334245A US 405312 A US405312 A US 405312A US 40531264 A US40531264 A US 40531264A US 3334245 A US3334245 A US 3334245A
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Prior art keywords
circuit
electronic
bistable circuit
hollow core
supply voltage
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US405312A
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Elbert L Cox
Norman J Doctor
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/26—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback
    • H03K3/28—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback
    • H03K3/281—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator
    • H03K3/286—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator bistable
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/20—Memory cell initialisation circuits, e.g. when powering up or down, memory clear, latent image memory
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/26—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback
    • H03K3/28—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback
    • H03K3/281—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator
    • H03K3/286—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator bistable
    • H03K3/2865—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator bistable ensuring a predetermined initial state when the supply voltage has been applied; storing the actual state when the supply voltage fails

Definitions

  • This invention relates generally to bistable circuits, and more particularly to electronic bistable circuits which permit the storage of preset information in the absence of a supply voltage.
  • timers which operate to initiate the detonation of the war head. These timers are preset before launching the weapon to cause detonation at the point of maximum destruction to the selected target.
  • the information that must be stored in the timer is obtained from a fi-re control computer or from computations made by fire control personnel after making range finder observations.
  • Electronic timers offer certain advantages in size and accuracy; however, one of the major obstacles to the use of electronic timers in ordnance application-s is the need for electrical power to be applied to the shell or missile prior to launching to permit storing the preset information in the timer.
  • the foregoing and other objects are attained by providing within an electronic bistable circuit two hollow core inductorsconnected so that insertion of a high permeability rod into one or the other of the two inductors causes an unbalance in the bistable circuit suflicient to force the circuit to assume one or the other of its two stable states when a supply voltage is applied to the circuit but insufficient to otherwise affect the normal operation of the circuit.
  • the collector of transistor 11 is connected to the base of transistor 12 through a cross-coupling network which 3,334,245 Patented Aug. 1, 1967 ICC comprises a resistive voltage divider having a first resistance 13 connected to the collector of transistor 11 and a second resistor 14 connected through terminal 15 to a source of base supply voltage (not shown), the junction of resistors 1.3 and 14 being connected to the base of transistor-12.
  • the collector of transistor 12 is connected to the base of transistor 11 through an identical cross-coupling network comprising resistors 16 and 17.
  • a source of collector supply voltage (not shown) is connected by way of terminal 18 through load resistors 19 and 21 to the collectors of transistors 11 and 12, respectively.
  • a symmetrical trigger circuit is provided. This comprises two input coupling capacitors 22 and 23 connected to a source of trigger pulses or a preceding stage (not shown) through terminal 24.
  • Steering diode 25 connects coupling capacitor 22 to the base of transistor 11, while steering diode 26 connects coupling capacitor 23 to the base of transistor 12.
  • Biasing resistors 27 and 28 connected between the collector of transistor 11 and the junction of steeringdiode 25 and coupling capacitor 22 and between the collector of'transistor 12 and the junction of steering diode 26 and coupling capacitor 23, respectively, provide the biasing voltages for the diodes.
  • the heart of the invention resides in the provision of hollow core inductors 29 and 31 in series with load resistors 19 and 21, respectively. Preset information is stored in the circuit by inserting a high permeability iron or ferrite rod 32 into either of the hollow core inductors 29 or 31.
  • the inductor into which rod 32 is inserted will have its inductance increased there-by causing the circuit to become unbalanced in the desired predetermined manner.
  • both collector circuits employ coils of the same inductance and a high permeability rod is not inserted in either coil
  • the transistor with the lower ⁇ 3 is the more likely to be in the OFF state when power is applied to the circuit. Consequently, in determining the inductance necessary for satisfactory presetting, the rod is inserted in the coil of the transistor with the lower [3 and that transistor checked for the ON state. For transistors having equal fls, smaller inductance coils will accomplish satisfactory preset action.
  • the presence or absence of the rod inserts is immaterial once power is supplied, and thus the insert can stay in with no injurious effect.
  • the circuit is intended to operate at high frequencies, the hollow core inductors become a limiting factor with regard to the maximum operating frequency of the circuit.
  • an electronic bistable circuit comprising two hollow core inductors incorporated within said electronic bistable circuit, a high permeability rod inserted into a selected one or the other of said hollow core inductors to cause an unbalance in said electronic bistable circuit suflicient to force said electronic bistable circuit to assume one or the other of its two stable states when a supply voltage is applied to said electronic bistable circuit, said unbalance in said electronic bistable circuit caused by the insertion of a high permeability rod into one or the other of said hollow core inductors being insuflicient to otherwise affect the normal operation of said electronic bistable circuit.
  • an electronic bistable multivibrator circuit having two non-linear electronic elements each connected in series with a separate load impedance and a common source of supply voltage and two cross-coupling networks interconnecting said two non-linear electronic elements to cause said two non-linear electronic elements to assume complementary states when the supply is on
  • the improvement comprising two hollow core inductors, each connected in series with a respective one of saidseparate load impedances and having a value that upon insertion of a high permeability rod into one or the other of said hollow core inductors causes an unbalance in said electronic bistable multivibrator circuit suflicien't to force said electronic bistable multivibrator circuit to assume one or the other of its two stable states when the supply voltage is turned on but insufficient to otherwise affect the normal operation of said electronic bistable multivibrator circuit.
  • an electronic bistable multivibrator circuit having two transistors each connected in common emitter configuration with a separate series load resistance connecting the collector of each transistor to a common source of supply voltage and two cross-coupling networks respectively interconnecting the collector circuit of each transistor with the base circuit of the other transistor to cause said two transistors to assume complementary conducting states when the supply voltage is on
  • the improvement comprising two hollow core inductors, each connected in series with a respective one of said series load resistors and having a value that upon insertion of a high permeability rod into one or the other of said hollow core inductors causes an unbalance in said electronic bistable multivibrator circuit sufficient to force said electronic bistable multivi-brator circuit to assume one or the other of its two stable states when the supply voltage is turned on but insuflicient to otherwise affect the normal operation of said electronic bistable multivibrator circuit.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Electronic Switches (AREA)

Description

Aug. 1, 1967 E. L. cox ETAL 3,334,245
PRESETTABLE BISTABLE CIRCUITS Filed Oct. 20, 1964 lNVENTO/ZS, 155,671. Cox Nae/v4 J. flocme United States Patent 3,334,245 PRESETTABLE BISTABLE CIRCUITS Elbert L. Cox, Washington, D.C., and Norman J. Doctor, Wheaton, Md., assignors to the United States of America as represented by the Secretary of the Army Filed Oct. 20, 1964, Ser. No. 405,312 3 Claims. (Cl. 30788.5)
The invention described herein may be manufactured and used by or for the Government of the United States of America for governmental purposes without the payment to us of any royalty thereon.
This invention relates generally to bistable circuits, and more particularly to electronic bistable circuits which permit the storage of preset information in the absence of a supply voltage.
Many tactical ballistic weapons are equipped with timers which operate to initiate the detonation of the war head. These timers are preset before launching the weapon to cause detonation at the point of maximum destruction to the selected target. The information that must be stored in the timer is obtained from a fi-re control computer or from computations made by fire control personnel after making range finder observations. Electronic timers offer certain advantages in size and accuracy; however, one of the major obstacles to the use of electronic timers in ordnance application-s is the need for electrical power to be applied to the shell or missile prior to launching to permit storing the preset information in the timer. It is undesirable to apply the supply voltage to the timer prior to launching for two reasons: First, the application of the supply voltage to preset the timer could constitute an injurious drain on the power supply rendering the weapon a dud. Second, there is the problem of safety to the personnel operating the weapon. The application of the supply voltage prior to launch could cause a premature explosion. Of course, the need for pre-launch power can be dispensed with if the preset information is programmed on mechanical switches, but this introduces problems associated with switch-contact reliability.
It is therefore an object of the instance invention to provide electronic bistable circuits which permit the storing of preset information with no power required.
It is another object of this invention to provide elec tronic bistable circuits which can store information in the absence of a supply voltage without movable mechanical connections of any sort.
It is a further object of the invention to provide electronic bistable circuits which may be cascaded to form electronic timers for tactical ballistic weapons that can be preset prior to launching without the application of electric power to the weapons.
According to the present invention, the foregoing and other objects are attained by providing within an electronic bistable circuit two hollow core inductorsconnected so that insertion of a high permeability rod into one or the other of the two inductors causes an unbalance in the bistable circuit suflicient to force the circuit to assume one or the other of its two stable states when a supply voltage is applied to the circuit but insufficient to otherwise affect the normal operation of the circuit.
The specific nature of the invention, as well as other objects, aspects, uses and advantages thereof, will clearly appear from the accompanying drawing, in which the sole figure is a schematic diagram of a symmetrically-triggered, Eccles-Jordan bistable multivibrator which embodies the invention.
Referring now to the drawing there are shown two PNP transistors 11 and 12 connected in common emitter fashion. The collector of transistor 11 is connected to the base of transistor 12 through a cross-coupling network which 3,334,245 Patented Aug. 1, 1967 ICC comprises a resistive voltage divider having a first resistance 13 connected to the collector of transistor 11 and a second resistor 14 connected through terminal 15 to a source of base supply voltage (not shown), the junction of resistors 1.3 and 14 being connected to the base of transistor-12. Similarly, the collector of transistor 12 is connected to the base of transistor 11 through an identical cross-coupling network comprising resistors 16 and 17. A source of collector supply voltage (not shown) is connected by way of terminal 18 through load resistors 19 and 21 to the collectors of transistors 11 and 12, respectively. To facilitate cascading to form a timing chain, a symmetrical trigger circuit is provided. This comprises two input coupling capacitors 22 and 23 connected to a source of trigger pulses or a preceding stage (not shown) through terminal 24. Steering diode 25 connects coupling capacitor 22 to the base of transistor 11, while steering diode 26 connects coupling capacitor 23 to the base of transistor 12. Biasing resistors 27 and 28 connected between the collector of transistor 11 and the junction of steeringdiode 25 and coupling capacitor 22 and between the collector of'transistor 12 and the junction of steering diode 26 and coupling capacitor 23, respectively, provide the biasing voltages for the diodes.
The heart of the invention resides in the provision of hollow core inductors 29 and 31 in series with load resistors 19 and 21, respectively. Preset information is stored in the circuit by inserting a high permeability iron or ferrite rod 32 into either of the hollow core inductors 29 or 31. The inductor into which rod 32 is inserted will have its inductance increased there-by causing the circuit to become unbalanced in the desired predetermined manner.
It has been determined experimentally that the transis-. tor having the collector circuit which has the rod inserted in its coil will be in the ON or zero voltage state when the supply voltage is applied. Contrary to this observation, one might think that the transistor employing the lower inductance would be in the ON state when power is applied to the circuit. If collector drive played the dominant role in the initial conditions after the supply voltage is applied, indeed the lower inductance side would be in the ON state. It was found, however, that the base drive plays the dominant role in determining initial conditions in the circuit.
When both collector circuits employ coils of the same inductance and a high permeability rod is not inserted in either coil, the transistor with the lower {3 is the more likely to be in the OFF state when power is applied to the circuit. Consequently, in determining the inductance necessary for satisfactory presetting, the rod is inserted in the coil of the transistor with the lower [3 and that transistor checked for the ON state. For transistors having equal fls, smaller inductance coils will accomplish satisfactory preset action.
The presence or absence of the rod inserts is immaterial once power is supplied, and thus the insert can stay in with no injurious effect. However, if the circuit is intended to operate at high frequencies, the hollow core inductors become a limiting factor with regard to the maximum operating frequency of the circuit.
It should be understood, of course, that the foregoing disclosure relates to only a preferred embodiment of the invention and that numerous bistable circuits employing the principle of inductive unbalance to permit the storage of preset information without the application of a power supply may be made without departing from the spirit and the scope of the invention as set forth in the appended claims.
We claim as our' invention:
1. In an electronic bistable circuit, the improvement comprising two hollow core inductors incorporated within said electronic bistable circuit, a high permeability rod inserted into a selected one or the other of said hollow core inductors to cause an unbalance in said electronic bistable circuit suflicient to force said electronic bistable circuit to assume one or the other of its two stable states when a supply voltage is applied to said electronic bistable circuit, said unbalance in said electronic bistable circuit caused by the insertion of a high permeability rod into one or the other of said hollow core inductors being insuflicient to otherwise affect the normal operation of said electronic bistable circuit.
2. In an electronic bistable multivibrator circuit having two non-linear electronic elements each connected in series with a separate load impedance and a common source of supply voltage and two cross-coupling networks interconnecting said two non-linear electronic elements to cause said two non-linear electronic elements to assume complementary states when the supply is on, the improvement comprising two hollow core inductors, each connected in series with a respective one of saidseparate load impedances and having a value that upon insertion of a high permeability rod into one or the other of said hollow core inductors causes an unbalance in said electronic bistable multivibrator circuit suflicien't to force said electronic bistable multivibrator circuit to assume one or the other of its two stable states when the supply voltage is turned on but insufficient to otherwise affect the normal operation of said electronic bistable multivibrator circuit.
3. In an electronic bistable multivibrator circuit having two transistors each connected in common emitter configuration with a separate series load resistance connecting the collector of each transistor to a common source of supply voltage and two cross-coupling networks respectively interconnecting the collector circuit of each transistor with the base circuit of the other transistor to cause said two transistors to assume complementary conducting states when the supply voltage is on, the improvement comprising two hollow core inductors, each connected in series with a respective one of said series load resistors and having a value that upon insertion of a high permeability rod into one or the other of said hollow core inductors causes an unbalance in said electronic bistable multivibrator circuit sufficient to force said electronic bistable multivi-brator circuit to assume one or the other of its two stable states when the supply voltage is turned on but insuflicient to otherwise affect the normal operation of said electronic bistable multivibrator circuit.
No references cited.
ARTHUR GAUSS, Primary Examiner.
J. JORDAN, Assistant Examiner.

Claims (1)

1. IN AN ELECTRONIC BISTABLE CIRCUIT, THE IMPROVEMENT COMPRISING TWO HOLLOW CORE INDUCTORS INCORPORATED WITHIN SAID ELECTRONIC BISTABLE CIRCUIT, A HIGH PERMEABILITY ROD INSERTED INTO A SELECTED ONE OR THE OTHER OF SAID HOLLOW CORE INDUCTORS TO CAUSE AN UNBALANCE IN SAID ELECTRONIC BISTABLE CIRCUIT SUFFICIENT TO FORCE SAID ELECTRONIC BISTABLE CIRCUIT TO ASSUME ONE OR THE OTHER OF ITS TWO STABLE STATES WHEN A SUPPLY VOLTAGE IS APPLIED TO SAID ELETRONIC BISTABLE CIRCUIT, SAID UNBALANCE IN SAID ELECLTRONIC BISTABLE CIRCUIT CAUSED BY THE INSERTION OF A HIGH PERMEABILITY ROD INTO ONE OR THE OTHER OF SAID HOLLOW CORE INDUCTORS BEING INSUFFICIENT TO OTHERWISE AFFECT THE NORMAL OPERATION OF SAID ELECTRONIC BISTABLE CIRCUIT.
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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2083657A1 (en) * 1970-03-30 1971-12-17 Ibm
US3763384A (en) * 1969-01-21 1973-10-02 Contraves Ag Bistable and controllable flip-flop-circuit arrangement
EP0293231A2 (en) * 1987-05-29 1988-11-30 Raytheon Company Non-volatile, radiation-hard, random-access memory

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
None *

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3763384A (en) * 1969-01-21 1973-10-02 Contraves Ag Bistable and controllable flip-flop-circuit arrangement
FR2083657A1 (en) * 1970-03-30 1971-12-17 Ibm
EP0293231A2 (en) * 1987-05-29 1988-11-30 Raytheon Company Non-volatile, radiation-hard, random-access memory
EP0293231A3 (en) * 1987-05-29 1990-09-12 Raytheon Company Non-volatile, radiation-hard, random-access memory

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