TWM625404U - Feedback control chip and switching power supply system - Google Patents
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Abstract
本創作實施例提供了一種回饋控制晶片和開關電源系統。根據本創作實施例提供的回饋控制晶片,該回饋控制晶片應用於開關電源系統,該回饋控制晶片包括輸出電壓引腳和光耦驅動引腳,並且還包括:恒壓回饋環路控制模組,其第一端連接至輸出電壓引腳,第二端連接至光耦驅動引腳,其中,恒壓回饋環路控制模組包括第一補償電路。本創作實施例提供的上述方案,通過將恒壓回饋環路控制模組集成在回饋控制晶片內部,並且將補償電路集成在恒壓回饋環路控制模組內部,使得晶片集成有恆壓控制功能,同時降低了晶片的引腳數量,並降低了週邊的補償器件數量,提高了系統的集成度,節約了系統元器件,有利於實現系統的小型化設計。 This creative embodiment provides a feedback control chip and a switching power supply system. According to the feedback control chip provided by the embodiment of the present invention, the feedback control chip is applied to a switching power supply system, the feedback control chip includes an output voltage pin and an optocoupler driving pin, and further includes: a constant voltage feedback loop control module, which The first end is connected to the output voltage pin, and the second end is connected to the optocoupler driving pin, wherein the constant voltage feedback loop control module includes a first compensation circuit. The above solution provided by this creative embodiment integrates the constant voltage feedback loop control module inside the feedback control chip, and integrates the compensation circuit inside the constant voltage feedback loop control module, so that the chip integrates the constant voltage control function At the same time, the number of pins of the chip is reduced, and the number of peripheral compensation devices is reduced, the integration of the system is improved, the system components are saved, and the miniaturized design of the system is realized.
Description
本創作屬於積體電路領域,尤其涉及一種回饋控制晶片和開關電源系統。 This creation belongs to the field of integrated circuits, and in particular relates to a feedback control chip and a switching power supply system.
近年來,隨著諸如智慧手機、平板電腦、筆記型電腦等之類的移動設備的螢幕變大,處理器速度變快,導致設備耗電變得很大,並且供電電池容量也不斷加大以維持客戶的使用時間需求。相應的設備的充電功率也隨著變大,然而,傳統設計中,受限於通用序列匯流排(Universal Serial Bus,USB)最大電流的物理限制,只能以提高輸出電壓的方法來實現提供更大的充電功率。 In recent years, as the screens of mobile devices such as smartphones, tablet computers, and notebook computers have become larger and processors have become faster, the power consumption of the devices has become large, and the capacity of the power supply batteries has continued to increase. Maintain customer usage time requirements. The charging power of the corresponding device also increases. However, in the traditional design, limited by the physical limitation of the maximum current of the Universal Serial Bus (USB), it can only be achieved by increasing the output voltage. large charging power.
USB協會在向著通用充電器的方向努力,即,在輸出功率允許的情況下,這種充電器可以為具有各種不同功率需求的設備進行充電。因此,輸出電壓和輸出電流需要被預設若干檔或需要連續可調以滿足各種不同設備的需求。現有技術中,由於交流轉直流(Alternate Current,AC;Direct Current,DC)變換器的回饋控制晶片的晶片引腳數量較多,並且其週邊的補償元器件也較多等,導致其無法滿足最新市場產品小型化的需求。 The USB consortium is working towards a universal charger that can charge devices with a variety of different power requirements, as output power allows. Therefore, the output voltage and output current need to be preset to several levels or continuously adjustable to meet the needs of various devices. In the prior art, due to the large number of chip pins of the feedback control chip of the AC-to-DC (Alternate Current, AC; Direct Current, DC) converter, and the large number of compensating components around it, it cannot meet the latest requirements. The demand for miniaturization of market products.
本創作實施例提供了一種回饋控制晶片和開關電源系統,能夠將恒壓回饋環路控制模組集成在回饋控制晶片內部,並且將補償電路集成在恒壓回饋環路控制模組內部,使得晶片集成有恆壓控制功能,同時降低了晶片的引腳數量,並降低了週邊的補償器件數量,提高了系統的集成度,節約了系統元器件,有利於實現系統的小型化設計。 This creative embodiment provides a feedback control chip and a switching power supply system, which can integrate a constant voltage feedback loop control module inside the feedback control chip, and integrate a compensation circuit inside the constant voltage feedback loop control module, so that the chip The constant voltage control function is integrated, the number of pins of the chip is reduced, and the number of peripheral compensation devices is reduced, the integration of the system is improved, the system components are saved, and the miniaturized design of the system is realized.
第一方面,本創作實施例提供了一種回饋控制晶片,應用於開關電源系統,回饋控制晶片包括輸出電壓引腳和光耦驅動引腳,並且還包括:恒壓回饋環路控制模組,其第一端連接至輸出電壓引腳,第二端連接至光耦驅動引腳,其中,恒壓回饋環路控制模組包括第一補償電路。 In the first aspect, the embodiment of the present invention provides a feedback control chip, which is applied to a switching power supply system. The feedback control chip includes an output voltage pin and an optocoupler drive pin, and also includes: a constant voltage feedback loop control module, the first of which is a feedback loop control module. One end is connected to the output voltage pin, and the second end is connected to the optocoupler driving pin, wherein the constant voltage feedback loop control module includes a first compensation circuit.
第二方面,本創作實施例提供了一種回饋控制晶片,應用於開關電源系統,回饋控制晶片還包括光耦驅動引腳、輸出電流檢測正引腳和輸出電流檢測負引腳,並且還包括:恒流回饋環路控制模組,其第一端連接至輸出電流檢測正引腳,第二端連接至輸出電流檢測負引腳,第三端連接至光耦驅動引腳,其中,恒流回饋環路控制模組包括第三補償電路。 In the second aspect, an embodiment of the present invention provides a feedback control chip, which is applied to a switching power supply system. The feedback control chip further includes an optocoupler driving pin, an output current detection positive pin and an output current detection negative pin, and further includes: The constant current feedback loop control module, the first end is connected to the output current detection positive pin, the second end is connected to the output current detection negative pin, and the third end is connected to the optocoupler drive pin, wherein the constant current feedback The loop control module includes a third compensation circuit.
第三方面,本創作實施例提供了一種開關電源系統,包括所述光耦和如第一方面和第二方面所述的回饋控制晶片。 In a third aspect, an embodiment of the present invention provides a switching power supply system, including the optocoupler and the feedback control chip according to the first aspect and the second aspect.
本創作實施例的回饋控制晶片和開關電源系統,能夠將恒壓回饋環路控制模組集成在回饋控制晶片內部,並且將補償電路集成在恒壓回饋環路控制模組內部,使得晶片集成有恆壓控制功能,同時降低了晶片的引腳數量,並降低了週邊的補償器件數量,提高了系統的集成度,節約了系統元器件,有利於實現系統的小型化設計。 The feedback control chip and the switching power supply system of this creative embodiment can integrate the constant voltage feedback loop control module inside the feedback control chip, and integrate the compensation circuit inside the constant voltage feedback loop control module, so that the chip integrates the The constant voltage control function reduces the number of pins of the chip and the number of peripheral compensation devices, improves the integration of the system, saves system components, and is conducive to realizing the miniaturization of the system.
100、200:開關電源系統 100, 200: switching power supply system
110、210:整流橋 110, 210: Rectifier bridge
120、220:功率變換器 120, 220: power converter
130、230:驅動晶片 130, 230: drive chip
140、240、340、440:回饋控制晶片 140, 240, 340, 440: feedback control chip
2401、3401、4401:協議通訊模組 2401, 3401, 4401: Protocol communication module
2402、3402、4402:輸出電壓和電流保護控制模組 2402, 3402, 4402: Output voltage and current protection control module
2403、3403、4403:Vo放電控制模組 2403, 3403, 4403: Vo discharge control module
2404、3404、4404:UVLO/LDO放電模組 2404, 3404, 4404: UVLO/LDO discharge module
2405、3405、4405:數位/MCU微控制單元 2405, 3405, 4405: Digital/MCU microcontroller units
2406、2406’、2406”:恒壓/恒流回饋環路控制模組 2406, 2406’, 2406”: constant voltage/constant current feedback loop control module
2407、3407、4407:負載開關驅動模組 2407, 3407, 4407: Load switch drive module
3406、3406’:恒壓回饋環路控制模組 3406, 3406': constant voltage feedback loop control module
4406、4406’:恒流回饋環路控制模組 4406, 4406': constant current feedback loop control module
510:電壓採樣模組 510: Voltage sampling module
511:恒壓環路跨導誤差放大器 511: Constant voltage loop transconductance error amplifier
512:恒壓環路的補償電路 512: Compensation circuit of constant voltage loop
513:恒壓環路的驅動能力增強緩衝器 513: Drive Capability Enhancement Buffer for Constant Voltage Loop
514:恒壓環路電壓放大器 514: Constant Voltage Loop Voltage Amplifier
515:恒壓環路光耦驅動隔離模組(二極體) 515: Constant voltage loop optocoupler drive isolation module (diode)
516:輸出電壓放電模組 516: Output voltage discharge module
517:輸出線壓降補償模組 517: Output line voltage drop compensation module
518:輸出電流採樣和放大模組 518: Output current sampling and amplification module
519:恒流環路跨導誤差放大器 519: Constant current loop transconductance error amplifier
519’:跨導誤差放大器 519': Transconductance Error Amplifier
520:恒流環路的補償電路 520: Compensation circuit of constant current loop
521:恒流環路的驅動能力增強緩衝器 521: Drive Capability Enhancement Buffer for Constant Current Loop
522:恒流環路電壓放大器 522: Constant current loop voltage amplifier
523:二極體 523: Diode
C1、C2、C3、C4、C10、C20、Cfb、Co:電容 C1, C2, C3, C4, C10, C20, Cfb, Co: Capacitor
DP/CC1、DN/CC2:協議通訊口 DP/CC1, DN/CC2: protocol communication port
Gate:負載開關驅動引腳 Gate: Load switch drive pin
GND:晶片基準地引腳 GND: chip reference ground pin
IFB:電流回饋引腳 IFB: Current Feedback Pin
ISN:輸出電流檢測負引腳 ISN: Output Current Sense Negative Pin
ISP:輸出電流檢測正引腳 ISP: Output current detection positive pin
M2:負載開關 M2: load switch
OPTO:光耦驅動引腳 OPTO: Optocoupler drive pin
R1、R2、R20、Rcable、Ro、Rs、Rd、Rdis、Ropto:電阻 R1, R2, R20, Rcable, Ro, Rs, Rd, Rdis, Ropto: Resistance
VFB:電壓回饋引腳 VFB: Voltage Feedback Pin
VIN:電壓 VIN: Voltage
Vo:輸出電壓引腳 Vo: output voltage pin
Vref_cc:恒流基準電壓 Vref_cc: constant current reference voltage
Vref_cv:恒壓基準電壓 Vref_cv: constant voltage reference voltage
為了更清楚地說明本創作實施例的技術方案,下面將對本創作實施例中所需要使用的圖式作簡單的介紹,對於本領域普通技術人員來講,在不付出創造性勞動的前提下,還可以根據這些圖式獲得其他的圖式。 In order to more clearly illustrate the technical solutions of this creative embodiment, the following will briefly introduce the diagrams that need to be used in this creative embodiment. Other schemas can be obtained from these schemas.
圖1示出了現有技術提供的開關電源系統100的結構示意圖;
FIG. 1 shows a schematic structural diagram of a switching
圖2示出了本創作一個實施例提供的開關電源系統200的結構示意圖;
FIG. 2 shows a schematic structural diagram of a switching
圖3示出了本創作實施例提供的回饋控制晶片的引腳示意圖; FIG. 3 shows a schematic diagram of the pins of the feedback control chip provided by the embodiment of the present invention;
圖4示出了本創作實施例提供的能夠實現恒壓和恒流控制的回饋控制晶片的結構示意圖; FIG. 4 shows a schematic structural diagram of a feedback control chip capable of realizing constant voltage and constant current control provided by an embodiment of the present invention;
圖5示出了本創作實施例提供的能夠實現恒壓控制的回饋控制晶片的結構示意圖; FIG. 5 shows a schematic structural diagram of a feedback control chip capable of realizing constant voltage control provided by an embodiment of the present invention;
圖6示出了本創作實施例提供的能夠實現恒流控制的回饋控制晶片的結構示意圖; FIG. 6 shows a schematic structural diagram of a feedback control chip capable of realizing constant current control provided by an embodiment of the present invention;
圖7示出了本創作第一實施例提供的恒壓/恒流回饋環路控制模組的結構示意圖; FIG. 7 shows a schematic structural diagram of the constant voltage/constant current feedback loop control module provided by the first embodiment of the present invention;
圖8示出了本創作另一實施例提供的輸出電壓放電模組的電路結構圖; FIG. 8 shows a circuit structure diagram of an output voltage discharge module provided by another embodiment of the present invention;
圖9示出了本創作另一實施例提供的輸出線壓降補償模組的電路結構示意圖; FIG. 9 shows a schematic diagram of a circuit structure of an output line voltage drop compensation module provided by another embodiment of the present invention;
圖10示出了本創作第二實施例提供的恒壓/恒流回饋環路控制模組的結構示意圖; FIG. 10 shows a schematic structural diagram of the constant voltage/constant current feedback loop control module provided by the second embodiment of the present invention;
圖11示出了本創作第一實施例提供的恒壓回饋環路控制模組的結構示意圖; FIG. 11 shows a schematic structural diagram of the constant voltage feedback loop control module provided by the first embodiment of the present invention;
圖12示出了本創作第二實施例提供的恒壓回饋環路控制模組的結構示意圖; FIG. 12 shows a schematic structural diagram of the constant voltage feedback loop control module provided by the second embodiment of the present invention;
圖13示出了本創作第一實施例提供的恒流回饋環路控制模組的結構示意圖;以及 FIG. 13 shows a schematic structural diagram of the constant current feedback loop control module provided by the first embodiment of the present invention; and
圖14示出了本創作第二實施例提供的恒流回饋環路控制模組的結構示意圖。 FIG. 14 shows a schematic structural diagram of the constant current feedback loop control module provided by the second embodiment of the present invention.
下面將詳細描述本創作的各個方面的特徵和示例性實施例,為了使本創作的目的、技術方案及優點更加清楚明白,以下結合圖式及具體實施例,對本創作進行進一步詳細描述。應理解,此處所描述的具體實施例僅被配置為解釋本創作,並不被配置為限定本創作。對於本領域技術人員來說,本創作可以在不需要這些具體細節中的一些細節的情況下實施。下面對實施例的描述僅僅是為了通過示出本創作的示例來提供對本創作更好的理解。 The features and exemplary embodiments of various aspects of the present creation will be described in detail below. In order to make the purpose, technical solutions and advantages of the present creation more clear, the present creation will be further described in detail below with reference to the drawings and specific embodiments. It should be understood that the specific embodiments described herein are only configured to explain the present creation, and are not configured to limit the present creation. It will be apparent to those skilled in the art that the present invention may be practiced without some of these specific details. The following description of the embodiments is merely intended to provide a better understanding of the invention by illustrating an example of the invention.
需要說明的是,在本文中,諸如第一和第二等之類的關係術語僅僅用來將一個實體或者操作與另一個實體或操作區分開來,而不一定要求或者暗示這些實體或操作之間存在任何這種實際的關係或者順序。而且,術語“包括”、“包含”或者其任何其他變體意在涵蓋非排他性的包含,從而使得包括一系列要素的過程、方法、物品或者設備不僅包括那些要素,而且還包括沒有明確列出的其他要素,或者是還包括為這種過程、方法、物品或者設備所固有的要素。在沒有更多限制的情況下,由語句“包括......”限定的要素,並不排除在包括所述要素的過程、方法、物品或者設備中還存在另外的相同要素。 It should be noted that, in this document, relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any relationship between these entities or operations. any such actual relationship or sequence exists. Moreover, the terms "comprising", "comprising" or any other variation thereof are intended to encompass a non-exclusive inclusion such that a process, method, article or device that includes a list of elements includes not only those elements, but also includes not explicitly listed or other elements inherent to such a process, method, article or apparatus. Without further limitation, an element defined by the phrase "comprising..." does not preclude the presence of additional identical elements in a process, method, article, or device that includes the element.
為了更好地理解本創作,以下首先對現有技術提供的開關電源系統進行介紹,參考圖1,圖1示出了現有技術提供的開關電源系統100的結構示意圖。在現有技術中,為了滿足USB Type-C等新型電源可調輸出電壓、電流的需求,提供了一種包括常規的回饋控制晶片的開關電源系統(例如,ACDC電源),如圖1所示,該開關電源系統100主要包括整流橋110、功率變換器120、驅動晶片130以及回饋控制晶片140等,其中,該回饋控制晶片140所包括的引腳至少為10個,如果要保持晶片小型化,則必須要採用諸如SSOP10/QFN16等之類的較昂貴的封裝,同時週邊的補償器件(例如,電容C1-C4以及電阻R1-R2等)非常多,這導致系統可靠性差、成本較高並且也不利於產品小型化。
In order to better understand the present invention, the following first introduces the switching power supply system provided by the prior art. Referring to FIG. 1 , FIG. 1 shows a schematic structural diagram of the switching
其中,上述引腳包括電流回饋引腳IFB、電壓回饋引腳VFB、光耦驅動引腳OPTO、輸出電流檢測正引腳ISP、輸出電流檢測負引腳ISN、負載開關驅動引腳GATE、晶片基準地引腳GND、輸出電壓引腳VO、協議通訊口DP/CC1以及協議通訊口DN/CC2等。 Among them, the above pins include current feedback pin IFB, voltage feedback pin VFB, optocoupler driving pin OPTO, output current detection positive pin ISP, output current detection negative pin ISN, load switch driving pin GATE, chip reference Ground pin GND, output voltage pin VO, protocol communication port DP/CC1 and protocol communication port DN/CC2, etc.
因此,為了解決現有技術中存在的問題,本創作實施例提供了一種新型的開關電源系統。下面首先對本創作實施例所提供的開關電源系統進行介紹。 Therefore, in order to solve the problems existing in the prior art, the present invention provides a novel switching power supply system. First, the switching power supply system provided by the embodiment of the present invention will be introduced below.
參考圖2,圖2示出了本創作一個實施例提供的開關電源
系統200的結構示意圖。如圖2所示,該開關電源系統200主要包括整流橋210、功率變換器220、驅動晶片230以及回饋控制晶片240等,其中,該回饋控制晶片240可以包括8個引腳,例如,光耦驅動引腳OPTO、輸出電流檢測正引腳ISP、輸出電流檢測負引腳ISN、負載開關驅動引腳GATE、晶片基準地引腳GND、輸出電壓引腳VO、協議通訊口DP/CC1以及協議通訊口DN/CC2等,少於現有技術中回饋控制晶片140所包括的引腳數量,例如,其至少少了電壓回饋引腳VFB和電流回饋引腳IFB,並且該回饋控制晶片240是一種高度集成的多檔輸出電壓及輸出電流可調的回饋控制晶片,並且該晶片240將回饋環路集成在晶片內部,其可以採用諸如最常用的SOP8等之類的便宜封裝,同時該晶片240還將恒壓、恒流、或恒壓及恒流的環路補償的電阻、電容等集成在晶片內部,使得晶片週邊只需要一個電阻到光耦,這可以在最大程度上減小系統佈局的干擾,並提高系統的集成度、節約系統的元器件,有利於實現系統的小型化設計。
Referring to FIG. 2, FIG. 2 shows a switching power supply provided by an embodiment of the present invention
A schematic diagram of the structure of the
作為一個示例,整流橋210的第一端可以用於接收電壓Vin,第二端可以連接至功率變換器220的第一端,功率變換器220的第二端可以連接至驅動晶片230的第一端,驅動晶片230的第二端可以經由電容Cfb連接至參考地,電容Cfb的第一端可以連接至光耦的第一端,光耦的第二端可以連接至參考地,光耦的第三端可以經由電阻Ropto連接至晶片的OPTO引腳,並且光耦的第四端可以連接至參考地,功率變換器220的第三端可以連接至電容Co的第一端,電容Co的第二端可以連接至功率變換器220的第四端並連接至參考地,並且電容Co的第一端還可以連接至晶片的Vo引腳以及負載開關M2的第一端,負載開關M2的第二端可以連接至晶片的GATE引腳,負載開關M2的第三端可以經由電阻Rcable、Ro以及Rs連接至電容Co的第二端,其中,電阻Rs為採樣電阻,用於採樣輸出電流,其兩端可以分別連接至晶片的ISN和ISP引腳等。
As an example, the first end of the
此外,由於本創作實施例提供的回饋控制晶片240將完整的回饋環路集成在晶片內部,使得晶片可以額外增加許多與環路相關的
功能。例如,該回饋控制晶片240內置的功能可以為如下:輸出恒壓控制及環路回饋、輸出恒流控制及環路回饋、輸出線壓降補償、輸出電壓動態增強、光耦驅動最大電流鉗位元、晶片軟起動、輸出電壓電流軟切換、輸出電壓切換時對輸出電容進行放電的功能等。同時,該回饋控制晶片240還可以集成有各種副邊輸出的保護,例如過電壓保護(Overvoltage Protection,OVP)、欠電壓保護(Under-Voltage Protection,UVP)、過電流保護(Over Current Protection,OCP)、和/或光線路保護(Optical Line Protection,OLP)等。
In addition, since the
本創作實施例提供的回饋控制晶片可以適用於例如離線開關電源系統(offline AC to DC),主功率拓撲可以包括但不限於反激式變換器,任何合適的離線開關電源拓撲均可以採用本創作實施例提供的回饋控制晶片,其開關電源系統的結構如圖2所示,並且回饋控制晶片的引腳如圖3所示,圖3示出了本創作實施例提供的回饋控制晶片的引腳示意圖。應當注意的是,如2和圖3所示的系統和晶片僅作為示例提供。本創作實施例提供的回饋控制晶片的引腳數量不限於8個,其可以根據實際系統應用而改變,例如,晶片的引腳數量可以被相應的擴展,例如,可以在圖3所示的晶片引腳的基礎上增加若干個通用型輸入/輸出(General-Purpose Input/Output,GPIO)引腳等。 The feedback control chip provided in the embodiment of the present invention can be applied to, for example, an offline switching power supply system (offline AC to DC). The main power topology can include, but is not limited to, a flyback converter. Any suitable offline switching power supply topology can adopt this invention. The structure of the switching power supply system of the feedback control chip provided by the embodiment is shown in FIG. 2 , and the pins of the feedback control chip are shown in FIG. 3 , which shows the pins of the feedback control chip provided by the embodiment of the present invention. Schematic. It should be noted that the systems and wafers shown in Figures 2 and 3 are provided as examples only. The number of pins of the feedback control chip provided in this creative embodiment is not limited to 8, which can be changed according to the actual system application. For example, the number of pins of the chip can be expanded accordingly. On the basis of the pins, several general-purpose input/output (General-Purpose Input/Output, GPIO) pins are added.
作為一個示例,本創作實施例提供的回饋控制晶片主要包括以下引腳:第一引腳(例如,系統的輸出電壓的檢測與放電引腳(如VO引腳))、第二引腳(例如,輸出電流採樣引腳(如ISN、ISP引腳))、第三引腳(例如,光耦的驅動引腳(如OPTO引腳))、第四引腳(例如,負載開關的驅動引腳(如GATE引腳))、第五引腳(例如,快充/PD協議通訊的引腳(如DP/CC1引腳))以及第六引腳(例如,快充/PD協議通訊的引腳(如DP/CC2引腳))等。以下結合圖2對上述各個引腳的功能進行說明。 As an example, the feedback control chip provided by this creative embodiment mainly includes the following pins: a first pin (for example, a system output voltage detection and discharge pin (for example, a VO pin)), a second pin (for example, a pin for detecting and discharging the output voltage of the system) , the output current sampling pin (such as ISN, ISP pin), the third pin (for example, the drive pin of the optocoupler (such as the OPTO pin)), the fourth pin (for example, the drive pin of the load switch (such as GATE pin), the fifth pin (for example, the pin for fast charging/PD protocol communication (such as DP/CC1 pin)), and the sixth pin (for example, the pin for fast charging/PD protocol communication) (such as DP/CC2 pin)) and so on. The function of each of the above pins will be described below with reference to FIG. 2 .
作為一個示例,ISP引腳可以連接到輸出電流採樣電阻 Rs的第一端,用於實現晶片的恒流控制和OCP控制。 As an example, the ISP pin can be connected to the output current sampling resistor The first end of Rs is used to realize constant current control and OCP control of the wafer.
作為一個示例,ISN引腳可以連接到輸出電流採樣電阻Rs的第二端,用於實現晶片的恒流控制和OCP控制。 As an example, the ISN pin can be connected to the second end of the output current sampling resistor Rs for realizing constant current control and OCP control of the chip.
作為一個示例,Vo引腳可以連接到輸出電容Co的第一端(例如,正極),用於實現晶片的恒壓控制和輸出電壓切換過程的放電控制。 As an example, the Vo pin can be connected to the first terminal (eg, the positive electrode) of the output capacitor Co, for realizing the constant voltage control of the wafer and the discharge control of the output voltage switching process.
作為一個示例,OPTO引腳可以連接到電阻Ropto的第一端(例如,電阻的遠離光耦的一端),用於實現對系統環路的控制。 As an example, the OPTO pin may be connected to the first end of the resistor Ropto (eg, the end of the resistor away from the optocoupler) for control of the system loop.
作為一個示例,GND引腳可以連接到輸出電容Co的第二端(例如,負極),也可以連接到負載的負電壓端。 As an example, the GND pin can be connected to the second terminal (eg, the negative terminal) of the output capacitor Co, and can also be connected to the negative voltage terminal of the load.
作為一個示例,GATE引腳可以連接到負載開關M2的柵極。應當注意的是,在一些實施例中,如圖2所示,負載開關M2是以NMOS為例進行說明的,並且該負載開關M2連接到輸出的正極端。然而,在其他實施例中,負載開關可以為PMOS,並且負載開關可以連接到輸出的負極端,本創作對此不作限制。在又一些實施例中,輸出電壓Vo可以直接輸出至負載,在這種情況下,系統中沒有負載開關,此時根據不同開關類型的需要,GATE引腳可以保持懸空,可以經由電阻連接至參考地,也可以直接連接至參考地。 As an example, the GATE pin may be connected to the gate of load switch M2. It should be noted that in some embodiments, as shown in FIG. 2 , the load switch M2 is illustrated with an NMOS as an example, and the load switch M2 is connected to the positive terminal of the output. However, in other embodiments, the load switch may be a PMOS, and the load switch may be connected to the negative terminal of the output, which is not limited by the present invention. In still other embodiments, the output voltage Vo can be directly output to the load. In this case, there is no load switch in the system. At this time, according to the needs of different switch types, the GATE pin can be left floating and can be connected to the reference via a resistor. ground, can also be connected directly to the reference ground.
作為一個示例,DP/CC1引腳和DN/CC2引腳通過內部切換可以支援快充協議或者PD協議,還可以支援任何其他合適的通信協議,本創作對此不作限制。此外,通訊引腳的數量不限於兩個,在實際應用中,可以增加通訊引腳的數量,以滿足系統的多種通訊協議需求。 As an example, the DP/CC1 pin and the DN/CC2 pin can support the fast charging protocol or the PD protocol through internal switching, and can also support any other suitable communication protocol, which is not limited in this creation. In addition, the number of communication pins is not limited to two. In practical applications, the number of communication pins can be increased to meet the requirements of various communication protocols of the system.
作為一個示例,本創作實施例提供的回饋控制晶片可以包括輸出電壓引腳和光耦驅動引腳,並且還可以包括恒壓回饋環路控制模組,其第一端可以連接至輸出電壓引腳,第二端可以連接至光耦驅動引腳,其中,恒壓回饋環路控制模組可以包括補償電路,用於使系統處於預設的時域性能和頻域性能。 As an example, the feedback control chip provided in this creative embodiment may include an output voltage pin and an optocoupler driving pin, and may also include a constant voltage feedback loop control module, the first end of which may be connected to the output voltage pin, The second end can be connected to the optocoupler driving pin, wherein the constant voltage feedback loop control module can include a compensation circuit, which is used to keep the system in the preset time domain performance and frequency domain performance.
作為另一示例,本創作實施例提供的回饋控制晶片可以包括光耦驅動引腳、輸出電流檢測正引腳和輸出電流檢測負引腳,並且還可以包括恒流回饋環路控制模組,其第一端可以連接至輸出電流檢測正引腳,第二端可以連接至輸出電流檢測負引腳,第三端可以連接至光耦驅動引腳,其中,恒流回饋環路控制模組可以包括補償電路,用於使系統處於預設的時域性能和頻域性能。 As another example, the feedback control chip provided in this creative embodiment may include an optocoupler driving pin, an output current detection positive pin, and an output current detection negative pin, and may also include a constant current feedback loop control module, which The first end can be connected to the output current detection positive pin, the second end can be connected to the output current detection negative pin, and the third end can be connected to the optocoupler drive pin, wherein the constant current feedback loop control module can include: The compensation circuit is used to make the system in the preset time domain performance and frequency domain performance.
作為一個示例,本創作實施例提供的回饋控制晶片可以包括輸出電壓引腳、輸出電流檢測正引腳、輸出電流檢測負引腳和光耦驅動引腳,並且還可以包括恒壓/恒流回饋環路控制模組,其中,該恒壓/恒流回饋環路控制模組的第一端可以連接至輸出電壓引腳,第二端可以連接至輸出電流檢測正引腳,第三端可以連接至輸出電流檢測負引腳,並且第四端可以連接至光耦驅動引腳,其中,該恒壓/恒流回饋環路控制模組可以包括補償電路,用於使系統處於預設的時域性能和頻域性能。 As an example, the feedback control chip provided in this creative embodiment may include an output voltage pin, an output current detection positive pin, an output current detection negative pin, and an optocoupler driving pin, and may also include a constant voltage/constant current feedback loop circuit control module, wherein the first end of the constant voltage/constant current feedback loop control module can be connected to the output voltage pin, the second end can be connected to the output current detection positive pin, and the third end can be connected to The output current detection negative pin, and the fourth terminal can be connected to the optocoupler driving pin, wherein the constant voltage/constant current feedback loop control module can include a compensation circuit for making the system in a preset time domain performance and frequency domain performance.
可見,本創作實施例提供的上述方案,通過將恒壓和/或恒流回饋環路控制模組集成在回饋控制晶片內部,並且將補償電路集成在恒壓和/或恒流回饋環路控制模組內部,使得晶片集成有恆壓和/或恒流控制功能,同時降低了晶片的引腳數量,降低了週邊的補償器件數量,提高了系統的集成度,節約了系統元器件,有利於實現系統的小型化設計。 It can be seen that, the above solutions provided by the present creative embodiments integrate the constant voltage and/or constant current feedback loop control module inside the feedback control chip, and integrate the compensation circuit into the constant voltage and/or constant current feedback loop control Inside the module, the chip integrates constant voltage and/or constant current control functions, and at the same time reduces the number of pins on the chip, reduces the number of peripheral compensation devices, improves the integration of the system, saves system components, and is beneficial to Realize the miniaturized design of the system.
以下結合第一種實施例對本創作提供的回饋控制晶片240進行詳細介紹,具體地,參考圖4,圖4示出了本創作實施例提供的能夠實現恒壓和恒流控制的回饋控制晶片的結構示意圖。
The
作為一個示例,如圖4所示,該回饋控制晶片240可以包括例如以下模組:協議通訊模組2401、輸出電壓和電流保護控制模組2402、Vo放電控制模組2403、UVLO/LDO放電模組2404、數位/MCU(Microcontroller Unit,MCU)微控制單元2405、恒壓/恒流回饋環路控制模組2406以及負載開關驅動模組2407等。
As an example, as shown in FIG. 4 , the
其中,協議通訊模組2401的第一端可以連接至DP/CC1
通訊口,第二端可以連接至DN/CC2通訊口,第三端可以連接至微控制單元2405的第一端,輸出電壓和電流保護控制模組2402的第一端可以連接至微控制單元2405的第二端,Vo放電控制模組2403的第一端可以連接至微控制單元2405的第三端,UVLO/LDO放電模組2404的第一端可以連接至VO引腳,第二端可以連接至微控制單元2405的第四端,恒壓/恒流回饋環路控制模組2406的第一端、第二端和第三端可以分別連接至OPTO引腳、ISP引腳和ISN引腳,第四端可以連接至VO引腳,用於經由ISP引腳和ISN引腳接收系統的輸出電流,並且經由VO引腳接收系統的輸出電壓,第五端可以連接至微控制單元2405的第五端,負載開關驅動模組2407的第一端可以連接至GATE引腳,並且第二端可以連接至微控制單元2405的第六端。
The first end of the
可見,回饋控制晶片240包括恒壓/恒流回饋環路控制模組2406,使得上述晶片240可以應用在用於實現恒壓控制和恒流控制的開關電源系統中。
It can be seen that the
以下結合第二種實施例對本創作提供的回饋控制晶片進行詳細介紹,具體地,參考圖5,圖5示出了本創作實施例提供的能夠實現恒壓控制的回饋控制晶片的結構示意圖。如圖5所示,該回饋控制晶片340可以包括例如以下模組:協議通訊模組3401、輸出電壓和電流保護控制模組3402、Vo放電控制模組3403、UVLO/LDO放電模組3404、數位/MCU微控制單元3405、恒壓回饋環路控制模組3406以及負載開關驅動模組3407等。
The feedback control chip provided by the present invention will be described in detail below with reference to the second embodiment. Specifically, referring to FIG. 5 , FIG. As shown in FIG. 5 , the
其中,協議通訊模組3401的第一端可以連接至DP/CC1通訊口,第二端可以連接至DN/CC2通訊口,第三端可以連接至微控制單元3405的第一端,輸出電壓和電流保護控制模組3402的第一端可以連接至微控制單元3405的第二端,Vo放電控制模組3403的第一端可以連接至微控制單元3405的第三端,UVLO/LDO放電模組3404的第一端可以連接至VO引腳,第二端可以連接至微控制單元3405的第四端,恒壓回饋環路
控制模組3406的第一端可以連接至OPTO引腳,第二端可以連接至VO引腳,用於經由VO引腳接收系統的輸出電壓,第三端可以連接至微控制單元3405的第五端,負載開關驅動模組3407的第一端可以連接至GATE引腳,並且第二端可以連接至微控制單元3405的第六端。
The first end of the
可見,回饋控制晶片340包括恒壓回饋環路控制模組3406,使得上述晶片340可以應用在用於實現恒壓控制的開關電源系統中。
It can be seen that the
以下結合第三種實施例對本創作提供的回饋控制晶片進行詳細介紹,具體地,參考圖6,圖6示出了本創作實施例提供的能夠實現恒流控制的回饋控制晶片的結構示意圖。如圖6所示,該回饋控制晶片440可以包括例如以下模組:協議通訊模組4401、輸出電壓和電流保護控制模組4402、Vo放電控制模組4403、UVLO/LDO放電模組4404、數位/MCU微控制單元4405、恒流回饋環路控制模組4406以及負載開關驅動模組4407等。
The feedback control chip provided by the present invention is described in detail below with reference to the third embodiment. Specifically, referring to FIG. 6 , FIG. 6 shows a schematic structural diagram of the feedback control chip capable of realizing constant current control provided by the embodiment of the present invention. As shown in FIG. 6 , the
其中,協議通訊模組4401的第一端可以連接至DP/CC1通訊口,第二端可以連接至DN/CC2通訊口,第三端可以連接至微控制單元4405的第一端,輸出電壓和電流保護控制模組4402的第一端可以連接至微控制單元4405的第二端,Vo放電控制模組4403的第一端可以連接至微控制單元4405的第三端,UVLO/LDO放電模組4404的第一端可以連接至VO引腳,第二端可以連接至微控制單元4405的第四端,恒流回饋環路控制模組4406的第一端、第二端和第三端可以分別連接至OPTO引腳、ISP引腳和ISN引腳,用於經由ISP引腳和ISN引腳接收系統的輸出電流,第四端可以連接至微控制單元2405的第五端,負載開關驅動模組4407的第一端可以連接至GATE引腳,並且第二端可以連接至微控制單元4405的第六端。
The first end of the
可見,回饋控制晶片440包括恒流回饋環路控制模組4406,使得上述晶片440可以應用在用於實現恒流控制的開關電源系統中。
It can be seen that the
以下結合圖7對圖4中所示的恒壓/恒流回饋環路控制模
組2406進行詳細介紹,具體地,圖7示出了本創作第一實施例提供的恒壓/恒流回饋環路控制模組的結構示意圖。
The control mode of the constant voltage/constant current feedback loop shown in FIG. 4 is described below in conjunction with FIG. 7
如圖7所示,該恒壓/恒流回饋環路控制模組2406’可以包括位於OPTO引腳和VO引腳之間的第一支路以及位於ISN、ISP引腳與OPTO引腳之間的第二支路,其中,第一支路可以用於經由VO引腳接收系統的輸出電壓以實現恒壓控制,第二支路可以用於經由ISN和ISP引腳接收系統的輸出電流以實現恒流控制。 As shown in FIG. 7, the constant voltage/constant current feedback loop control module 2406' may include a first branch between the OPTO pin and the VO pin, and between the ISN, ISP pins and the OPTO pin the second branch of the Constant current control.
在一些實施例中,第一支路可以包括輸出電壓採樣模組510、恒壓環路跨導誤差放大器(Operational Transconductance Amplifier,OTA)511、恒壓環路的補償電路512、恒壓環路的驅動能力增強緩衝器513、恒壓環路電壓放大器514以及恒壓環路光耦驅動隔離模組515(例如,二極體)等,應注意,任何適當的具有隔離功能的模組均在本創作的範圍內,以下以二極體作為示例進行說明。在其他實施例中,第一支路還可以包括輸出電壓放電模組516和輸出線壓降補償模組517等。
In some embodiments, the first branch may include an output
其中,輸出電壓採樣模組510的第一端可以連接至VO引腳,第二端可以連接至參考地,恒壓環路跨導誤差放大器(OTA)511的第一端(例如,負相輸入端)可以連接至輸出電壓採樣模組510的第三端,第二端(例如,正相輸入端)可以用於接收恒壓基準電壓Vref_cv,恒壓環路的補償電路512的第一端可以連接至恒壓環路跨導誤差放大器(OTA)511的第三端(例如,輸出端),第二端可以連接至恒壓環路的驅動能力增強緩衝器513的第一端,恒壓環路電壓放大器514的第一端可以連接至緩衝器513的第二端,第二端可以連接至二極體515的第一端(例如,正極),二極體515的第二端(例如,負極)可以連接至OPTO引腳,並且輸出電壓放電模組516可以連接在Vo引腳和參考地之間,輸出線壓降補償模組517的兩端可以連接至電阻Rd的兩端。
The first end of the output
以下通過示例的方式對上述各個模組的功能進行詳細介紹,作為一個示例,參考圖2和圖7,輸出電壓採樣模組510可以用於對系
統的輸出電壓進行分壓採樣,將輸出電壓降至合理的電壓範圍之後供後級調整模組使用。例如,該輸出電壓採樣模組510可以包括分壓模組,如串聯連接在VO引腳與參考地之間的電阻R1和電阻Rd,該輸出電壓採樣模組510的主要功能是參與後級恒壓環路回饋環、動態增強補償以及OVP/UVP保護。
The functions of the above modules are described in detail below by way of examples. As an example, referring to FIG. 2 and FIG. 7 , the output
具體地,動態增強補償功能是通過以下方式實現的:對輸出電壓進行檢測,並設置一個合理的輸出電壓範圍,一旦檢測到輸出電壓超出預設的輸出電壓範圍時,使動態增強電路啟動,通過對後級恒壓環路的補償電路512的輸出進行灌/拉電流,將輸出電壓拉回至預設的輸出電壓範圍。
Specifically, the dynamic enhancement compensation function is realized by the following methods: detecting the output voltage, and setting a reasonable output voltage range, once it is detected that the output voltage exceeds the preset output voltage range, the dynamic enhancement circuit is activated, through Sink/source current to the output of the
作為一個示例,恒壓環路跨導誤差放大器(OTA)511可以用於將採樣得到的輸出電壓與恒壓基準電壓Vref_cv進行比較以產生誤差電流輸出。應注意,該恒壓基準電壓Vref_cv可以是固定值,也可以是通過MCU控制單元(參見圖4)等配置的可變值,本創作對此不作限制。在啟動時或者輸出電壓切換時,可以通過Vref_cv軟升和軟降的方式來實現開機軟起和輸出電壓升降壓的軟切換。為了改善系統的動態性能,跨導誤差放大器(OTA)511的輸出電壓需要在一定範圍(例如,在Vgm_min和Vgm_max之間的範圍)內。當輸出電壓採樣模組510檢測到輸出電壓超出動態增強的閾值範圍時,便可以對跨導誤差放大器(OTA)511的輸出進行灌/拉電流,以將輸出電壓拉回到預設的輸出電壓範圍。
As an example, a constant voltage loop transconductance error amplifier (OTA) 511 may be used to compare the sampled output voltage with the constant voltage reference voltage Vref_cv to generate an error current output. It should be noted that the constant voltage reference voltage Vref_cv may be a fixed value, or may be a variable value configured by the MCU control unit (see FIG. 4 ), etc., which is not limited in the present invention. During startup or when the output voltage is switched, the soft-start and output voltage buck-boost soft switching can be achieved by means of Vref_cv soft-rise and soft-drop. To improve the dynamic performance of the system, the output voltage of the transconductance error amplifier (OTA) 511 needs to be within a certain range (eg, the range between Vgm_min and Vgm_max). When the output
作為一個示例,恒壓環路的補償電路512可以用於使得系統處於合理的時域性能和頻域性能。例如,該補償電路512可以包括連接在跨導誤差放大器(OTA)511的輸出端和參考地之間的電阻R2和電容C1,以及連接在跨導誤差放大器(OTA)511的輸出端和參考地之間的電容C2,其中,電阻R2和電容C1是串聯連接的,可以通過設置合理的電阻和電容值,來得到合理的時域性能和頻域性能,應注意的是,本創作對補償電路不作限制,任何其他能夠實現補償功能的合適的電路均在本創作的
範圍內。具體地,時域性能可以根據使用者的規格要求來確定,而頻域性能可以通過環路分析儀利用例如小信號注入分析的方法進行掃描測試,通常,穩定的系統開環相位裕度可能需要在例如45度以上,而增益裕度可能需要在例如10~12dB以上。
As an example, the
作為一個示例,由於某些跨導誤差放大器(OTA)511的驅動能力可能非常弱,因此可以通過設置恒壓環路的驅動能力增強緩衝器513來增強跨導誤差放大器(OTA)511的驅動能力。
As an example, since the drive capability of some transconductance error amplifiers (OTA) 511 may be very weak, the drive capability of the transconductance error amplifier (OTA) 511 can be enhanced by setting the drive
在一些實施例中,由於某些跨導誤差放大器(OTA)511的輸出電壓範圍不一定能夠完全滿足驅動外部光耦的需求,因此在這種情況下,可以通過恒壓環路電壓放大器514來將跨導誤差放大器(OTA)511的輸出電壓範圍增大,從而可以提供足夠的驅動電壓範圍以完全滿足驅動外部光耦的需求,同時晶片內部可以將驅動電流的最大值鉗位至設定值。然而,在其他實施例中,由於某些跨導誤差放大器(OTA)511的輸出電壓範圍能夠完全滿足驅動外部光耦的需求,因此在這種情況下,無需恒壓環路電壓放大器514來增大輸出電壓範圍。
In some embodiments, since the output voltage range of some transconductance error amplifier (OTA) 511 may not be able to fully meet the requirements of driving an external optocoupler, in this case, the constant voltage
作為一個示例,為了進一步提供晶片性能,例如為了防止在不同模式下,兩個環路系統發生相互干擾,因此可以通過設置恒壓環路光耦驅動隔離模組515和恒流環路光耦驅動隔離模組523來對恒壓環路和恒流環路進行隔離。
As an example, in order to further improve the chip performance, for example, in order to prevent mutual interference between the two loop systems in different modes, the
在一些實施例中,為了進一步提高恒壓環路的性能,還可以設置輸出電壓放電模組516,輸出電壓放電模組516可以用於在空輕載條件下,通過恒壓基準電壓Vref_cv切換輸出電壓時開啟。作為系統的假負載,在輸出電壓降低時,輸出電壓放電模組516可以用於對輸出電壓進行快速放電,以放電至設定的電壓範圍,從而滿足系統降壓時間和性能規格等。在輸出電壓升壓時,輸出電壓放電模組516可以用於抑制輸出電壓的過沖,從而使得輸出電壓儘快回到設定的電壓範圍。
In some embodiments, in order to further improve the performance of the constant voltage loop, an output
應注意的是,在圖7所示的實施例中,輸出電壓放電模
組516是通過恒流源的方式來實現放電功能的。然而,在其他實施例中,例如,參考圖8,圖8示出了本創作另一實施例提供的輸出電壓放電模組的電路結構圖,其中,輸出電壓放電模組516是通過電阻(例如,Rdis)的方式來實現放電功能的,任何其他適當的具有放電功能的電路均在本創作的範圍內。
It should be noted that in the embodiment shown in Figure 7, the output voltage discharge mode
The
在一些實施例中,為了進一步提高恒壓環路的性能,由於輸出線材可能會引起線端電壓下降,因此可以需要通過設置輸出線壓降補償模組517來補償線電壓下降,例如,通過將輸出電流採樣和放大模組518的輸出電壓(其中包含與輸出電流有關的資訊)與合適的比例參數k相乘,利用電壓控制電流源(Voltage Controlled Current Source,VCCS)等之類的方式來提供針對輸出線材的補償電流,使該補償電流流入輸出電壓採樣模組510的採樣點,即電阻R1與電阻Rd的公共端,通過選擇合適的比例參考k,可以實現對由輸出線材引起的線端電壓下降的補償,使得線電壓在全負載範圍內始終保持維持在設定值。
In some embodiments, in order to further improve the performance of the constant voltage loop, since the output wire may cause the line terminal voltage drop, it may be necessary to set the output line voltage
然而,在其他實施例中,參考圖9,圖9示出了本創作另一實施例提供的輸出線壓降補償模組的電路結構示意圖,從圖9中可以看出,其是通過在跨導誤差放大器(OTA)511的一個輸入端(例如,負相輸入端)上疊加一個與輸出電流成正比的電壓源,即在恒壓基準電壓Vref_cv上疊加一個與輸出電流成正比的電壓來補償由輸出線材引起的線端電壓下降,使得線電壓在全負載範圍內始終保持維持在設定值。 However, in other embodiments, referring to FIG. 9 , FIG. 9 shows a schematic diagram of the circuit structure of the output line voltage drop compensation module provided by another embodiment of the present invention. It can be seen from FIG. A voltage source proportional to the output current is superimposed on one input terminal (for example, the negative input terminal) of the error amplifier (OTA) 511, that is, a voltage proportional to the output current is superimposed on the constant voltage reference voltage Vref_cv to compensate The line terminal voltage drop caused by the output wire keeps the line voltage at the set value throughout the full load range.
在一些實施例中,第二支路可以包括輸出電流採樣和放大模組518、恒流環路跨導誤差放大器(OTA)519、恒流環路的補償電路520、恒流環路的驅動能力增強緩衝器521、恒流環路電壓放大器522以及恒流環路光耦驅動隔離模組523(例如,二極體)等,應注意,任何適當的具有隔離功能的模組均在本創作的範圍內,以下以二極體作為示例進行說明。
In some embodiments, the second branch may include an output current sampling and
其中,輸出電流採樣和放大模組518的第一端(例如,
負相輸入端)可以連接至ISN引腳,第二端(例如,正相輸入端)可以連接至ISP引腳,恒流環路跨導誤差放大器(OTA)519的第一端(例如,負相輸入端)可以連接至輸出電流採樣和放大模組518的第三端(例如,輸出端),第二端(例如,正相輸入端)可以用於接收恒流基準電壓Vref_cc,恒流環路的補償電路520的第一端可以連接至跨導誤差放大器(OTA)519的第三端(例如,輸出端),第二端可以連接至恒流環路的驅動能力增強緩衝器521的第一端,恒流環路電壓放大器522的第一端可以連接至緩衝器521的第二端,第二端可以連接至二極體523的第一端(例如,正極),二極體523的第二端(例如,負極)可以連接至OPTO引腳。
Wherein, the first end of the output current sampling and amplification module 518 (for example,
The negative input terminal) can be connected to the ISN pin, the second terminal (eg, the non-inverting input terminal) can be connected to the ISP pin, and the first terminal (eg, negative input terminal) of the constant current loop transconductance error amplifier (OTA) 519 phase input terminal) can be connected to the third terminal (eg, the output terminal) of the output current sampling and
以下通過示例的方式對上述各個模組的功能進行詳細介紹,作為一個示例,參考圖2和圖7,輸出電流採樣和放大模組518可以用於對採樣電阻Rs(參見圖2)上的電壓進行採樣,其中,該採樣電阻Rs上的電流為輸出電流,並且通過其中的電壓放大模組將採樣得到的電壓放大至適當的電壓範圍以供後級使用。該輸出電流採樣和放大模組518的主要功能是參與後級恒流環路回饋環以及OCP保護。
The functions of the above modules are described in detail below by way of examples. As an example, referring to FIG. 2 and FIG. 7 , the output current sampling and
作為一個示例,恒流環路跨導誤差放大器(OTA)519可以用於將來自輸出電流採樣和放大模組518的輸出電壓與恒流基準電壓Vref_cc進行比較以產生誤差電流輸出。應注意,該恒流基準電壓Vref_cc可以是固定值,也可以是通過MCU控制單元(參見圖4)等配置的可變值,本創作對此不作限制。在輸出電流切換時,可以通過Vref_cc軟升或軟降的方式來實現電流大小的軟切換。
As one example, a constant current loop transconductance error amplifier (OTA) 519 may be used to compare the output voltage from the output current sampling and
作為一個示例,恒流環路的補償電路520可以用於使得系統處於合理的時域性能及頻域性能。例如,該補償電流520可以包括連接在跨導誤差放大器(OTA)519的輸出端和參考地之間的電阻R20和電容C10,以及連接在跨導誤差放大器(OTA)519的輸出端和參考地之間的電容C20,其中,電阻R20和電容C10是串聯連接的,可以通過設置合
理的電阻和電容值,來得到合理的時域性能及頻域性能,應注意的是,本創作對補償電路不作限制,任何其他能夠實現補償功能的合適的電路均在本創作的範圍內。具體地,時域性能可以根據使用者的規格要求來確定,而頻域性能可以通過環路分析儀利用例如小信號注入分析的方法進行掃描測試,通常,穩定的系統開環相位裕度可能需要在例如45度以上,而增益裕度可能需要在例如10~12dB以上。
As an example, the
作為一個示例,由於某些跨導誤差放大器(OTA)519的驅動能力可能非常弱,因此可以通過設置恒流環路的驅動能力增強緩衝器521來增強跨導誤差放大器(OTA)519的驅動能力。
As an example, since the drive capability of some transconductance error amplifiers (OTA) 519 may be very weak, the drive capability of the transconductance error amplifier (OTA) 519 can be enhanced by setting the drive
作為一個示例,由於某些跨導誤差放大器(OTA)519的輸出電壓範圍不一定能夠完全滿足驅動外部光耦的需求,因此在這種情況下,可以通過恒流環路電壓放大器522來將跨導誤差放大器(OTA)519的輸出電壓範圍增大,從而可以提供足夠的驅動電壓範圍以完全滿足驅動外部光耦的需求,同時晶片內部可以將驅動電流的最大值鉗位至設定值。然而,在其他實施例中,由於某些跨導誤差放大器(OTA)519的輸出電壓範圍能夠完全滿足驅動外部光耦的需求,因此在這種情況下,無需恒流環路電壓放大器522來增大輸出電壓範圍。
As an example, since the output voltage range of some transconductance error amplifier (OTA) 519 may not be able to fully meet the needs of driving an external optocoupler, in this case, the constant current
作為一個示例,為了進一步提供晶片性能,例如為了防止在不同模式下,兩個環路系統發生相互干擾,因此可以通過設置恒壓環路光耦驅動隔離模組515和恒流環路光耦驅動隔離模組523來對恒壓環路和恒流環路進行隔離。
As an example, in order to further improve the chip performance, for example, in order to prevent mutual interference between the two loop systems in different modes, the
應注意,圖7所示的恒壓/恒流回饋環路控制模組2406僅僅作為示例提供,還可以存在恒壓/恒流回饋環路控制模組的其他實現方式,例如,參考圖10,圖10示出了本創作第二實施例提供的恒壓/恒流回饋環路控制模組的結構示意圖。
It should be noted that the constant voltage/constant current feedback
如圖10所示,該恒壓/恒流回饋環路控制模組2406”類似於圖7所示的恒壓/恒流回饋環路控制模組2406’,其中相同的元件採樣相
同的圖式標記,二者之間的不同之處主要在於,恒壓/恒流回饋環路控制模組2406”在恒壓/恒流回饋環路控制模組2406’的基礎上減少了恒壓環路電壓放大器514以及恒流環路電壓放大器522,並且跨導誤差放大器(OTA)511’和跨導誤差放大器(OTA)519’的兩個輸入端互換,例如,圖7所示的跨導誤差放大器(OTA)511的負相輸入端可以連接至輸出電壓採樣模組510的第三端,其正相輸入端可以用於接收恒壓基準電壓Vref_cv,而圖10所示的跨導誤差放大器(OTA)511’的正相輸入端可以連接至輸出電壓採樣模組510的第三端,其負相輸入端可以用於接收恒壓基準電壓Vref_cv;並且圖7所示的跨導誤差放大器(OTA)519的負相輸入端可以連接至輸出電流採樣和放大模組518的第三端(例如,輸出端),其正相輸入端可以用於接收恒流基準電壓Vref_cc,而圖10所示的跨導誤差放大器(OTA)519’的正相輸入端可以連接至輸出電流採樣和放大模組518的第三端(例如,輸出端),其負相輸入端可以用於接收恒流基準電壓Vref_cc,即,恒壓/恒流回饋環路控制模組2406”可以應用在跨導誤差放大器(OTA)的輸出電壓範圍能夠完全滿足驅動外部光耦的需求的場景中。
As shown in FIG. 10, the constant voltage/constant current feedback
然而,應注意,圖10所示實施例應當解釋為限制性的,並不旨在對本創作進行限制。例如,在第一實施例中,恒壓/恒流回饋環路控制模組可以在圖10所示的恒壓/恒流回饋環路控制模組2406”的基礎上,減少輸出電壓放電模組516和/或輸出線壓降補償模組517。在第二實施例中,可以在圖10所示的恒壓/恒流回饋環路控制模組2406”或第一實施例提供的恒壓/恒流回饋環路控制模組的基礎上增加位於恒壓環路光耦驅動隔離模組515和恒壓環路的驅動能力增強緩衝器513之間的恒壓環路電壓放大器514,並且在這種情況下,需要將圖10所示的跨導誤差放大器(OTA)511’的兩個輸入端互換,即,其兩個輸入端所處的狀態需與圖7所示的跨導誤差放大器(OTA)511一致。在第三實施例中,可以在圖10所示的恒壓/恒流回饋環路控制模組2406”或第一實施例提供的恒壓/恒流回饋環路控制模組的基礎上增加位於恒流環路光耦驅動隔離模組523和恒流環路的驅
動能力增強緩衝器521之間的恒流環路電壓放大器522,並且在這種情況下,需要將圖10所示的跨導誤差放大器(OTA)519’的兩個輸入端互換,即,其兩個輸入端所處的狀態需與圖7所示的跨導誤差放大器(OTA)519一致。
However, it should be noted that the embodiment shown in FIG. 10 should be construed as limiting and is not intended to limit the present creation. For example, in the first embodiment, the constant voltage/constant current feedback loop control module can reduce the output voltage discharge module on the basis of the constant voltage/constant current feedback
為了簡化描述,圖10中組件的相應功能類似於圖7中對應組件的功能,由於在圖7中已經對各個元件的功能進行了詳細的描述,因此,這裡不再贅述。 In order to simplify the description, the corresponding functions of the components in FIG. 10 are similar to the functions of the corresponding components in FIG. 7 . Since the functions of each element have been described in detail in FIG. 7 , they are not repeated here.
以下結合圖11對圖5所示的恒壓回饋環路控制模組3406進行詳細介紹,具體地,圖11示出了本創作第一實施例提供的恒壓回饋環路控制模組的結構示意圖。
The constant voltage feedback
如圖11所示,該恒壓回饋環路控制模組3406’類似於圖7所示的第一支路,其中相同的元件採用相同的圖式標記,該恒壓回饋環路控制模組3406’可以包括輸出電壓採樣模組510、恒壓環路跨導誤差放大器(OTA)511、恒壓環路的補償電路512、恒壓環路的驅動能力增強緩衝器513以及恒壓環路電壓放大器514等。在其他實施例中,該恒壓回饋環路控制模組3406’還可以包括輸出電壓放電模組516和輸出線壓降補償模組517等。不同之處在於,此時可以不設置隔離二極體515。
As shown in FIG. 11 , the constant voltage feedback
為了簡化描述,圖11中組件的相應功能類似於圖7中對應組件的功能,由於在圖7中已經對各個元件的功能進行了詳細的描述,因此,這裡不再贅述。 In order to simplify the description, the corresponding functions of the components in FIG. 11 are similar to the functions of the corresponding components in FIG. 7 . Since the functions of each element have been described in detail in FIG. 7 , they are not repeated here.
應注意,圖11所示的恒壓回饋環路控制模組3406’僅僅作為示例提供,還可以存在恒壓回饋環路控制模組的其他實現方式,例如,參考圖12,圖12示出了本創作第二實施例提供的恒壓回饋環路控制模組的結構示意圖。 It should be noted that the constant voltage feedback loop control module 3406' shown in FIG. 11 is only provided as an example, and there may be other implementations of the constant voltage feedback loop control module. For example, referring to FIG. 12, FIG. 12 shows A schematic structural diagram of the constant voltage feedback loop control module provided by the second embodiment of the present invention.
如圖12所示,該恒壓回饋環路控制模組3406”類似於圖11所示的恒壓回饋環路控制模組3406’,其中相同的元件採樣相同的圖式標記,二者之間的不同之處主要在於,恒壓回饋環路控制模組3406”在恒
壓回饋環路控制模組3406’的基礎上減少了輸出電壓放電模組516、輸出線壓降補償模組517和恒壓環路電壓放大器514,並且跨導誤差放大器(OTA)511的兩個輸入端互換,即,跨導誤差放大器(OTA)511的正相輸入端可以連接至輸出電壓採樣模組510的輸出端,負相輸入端可以用於接收基準電壓Vref_cv,恒壓回饋環路控制模組3406”可以應用在跨導誤差放大器(OTA)的輸出電壓範圍能夠完全滿足驅動外部光耦的需求的場景中。
As shown in FIG. 12 , the constant voltage feedback
為了簡化描述,圖12中組件的相應功能類似於圖7中對應組件的功能,由於在圖7中已經對各個元件的功能進行了詳細的描述,因此,這裡不再贅述。 In order to simplify the description, the corresponding functions of the components in FIG. 12 are similar to the functions of the corresponding components in FIG. 7 . Since the functions of each element have been described in detail in FIG. 7 , they are not repeated here.
以下結合圖13對圖6所示的恒流回饋環路控制模組4406進行詳細介紹,具體地,圖13示出了本創作第一實施例提供的恒流回饋環路控制模組的結構示意圖。
The following describes the constant current feedback
如圖13所示,該恒流回饋環路控制模組4406’類似於圖7所示的第二支路,其中相同的元件採用相同的圖式標記,該恒流回饋環路控制模組4406’可以包括輸出電流採樣和放大模組518、恒流環路跨導誤差放大器(OTA)519、恒流環路的補償電路520、恒流環路的驅動能力增強緩衝器521以及恒流環路電壓放大器522等。不同之處在於,此時可以不設置隔離二極體523。
As shown in FIG. 13 , the constant current feedback
為了簡化描述,圖13中組件的相應功能類似於圖7中對應組件的功能,由於在圖7中已經對各個元件的功能進行了詳細的描述,因此,這裡不再贅述。 In order to simplify the description, the corresponding functions of the components in FIG. 13 are similar to those of the corresponding components in FIG. 7 . Since the functions of each element have been described in detail in FIG. 7 , they are not repeated here.
應注意,圖13所示的恒流回饋環路控制模組4406’僅僅作為示例提供,還可以存在恒流回饋環路控制模組的其他實現方式,例如,參考圖14,圖14示出了本創作第二實施例提供的恒流回饋環路控制模組的結構示意圖。 It should be noted that the constant current feedback loop control module 4406' shown in FIG. 13 is only provided as an example, and there may be other implementations of the constant current feedback loop control module. For example, referring to FIG. 14, FIG. 14 shows A schematic structural diagram of the constant current feedback loop control module provided by the second embodiment of the present invention.
如圖14所示,該恒流回饋環路控制模組4406”類似於圖
13所示的恒流回饋環路控制模組4406’,其中相同的元件採樣相同的圖式標記,二者之間的不同之處主要在於,恒流回饋環路控制模組4406”在恒流回饋環路控制模組4406’的基礎上減少了恒流環路電壓放大器522,並且跨導誤差放大器(OTA)519的兩個輸入端互換,即,跨導誤差放大器(OTA)519的正相輸入端可以連接至輸出電流採樣和放大模組518的輸出端,負相輸入端可以用於接收基準電壓Vref_cc,恒流回饋環路控制模組4406”可以應用在跨導誤差放大器(OTA)的輸出電壓範圍能夠完全滿足驅動外部光耦的需求的場景中。
As shown in Figure 14, the constant current feedback
為了簡化描述,圖14中組件的相應功能類似於圖7中對應組件的功能,由於在圖7中已經對各個元件的功能進行了詳細的描述,因此,這裡不再贅述。 In order to simplify the description, the corresponding functions of the components in FIG. 14 are similar to those of the corresponding components in FIG. 7 . Since the functions of each element have been described in detail in FIG. 7 , they are not repeated here.
綜上,本創作提供了一種可以適用於例如離線開關電源系統的回饋控制晶片及其控制方法,該回饋控制晶片可以通過跨導誤差放大器(OTA)將輸出電壓或電流與恒壓基準電壓或電流之間的誤差進行放大,並利用緩衝器(buffer)來增加跨導誤差放大器(OTA)的驅動能力,可選地,然後可以利用運放來調整電壓,以驅動光耦二極體,並將回饋信號傳遞到原邊PWM晶片。 In summary, the present invention provides a feedback control chip and a control method thereof that can be applied to, for example, an offline switching power supply system. The feedback control chip can compare an output voltage or current with a constant voltage reference voltage or current through a transconductance error amplifier (OTA). Amplify the error between and use a buffer to increase the drive capability of the transconductance error amplifier (OTA), optionally an op amp can then be used to adjust the voltage to drive the optocoupler diode, and The feedback signal is passed to the primary side PWM chip.
通過上述技術方案,可以實現將控制環路集成在晶片內部,同時使該晶片集成有以下功能:恒壓控制、恒流控制、輸出線壓降補償、輸出電壓動態增強、輸出電壓軟起、輸出電壓/電流實現軟切換、升降壓時對輸出電容進行放電等功能,晶片的這種高度集成化的特性可以滿足PD/QC等多輸出電壓的應用。 Through the above technical solution, the control loop can be integrated inside the chip, and the chip can be integrated with the following functions: constant voltage control, constant current control, output line voltage drop compensation, output voltage dynamic enhancement, output voltage soft start, output The voltage/current realizes functions such as soft switching and discharging the output capacitor during buck-boost. This highly integrated feature of the chip can meet the application of multiple output voltages such as PD/QC.
需要明確的是,本創作並不局限于上文所描述並在圖中示出的特定配置和處理。為了簡明起見,這裡省略了對已知方法的詳細描述。在上述實施例中,描述和示出了若干具體的步驟作為示例。但是,本創作的方法過程並不限於所描述和示出的具體步驟,本領域的技術人員可以在領會本創作的精神後,作出各種改變、修改和添加,或者改變步驟之 間的順序。 To be clear, the present invention is not limited to the specific configurations and processes described above and shown in the figures. For the sake of brevity, detailed descriptions of known methods are omitted here. In the above-described embodiments, several specific steps are described and shown as examples. However, the method process of the present creation is not limited to the specific steps described and shown, and those skilled in the art can make various changes, modifications and additions, or change any of the steps after comprehending the spirit of the present creation. sequence between.
以上所述的結構框圖中所示的功能塊可以實現為硬體、軟體、固件或者它們的組合。當以硬體方式實現時,其可以例如是電子電路、特定應用積體電路(Application Specific Integrated Circuit,ASIC)、適當的固件、外掛程式、功能卡等等。當以軟體方式實現時,本創作的元素是被用於執行所需任務的程式或者程式碼片段。程式或者程式碼片段可以存儲在機器可讀介質中,或者通過載波中攜帶的資料信號在傳輸介質或者通信鏈路上傳送。“機器可讀介質”可以包括能夠存儲或傳輸資訊的任何介質。機器可讀介質的例子包括電子電路、半導體記憶體設備、ROM(Read-Only Memory,ROM,唯讀記憶體)、快閃記憶體、可擦除ROM(Erasable Read Only Memory,EROM)、軟碟、CD-ROM(Compact Disc Read-Only Memory,CD-ROM,光碟唯讀記憶體)、光碟、硬碟、光纖介質、射頻(Radio Frequency,RF)鏈路,等等。程式碼片段可以經由諸如網際網路、內聯網等的電腦網路被下載。 The functional blocks shown in the above-described structural block diagrams may be implemented as hardware, software, firmware, or a combination thereof. When implemented in hardware, it can be, for example, an electronic circuit, an application specific integrated circuit (ASIC), suitable firmware, a plug-in program, a function card, and the like. When implemented in software, elements of the present authoring are programs or pieces of code that are used to perform the desired tasks. The program, or segments of program code, can be stored on a machine-readable medium or transmitted over a transmission medium or communication link by a data signal carried in a carrier wave. A "machine-readable medium" may include any medium that can store or transmit information. Examples of machine-readable media include electronic circuits, semiconductor memory devices, ROM (Read-Only Memory, ROM, read-only memory), flash memory, erasable ROM (Erasable Read Only Memory, EROM), floppy disks , CD-ROM (Compact Disc Read-Only Memory, CD-ROM, CD-ROM), optical discs, hard disks, optical media, radio frequency (Radio Frequency, RF) links, and so on. The code snippets may be downloaded via a computer network such as the Internet, an intranet, or the like.
還需要說明的是,本創作中提及的示例性實施例,基於一系列的步驟或者裝置描述一些方法或系統。但是,本創作不局限於上述步驟的順序,也就是說,可以按照實施例中提及的循序執行步驟,也可以不同於實施例中的順序,或者若干步驟同時執行。 It should also be noted that, the exemplary embodiments mentioned in this creation describe some methods or systems based on a series of steps or devices. However, the present creation is not limited to the order of the above steps, that is, the steps may be performed in the order mentioned in the embodiment, or may be different from the order in the embodiment, or several steps may be performed simultaneously.
以上所述,僅為本創作的具體實施方式,所屬領域的技術人員可以清楚地瞭解到,為了描述的方便和簡潔,上述描述的系統、模組和單元的具體工作過程,可以參考前述方法實施例中的對應過程,在此不再贅述。應理解,本創作的保護範圍並不局限於此,任何熟悉本技術領域的技術人員在本創作揭露的技術範圍內,可輕易想到各種等效的修改或替換,這些修改或替換都應涵蓋在本創作的保護範圍之內。 The above are only specific implementations of the present creation. Those skilled in the art can clearly understand that, for the convenience and conciseness of the description, the specific working process of the above-described systems, modules and units can be implemented with reference to the aforementioned methods. The corresponding process in the example will not be repeated here. It should be understood that the protection scope of this creation is not limited to this, and any person skilled in the art can easily think of various equivalent modifications or replacements within the technical scope disclosed by this creation, and these modifications or replacements should be covered in within the scope of protection of this work.
340:回饋控制晶片 340: Feedback control chip
3401:協議通訊模組 3401: Protocol communication module
3402:輸出電壓和電流保護控制模組 3402: Output voltage and current protection control module
3403:Vo放電控制模組 3403: Vo Discharge Control Module
3404:UVLO/LDO放電模組 3404: UVLO/LDO discharge module
3405:數位/MCU微控制單元 3405: Digital/MCU Microcontroller Unit
3406:恒壓回饋環路控制模組 3406: Constant voltage feedback loop control module
3407:負載開關驅動模組 3407: Load switch driver module
DP/CC1、DN/CC2:協議通訊口 DP/CC1, DN/CC2: protocol communication port
Gate:負載開關驅動引腳 Gate: Load switch drive pin
GND:晶片基準地引腳 GND: chip reference ground pin
OPTO:光耦驅動引腳 OPTO: Optocoupler drive pin
Vo:輸出電壓引腳 Vo: output voltage pin
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