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TWI865319B - Microprocessor integrated circuit operating with low voltage and method for prolonging time of battery usage - Google Patents

Microprocessor integrated circuit operating with low voltage and method for prolonging time of battery usage Download PDF

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TWI865319B
TWI865319B TW113103244A TW113103244A TWI865319B TW I865319 B TWI865319 B TW I865319B TW 113103244 A TW113103244 A TW 113103244A TW 113103244 A TW113103244 A TW 113103244A TW I865319 B TWI865319 B TW I865319B
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transistor
source
drain
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voltage
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TW202530933A (en
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李柏誼
洪埜泰
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新唐科技股份有限公司
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Abstract

The embodiment of the present invention relates to a microprocessor integrated circuit operating with low voltage and a method for prolonging time of a battery usage. The microprocessor is operated by a cell battery, wherein the microprocessor IC includes a power pin, a common voltage pin, a voltage rising circuit and a microprocessor circuit. The power pin is coupled to the positive terminal of the cell battery, and the common voltage pin is coupled to the negative terminal of the cell battery. The voltage rising circuit is coupled to the power pin and the common voltage pin for generating an operational voltage according to the voltage between the power pin and the common voltage pin. The power input terminal of the microprocessor circuit is coupled to the output terminal of the voltage rising circuit to receive the operational voltage.

Description

低壓運作微處理器積體電路以及延長電池使用時間的方法 Method for operating microprocessor integrated circuit at low voltage and extending battery life

本發明涉及一種延長電池使用時間的技術,且特別是一種低壓運作微處理器系統以及延長電池使用時間的方法。 The present invention relates to a technology for extending the battery life, and in particular to a low-voltage microprocessor system and a method for extending the battery life.

目前許多產品仍在使用一次性電池,然而,電池容量有限,所以會希望電池應用的產品,能夠盡量的省電,以節省更換電池的次數。以兩顆1.5V乾電池串聯為例,全新的串聯電池電壓是3.1~3.2V,抽負載一段時間之後,電壓會降至2.8V以下,此時產品會因為電壓不足,使得運行不正常。一般工程上的除錯時,就會認為是電池電量不足。但是以實際面來看,或許是產品的功耗太高,所以在使用電池的產品領域之應用,都會希望往省電的方面發展。 Currently, many products still use disposable batteries. However, the battery capacity is limited, so it is hoped that the products using batteries can save power as much as possible to save the number of times the battery needs to be replaced. Take two 1.5V dry batteries in series as an example. The voltage of the new series battery is 3.1~3.2V. After a period of time, the voltage will drop below 2.8V. At this time, the product will not operate normally due to insufficient voltage. Generally, when debugging in engineering, it is considered that the battery power is insufficient. But in reality, it may be that the power consumption of the product is too high, so the application of products using batteries will be expected to develop in the direction of power saving.

微處理器的功耗除了有賴設計者去檢查或使用低功耗的元件,還有製程因素會影響,但是省電的設計,還需考慮功能是否能正常工作,所以我們會希望產品既省電而且功能又正常,可靠度又要高,這對產品開發者是挑戰。以目前微處理器的最低工作電壓,雖然已從2.5V下降至1.8V,但是以常用的1.5V乾電池或鹼性電池為例,還是必須串接兩個或三個,才能對微處理器進行供電。 The power consumption of a microprocessor depends not only on the designer to check or use low-power components, but also on process factors. However, power-saving design also needs to consider whether the function can work properly. Therefore, we hope that the product can save power and function normally, and have high reliability. This is a challenge for product developers. Although the current minimum operating voltage of the microprocessor has dropped from 2.5V to 1.8V, taking the commonly used 1.5V dry cell or alkaline battery as an example, two or three batteries must be connected in series to power the microprocessor.

本發明提供一種低壓運作微處理器系統以及延長電池使用時間的方法,用以減少浪費,延長電池使用時間。 The present invention provides a low-voltage operating microprocessor system and a method for extending battery life, so as to reduce waste and extend battery life.

本發明的實施例提供了一種低壓運作微處理器積體電路,用以使用一單一電池(a cell battery)運作,此低壓運作微處理器積體電路包括一電源腳位、一共接電壓腳位、一電壓提昇電路以及一微處理器電路。電源腳位耦接上述單一電池的正極。共接電壓腳位耦接上述單一電池的負極。電壓提昇電路耦接電源腳位以及共接電壓腳位,包括一輸出端,用以根據電源腳位以及共接電壓腳位之間的一電位差,產生一操作電壓,其中,上述操作電壓大於上述電位差。微處理器電路包括一電源輸入端,其中,上述微處理器電路的電源輸入端耦接電壓提昇電路的輸出端,接收上述操作電壓。 An embodiment of the present invention provides a low-voltage operation microprocessor integrated circuit for operation using a single battery (a cell battery), and the low-voltage operation microprocessor integrated circuit includes a power pin, a common voltage pin, a voltage boost circuit and a microprocessor circuit. The power pin is coupled to the positive electrode of the single battery. The common voltage pin is coupled to the negative electrode of the single battery. The voltage boost circuit is coupled to the power pin and the common voltage pin, and includes an output terminal for generating an operating voltage according to a potential difference between the power pin and the common voltage pin, wherein the operating voltage is greater than the potential difference. The microprocessor circuit includes a power input terminal, wherein the power input terminal of the microprocessor circuit is coupled to the output terminal of the voltage boosting circuit to receive the operating voltage.

本發明的另一實施例提供了一種延長電池使用時間的方法,此延長電池使用時間的方法包括:在一微處理器積體電路中,設置一電壓提昇電路,接收由電源腳位以及共接電壓腳位之間的電壓 差,以產生一操作電壓;在微處理器積體電路中,設置一微處理器電路,其中,微處理器電路接收上述操作電壓進行運作;使用一單一電池作為電源,耦接在電源腳位以及共接電壓腳位之間;以及利用上述電壓提昇電路,在上述單一電池電量低時,維持微處理器電路之運作,直到上述單一電池電量用盡。 Another embodiment of the present invention provides a method for extending the battery life, which includes: in a microprocessor integrated circuit, a voltage boosting circuit is provided to receive the voltage difference between the power pin and the common voltage pin to generate an operating voltage; in the microprocessor integrated circuit, a microprocessor circuit is provided, wherein the microprocessor circuit receives the operating voltage to operate; a single battery is used as a power source, coupled between the power pin and the common voltage pin; and the voltage boosting circuit is used to maintain the operation of the microprocessor circuit when the power of the single battery is low, until the power of the single battery is exhausted.

綜上所述,本發明之實施例在微處理器積體電路內部設置一電壓提昇電路,藉此,僅須一個單一1.5V規格的電池便可以進行運作。由於電壓提昇電路是主要提供內部運作電壓的電路,藉此,即便電池電壓已經掉落至1.2V,也就是極低電量,一般無法運行的情況,在此實施例仍可以繼續運作直到電量實質上完全耗盡。如此,可以減少資源浪費,延長電池使用的時間。 In summary, the embodiment of the present invention sets a voltage boosting circuit inside the microprocessor integrated circuit, so that only a single 1.5V battery is required for operation. Since the voltage boosting circuit is the circuit that mainly provides the internal operating voltage, even if the battery voltage has dropped to 1.2V, which is an extremely low power level and generally cannot be operated, in this embodiment, it can still continue to operate until the power is substantially completely consumed. In this way, resource waste can be reduced and the battery life can be extended.

為了進一步理解本發明的技術、手段和效果,可以參考以下詳細描述和附圖,從而可以徹底和具體地理解本發明的目的、特徵和概念。然而,以下詳細描述和附圖僅用於參考和說明本發明的實現方式,其並非用於限制本發明。 In order to further understand the technology, means and effects of the present invention, you can refer to the following detailed description and drawings, so that you can thoroughly and specifically understand the purpose, features and concepts of the present invention. However, the following detailed description and drawings are only used for reference and explanation of the implementation of the present invention, and are not used to limit the present invention.

101:電源腳位 101: Power pin

102:共接電壓腳位 102: Common voltage pin

103:電壓提昇電路 103: Voltage boost circuit

104:微處理器電路 104: Microprocessor circuit

110:電荷幫浦 110: Charge pump

P1、P2、P3:外接電容的腳位 P1, P2, P3: Pins for external capacitors

MCU_VDD:微處理器電路104所需要的操作電壓 MCU_VDD: The operating voltage required by the microprocessor circuit 104

M1、M2、M3、M4、M5:電晶體 M1, M2, M3, M4, M5: transistors

C1、C2、C3、C4、C5:電容 C1, C2, C3, C4, C5: capacitors

CLK:時脈訊號 CLK: clock signal

φ1:時脈 φ 1: Pulse

φ2:反相時脈 φ 2: Inverse phase clock

301:倍壓電路 301: Voltage doubler circuit

302:整流電路 302: Rectifier circuit

S401~S406:本發明一較佳實施例的延長電池使用時間的方法之流程步驟 S401~S406: Process steps of a method for extending battery life in a preferred embodiment of the present invention

提供的附圖用以使本發明所屬技術領域具有通常知識者可以進一步理解本發明,並且被併入與構成本發明之說明書的一部分。附圖示出了本發明的示範實施例,並且用以與本發明之說明書一起用於解釋本發明的原理。 The attached figures are provided to enable a person having ordinary knowledge in the technical field to which the present invention belongs to further understand the present invention, and are incorporated into and constitute a part of the specification of the present invention. The attached figures show exemplary embodiments of the present invention, and are used together with the specification of the present invention to explain the principles of the present invention.

圖1繪示為本發明一較佳實施例的低壓運作微處理器積體電路之電路方塊圖。 FIG1 shows a circuit block diagram of a low-voltage operating microprocessor integrated circuit of a preferred embodiment of the present invention.

圖2繪示為本發明一較佳實施例的電荷幫浦110之電路圖。 FIG2 shows a circuit diagram of a charge pump 110 of a preferred embodiment of the present invention.

圖3繪示為本發明一較佳實施例的電荷幫浦110之電路圖。 FIG3 shows a circuit diagram of a charge pump 110 of a preferred embodiment of the present invention.

圖4繪示為本發明一較佳實施例的延長電池使用時間的方法之流程圖。 FIG4 is a flow chart showing a method for extending battery life according to a preferred embodiment of the present invention.

現在將詳細參考本發明的示範實施例,其示範實施例會在附圖中被繪示出。在可能的情況下,在附圖和說明書中使用相同的元件符號來指代相同或相似的部件。另外,示範實施例的做法僅是本發明之設計概念的實現方式之一,下述的該等示範皆非用於限定本發明。 Reference will now be made in detail to the exemplary embodiments of the present invention, which are illustrated in the accompanying drawings. Where possible, the same element symbols are used in the accompanying drawings and the specification to refer to the same or similar components. In addition, the exemplary embodiments are only one of the ways to implement the design concept of the present invention, and the following examples are not intended to limit the present invention.

圖1繪示為本發明一較佳實施例的低壓運作微處理器積體電路之電路方塊圖。請參考圖1,此低壓運作微處理器積體電路包括一電源腳位101、一共接電壓腳位102、一電壓提昇電路103以及一微處理器電路104。由於本案採用低壓運作,故在此實施例還繪示了一個單一電池(a cell battery)100,此實施例中的單一電池例如是1.5V規格的乾電池或鋰電池。另外,此低壓運作微處理器積體 電路除了電源腳位101與共接電壓腳位102外,還包括了外接電容的腳位P1~P3。此部份容後詳述。 FIG1 is a circuit block diagram of a low voltage operation microprocessor integrated circuit of a preferred embodiment of the present invention. Referring to FIG1, the low voltage operation microprocessor integrated circuit includes a power pin 101, a voltage common pin 102, a voltage boost circuit 103 and a microprocessor circuit 104. Since the present case adopts low voltage operation, a single battery (a cell battery) 100 is also shown in this embodiment. The single battery in this embodiment is, for example, a 1.5V dry cell or a lithium battery. In addition, this low-voltage microprocessor integrated circuit includes pins P1~P3 for external capacitors in addition to the power pin 101 and the common voltage pin 102. This part will be described in detail later.

電源腳位101耦接上述單一電池100的正極。共接電壓腳位102耦接上述單一電池100的負極。電壓提昇電路103耦接電源腳位101以及共接電壓腳位102,用以根據電源腳位101以及共接電壓腳位102之間的1.5V電位差,將其進行電壓提昇,進一步產生微處理器電路104所需要的操作電壓MCU_VDD,並輸入至微處理器電路104的電源輸入端。 The power pin 101 is coupled to the positive electrode of the single battery 100. The common voltage pin 102 is coupled to the negative electrode of the single battery 100. The voltage boosting circuit 103 is coupled to the power pin 101 and the common voltage pin 102 to boost the voltage according to the 1.5V potential difference between the power pin 101 and the common voltage pin 102, and further generate the operating voltage MCU_VDD required by the microprocessor circuit 104, and input it to the power input terminal of the microprocessor circuit 104.

由於目前微處理器電路104的最低工作電壓,雖然以低壓製程可以降低至1.8V,但是以1.5V電池仍不足以讓微處理器電路104運作。且上述單一電池100會隨著使用,電量下降,輸出電壓也會隨著下降。故在此實施例,電壓提昇電路103例如是採用極低電壓的bPOR(備用系統啟動重置電路)、bLDO(備用系統低壓差線性穩壓電路)、bOSC(備用系統時脈產生電路)以及電荷幫浦110實施。 Since the current minimum operating voltage of the microprocessor circuit 104 can be reduced to 1.8V with a low-voltage process, a 1.5V battery is still not enough for the microprocessor circuit 104 to operate. Moreover, the power of the single battery 100 mentioned above will decrease with use, and the output voltage will also decrease. Therefore, in this embodiment, the voltage boosting circuit 103 is implemented by, for example, an extremely low voltage bPOR (backup system startup reset circuit), bLDO (backup system low voltage differential linear regulator circuit), bOSC (backup system clock generation circuit) and a charge pump 110.

另外,由於此電荷幫浦110是用來供應微處理器電路104所需運作的操作電壓MCU_VDD,故有驅動力以及穩壓需求,考量應用上會有瞬間抽電或負載變化,故電容採用外接電容的腳位P1~P3,將電容耦接在外部。 In addition, since the charge pump 110 is used to supply the operating voltage MCU_VDD required for the microprocessor circuit 104 to operate, it has driving force and voltage regulation requirements. Considering that there will be instantaneous power withdrawal or load changes in the application, the capacitor uses the pins P1~P3 of the external capacitor to couple the capacitor to the outside.

圖2繪示為本發明一較佳實施例的電荷幫浦110之電路圖。請參考圖2,在此實施例中,電荷幫浦110包括一第一電晶體M1、一第一電容C1、一第二電晶體M2以及一第二電容C2。第一電 晶體M1的閘極以及第一電晶體M1的第一源汲極耦接電源腳位101。第二電晶體M2的閘極以及第二電晶體M2的第一源汲極耦接第一電晶體M1的第二源汲極,第二電晶體M2的第二源汲極輸出微處理器電路104所需要的操作電壓MCU_VDD。第一電容C1的第一端耦接第一電晶體M1的第二源汲極,第一電容C1的第二端接收時脈訊號CLK。第二電容C2的第一端耦接第二電晶體M2的第二源汲極,第二電容C2的第二端耦接共接電壓腳位102。 FIG2 is a circuit diagram of a charge pump 110 of a preferred embodiment of the present invention. Referring to FIG2, in this embodiment, the charge pump 110 includes a first transistor M1, a first capacitor C1, a second transistor M2, and a second capacitor C2. The gate of the first transistor M1 and the first source-drain of the first transistor M1 are coupled to the power pin 101. The gate of the second transistor M2 and the first source-drain of the second transistor M2 are coupled to the second source-drain of the first transistor M1, and the second source-drain of the second transistor M2 outputs the operating voltage MCU_VDD required by the microprocessor circuit 104. The first end of the first capacitor C1 is coupled to the second source-drain of the first transistor M1, and the second end of the first capacitor C1 receives the clock signal CLK. The first end of the second capacitor C2 is coupled to the second source drain of the second transistor M2, and the second end of the second capacitor C2 is coupled to the common voltage pin 102.

上述實施例是以單一相位兩倍電壓作為舉例。電池電量只要高於1.0V,上述備用系統啟動重置電路bPOR便致能備用系統低壓差線性穩壓電路bLDO,備用系統低壓差線性穩壓電路bLDO再供電給備用系統時脈產生電路bOSC,備用系統時脈產生電路bOSC再提供時脈給電荷幫浦110的第一電容C1,使電池的輸入電壓(1.0V~1.5V),抬升至2倍,再輸出供應操作電壓MCU_VDD給微處理器電路104。 The above embodiment takes a single phase double voltage as an example. As long as the battery power is higher than 1.0V, the above standby system startup reset circuit bPOR enables the standby system low voltage difference linear voltage regulator circuit bLDO, and the standby system low voltage difference linear voltage regulator circuit bLDO then supplies power to the standby system clock generation circuit bOSC, and the standby system clock generation circuit bOSC then provides a clock to the first capacitor C1 of the charge pump 110, so that the battery input voltage (1.0V~1.5V) is raised to 2 times, and then outputs the supply operating voltage MCU_VDD to the microprocessor circuit 104.

圖3繪示為本發明一較佳實施例的電荷幫浦110之電路圖。請參考圖3,在此實施例中,電荷幫浦110是以五倍壓的電路實施。此電荷幫浦110包括電晶體M1~M5以及電容C1~C5。依照電路功能區分,可以被分成倍壓電路301以及整流電路302。在此實施例同樣是每個電晶體M1~M5是以二極體連接的方式,並且串接實施,且每個電晶體M1~M5主要是構成單向導通電路。另外,電容C1、C3的一端接收時脈φ1,電容C2、C4的一端接收時脈φ1的反相時脈φ2。另外,電晶體M5與電容C5作為整流電路302。 FIG3 is a circuit diagram of a charge pump 110 of a preferred embodiment of the present invention. Referring to FIG3 , in this embodiment, the charge pump 110 is implemented as a five-fold voltage circuit. The charge pump 110 includes transistors M1 to M5 and capacitors C1 to C5. According to the circuit function, it can be divided into a voltage doubler circuit 301 and a rectifier circuit 302. In this embodiment, each transistor M1 to M5 is also connected in series in a diode manner, and each transistor M1 to M5 mainly constitutes a unidirectional conduction circuit. In addition, one end of the capacitors C1 and C3 receives the clock pulse φ 1 , and one end of the capacitors C2 and C4 receives the inverted clock pulse φ 2 of the clock pulse φ 1 . In addition, transistor M5 and capacitor C5 serve as a rectifier circuit 302 .

以往的技術來說,除了需要堆疊兩個單一電池才能操作外,乾電池的電量剩餘1~2成時,就必須更換電池,不夠環保,浪費能源。藉由上述實施例,微處理器積體電路可以應用在更低的電壓,且電池的剩餘電量(大約10~20%),皆可以被提取出來使用,藉此達到產品省電與延長電池使用時間的效果。另外,由於電荷幫浦110整合進微處理器積體電路,節省了成本,又可以降低微處理器積體電路的實際工作電壓,使得應用更廣。 In the past, in addition to the need to stack two single batteries for operation, the battery must be replaced when the remaining power of the dry battery is 10% to 20%, which is not environmentally friendly and wastes energy. Through the above embodiment, the microprocessor integrated circuit can be applied to a lower voltage, and the remaining power of the battery (about 10% to 20%) can be extracted and used, thereby achieving the effect of saving power and extending the battery life of the product. In addition, since the charge pump 110 is integrated into the microprocessor integrated circuit, the cost is saved, and the actual working voltage of the microprocessor integrated circuit can be reduced, making it more widely used.

微處理器積體電路設計雖然有POR(power on reset)/BOD(brown out detection)/LVR(low voltage release)做為掉電保護,但是有時為了省電,會關閉或進省電模式,且微處理器積體電路一般會內建快閃記憶體,因為快閃記憶體必須工作在特定電壓以上,才能保證讀取正確性。若電壓低於操作電壓以下,此時若POR/BOD/LVR皆關閉或進省電模式導致來不及發出復位信號,使得快閃記憶體無法繼續工作,有可能會使得微處理器電路擷取(fetch)到錯誤的碼(code),導致不可預期的情形發生。 Although the microprocessor integrated circuit design has POR (power on reset)/BOD (brown out detection)/LVR (low voltage release) as power-off protection, it is sometimes turned off or enters power saving mode to save power. Microprocessor integrated circuits generally have built-in flash memory, because flash memory must work above a specific voltage to ensure correct reading. If the voltage is lower than the operating voltage, if POR/BOD/LVR are all turned off or enter power saving mode, it will not be possible to send a reset signal in time, making the flash memory unable to continue working. It is possible that the microprocessor circuit will fetch an erroneous code, resulting in unexpected situations.

在此實施例中,可避開快閃記憶體無法工作的電壓區域,即使關閉POR/BOD/LVR或進省電模式,因為電荷幫浦110可以把工作電壓MCU_VDD電壓往上抬,即快閃記憶體可以工作在特定電壓以上,不會使得微處理器電路擷取(fetch)到錯誤的碼(code),導致不可預期的情形發生。上述實施例提出了兩倍壓與五倍壓的電荷幫浦110電路,所屬技術領域具有通常知識者應當可以推知,並根據不同應用採用其他倍壓電路,在此不予贅述。 In this embodiment, the voltage region where the flash memory cannot work can be avoided, even if POR/BOD/LVR is turned off or in power saving mode, because the charge pump 110 can raise the working voltage MCU_VDD voltage, that is, the flash memory can work above a specific voltage, and will not cause the microprocessor circuit to fetch an erroneous code, resulting in unexpected situations. The above embodiment proposes a charge pump 110 circuit with a double voltage and a five-fold voltage. Those with ordinary knowledge in the relevant technical field should be able to infer and adopt other voltage-doubling circuits according to different applications, which will not be elaborated here.

由上述實施例,可以歸納成一個延長電池使用時間的方法,圖4繪示為本發明一較佳實施例的延長電池使用時間的方法之流程圖。請參考圖4,此延長電池使用時間的方法包括下列步驟: The above embodiments can be summarized into a method for extending the battery life. FIG4 is a flow chart of a method for extending the battery life of a preferred embodiment of the present invention. Referring to FIG4, the method for extending the battery life includes the following steps:

步驟S401:開始。 Step S401: Start.

步驟S402:在微處理器積體電路中,設置一電壓提昇電路,接收由電源腳位以及共接電壓腳位之間的電壓差,以產生一操作電壓。如上述實施例的方式產生操作電壓MCU_VDD。 Step S402: In the microprocessor integrated circuit, a voltage boost circuit is set to receive the voltage difference between the power pin and the common voltage pin to generate an operating voltage. The operating voltage MCU_VDD is generated in the manner of the above-mentioned embodiment.

步驟S403:在微處理器積體電路中,設置一微處理器電路,其中,該微處理器電路接收操作電壓進行運作。 Step S403: In the microprocessor integrated circuit, a microprocessor circuit is set, wherein the microprocessor circuit receives an operating voltage to operate.

步驟S404:使用單一電池作為電源,耦接在電源腳位以及共接電壓腳位之間。 Step S404: Use a single battery as a power source, coupled between the power pin and the common voltage pin.

步驟S405:利用該電壓提昇電路,在該單一電池電量低時,維持該微處理器電路之運作,直到單一電池電量用盡。 Step S405: Utilize the voltage boost circuit to maintain the operation of the microprocessor circuit when the power of the single battery is low, until the power of the single battery is exhausted.

步驟S406:結束。 Step S406: End.

綜合以上所述,本發明之實施例在微處理器積體電路內部設置一電壓提昇電路,藉此,僅須一個單一1.5V規格的電池便可以進行運作。由於電壓提昇電路是主要提供內部運作電壓的電路,藉此,即便電池電壓已經掉落至0.9V,也就是極低電量,一般無法運行的情況,在此實施例仍可以繼續運作直到電量實質上完全耗盡。如此,可以減少資源浪費,延長電池使用的時間。 In summary, the embodiment of the present invention sets a voltage boosting circuit inside the microprocessor integrated circuit, so that only a single 1.5V battery is required for operation. Since the voltage boosting circuit is the circuit that mainly provides the internal operating voltage, even if the battery voltage has dropped to 0.9V, which is an extremely low power level and generally cannot be operated, in this embodiment, it can continue to operate until the power is substantially completely consumed. In this way, resource waste can be reduced and the battery life can be extended.

應當理解,本文描述的示例和實施例僅用於說明目的,並且鑑於其的各種修改或改變將被建議給本領域技術人員,並且將被包括在本申請的精神和範圍以及所附權利要求的範圍之內。 It should be understood that the examples and embodiments described herein are for illustrative purposes only, and that various modifications or changes thereto will be suggested to those skilled in the art and are to be included within the spirit and scope of the present application and the scope of the appended claims.

S401~S406:本發明一較佳實施例的延長電池使用時間的方法之流程步驟 S401~S406: Process steps of a method for extending battery life in a preferred embodiment of the present invention

Claims (7)

一種低壓運作微處理器積體電路,用以使用一單一電池(a cell battery)運作,此低壓運作微處理器積體電路包括:一電源腳位,耦接該單一電池的正極;一共接電壓腳位,耦接該單一電池的負極;一電壓提昇電路,耦接該電源腳位以及該共接電壓腳位,包括一輸出端,用以根據該電源腳位以及該共接電壓腳位之間的一電位差,產生一操作電壓,其中,該操作電壓大於該電位差;以及一微處理器電路,包括一電源輸入端,其中,該微處理器電路的電源輸入端耦接該電壓提昇電路的輸出端,接收該操作電壓;其中,該電壓提昇電路包括:一時脈產生電路,用以輸出一時脈訊號;以及一電荷幫浦,包括一輸入端、一時脈輸入端以及一輸出端,其中,該電荷幫浦的輸入端接收該電位差,該電荷幫浦的時脈輸入端接收該時脈訊號,該電荷幫浦的輸出端輸出該操作電壓。 A low-voltage operation microprocessor integrated circuit is used to operate using a single battery (a cell battery). The low-voltage operation microprocessor integrated circuit includes: a power pin coupled to the positive electrode of the single battery; a common voltage pin coupled to the negative electrode of the single battery; a voltage boost circuit coupled to the power pin and the common voltage pin, including an output terminal for generating an operating voltage according to a potential difference between the power pin and the common voltage pin, wherein the operating voltage is greater than the potential difference; and a microprocessor circuit including a voltage boost circuit. A power input terminal, wherein the power input terminal of the microprocessor circuit is coupled to the output terminal of the voltage boosting circuit to receive the operating voltage; wherein the voltage boosting circuit includes: a clock generating circuit for outputting a clock signal; and a charge pump, including an input terminal, a clock input terminal and an output terminal, wherein the input terminal of the charge pump receives the potential difference, the clock input terminal of the charge pump receives the clock signal, and the output terminal of the charge pump outputs the operating voltage. 根據請求項1所述之低壓運作微處理器積體電路,其中,該電荷幫浦包括:一第一電晶體,包括一閘極、一第一源汲極以及一第二源汲極,其中,該第一電晶體的閘極以及該第一電晶體的第一源汲極耦接該電源腳位; 一第一電容,包括一第一端以及一第二端,其中,該第一電容的第一端耦接該第一電晶體的第二源汲極,該第一電容的第二端接收該時脈訊號;一第二電晶體,包括一閘極、一第一源汲極以及一第二源汲極,其中,該第二電晶體的閘極以及該第二電晶體的第一源汲極耦接該第一電晶體的第二源汲極,該第二電晶體的第二源汲極耦接該電荷幫浦的輸出端;以及一第二電容,包括一第一端以及一第二端,其中,該第二電容的第一端耦接該第二電晶體的第二源汲極,該第二電容的第二端耦接該共接電壓腳位。 According to the low voltage operation microprocessor integrated circuit described in claim 1, the charge pump includes: a first transistor, including a gate, a first source-drain and a second source-drain, wherein the gate of the first transistor and the first source-drain of the first transistor are coupled to the power pin; a first capacitor, including a first end and a second end, wherein the first end of the first capacitor is coupled to the second source-drain of the first transistor, and the second end of the first capacitor receives the clock signal; A second transistor, including a gate, a first source-drain and a second source-drain, wherein the gate of the second transistor and the first source-drain of the second transistor are coupled to the second source-drain of the first transistor, and the second source-drain of the second transistor is coupled to the output end of the charge pump; and a second capacitor, including a first end and a second end, wherein the first end of the second capacitor is coupled to the second source-drain of the second transistor, and the second end of the second capacitor is coupled to the common voltage pin. 根據請求項1所述之低壓運作微處理器積體電路,其中,該電荷幫浦包括:N個單向導通電路,包括一第一端以及一第二端,其中,第K個單向導通電路的第二端耦接第K+1個單向導通電路的第一端,第一個單向導通電路的第一端耦接該電源腳位;N個電容,包括一第一端以及一第二端,其中,第K個電容的第一端耦接第K個單向導通電路的第二端,第2Q+1個電容的第二端接收該時脈訊號,第2Q+2個電容的第二端接收該時脈訊號的一反相訊號;以及 一整流電路,包括一輸入端以及一輸出端,其中,該整流電路的輸入端耦接第N個單向導通電路的第二端,該整流電路的輸出端輸出該操作電壓,其中,N、K、Q為自然數,其中,0<K<N,0
Figure 113103244-A0305-02-0015-1
Q<N/2。
According to the low voltage operation microprocessor integrated circuit described in claim 1, the charge pump includes: N unidirectional conductive circuits, including a first end and a second end, wherein the second end of the Kth unidirectional conductive circuit is coupled to the first end of the K+1th unidirectional conductive circuit, and the first end of the first unidirectional conductive circuit is coupled to the power pin; N capacitors, including a first end and a second end, wherein the first end of the Kth capacitor is coupled to the K+1th The second end of the unidirectional conductive circuit, the second end of the 2Q+1 capacitor receives the clock signal, and the second end of the 2Q+2 capacitor receives an inverted signal of the clock signal; and a rectifier circuit, including an input end and an output end, wherein the input end of the rectifier circuit is coupled to the second end of the Nth unidirectional conductive circuit, and the output end of the rectifier circuit outputs the operating voltage, wherein N, K, and Q are natural numbers, wherein 0<K<N, 0<K<N, 0<K<N, 0<K<N, 0<K<N, 0<K<N, 0<K<N, 0<K<N, 0<K<N, 0<K<N, 0<K<N, 0<K<N, 0<K<N, 0<K<N, 0<K<N, 0<K<N, 0<K<N, 0<
Figure 113103244-A0305-02-0015-1
Q<N/2.
根據請求項3所述之低壓運作微處理器積體電路,其中,每一該些單向導通電路包括:一電晶體,包括一閘極、一第一源汲極以及一第二源汲極,其中,該電晶體的閘極以及該電晶體的第一源汲極為每一該些單向導通電路的第一端,該電晶體的第二源汲極為每一該些單向導通電路的第二端。 According to the low voltage operation microprocessor integrated circuit described in claim 3, each of the unidirectional conduction circuits includes: a transistor including a gate, a first source drain and a second source drain, wherein the gate of the transistor and the first source drain of the transistor are the first end of each of the unidirectional conduction circuits, and the second source drain of the transistor is the second end of each of the unidirectional conduction circuits. 根據請求項3所述之低壓運作微處理器積體電路,其中,該整流電路包括:一整流電晶體,包括一閘極、一第一源汲極以及一第二源汲極,其中,該整流電晶體的閘極以及該整流電晶體的第一源汲極耦接該第N個單向導通電路的第二端,該整流電晶體的第二源汲極耦接該電荷幫浦的輸出端;以及一整流電容,包括一第一端以及一第二端,其中,該整流電容的第一端耦接該整流電晶體的第二源汲極,該整流電容的第二端耦接該共接電壓腳位。 According to the low-voltage operation microprocessor integrated circuit described in claim 3, the rectifier circuit includes: a rectifier transistor including a gate, a first source-drain and a second source-drain, wherein the gate of the rectifier transistor and the first source-drain of the rectifier transistor are coupled to the second end of the Nth unidirectional conduction circuit, and the second source-drain of the rectifier transistor is coupled to the output end of the charge pump; and a rectifier capacitor including a first end and a second end, wherein the first end of the rectifier capacitor is coupled to the second source-drain of the rectifier transistor, and the second end of the rectifier capacitor is coupled to the common voltage pin. 一種延長電池使用時間的方法,包括: 在一微處理器積體電路中,設置一電壓提昇電路,接收由電源腳位以及共接電壓腳位之間的電壓差,以產生一操作電壓;在該微處理器積體電路中,設置一微處理器電路,其中,該微處理器電路接收該操作電壓進行運作;使用一單一電池作為電源,耦接在電源腳位以及共接電壓腳位之間;以及利用該電壓提昇電路,在該單一電池電量低時,維持該微處理器電路之運作,直到該單一電池電量用盡;其中,該電壓提昇電路包括:一時脈產生電路,用以輸出一時脈訊號;以及一電荷幫浦,包括一輸入端、一時脈輸入端以及一輸出端,其中,該電荷幫浦的輸入端接收該電位差,該電荷幫浦的時脈輸入端接收該時脈訊號,該電荷幫浦的輸出端輸出該操作電壓。 A method for extending battery life includes: In a microprocessor integrated circuit, a voltage boost circuit is provided to receive a voltage difference between a power pin and a common voltage pin to generate an operating voltage; in the microprocessor integrated circuit, a microprocessor circuit is provided, wherein the microprocessor circuit receives the operating voltage to operate; a single battery is used as a power source, coupled between the power pin and the common voltage pin; and the voltage boost circuit is used to generate an operating voltage. The circuit maintains the operation of the microprocessor circuit when the power of the single battery is low until the power of the single battery is exhausted; wherein the voltage boosting circuit includes: a clock generating circuit for outputting a clock signal; and a charge pump including an input terminal, a clock input terminal and an output terminal, wherein the input terminal of the charge pump receives the potential difference, the clock input terminal of the charge pump receives the clock signal, and the output terminal of the charge pump outputs the operating voltage. 根據請求項6所述之延長電池使用時間的方法,其中,該電荷幫浦包括:一第一電晶體,包括一閘極、一第一源汲極以及一第二源汲極,其中,該第一電晶體的閘極以及該第一電晶體的第一源汲極耦接該電源腳位; 一第一電容,包括一第一端以及一第二端,其中,該第一電容的第一端耦接該第一電晶體的第二源汲極,該第一電容的第二端接收該時脈訊號;一第二電晶體,包括一閘極、一第一源汲極以及一第二源汲極,其中,該第二電晶體的閘極以及該第二電晶體的第一源汲極耦接該第一電晶體的第二源汲極,該第二電晶體的第二源汲極耦接該電荷幫浦的輸出端;以及一第二電容,包括一第一端以及一第二端,其中,該第二電容的第一端耦接該第二電晶體的第二源汲極,該第二電容的第二端耦接該共接電壓腳位。 According to the method for extending the battery life described in claim 6, the charge pump comprises: a first transistor, comprising a gate, a first source-drain and a second source-drain, wherein the gate of the first transistor and the first source-drain of the first transistor are coupled to the power pin; a first capacitor, comprising a first end and a second end, wherein the first end of the first capacitor is coupled to the second source-drain of the first transistor, and the second end of the first capacitor receives the clock signal; A second transistor, including a gate, a first source-drain and a second source-drain, wherein the gate of the second transistor and the first source-drain of the second transistor are coupled to the second source-drain of the first transistor, and the second source-drain of the second transistor is coupled to the output end of the charge pump; and a second capacitor, including a first end and a second end, wherein the first end of the second capacitor is coupled to the second source-drain of the second transistor, and the second end of the second capacitor is coupled to the common voltage pin.
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TW202112058A (en) * 2019-08-16 2021-03-16 英商思睿邏輯國際半導體股份有限公司 Voltage control
CN113495605A (en) * 2020-04-06 2021-10-12 硅实验室股份有限公司 Power saving power architecture for integrated circuits
CN113760071A (en) * 2020-06-02 2021-12-07 晶豪科技股份有限公司 Method, controller and system for running memory system in advance during power-on period
TW202308334A (en) * 2021-06-28 2023-02-16 美商天工方案公司 Radio frequency switch control circuitry

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