TWI860288B - Wiring board and manufacturing method thereof - Google Patents

Abstract

The manufacturing method of the wiring substrate comprises: a wiring forming step, which is to form a wiring pattern on one side of the first insulating layer in the thickness direction; an electro-deposition step, which is to cover the wiring pattern with a second insulating layer by electro-deposition; and a magnetic layer configuration step, which is to configure the magnetic layer on one side of the first insulating layer and the second insulating layer in the thickness direction.

Description

Wiring board and manufacturing method thereof

The present invention relates to a wiring board and a manufacturing method thereof.

Inductors are known to be mounted on electronic devices and used as passive components such as voltage conversion components.

For example, a flexible inductor is proposed in which anisotropic composite magnetic sheets formed by dispersing flat or needle-shaped soft magnetic metal powder in a resin material are layered on the upper surface and/or lower surface of a coil (for example, refer to Patent Document 1). [Prior Art Document] [Patent Document]

Patent document 1: Japanese Patent Publication No. 2009-9985

[The problem the invention is trying to solve]

However, in the inductor of Patent Document 1, the anisotropic composite magnetic sheet is in direct contact with the coil, which may cause a disadvantage that adjacent wiring portions constituting the coil in the plane direction are short-circuited via a plurality of soft magnetic metal powders in the anisotropic composite magnetic sheet.

Therefore, a method of preventing the wiring portion from directly contacting the anisotropic composite magnetic sheet by covering the wiring portion with an insulating cover film has been studied. Specifically, the following method can be cited: the wiring portion 52 is arranged on the upper surface of the base insulating layer 51, then the wiring portion 52 is covered with a cover film 53, and finally the magnetic sheet 54 is arranged from the upper side of the cover film 53 (see FIG. 15).

However, in this method, the cover film 53 is disposed between adjacent wiring portions 52 so that the wiring portions 52 are continuous. Therefore, between adjacent wiring portions 52, there is a portion 55 where the soft magnetic metal powder is not disposed in the thickness direction (vertical direction). As a result, the inductance decreases.

The present invention provides a wiring substrate and a manufacturing method thereof that can suppress short circuits between wiring parts and has good inductance. [Technical means for solving the problem]

The present invention [1] includes a method for manufacturing a wiring substrate, which comprises: a wiring formation step, which is to form a wiring pattern on one side of a first insulating layer in a thickness direction; an electroplating step, which is to cover the wiring pattern with a second insulating layer by electroplating; and a magnetic layer configuration step, which is to configure a magnetic layer on one side of the first insulating layer and the second insulating layer in a thickness direction.

In the manufacturing method of the wiring board, since the second insulating layer is coated on the wiring pattern by electro-deposition, it is possible to suppress the wiring pattern from directly contacting the magnetic layer. Therefore, it is possible to suppress the short circuit of the wiring pattern.

Furthermore, in the manufacturing method of the wiring board, since the second insulating layer is coated on the wiring pattern by electro-deposition, the second insulating layer can be coated on the wiring pattern in such a manner that each of the plurality of wiring sections constituting the wiring pattern is not continuous between adjacent wiring sections. Therefore, the magnetic layer can be arranged throughout the thickness direction between the wiring patterns (i.e., between adjacent wiring sections). Therefore, the inductance of the wiring board can be improved.

Furthermore, in the manufacturing method of the wiring board, since the second insulating layer is coated on the wiring pattern by electro-deposition, the second insulating layer can be coated on the surface of the wiring pattern thinly, uniformly and reliably. Therefore, the distance between the magnetic layer and the wiring pattern can be shortened. Therefore, the inductance of the wiring board can be improved.

The present invention [2] includes a method for manufacturing a wiring substrate as described in [1], wherein the wiring forming step is a step of forming the wiring pattern by a subtractive method.

In the manufacturing method of the wiring board, a wiring pattern can be formed by a subtractive method, so the wiring board can be manufactured in a shorter time than the additive method. In addition, a wiring board with thicker wiring can be manufactured, and a large current can flow.

The present invention [3] includes a method for manufacturing a wiring board as described in [1] or [2], wherein the above-mentioned electroplating step includes a step of supplying electricity to the above-mentioned wiring pattern through a through hole in the above-mentioned first insulating layer that overlaps with the above-mentioned wiring pattern when projected along the thickness direction.

In the manufacturing method of the wiring board, power is supplied to the wiring pattern from the other side in the thickness direction through the through hole of the first insulating layer, so that the second insulating layer can cover the entire surface of the wiring pattern in the thickness direction and the side surface. Therefore, it is possible to more reliably suppress the wiring pattern from contacting the magnetic layer.

The present invention [4] includes a method for manufacturing a wiring board as described in [3], wherein the first insulating layer has a positioning portion for forming the wiring pattern on one side of the through hole in the thickness direction.

In the manufacturing method of the wiring board, since the first insulating layer has a positioning portion, the wiring pattern can be accurately formed on one side of the through hole in the thickness direction using the positioning portion as a mark. Therefore, the wiring pattern can be more reliably covered with the second insulating layer by supplying power from the through hole.

The present invention [5] includes a method for manufacturing a wiring board as described in any one of [1] to [4], wherein the wiring pattern comprises copper wiring.

In the manufacturing method of the wiring substrate, since the wiring pattern is copper wiring, a wiring substrate with good conductivity and patterning properties can be manufactured.

The present invention [6] includes a wiring substrate comprising: a first insulating layer; a plurality of wiring portions, which are arranged at intervals from each other in a specific direction on one side of the thickness direction of the first insulating layer; a second insulating layer, which covers each of the plurality of wiring portions so that the wiring portions adjacent to each other in the specific direction are discontinuous; and a magnetic layer, which is arranged on one side of the thickness direction of the first insulating layer and the second insulating layer in a manner to cover one surface of the thickness direction of the first insulating layer.

In this wiring substrate, since the second insulating layer covering a plurality of wiring portions is provided, it is possible to suppress the wiring portions from contacting with the magnetic layer, and to suppress short circuits between the wiring portions. In addition, the second insulating layer covers the plurality of wiring portions in a manner that is discontinuous between the wiring portions in a specific direction, and the magnetic layer is arranged on one surface of the first insulating layer in the thickness direction, so that the magnetic layer is arranged between the wiring portions in the specific direction and throughout the thickness direction. Therefore, the inductance of the wiring substrate can be improved.

The present invention [7] includes a wiring substrate as described in [6], wherein the plurality of wiring portions are arranged on one side in the thickness direction of the common first insulating layer, and the second insulating layer covers one surface and side surfaces in the thickness direction of the plurality of wiring portions.

In the wiring substrate, since the plurality of wiring portions are arranged on a common first insulating layer, the plurality of wiring portions are positioned with good accuracy in the thickness direction and are reliably supported by the first insulating layer.

The present invention [8] includes a wiring substrate as described in [6] or [7], wherein the first insulating layer has a through hole that overlaps with the wiring portion when projected along the thickness direction.

In this wiring substrate, since the wiring portion is supplied with electricity through the through hole of the first insulating layer, the second insulating layer can cover the entire surface of the wiring portion in the thickness direction and the side surface. Therefore, it is possible to more reliably suppress the wiring portion from contacting the magnetic layer.

The present invention [9] includes the wiring substrate as described in any one of [6] to [8], wherein the thickness of the first insulating layer is not less than 0.5 μm and not more than 10 μm.

In the wiring substrate, since the thickness of the first insulating layer is within a specific range, it is possible to maintain the mechanical strength of the inductor while achieving thinner wiring substrate. [Effect of the invention]

The manufacturing method of the wiring substrate of the present invention can suppress short circuit and manufacture a wiring substrate with good inductance.

The wiring substrate of the present invention can suppress short circuits and has good inductance.

In Figure 1, the up-down direction of the paper is the front-back direction (the first direction), and the lower side of the paper is the front side (one side of the first direction), and the upper side of the paper is the back side (the other side of the first direction). The left-right direction of the paper is the left-right direction (the second direction orthogonal to the first direction), and the left side of the paper is the left side (one side of the second direction), and the right side of the paper is the right side (the other side of the second direction). The thickness direction of the paper is the up-down direction (thickness direction, the third direction orthogonal to the first and second directions), the front side of the paper is the upper side (one side of the thickness direction, one side of the third direction), and the inside of the paper is the lower side (the other side of the thickness direction, the other side of the third direction). Specifically, according to the direction arrows in each figure.

<First embodiment> As an example of a method for manufacturing a wiring board of the present invention, a first embodiment of a method for manufacturing an inductor 1 will be described with reference to FIGS. 1 to 7 .

The first embodiment of the method for manufacturing the inductor 1 is the method for manufacturing the inductor 1 shown in FIG. 1 to FIG. 2B, and sequentially comprises a metal sheet preparation step, a base insulating layer arrangement step, a conductor layer arrangement step, a wiring formation step, an electro-deposition step, a first magnetic layer arrangement step, a conductor layer removal step, and a second magnetic layer arrangement step. Each step is described in detail below.

(Metal sheet preparation step) In the metal sheet preparation step, as shown in FIG. 3A and FIG. 5A, a metal sheet 10 is prepared.

The metal sheet 10 is a member of the wiring pattern 3 described below through the wiring forming step. That is, the metal sheet 10 is a raw material of the wiring pattern 3. The metal sheet 10 has a sheet shape extending in the front-rear direction and the left-right direction.

As the material of the metal sheet 10, for example, copper, silver, gold, nickel or alloys thereof can be listed. As the material of the metal sheet 10, copper can be preferably listed. In this way, the inductor 1 with good conductivity and patternability can be manufactured.

The thickness of the metal sheet 10 is, for example, 25 μm or more, preferably 50 μm or more, and, for example, 300 μm or less, preferably 150 μm or less. Thus, the inductor 1 that flows a large current can be manufactured.

Furthermore, the metal sheet 10 can also be prepared as a two-layer substrate (such as the conductive sheet laminate 40 described below) together with the base insulating layer 2 to be described below as shown by the phantom line.

(Base insulation layer configuration step) In the base insulation layer configuration step, as shown in FIG3B and FIG5B, a base insulation layer 2 as an example of a first insulation layer is configured on the lower side of the metal sheet 10. That is, a base insulation layer 2 having a plurality of through holes 6 and a plurality of alignment marks 7 as an example of a plurality of positioning portions is formed on the lower surface (the other side in the thickness direction) of the metal sheet 10.

Specifically, first, a varnish of a photosensitive insulating material is prepared, and the varnish is applied to the entire lower surface of the metal sheet 10 and dried to form a base film. The base film is exposed through a photomask having a pattern corresponding to the through hole 6 and the alignment mark 7. Thereafter, the base film is developed and heated and hardened as necessary.

Furthermore, when the substrate is prepared in the form of a two-layer substrate, an etching resist having a pattern corresponding to the through hole 6 and the alignment mark 7 is arranged on the lower surface of the base insulating layer 2, and the etching resist is removed after etching the base insulating layer 2. Alternatively, the through hole 6 and the alignment mark 7 are formed in the base insulating layer 2 using a laser.

Examples of insulating materials for the base insulating layer 2 include organic materials such as polyimide, polysiloxane, epoxy resin, and fluorine resin. Polyimide is preferred.

As shown in FIG. 1 , the through hole 6 is formed in the base insulating layer 2 at a position overlapping with the wiring portion 21 (described below) when projected in the thickness direction. The through hole 6 has a generally circular shape in a plan view and a generally rectangular shape in a cross-sectional view. The length (width) in the left-right direction and the length in the front-back direction of the through hole 6 are respectively shorter than the length (width) in the left-right direction and the length in the front-back direction of the wiring portion 21.

The alignment mark 7 is an insulating portion formed by a mark hole 11 penetrating the base insulating layer 2 in the thickness direction. The alignment mark 7 is formed in the base insulating layer 2 at a position that does not overlap with the wiring pattern 3 when projected in the thickness direction. The alignment mark 7 has a generally circular shape in a plan view and a generally rectangular shape in a cross-sectional view.

Thereby, the base insulating layer 2 having the through hole 6 and the alignment mark 7 is formed on the lower surface of the metal sheet 10.

(Conductor layer configuration step) In the conductor layer formation step, as shown in FIG3C and FIG5C, a metal thin film 12 as an example of a conductor layer is configured on the lower side of the base insulating layer 2. That is, the metal thin film 12 is formed on the entire lower surface of the base insulating layer 2.

In the arrangement of the metal film 12, the metal film 12 is formed in such a manner that the upper surface (one surface in the thickness direction) of the metal film 12 contacts the lower surface of the metal sheet 10 at the through hole 6 and the alignment mark 7. Specifically, the metal film 12 is formed in such a manner that the surface (first exposed surface 13) of the metal sheet 10 etc. exposed from the through hole 6, the surface (second exposed surface 14) of the metal sheet 10 etc. exposed from the mark hole 11, and the lower surface of the base insulating layer 2 are covered.

As a method for disposing the metal thin film 12, dry methods such as sputtering, vacuum evaporation, and ion plating, and wet methods such as electroless plating (electroless copper plating, electroless nickel plating, etc.) can be listed. Dry methods can be listed preferably, and sputtering can be listed more preferably. In this way, a thin film (specifically, a sputtering film) with good adhesion and uniformity can be reliably arranged on the first exposed surface 13 and the second exposed surface 14. In addition, the metal thin film 12 can be selectively and reliably removed by the following removal step.

As the material of the metal film 12, there can be listed metal materials that can selectively remove the metal film 12 by the following removal step, such as copper, chromium, nickel-chromium alloy and the like.

The thickness of the metal thin film 12 is, for example, greater than 10 nm, preferably greater than 30 nm, and, for example, less than 200 nm, preferably less than 100 nm.

(Wiring formation step) In the wiring formation step, a wiring pattern 3 is formed on the upper side of the base insulating layer 2. That is, the metal sheet 10 is subjected to a subtractive method, and unnecessary portions are removed from the metal sheet 10 to form the wiring pattern 3.

First, as shown in FIG. 3D and FIG. 5D , a support film 15 is disposed on the lower surface of the metal film 12 .

As the support film 15, for example, there can be cited a separator film having a slight adhesiveness that can be easily peeled off from the metal thin film 12 in the subsequent step. By configuring the support film 15, the metal thin film 10 and the base insulating layer 2 can be reliably supported, and the cover insulating layer 4 can be prevented from being coated on the lower surface of the metal thin film 12 in the following electrodeposition step.

Next, as shown in FIG. 3E and FIG. 5E , the subtractive method is implemented. Specifically, a dry film photoresist 16 (see the imaginary lines) having a pattern corresponding to the wiring pattern 3 (described below) is arranged on the metal thin film 10, and then, the unnecessary metal thin film 10 other than the wiring pattern 3 is removed by etching, and finally, the dry film photoresist 16 is removed by etching or stripping.

In the method of disposing the dry film photoresist 16 having a pattern, the dry film photoresist 16 is disposed on the entire upper surface of the metal sheet 10, exposed and developed through a mask having a pattern corresponding to the wiring pattern 3, and heated and hardened as needed.

At this time, the alignment mark 7 is recognized from the bottom by using a detection device, and the dry film photoresist 16 is exposed and developed in such a way that the dry film photoresist 16 having a pattern remains at a position overlapping with the through hole 6 when projected along the thickness direction.

As etching, for example, wet etching such as chemical etching can be cited. In the case of wet etching, the upper portion of the metal thin film 10 is more easily etched than the lower portion, so the side cross-sectional shape of the wiring pattern 3 has a cone shape that expands toward the lower side.

Thus, a first electrodeposited body 17 having the support film 15, the metal thin film 12, the base insulating layer 2 and the wiring pattern 3 in sequence is obtained.

(Electrodeposition step) In the electrodeposition step, as shown in FIG. 3F and FIG. 5F, the wiring pattern 3 is covered with a covering insulating layer 4 as an example of a second insulating layer by electrodeposition. That is, the covering insulating layer 4 formed of an electrodeposition coating film is formed on the upper surface and side surface of the wiring pattern 3 by electrodeposition coating.

Specifically, the first electrodeposited body 17 is immersed in a liquid containing an electrodeposited coating, and then a current is applied to the first electrodeposited body 17, so that the electrodeposited coating is deposited on the surface of the wiring pattern 3, and then the deposited electrodeposited coating is dried. In this way, the electrodeposited coating film (i.e., the covering insulating layer 4) formed by the electrodeposited coating is coated on the surface (upper surface and side surface) of the wiring pattern 3.

Examples of the electrodeposition coating (i.e., the insulating material covering the insulating layer 4) include resins that are ionic in water and are known or commercially available, such as acrylic resins, epoxy resins, polyimide resins, or mixtures thereof.

In order to apply current to the first electrodeposited body 17, a lead (not shown) connected to an external power source is connected to the metal film 12. Thus, a direct current is applied to the entire wiring pattern 3 from the first exposed surface 13 via the lead and the metal film 12.

As the electrodeposition coating, either cationic electrodeposition coating using the first electrodeposited object 17 (specifically, the wiring pattern 3) as a cathode or cation electrodeposition coating using the first electrodeposited object 17 as an anode may be used.

The drying temperature of the electrodeposition coating is, for example, 90° C. to 150° C., and the drying time is, for example, 1 minute to 30 minutes.

Thereby, a covering insulating layer 4 (electrodeposition coating film) is formed on the upper surface and side surfaces of the wiring pattern 3.

Furthermore, if necessary, before the electro-deposition, the surface of the wiring pattern 3 is cleaned by degreasing and pickling. Also, if necessary, after the electro-deposition, the electro-deposition coating is heated and hardened by firing. The heating temperature during firing is, for example, 150° C. or higher and 250° C. or lower, and the heating time is, for example, 10 minutes or higher and 5 hours or lower.

(First magnetic layer configuration step) In the first magnetic layer configuration step, as shown in FIG. 4G and FIG. 6G, the first magnetic layer 5 as an example of a magnetic layer is configured on the upper side of the base insulating layer 2 and the cover insulating layer 4. That is, the first magnetic layer 5 is laminated on the upper side in a manner that covers the upper surface and side surface of the cover insulating layer 4 and the upper surface of the base insulating layer 2 exposed from the cover insulating layer 4.

The material of the first magnetic layer 5 may be, for example, a magnetic composition (preferably a soft magnetic composition) disclosed in Japanese Patent Publication No. 2014-189015, etc. Specifically, the material of the first magnetic layer 5 includes magnetic particles (preferably soft magnetic particles, such as Fe-Si-Al alloy, etc.) and resin (preferably a thermosetting resin, such as epoxy resin, phenol resin, etc.).

To arrange the first magnetic layer 5, for example, a semi-hardened magnetic sheet formed of a magnetic composition is pressed onto the upper surface of the base insulating layer 2 and the cover insulating layer 4, and then or simultaneously with the pressing, the semi-hardened magnetic sheet is heated and hardened. For details, refer to Japanese Patent Publication No. 2014-189015.

Thereby, the first magnetic layer 5 is disposed on the upper surfaces of the base insulating layer 2 and the cover insulating layer 4 .

(Conductor layer removal step) In the conductor layer removal step, the metal film 12 (conductor layer) is removed.

First, as shown in FIG. 4H and FIG. 6H , the support film 15 is removed from the metal thin film 12 by peeling.

Next, as shown in FIG4I and FIG6I, the metal thin film 12 is removed from the base insulating layer 2 by etching or stripping. It is preferable to remove the metal thin film 12 by etching. As etching, the above-mentioned wet etching and the like can be cited.

When the metal film 12 is removed by etching, as needed, as shown in the imaginary lines of Figures 4H and 6H, before etching, a protective sheet (shielding sheet, etc.) 46 is arranged on the entire upper surface of the first magnetic layer 5 to protect the first magnetic layer 5, and after etching, the protective sheet 46 is removed.

Thereby, the lower surface of the base insulating layer 2, the first exposed surface 13, and the second exposed surface 14 are exposed.

(Second magnetic layer configuration step) In the second magnetic layer configuration step, as shown in FIG. 4J and FIG. 6J , the second magnetic layer 18 is configured on the lower side of the base insulating layer 2. That is, the second magnetic layer 18 is laminated on the lower surface of the base insulating layer 2 via the adhesive layer 19.

First, the bonding agent layer 19 is disposed on the upper surface of the second magnetic layer 18 to prepare a laminate of the bonding agent layer 19 and the second magnetic layer 18.

The material of the second magnetic layer 18 is the same as that of the first magnetic layer 5. The second magnetic layer 18 can be manufactured by the method exemplified for the first magnetic layer 5.

As the material of the adhesive layer 19, there may be listed known or commercially available adhesive compositions and adhesive compositions, for example, acrylic compositions, epoxy compositions, rubber compositions, silicone compositions, and the like.

As the configuration of the adhesive layer 19, there can be cited a method of applying an adhesive composition to the second magnetic layer 18, a method of pressing an adhesive tape to the second magnetic layer 18, and the like.

Next, the laminate of the adhesive layer 19 and the second magnetic layer 18 is disposed on the lower surface of the base insulating layer 2 in such a manner that the adhesive layer 19 contacts the base insulating layer 2. At this time, the adhesive layer 19 is disposed on the lower surface of the base insulating layer 2 in such a manner that the insides of the through holes 6 and the marking holes 11 are filled with the adhesive layer 19.

Furthermore, in the second magnetic layer arrangement step, from the viewpoint of good filling property of the holes of the adhesive layer 19, the adhesive layer 19 may be arranged on the lower surface of the base insulating layer 2 by coating, etc., and then the second magnetic layer 18 may be arranged on the lower surface of the adhesive layer 19. On the other hand, from the viewpoint of productivity, as described above, a laminate of the adhesive layer 19 and the second magnetic layer 18 is prepared and arranged on the lower surface of the base insulating layer 2.

In this way, the inductor 1 can be obtained.

(Inductor) As shown in FIG1 , the inductor 1 has a generally rectangular sheet shape extending in the front-rear direction and the left-right direction. As shown in FIG2A-B , the inductor 1 has a second magnetic layer 18 , an adhesive layer 19 , a base insulating layer 2 , a wiring pattern 3 , a cover insulating layer 4 and a first magnetic layer 5 in order along the thickness direction.

The second magnetic layer 18 is a layer that imparts a higher inductance to the inductor 1. The second magnetic layer 18 is the lowest layer in the inductor 1. The second magnetic layer 18 has substantially the same shape as the base insulating layer 2 in a plan view, and has a sheet shape extending in the front-rear direction and the left-right direction.

The thickness of the second magnetic layer 18 is, for example, not less than 10 μm, preferably not less than 50 μm, and, for example, not more than 500 μm, preferably not more than 300 μm.

The adhesive layer 19 is a layer that bonds the second magnetic layer 18 to the base insulating layer 2. The adhesive layer 19 is disposed on the upper surface of the second magnetic layer 18. Specifically, the adhesive layer 19 is disposed between the second magnetic layer 18 and the base insulating layer 2 in such a manner as to contact the upper surface of the second magnetic layer 18 and the lower surface of the base insulating layer 2.

The adhesive layer 19 is filled in the through hole 6 and the marking hole 11 in the base insulating layer 2. That is, the upper surface of the adhesive layer 19 contacts the first exposed surface 13 of the wiring pattern 3 and the second exposed surface 14 of the first magnetic layer 5.

The thickness (maximum thickness) of the adhesive layer 19 is, for example, not less than 0.5 μm, preferably not less than 1 μm, and, for example, not more than 10 μm, preferably not more than 5 μm.

The base insulating layer 2 is a layer supporting the wiring pattern 3. The base insulating layer 2 is disposed on the upper surface of the adhesive layer 19. The wiring pattern 3, the cover insulating layer 4 and the first magnetic layer 5 are disposed on the upper surface of the base insulating layer 2. The base insulating layer 2 has the same outer shape as the inductor 1, that is, a sheet shape. The base insulating layer 2 has a through hole 6 and an alignment mark 7.

The thickness of the base insulating layer 2 is, for example, 0.1 μm or more, preferably 0.5 μm or more, more preferably 1 μm or more, and, for example, 15 μm or less, preferably 10 μm or less, more preferably 5 μm or less. If the thickness of the base insulating layer 2 is within the above range, the inductor 1 can be made thinner while maintaining the mechanical strength of the inductor.

The wiring pattern 3 is disposed on the upper surface of the base insulating layer 2. The wiring pattern 3 has a substantially rectangular ring shape in a plan view.

The wiring pattern 3 integrally includes: a plurality of (2) wiring portions 21 extending in the front-rear direction; a connecting wiring portion 22 connecting the front ends of the plurality of wiring portions 21; and a plurality of (2) terminal portions 23 arranged at the rear ends of the two wiring portions 21.

The plurality of wiring parts 21 include a first wiring part 21a and a second wiring part 21b spaced apart from each other in the left-right direction (one example of a specific direction). The plurality of wiring parts 21 have a generally rectangular shape extending in the front-rear direction in a plan view, and have a generally trapezoidal shape with a tapered shape expanding downward in a side section view.

The wiring pattern 3, in particular, the first wiring portion 21a and the second wiring portion 21b are arranged on the upper surface of a common base insulating layer 2. That is, the base insulating layer 2 supporting the first wiring portion 21a and the base insulating layer 2 supporting the second wiring portion 21b are continuous with each other.

The connection wiring portion 22 is arranged on the front side of the first wiring portion 21a and the second wiring portion 21b, and connects the front ends thereof to each other. That is, the rear edge of the left end of the connection wiring portion 22 is continuous with the front edge of the first wiring portion 21a, and the front edge of the right end of the connection wiring portion 22 is continuous with the front edge of the second wiring portion 21b. The connection wiring portion 22 has a generally rectangular shape extending in the left-right direction when viewed from above, and has a generally trapezoidal shape with a tapered shape expanding toward the lower side when viewed from the side section.

The plurality of (2) terminal portions 23 are arranged at the rear end of the first wiring portion 21a and the rear end of the second wiring portion 21b in a continuous manner. The length (width) of the plurality of terminal portions 23 in the left-right direction is shorter than the length (width) of the wiring portion 21 in the left-right direction. The terminal portion 23 has a generally rectangular shape when viewed from above, and has a generally trapezoidal shape with a tapered shape expanding toward the lower side when viewed from the side section.

The width (length in the horizontal direction) of the wiring portion 21 and the width (length in the front-rear direction) of the connection wiring portion 22 are each, for example, not less than 25 μm, preferably not less than 100 μm, and, for example, not more than 2000 μm, preferably not more than 750 μm.

The thickness of the wiring pattern 3 is the same as the thickness of the metal sheet 10 mentioned above.

The material of the wiring pattern 3 is the same as that of the metal sheet 10, preferably copper. If the wiring pattern 3 is a copper wiring formed of copper, since copper has good conductivity and patterning properties, the inductor 1 having good conductivity and fine patterning can be easily manufactured.

The cover insulating layer 4 is an insulating layer for protecting the wiring pattern 3. The cover insulating layer 4 is disposed on the base insulating layer 2 in such a manner as to cover the entire upper surface and the entire side surface of the wiring pattern 3.

The covering insulating layer 4 integrally comprises: a first covering insulating portion 4a covering the first wiring portion 21a; a second covering insulating portion 4b covering the second wiring portion 21b; a third covering insulating portion 4c covering the connecting wiring portion 22; and a plurality of (2) fourth covering insulating portions 4d covering a plurality of (2) terminal portions 23.

In the cover insulating layer 4, the fourth cover insulating portion 4d on the left side, the first cover insulating portion 4a, the third cover insulating portion 4c, the second cover insulating portion 4b and the fourth cover insulating portion 4d on the right side are sequentially continuous in the left-right direction or the front-rear direction.

Furthermore, as shown in the cross-sectional view of FIG. 2A , the first covering insulating portion 4a and the second covering insulating portion 4b are not directly connected to each other in the covering insulating layer 4. That is, in order to make the space 24 between the plurality of wiring portions 21 (the first wiring portion 21a and the second wiring portion 21b) adjacent to each other in the left-right direction continuous, the covering insulating layer 4 is not formed. More specifically, the covering insulating layer 4 does not substantially exist between the plurality of wiring portions 24 (except for the covering insulating layer 4 (4a, 4b) covering the side surfaces of the wiring portion 21).

The thickness of the cover insulating layer 4 is, for example, 0.5 μm or more, preferably 1 μm or more, and, for example, 10 μm or less, preferably 7 μm or less. This allows the wiring pattern 3 to contact the first magnetic layer 5 while shortening the distance between the wiring pattern 3 and the first magnetic layer 5. Therefore, the inductance of the inductor 1 can be further increased.

The first magnetic layer 5 is a layer that imparts a higher inductance to the inductor 1. The first magnetic layer 5 has substantially the same shape as the base insulating layer 2 in a plan view, and has a sheet shape extending in the front-rear direction and the left-right direction.

The first magnetic layer 5 is the uppermost layer in the inductor 1. The first magnetic layer 5 is disposed on the base insulating layer 2 and the cover insulating layer 4. Specifically, the first magnetic layer 5 is disposed on the upper surface of the base insulating layer 2 so as to cover the upper surface and the side surface of the cover insulating layer 4.

The first magnetic layer 5 is present in the entirety of the wiring section 24 in the up-down direction of the wiring section 21. That is, in the wiring section 24, the first magnetic layer 5 is present from the upper surface of the base insulating layer 2 to a position higher than the wiring section 21. Moreover, the first magnetic layer 5 substantially fills the entirety of the wiring section 24. Specifically, when a component composed of the wiring section 21 (the first wiring section 21a, the second wiring section 21b) and the covering insulating layer 4 (the first covering insulating section 4a, the second covering insulating section 4b) covering the wiring section is set as a covering wiring section, only the first magnetic layer 5 is present between the adjacent covering wiring sections when observed in a side section.

The thickness of the first magnetic layer 5 is, for example, not less than 10 μm, preferably not less than 50 μm, and, for example, not more than 500 μm, preferably not more than 300 μm.

The inductor 1 is not the electronic device described below, but a part of the electronic device, that is, a part used to manufacture the electronic device, and does not include electronic components (chips, capacitors, etc.) or a mounting substrate for mounting electronic components, but is a device that is distributed separately as a component and can be used in the industry.

The inductor 1 is mounted (assembled) on, for example, an electronic device. Although not shown, the electronic device includes a mounting substrate and electronic components (chips, capacitors, etc.) mounted on the mounting substrate. In the electronic device, the inductor 1 is mounted on the mounting substrate.

Specifically, as shown in FIG. 7 , a plurality of through holes 25 (through holes) are formed to penetrate the first magnetic layer 5 and the covering insulating layer 4 in the thickness direction in such a manner that the terminal portion 23 is exposed, and the inner peripheral surface of the through hole 25 is subjected to insulation treatment. Then, a conductive connecting member 26 is arranged inside the through hole 25 in such a manner that one end of the connecting member 26 contacts the upper surface of the terminal portion 23. The inductor 1 is mounted on the mounting substrate via the connecting member 26, is electrically connected to other electronic devices, and functions as a passive element.

Furthermore, the manufacturing method of the inductor 1 comprises: a wiring forming step of forming a wiring pattern 3 on the upper side of the base insulating layer 2; an electroplating step of covering the wiring pattern 3 with the covering insulating layer 4 by electroplating; and a first magnetic layer arranging step of arranging the first magnetic layer 5 on the upper side of the base insulating layer 2 and the covering insulating layer 4.

Therefore, it is possible to suppress the wiring pattern 3 from directly contacting the first magnetic layer 5. Therefore, it is possible to suppress the wiring pattern 3 from short-circuiting.

Furthermore, in the manufacturing method of the inductor 1, the covering insulating layer 4 is covered on the wiring pattern 3 so that each of the plurality of wiring portions 21 (the first wiring portion 21a and the second wiring portion 21b) constituting the wiring pattern 3 is not continuous between adjacent wiring portions 24. Therefore, the first magnetic layer 5 can be arranged over the entire thickness direction between the wiring patterns 3 24 (i.e., between adjacent wiring portions 21). Therefore, the inductance of the inductor 1 can be improved.

Furthermore, in the manufacturing method of the inductor 1, the cover insulating layer 4 can be thinly, uniformly, and reliably coated on the surface of the wiring pattern 3. Therefore, the distance between the first magnetic layer 5 and the wiring pattern 3 can be shortened. Therefore, the inductance of the inductor 1 can be improved.

Furthermore, in the manufacturing method of the inductor 1, in the wiring forming step, the wiring pattern 3 is formed by a subtractive method.

Therefore, compared with the additive method, the wiring pattern 3 can be formed in a shorter time, and the inductor 1 can be manufactured in a shorter time. In addition, the inductor 1 with thicker wiring can be easily manufactured, and a large current can flow.

Furthermore, in the manufacturing method of the inductor 1, the electric deposition step supplies power to the wiring pattern 3 through the through hole 6 of the base insulating layer 2 which overlaps with the wiring pattern 3 when projected in the thickness direction (see FIG. 3F).

Therefore, the entire upper surface and side surface of the wiring pattern 3 can be covered with the cover insulating layer 4. That is, the upper surface and side surface of the wiring pattern 3 are completely covered by the cover insulating layer 4.

In particular, in the manufacturing method of the inductor 1 of the second embodiment described below, the inductor 1 has an exposed side surface 48 (described below) that allows the magnetic layer and the wiring pattern 3 to contact each other, although slightly, and it is difficult to completely insulate them. On the other hand, in the inductor 1 of the first embodiment, the contact between the magnetic layer and the wiring pattern 3 can be completely suppressed. As a result, it is possible to more reliably suppress the wiring pattern 3 from contacting the first magnetic layer 5.

Furthermore, in the manufacturing method of the inductor 1, the base insulating layer 2 has an alignment mark 7.

Therefore, the wiring pattern 3 can be accurately formed on the upper side of the through hole 6 using the alignment mark 7 as a mark. Therefore, the cover insulating layer 4 can be more reliably covered on the wiring pattern 3 by supplying power from the through hole 6.

Furthermore, the inductor 1 obtained by the manufacturing method comprises: a base insulating layer 2; a plurality of wiring portions 21, which are arranged on the upper side of the base insulating layer 2 and spaced apart from each other in the left-right direction; a covering insulating layer 4, which covers each of the plurality of wiring portions 21 so that the wiring portions 24 adjacent to each other in the left-right direction are discontinuous; and a first magnetic layer 5, which is arranged on the upper side of the base insulating layer 2 and the covering insulating layer 4 in a manner covering the upper surface of the base insulating layer 2.

Therefore, it is possible to suppress the wiring portion 21 from contacting the first magnetic layer 5, and suppress short circuits between the wiring portions 21. In addition, since the first magnetic layer 5 is disposed between the wiring portions 24 over the entire thickness direction, the inductor 1 can have improved inductance.

Furthermore, in the inductor 1 , the plurality of wiring portions 21 are disposed on the upper side of the common base insulating layer 2 , and the cover insulating layer 4 covers the upper surface and the side surfaces of the plurality of wiring portions 21 .

Therefore, the plurality of wiring portions 21 have good positional accuracy in the thickness direction and are reliably supported by the base insulating layer 2 .

(Variations) In each of the following variations, the same reference symbols are used for the same components and steps as those in the above-mentioned embodiment, and detailed descriptions thereof are omitted. In addition, the variations may be appropriately combined. Furthermore, each variation may exert the same effects as those in the embodiment, except for those specifically described.

First variation example As shown in FIG8A, before the step of configuring the base insulating layer, a step of configuring the first anti-diffusion layer 30 on the lower surface of the metal sheet 10 may be performed. That is, the first anti-diffusion layer 30 may be configured on the lower surface of the metal sheet 10 and the upper surface of the base insulating layer 2.

As the material of the first anti-diffusion layer 30, for example, there can be cited conductors such as nickel, nickel-chromium alloy, cobalt, and tantalum. Nickel is preferably cited from the viewpoint that it can be plated when formed and soft etched when removed, and has good processability.

When the inductor 1 is manufactured by disposing the first anti-diffusion layer 30 as shown in FIG8A, the wiring pattern 3 in the inductor 1 has a wiring lower portion 31 formed by the first anti-diffusion layer 30 and a wiring main portion 32 disposed on the upper surface thereof and formed by the metal sheet 10 as shown in FIG8B.

Furthermore, in the manufacturing method shown in FIG. 8A , in the wiring forming step, not only the step of etching the metal thin film 10 but also the step of etching the first anti-diffusion layer 30 is performed according to the difference in etching speeds.

In the manufacturing method shown in FIG. 8A , the metal components (e.g., copper ions) of the metal sheet 10 can be suppressed from corroding the base insulating layer 2 and diffusing into the base insulating layer 2 , thereby improving the peeling strength between the metal sheet 10 and the base insulating layer 2 .

Second variation example As shown in FIG. 9A , in the wiring formation step, after the subtractive method is implemented, a step of configuring a second anti-diffusion layer 33 on the wiring pattern 3 formed by the metal sheet 10 may be implemented.

As a material of the second anti-diffusion layer 33, for example, a conductor such as nickel can be cited.

In order to arrange the second anti-diffusion layer 33, for example, a plating treatment using a nickel bath can be cited.

When the inductor 1 is manufactured by disposing the second anti-diffusion layer 33 as shown in FIG. 9A , the wiring pattern 3 in the inductor 1 includes a wiring main portion 32 formed of a metal sheet 10 and a second anti-diffusion layer 33 covering the upper surface and side surfaces thereof as shown in FIG. 9B .

In the manufacturing method shown in FIG. 9B , it is possible to suppress a short circuit caused by corrosion of the metal component (eg, copper ions) from the wiring main portion 32 to the covering insulating layer 4 and the first magnetic layer 5 .

Furthermore, the first variation and the second variation may be combined.

The shape of the wiring pattern 3 is not limited to the above. The wiring pattern 3 may also have a curved shape (meandering shape) that advances in the front-rear direction and the left-right direction as shown in FIG. 10A and FIG. 10B.

For example, in the wiring pattern 3 shown in Figure 10A, there are: a plurality of (5) wiring parts 21, which extend in the left-right direction; a plurality of (4) connecting wiring parts 22, which connect the left ends or the right ends of the plurality of wiring parts 21 to each other; and a plurality of terminal parts 23, which are arranged at both ends of the wiring pattern 3.

For example, in the wiring pattern 3 shown in Figure 10B, there are: a plurality of (3) wiring sections 21, which extend in the front-to-back direction; a plurality of (2) connecting wiring sections 22, which connect the front ends or the rear ends of the plurality of wiring sections 21 to each other; and a plurality of terminal sections 23, which are arranged at both ends of the wiring pattern 3.

Furthermore, the wiring pattern 3 may also have a substantially circular ring shape in a top view as shown in FIG. 10C . In the wiring pattern 3 shown in FIG. 10C , regarding the wiring portions 21 adjacent to each other in a specific direction, the specific direction and the length of the wiring portion 21 may adopt any direction (e.g., left-right direction, cross direction) and any length. For example, in FIG. 10C , when the cross direction (the direction intersecting both the front-back direction and the left-right direction: the oblique direction) is adopted as the specific direction, a plurality of (two) wiring portions 21 adjacent to each other in the cross direction are indicated by hatching.

Although not shown, the wiring pattern 3 may include the wiring portion 21 and the connection wiring portion 22 instead of the terminal portion 23 .

Fourth Embodiment Although not shown, the inductor 1 may not have the second magnetic layer 18 and the adhesive layer 19. From the perspective of having a higher inductance, it is preferred that the inductor 1 has the second magnetic layer 18 and the adhesive layer 19.

Fifth embodiment Although not shown, the inductor 1 may also be provided without the alignment mark 7 in the base insulating layer 2 by subsequent external processing or the like.

<Second embodiment> As an example of a method for manufacturing a wiring board of the present invention, a second embodiment of a method for manufacturing an inductor 1 is described with reference to FIGS. 11A to 14F. In the second embodiment, the same components and steps as those in the first embodiment are denoted by the same reference numerals, and detailed descriptions thereof are omitted.

The second embodiment of the method for manufacturing the inductor 1 includes a metal sheet laminate preparation step, a wiring formation step, a lead shielding step, an electroplating step, a shielding removal step, a lead removal step, a first magnetic layer arrangement step, and a second magnetic layer arrangement step. Each step is described in detail below.

(Metal sheet laminate preparation step) In the metal sheet laminate preparation step, as shown in FIG. 11A , a metal sheet laminate 40 having a metal sheet 10 and a base insulating layer 2 disposed on the entire lower surface thereof is prepared.

The metal sheet 10 is the same as that in the first embodiment.

Regarding the material of the base insulating layer 2, in addition to the same organic material as in the first embodiment, there can be exemplified inorganic materials such as glass and ceramics, and insulating materials such as composite materials of inorganic and organic materials (glass epoxy resin).

The metal sheet laminate 40 can preferably be a copper foil laminate or the like.

(Wiring formation step) In the wiring formation step, a conductor pattern 42 having a wiring pattern 3 and an electro-deposited lead 41 is formed on the upper side of the base insulating layer 2. That is, a subtractive method is applied to the metal sheet 10 to remove unnecessary portions from the metal sheet 10, thereby forming the conductor pattern 42.

First, as shown in FIG. 11B , a support film 15 is disposed on the lower surface of the base insulating layer 2 .

Next, as shown in Fig. 11C and Fig. 13A, the reduction method is implemented. The reduction method is the same as that of the first embodiment.

The conductor pattern 42 includes the wiring pattern 3 and the electrodeposited leads 41.

The electro-deposited lead 41 includes a first lead portion 43 extending rearward from a rear edge of one (left) terminal portion 23 of the wiring pattern 3, and a second lead portion 44 continuing from the rear edge of the first lead portion 43 and extending in the left-right direction.

Thereby, a second electrodeposited body 45 having the support film 15, the base insulating layer 2 and the conductive pattern 42 in sequence is obtained.

(Lead shielding step) In the shielding step, as shown in FIG. 11D and FIG. 13B , the electro-deposition lead 41 is shielded. That is, the upper surface and the side surface of the electro-deposition lead 41 are covered with a shielding sheet 46 .

As the masking sheet 46, for example, a slightly adhesive membrane can be cited.

Thereby, in the following electro-deposition step, the covering insulating layer 4 can be prevented from covering the electro-deposited lead 41, and the electro-deposited lead 41 can be surely removed in the following lead etching step.

(Electrodeposition step) In the electrodeposition step, as shown in FIG. 11E and FIG. 13C , the wiring pattern 3 is covered with a covering insulating layer 4 by electrodeposition.

Specifically, the masked second electrodeposited object 45 is immersed in a liquid containing an electrodeposited coating, and then a current is applied to the second electrodeposited object 45 to deposit the electrodeposited coating on the wiring pattern 3. Then, the deposited electrodeposited coating is dried.

In order to apply current to the second electrodeposited body 45, a lead (not shown) connected to an external power source is connected to the end of the second lead portion 44. Thus, a direct current is applied to the entire wiring pattern 3 via the lead and the electrodeposition lead 41.

The electro-deposition conditions are the same as those in the first embodiment.

Thereby, a covering insulating layer 4 (electrodeposition coating film) is formed on the upper surface and side surfaces of the wiring pattern 3.

(Mask removal step) In the mask removal, as shown in FIG. 12F and FIG. 14D, the mask sheet 46 is removed. That is, the mask sheet 46 is peeled off from the electroplated lead 41.

Thereby, the surface of the electro-deposited lead 41 is exposed.

(Lead Removal Step) In the lead removal step, as shown in FIG. 12G and FIG. 14E, the electro-deposited lead 41 is removed. That is, the electro-deposited lead 41 is removed from the conductor pattern 42 by etching.

As etching, for example, the above-mentioned wet etching can be cited.

At this time, the wiring pattern 3 is covered by the cover insulating layer 4 and thus will not be removed by etching.

Thus, the first intermediate 47 including the support film 15, the base insulating layer 2, the wiring pattern 3 and the cover insulating layer 4 in sequence is obtained.

In the first intermediate 47, the rear edge side of the wiring pattern 3 is not covered by the cover insulating layer 4. That is, the wiring pattern 3 (specifically, the terminal portion 23 on the left side) has an exposed side 48 exposed from the cover insulating layer 4 on the rear edge side.

(First magnetic layer configuration step) In the first magnetic layer configuration step, as shown in FIG. 12H and FIG. 14F, the first magnetic layer 5 is configured on the upper side of the base insulating layer 2 and the cover insulating layer 4.

The first magnetic layer configuration step is the same as that of the first embodiment.

Thereafter, the support film 15 is removed from the base insulating layer 2 by peeling.

Thus, a second intermediate 49 is obtained which has the base insulating layer 2, the wiring pattern 3, the cover insulating layer 4 and the first magnetic layer 5 in sequence. In the second intermediate 49, the side surface 48 is exposed and in contact with the first magnetic layer 5.

(Second magnetic layer configuration step) In the second magnetic layer configuration step, as shown in FIG12I , the second magnetic layer 18 is configured on the lower side of the base insulating layer 2. That is, the covering insulating layer 4 is configured on the lower surface of the base insulating layer 2 via the adhesive layer 19.

The second magnetic layer configuration step is the same as that of the first embodiment.

In this way, the inductor 1 of the second embodiment can be obtained.

(Inductor) The inductor 1 has a second magnetic layer 18, an adhesive layer 19, a base insulating layer 2, a conductive pattern 42, a cover insulating layer 4, and a first magnetic layer 5 in order along the thickness direction. These components are the same as those of the first embodiment except for any special description.

The base insulating layer 2 of the second embodiment does not have the through hole 6 and the alignment mark 7. That is, the entire lower surface of the base insulating layer 2 is in contact with the entire upper surface of the adhesive layer 19. In addition, the adhesive layer 19 is not in contact with the wiring pattern 3 and the second magnetic layer 18.

In the inductor 1 of the second embodiment, an exposed side surface 48 of a terminal portion 23 is in contact with the first magnetic layer 5 .

The manufacturing method of the inductor 1 of the second embodiment and the inductor 1 manufactured thereby also exert the same effects as the manufacturing method and the inductor 1 of the first embodiment.

Furthermore, the variation of the second embodiment may be the same as the variation of the first embodiment.

Furthermore, the above invention is provided as an exemplary embodiment of the present invention, but it is only an example and cannot be interpreted in a limiting sense. Variations of the present invention known to those skilled in the art are included in the scope of the following patent application. [Industrial Applicability]

Inductors are installed in electronic devices, for example.

1‧‧‧Inductor 2‧‧‧Base insulation layer 3‧‧‧Wiring pattern 4‧‧‧Coating insulation layer 4a‧‧‧1st covering insulation part 4b‧‧‧2nd covering insulation part 4c‧‧‧3rd covering insulation part 4d‧‧‧4th covering insulation part 5‧‧‧1st magnetic layer 6‧‧‧Through hole 7‧‧‧Alignment mark 10‧‧‧Metal sheet 11‧ ‧‧Marking hole 12‧‧‧Metal film 13‧‧‧First exposed surface 14‧‧‧Second exposed surface 15‧‧‧Support film 16‧‧‧Dry film photoresist 17‧‧‧First electrodeposited body 18‧‧‧Second magnetic layer 19‧‧‧Adhesive layer 21‧‧‧Wiring section 21a‧‧‧First wiring section 21b‧‧‧Second wiring section 22‧‧‧ Connecting wiring part 23‧‧‧Terminal part 24‧‧‧Wiring part 25‧‧‧Through hole 26‧‧‧Connecting member 30‧‧‧1st anti-diffusion layer 31‧‧‧Wiring lower part 32‧‧‧Wiring main part 33‧‧‧2nd anti-diffusion layer 40‧‧‧Conductive sheet laminate (metal sheet laminate) 41‧‧‧Electrodeposited lead 42‧‧‧Conductive pattern 43‧‧‧1st lead part 44‧‧‧2nd lead part 45‧‧‧2nd electrodeposited body 46‧‧‧Protective sheet (shielding sheet) 47‧‧‧1st intermediate 48‧‧‧Exposed side 49‧‧‧2nd intermediate 51‧‧‧Base insulating layer 52‧‧‧Wiring part 53‧‧‧Coating film 54‧‧‧Magnetic sheet 55‧‧‧Part

FIG1 shows a top view of the first embodiment of the inductor of the present invention. FIG2A and FIG2B are cross-sectional views of FIG1, FIG2A shows an A-A cross-sectional view, and FIG2B shows a B-B cross-sectional view. FIG3A to FIG3F are cross-sectional views of the manufacturing steps of the inductor shown in FIG1 (A-A cross-sectional view of FIG1), FIG3A shows a step of preparing a metal sheet, FIG3B shows a step of configuring a base insulating layer, FIG3C shows a step of configuring a metal film, FIG3D shows a step of configuring a support film, FIG3E shows a step of forming a wiring pattern, and FIG3F shows a step of performing electroplating. Figures 4G to 4J are cross-sectional views of the manufacturing steps of the inductor following Figure 3 (A-A cross-sectional view of Figure 1). Figure 4G shows the step of configuring the first magnetic layer, Figure 4H shows the step of removing the support film, Figure 4I shows the step of removing the metal film, and Figure 4J shows the step of configuring the adhesive layer and the second magnetic layer. Figures 5A to 5F are cross-sectional views of the manufacturing steps of the inductor shown in Figure 1 (B-B cross-sectional view of Figure 1), Figure 5A shows the step of preparing a metal sheet, Figure 5B shows the step of configuring a base insulating layer, Figure 5C shows the step of configuring a metal film, Figure 5D shows the step of configuring a support film, Figure 5E shows the step of forming a wiring pattern, and Figure 5F shows the step of performing electroplating. Fig. 6G to Fig. 6J are cross-sectional views of the manufacturing steps of the inductor following Fig. 5 (B-B cross-sectional view of Fig. 1), Fig. 6G shows the step of configuring the first magnetic layer, Fig. 6H shows the step of removing the support film, Fig. 6I shows the step of removing the metal film, and Fig. 6J shows the step of configuring the adhesive layer and the second magnetic layer. Fig. 7 shows a cross-sectional view of the inductor shown in Fig. 1 in the form of use. Fig. 8A and Fig. 8B are the first variation of the manufacturing method of the inductor of the first embodiment (the method of configuring the first anti-diffusion layer), Fig. 8A shows the step of configuring the first anti-diffusion layer, and Fig. 8B shows the cross-sectional view of the inductor obtained when the first anti-diffusion layer is configured. FIG. 9A and FIG. 9B are a second variation of the manufacturing method of the inductor of the first embodiment (a method of configuring the second anti-diffusion layer). FIG. 9A shows a step diagram of configuring the second anti-diffusion layer, and FIG. 9B shows a cross-sectional view of the inductor obtained when the second anti-diffusion layer is configured. FIG. 10A to FIG. 10C are variations of the inductor of the first embodiment. FIG. 10A shows a curved shape of the wiring pattern advancing in the front-rear direction, FIG. 10B shows a curved shape of the wiring pattern advancing in the left-right direction, and FIG. 10C shows a circular ring shape of the wiring pattern. Figures 11A to 11E are cross-sectional views of the manufacturing steps of the second embodiment of the inductor of the present invention (A-A cross-sectional view of Figure 13), Figure 11A shows the step of preparing a metal sheet laminate, Figure 11B shows the step of configuring a support film, Figure 11C shows the step of forming a wiring pattern, Figure 11D shows the step of shielding an electro-deposition lead, and Figure 11E shows the step of performing electro-deposition. Fig. 12F to Fig. 12I are cross-sectional views of the manufacturing steps of the inductor following Fig. 11, Fig. 12F shows the step of removing the shielding sheet, Fig. 12G shows the step of removing the electro-deposition lead, Fig. 12H shows the step of configuring the first magnetic layer, and Fig. 12I shows the step of configuring the adhesive layer and the second magnetic layer. Fig. 13A to Fig. 13C are top views of the manufacturing steps of the second embodiment of the inductor of the present invention, Fig. 13A shows the step of forming the wiring pattern, Fig. 13B shows the step of shielding the electro-deposition lead, and Fig. 13C shows the step of performing electro-deposition. FIG. 14D to FIG. 14F are top views of the manufacturing steps of the inductor following FIG. 13 , FIG. 14D shows the step of removing the masking sheet, FIG. 14E shows the step of removing the electro-deposition lead, and FIG. 14F shows the step of configuring the first magnetic layer. FIG. 15 shows a cross-sectional view of an inductor used as a reference example.

1‧‧‧Inductor

3‧‧‧Wiring diagram

4‧‧‧Covering insulation layer

4a‧‧‧The first covering insulation part

4c‧‧‧Third covering insulation part

4d‧‧‧The fourth covering insulation part

5‧‧‧1st magnetic layer

6‧‧‧Through hole

7‧‧‧Alignment mark

11‧‧‧Marking hole

21‧‧‧Wiring department

21a‧‧‧1st wiring section

21b‧‧‧Second wiring section

22‧‧‧Connection wiring section

23‧‧‧Terminal section

24‧‧‧Wiring department

Claims (8)

A method for manufacturing a wiring substrate, characterized by comprising: a wiring forming step, which is to form a plurality of wiring portions arranged at intervals in a specific direction on one side of a first insulating layer in a thickness direction; an electro-deposition step, which is to cover the wiring portions with a second insulating layer by electro-deposition so that the wiring portions adjacent to each other in the specific direction are discontinuous; and a magnetic layer arranging step, which is to arrange a magnetic layer on one side of the first insulating layer and the second insulating layer in a thickness direction, wherein the electro-deposition step includes a through hole in the first insulating layer that overlaps with the wiring portion when projected in the thickness direction, The step of supplying power to the wiring part; before the wiring forming step, there is a step of configuring a conductive layer, which is to form a metal film covering the other side of the thickness direction of the first insulating layer, the inner wall surface of the through hole, and the exposed surface of the metal film exposed from the through hole in the metal film configured on one side of the thickness direction of the first insulating layer as a conductive layer; the wiring forming step is to form the wiring part by performing a subtractive method on the metal film; the electro-deposition step is to apply the metal film to the wiring part; and after the electro-deposition step, there is a step of removing the conductive layer, which is to remove the metal film. The manufacturing method of the wiring substrate as claimed in claim 1 further comprises: a step of configuring a support film on the other side of the thickness direction of the metal film after the above-mentioned conductor layer configuration step and before the above-mentioned wiring formation step; and a step of removing the above-mentioned support film after the above-mentioned electroplating step and before the above-mentioned conductor layer removal step. A method for manufacturing a wiring substrate as claimed in claim 1 or 2, wherein the first insulating layer has a positioning portion for forming the wiring portion on one side of the through hole in the thickness direction. A method for manufacturing a wiring substrate as claimed in claim 1 or 2, wherein the wiring portion has copper wiring. A method for manufacturing a wiring substrate as claimed in claim 3, wherein the wiring portion has copper wiring. A wiring substrate, characterized by comprising: a first insulating layer; a plurality of wiring sections, which are arranged at intervals in a specific direction on one side of the thickness direction of the first insulating layer; a second insulating layer, which covers each of the plurality of wiring sections so that the wiring sections adjacent to each other in the specific direction are not continuous; and a magnetic layer, which covers one side of the thickness direction of the first insulating layer and the second insulating layer so as to cover one side of the thickness direction of the first insulating layer. The first insulating layer is configured in a manner, wherein the first insulating layer has a through hole that overlaps with the wiring portion when projected in the thickness direction; the through hole is used to supply power when the wiring portion is covered with the second insulating layer by electroplating; the first insulating layer has a positioning portion for forming the wiring portion on one side of the through hole in the thickness direction; the positioning portion does not overlap with the wiring portion when projected in the thickness direction; and the wiring portion does not have an electrical connection through the through hole. As in claim 6, the wiring substrate, wherein the plurality of wiring parts are arranged on one side of the common first insulating layer in the thickness direction, and the second insulating layer covers one side and the side surface of the plurality of wiring parts in the thickness direction. In the wiring substrate of claim 6 or 7, the thickness of the first insulating layer is greater than or equal to 0.5 μm and less than or equal to 10 μm.