TWI854716B - Display device and information processing device - Google Patents
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Abstract
本發明揭示一種源極驅動電路,其係整合在一顯示驅動晶片之中,且包括:一移位寄存器、一數據寄存器、一數據鎖存器、一電平移位器、複數個數位類比轉換器(DAC)、以及複數個緩衝放大器(Buffer amplifier)。特別地,本發明設計所述緩衝放大器偏置於一第一類比電壓以及一第二類比電壓之間,且令二個類比電壓之間具有一電壓差。例如,電壓差△V<1.2V(即,gamma range)。如此,進行電路設計時,便可採用耐低電壓的MSFET元件組成所述緩衝放大器。由於耐低電壓的MOSFET元件較不易出現元件不匹配(mismatch)現象,因此可以改善該複數個緩衝放大器之間的的輸入偏移電壓(offset)的誤差。同時,由於電壓差變小了,因此該顯示驅動晶片的晶片功耗亦同步降低。 The present invention discloses a source drive circuit, which is integrated into a display driver chip and includes: a shift register, a data register, a data latch, a level shifter, a plurality of digital-to-analog converters (DACs), and a plurality of buffer amplifiers. In particular, the present invention designs the buffer amplifier to be biased between a first analog voltage and a second analog voltage, and to have a voltage difference between the two analog voltages. For example, the voltage difference △V<1.2V (i.e., gamma range). In this way, when designing the circuit, low-voltage-tolerant MSFET elements can be used to form the buffer amplifier. Since low-voltage MOSFET components are less prone to component mismatch, the input offset voltage error between the multiple buffer amplifiers can be improved. At the same time, since the voltage difference is reduced, the chip power consumption of the display driver chip is also reduced.
Description
本發明為平面顯示裝置的相關技術領域,尤指一種顯示裝置,其包含至少二個利用軟板接合(FPC bonding)相互電連接的電路。 The present invention relates to the technical field of flat panel display devices, and in particular to a display device comprising at least two circuits electrically connected to each other using flexible circuit board bonding (FPC bonding).
已知,平面顯示器包含非自發光型平面顯示器以及自發光型平面顯示器,其中液晶顯示器為使用已久的一種非自發光型平面顯示器,而有機發光二極體(Organic light-emitting diode,OLED)顯示器以及發光二極體(Light-emitting diode,LED)顯示器則為目前具有主流應用的自發光型平面顯示器。圖1為習知的一種OLED顯示裝置的方塊圖。如圖1所示,習知的OLED顯示裝置1a係主要包括:一OLED面板11a、一顯示控制器(Tcon)120a、一閘極驅動單元121a、一源極驅動單元122a、以及一發光調控單元(EM control)123a,其中該OLED面板11a包括X×Y個畫素電路111a以及X×Y個OLED元件112a,且X、Y為正整數。
It is known that flat panel displays include non-self-luminous flat panel displays and self-luminous flat panel displays, wherein liquid crystal displays are a type of non-self-luminous flat panel displays that have been used for a long time, while organic light-emitting diode (OLED) displays and light-emitting diode (LED) displays are self-luminous flat panel displays that are currently in mainstream applications. FIG1 is a block diagram of a known OLED display device. As shown in FIG1 , the known OLED display device 1a mainly includes: an OLED panel 11a, a display controller (Tcon) 120a, a
進一步地,圖2為圖1所示之畫素電路的電路拓樸圖。如圖2所示,可利用7個TFT元件和一個儲存電容組成所述畫素電路111a,且該畫素電路111a偏置於一第一工作電壓ELVDD與一第二工作電壓ELVSS之間。例如,ELVDD=7V,且ELVSS=0V。換句話說,進行電路設計時,必須採用耐高電壓的薄膜電晶體元件作為該7個TFT元件。然而,實務經驗指出,耐高電壓的薄膜電晶體元件較易出現元件不匹配(mismatch)從而導致相異電晶體之間出現閥值電壓(Vth)差異,最終引致OLED元件112a發光亮度不均。另一方面,眾所周知,OLED元件112a隨著使用時間會出現老化(degradation)。 因此,實務經驗還指出,若採用複數個耐高電壓的薄膜電晶體元件組成所述畫素電路111a,則OLED元件112a的老化會伴隨著出現元件跨壓上升的問題。綜上所述,習知的源極驅動單元122a仍存在需要進一步改善的空間。Furthermore, FIG. 2 is a circuit topology diagram of the pixel circuit shown in FIG. 1. As shown in FIG. 2, the
另一方面,圖3為圖1所示之源極驅動單元的電路方塊圖。如圖3所示,習用的源極驅動單元122a包括:一移位寄存器1221a、一數據寄存器1222a、一數據鎖存器1223a、一電平移位器1224a、複數個數位類比轉換器(DAC)1225a、以及複數個緩衝放大器(Buffer amplifier)1226a。應知道,所述緩衝放大器1226a係由複數個MOSFET元件組成,且偏置於一類比工作電壓AVDD與一接地電壓GND之間,例如8V~0V。換句話說,進行電路設計時,必須採用多個耐高電壓的金屬氧化物半導體場效電晶體(MOSFET)來組成所述緩衝放大器1226a。然而,實務經驗指出,耐高電壓的MOSFET元件較易出現元件不匹配(mismatch)從而導致該緩衝放大器1226a具有不一致的輸入偏移電壓(offset),引致與該複數個緩衝放大器1226a耦接的複數個OLED元件112a具有不一樣的OLED電流,因此出現發光亮度不均的現象。On the other hand, FIG3 is a circuit block diagram of the source drive unit shown in FIG1. As shown in FIG3, the conventional
目前,圖1所示之顯示控制器(Tcon)120a、源極驅動單元122a和發光調控單元123a可以整合成為一顯示驅動晶片,而閘極驅動單元121a可以利用GOA技術整合在該OLED面板11a之中。因此,實務經驗還指出,8V~0V類比工作電壓AVDD會導致該顯示驅動晶片的晶片功耗無法有效降低。綜上所述,習知的源極驅動單元122a仍存在需要進一步改善的空間。At present, the display controller (Tcon) 120a, the
由上述說明可知,本領域亟需一種新式的源極驅動電路及顯示裝置。From the above description, it can be seen that a new source drive circuit and display device are urgently needed in the field.
本發明之主要目的在於提供一種源極驅動電路,其係整合在一顯示驅動晶片之中,且包括:一移位寄存器、一數據寄存器、一數據鎖存器、一電平移位器、複數個數位類比轉換器(DAC)、以及複數個緩衝放大器(Buffer amplifier)。特別地,本發明設計所述緩衝放大器偏置於一第一類比電壓以及一第二類比電壓之間,且令二個類比電壓之間具有一電壓差。例如,電壓差ΔV<1.2V(即,gamma range)。如此,進行電路設計時,便可採用耐低電壓的MSFET元件組成所述緩衝放大器。由於耐低電壓的MOSFET元件較不易出現元件不匹配(mismatch)現象,因此可以改善該複數個緩衝放大器之間的的輸入偏移電壓(offset)的誤差。同時,由於電壓差變小了,因此該顯示驅動晶片的晶片功耗亦同步降低。The main purpose of the present invention is to provide a source drive circuit, which is integrated into a display driver chip and includes: a shift register, a data register, a data latch, a level shifter, a plurality of digital-to-analog converters (DACs), and a plurality of buffer amplifiers. In particular, the buffer amplifier is designed by the present invention to be biased between a first analog voltage and a second analog voltage, and to have a voltage difference between the two analog voltages. For example, the voltage difference ΔV is less than 1.2V (i.e., gamma range). In this way, when designing the circuit, low-voltage-tolerant MSFET elements can be used to form the buffer amplifier. Since low voltage MOSFET components are less likely to have component mismatch, the input offset voltage error between the plurality of buffer amplifiers can be improved. At the same time, since the voltage difference is reduced, the chip power consumption of the display driver chip is also reduced.
為達成上述目的,本發明提出所述源極驅動電路的一實施例,其包括:一移位寄存器、一數據寄存器、一數據鎖存器、一電平移位器、複數個數位類比轉換器(DAC)、以及複數個緩衝放大器(Buffer amplifier);其特徵在於,所述緩衝放大器偏置於一第一類比電壓以及一第二類比電壓之間,該第二類比電壓大於0V,且該第一類比電壓與該第二類比電壓之間具有一電壓差。To achieve the above-mentioned purpose, the present invention proposes an embodiment of the source drive circuit, which includes: a shift register, a data register, a data latch, a level shifter, a plurality of digital-to-analog converters (DACs), and a plurality of buffer amplifiers; its characteristic is that the buffer amplifier is biased between a first analog voltage and a second analog voltage, the second analog voltage is greater than 0V, and there is a voltage difference between the first analog voltage and the second analog voltage.
在一實施例中,該電壓差小於8V。In one embodiment, the voltage difference is less than 8V.
在一實施例中,所述緩衝放大器包括複數個MOSFET元件,且各所述MOSFET元件皆為選自於由耐中高電壓之MOSFET元件、耐中電壓之MOSFET元件、耐中低電壓之MOSFET元件、和耐低電壓之MOSFET元件所組成群組之中的任一者。In one embodiment, the buffer amplifier includes a plurality of MOSFET elements, and each of the MOSFET elements is selected from any one of the group consisting of medium-high voltage MOSFET elements, medium-voltage MOSFET elements, medium-low voltage MOSFET elements, and low voltage MOSFET elements.
並且,本發明還提出一種顯示裝置,包括一顯示面板以及至少一個顯示驅動晶片,其中該顯示面板包括複數個X×Y個畫素電路以及X×Y個發光元件,X、Y為正整數,且所述顯示驅動晶片具有包括:一移位寄存器、一數據寄存器、一數據鎖存器、一電平移位器、複數個數位類比轉換器(DAC)、以及複數個緩衝放大器(Buffer amplifier)的一源極驅動電路;其特徵在於: 所述緩衝放大器偏置於一第一類比電壓以及一第二類比電壓之間,該第二類比電壓大於0V,且該第一類比電壓與該第二類比電壓之間具有一第一電壓差;以及 所述畫素電路偏置於一第一工作電壓以及一第二工作電壓之間,該第二工作電壓大於0V,且該第一工作電壓與該第二工作電壓之間具有一第二電壓差。 Furthermore, the present invention also proposes a display device, including a display panel and at least one display driver chip, wherein the display panel includes a plurality of X×Y pixel circuits and X×Y light-emitting elements, X and Y are positive integers, and the display driver chip has a source driver circuit including: a shift register, a data register, a data latch, a level shifter, a plurality of digital-to-analog converters (DACs), and a plurality of buffer amplifiers; the characteristics are: The buffer amplifier is biased between a first analog voltage and a second analog voltage, the second analog voltage is greater than 0V, and there is a first voltage difference between the first analog voltage and the second analog voltage; and The pixel circuit is biased between a first operating voltage and a second operating voltage, the second operating voltage is greater than 0V, and there is a second voltage difference between the first operating voltage and the second operating voltage.
在一實施例中,該第一工作電壓小於該第一類比電壓。In one embodiment, the first operating voltage is less than the first analog voltage.
在一實施例中,該第一電壓差與該第二電壓差皆小於8V。In one embodiment, the first voltage difference and the second voltage difference are both less than 8V.
在一實施例中,所述緩衝放大器包括複數個MOSFET元件,且各所述MOSFET元件皆為選自於由耐中高電壓之MOSFET元件、耐中電壓之MOSFET元件、耐中低電壓之MOSFET元件、和耐低電壓之MOSFET元件所組成群組之中的任一者。In one embodiment, the buffer amplifier includes a plurality of MOSFET elements, and each of the MOSFET elements is selected from any one of the group consisting of medium-high voltage MOSFET elements, medium-voltage MOSFET elements, medium-low voltage MOSFET elements, and low voltage MOSFET elements.
在一實施例中,所述畫素電路包括複數個TFT元件以及至少一個儲存電容,且各所述TFT元件皆為選自於由耐中高電壓之TFT元件、耐中電壓之TFT元件、耐中低電壓之TFT元件、和耐低電壓之TFT元件所組成群組之中的任一者。In one embodiment, the pixel circuit includes a plurality of TFT elements and at least one storage capacitor, and each of the TFT elements is selected from any one of the groups consisting of medium-high voltage resistant TFT elements, medium-voltage resistant TFT elements, medium-low voltage resistant TFT elements, and low voltage resistant TFT elements.
進一步地,本發明還提供一種資訊處理裝置,其特徵在於,包含如前所述本發明之顯示裝置。並且,在可行的實施例中,該資訊處理裝置為選自於由頭戴式顯示裝置、智慧型電視、智慧型手機、智慧型手錶、平板電腦、一體式電腦、筆記型電腦、車載娛樂裝置、數位相機、和視訊式門口機所組成群組之中的一種電子裝置。Furthermore, the present invention also provides an information processing device, which is characterized by comprising the display device of the present invention as described above. Moreover, in a feasible embodiment, the information processing device is an electronic device selected from the group consisting of a head-mounted display device, a smart TV, a smart phone, a smart watch, a tablet computer, an all-in-one computer, a notebook computer, a car entertainment device, a digital camera, and a video door machine.
為使 貴審查委員能進一步瞭解本發明之結構、特徵、目的、與其優點,茲附以圖式及較佳具體實施例之詳細說明如後。In order to enable the Review Committee to further understand the structure, features, purpose, and advantages of the present invention, the following are attached with drawings and detailed descriptions of preferred specific embodiments.
圖4為包含本發明之一種源極驅動電路的一顯示裝置的方塊圖。如圖4所示,該顯示裝置1係主要包括:一顯示面板11以及至少一個顯示驅動晶片12,其中該顯示面板11可以是但不限於OLED面板、LED面板、Micro-LED面板、或QLED面板,且其包括X×Y個畫素電路111以及X×Y個發光元件112,X、Y為正整數,且該顯示驅動晶片12含有本發明之源極驅動電路122。進一步地,圖5為圖4所示之源極驅動電路的方塊圖。如圖4所示,在一實施例中,該源極驅動電路122包括:一移位寄存器1221、一數據寄存器1222、一數據鎖存器1223、一電平移位器1224、複數個數位類比轉換器(DAC)1225、以及複數個緩衝放大器(Buffer amplifier)1226,其中,所述緩衝放大器1226係偏置於一第一類比電壓AVDD以及一第二類比電壓AVSS之間。FIG. 4 is a block diagram of a display device including a source driving circuit of the present invention. As shown in FIG. 4 , the
圖6為圖5所示之第一類比電壓AVDD和第二類比電壓AVSS的電壓準位圖。如圖5與圖6所示,該第二類比電壓AVSS大於接地電壓(即,0V),且該第一類比電壓AVDD與該第二類比電壓AVSS之間具有一第一電壓差ΔV1。依據本發明之設計,該第一電壓差ΔV1小於8V、5V、3V、或1.2V。具體地,所述緩衝放大器1226包括複數個MOSFET元件,且各所述MOSFET元件可以是一耐中高電壓之MOSFET元件、一耐中電壓之MOSFET元件、一耐中低電壓之MOSFET元件、或一耐低電壓之MOSFET元件。換句話說,本發明不採用耐高電壓之MOSFET元件來組成所述緩衝放大器1226。例如,可以採用耐中高電壓之MOSFET元件組成所述緩衝放大器1226,此時,該第一電壓差ΔV1小於8V。另外,若以耐中電壓之MOSFET元件組成所述緩衝放大器1226,則該第一電壓差ΔV1小於5V。進一步地,若以耐中低電壓之MOSFET元件組成所述緩衝放大器1226,則該第一電壓差ΔV1小於3V。再者,若以耐低電壓之MOSFET元件組成所述緩衝放大器1226,則該第一電壓差ΔV1小於1.2V。FIG6 is a voltage level diagram of the first analog voltage AVDD and the second analog voltage AVSS shown in FIG5 . As shown in FIG5 and FIG6 , the second analog voltage AVSS is greater than the ground voltage (i.e., 0V), and there is a first voltage difference ΔV1 between the first analog voltage AVDD and the second analog voltage AVSS. According to the design of the present invention, the first voltage difference ΔV1 is less than 8V, 5V, 3V, or 1.2V. Specifically, the
重複說明的是,習知技術通常採用多個耐高電壓的MOSFET元件來組成所述緩衝放大器1226,然而耐高電壓的MOSFET元件較易出現元件不匹配(mismatch)從而導致該緩衝放大器1226具有不一致的輸入偏移電壓(offset),引致與該複數個緩衝放大器1226耦接的複數個發光元件112具有不一樣的元件電流,因此出現發光亮度不均的現象。因此,本發明以耐中高電壓之MOSFET元件、耐中電壓之MOSFET元件、耐中低電壓之MOSFET元件、或耐低電壓之MOSFET元件來組成所述緩衝放大器1226,並依據所選MOSFET元件的類型而相應地調整該第一類比電壓AVDD和該第二類比電壓AVSS之間的第一電壓差。例如,由耐低電壓的MSFET元件組成所述緩衝放大器1226,且第一電壓差ΔV1<1.2V(即,gamma range)。如此,由於耐低電壓的MOSFET元件較不易出現元件不匹配(mismatch)現象,因此可以改善該複數個緩衝放大器1226之間的的輸入偏移電壓(offset)的誤差。同時,由於AVDD和AVSS之間的電壓差變小了,因此該顯示驅動晶片12的晶片功耗亦同步降低。It is reiterated that the prior art usually adopts multiple high-voltage MOSFET elements to form the
進一步地,圖7為圖4所示之畫素電路的電路拓樸圖。如圖7所示,可以利用7個TFT元件和一個儲存電容組成所述畫素電路111,亦即,7T1C結構。當然,在可行的實施例中,所述畫素電路111亦可為但不限於5T1C結構、6T1C結構、8T1C結構。依據本發明之設計,所述畫素電路111係偏置於一第一工作電壓ELVDD以及一第二工作電壓ELVSS之間,其中,該第一工作電壓ELVDD小於該第一類比電壓AVDD,該第二工作電壓ELVSS大於接地電壓(即,0V),且該第一工作電壓ELVDD與該第二工作電壓ELVSS之間具有一第二電壓差ΔV2。Furthermore, FIG. 7 is a circuit topology diagram of the pixel circuit shown in FIG. 4 . As shown in FIG. 7 , the
圖8為圖7所示之第一工作電壓ELVDD和第二工作電壓ELVSS的電壓準位圖。如圖7與圖8所示,依據本發明之設計,該第二電壓差ΔV2小於8V、5V、3V、或1.2V。具體地,所述畫素電路111包括複數個TFT元件以及至少一個儲存電容,且各所述TFT元件可以是一耐中高電壓之MOSFET元件、一耐中電壓之TFT元件、一耐中低電壓之TFT元件、或一耐低電壓之TFT元件。換句話說,本發明不採用耐高電壓之TFT元件來組成所述畫素電路111。例如,可以採用耐中高電壓之TFT元件組成所述畫素電路111,此時,該第二電壓差ΔV2小於8V。另外,若以耐中電壓之TFT元件組成所述畫素電路111,則該第二電壓差ΔV2小於5V。進一步地,若以耐中低電壓之TFT元件組成所述畫素電路1116,則該第二電壓差ΔV2小於3V。再者,若以耐低電壓之TFT元件組成所述畫素電路111,則該第二電壓差ΔV2小於1.2V。FIG8 is a voltage level diagram of the first operating voltage ELVDD and the second operating voltage ELVSS shown in FIG7. As shown in FIG7 and FIG8, according to the design of the present invention, the second voltage difference ΔV2 is less than 8V, 5V, 3V, or 1.2V. Specifically, the
習知技術通常採用多個耐高電壓的TFT元件來組成所述畫素電路111,然而耐高電壓的TFT元件較易出現元件不匹配(mismatch)從而導致相異電晶體之間出現閥值電壓(Vth)差異,最終引致該X×Y個發光元件112發光亮度不均。因此,本發明以耐中高電壓之TFT元件、耐中電壓之TFT元件、耐中低電壓之TFT元件、或耐低電壓之TFT元件來組成所述畫素電路111,並依據所選TFT元件的類型而相應地調整該第一工作電壓ELVDD和該第二工作電壓ELVSS之間的第二電壓差。例如,由耐低電壓的TFT元件組成所述畫素電路11126,且第二電壓差ΔV2<1.2V。如此,由於耐低電壓的TFT元件較不易出現元件不匹配(mismatch)現象,因此可以改善相異電晶體之間的閥值電壓(Vth)差異現象。The prior art generally uses a plurality of high-voltage TFT elements to form the
如此,上述已完整且清楚地說明本發明之源極驅動電路;並且,經由上述可得知本發明具有下列優點:Thus, the source driving circuit of the present invention has been fully and clearly described above; and, from the above, it can be known that the present invention has the following advantages:
(1)本發明揭示一種源極驅動電路,其係整合在一顯示驅動晶片之中,且包括:一移位寄存器、一數據寄存器、一數據鎖存器、一電平移位器、複數個數位類比轉換器(DAC)、以及複數個緩衝放大器(Buffer amplifier)。特別地,本發明設計所述緩衝放大器偏置於一第一類比電壓以及一第二類比電壓之間,且令二個類比電壓之間具有一電壓差。例如,電壓差ΔV<1.2V(即,gamma range)。如此,進行電路設計時,便可採用耐低電壓的MSFET元件組成所述緩衝放大器。由於耐低電壓的MOSFET元件較不易出現元件不匹配(mismatch)現象,因此可以改善該複數個緩衝放大器之間的的輸入偏移電壓(offset)的誤差。同時,由於電壓差變小了,因此該顯示驅動晶片的晶片功耗亦同步降低。(1) The present invention discloses a source drive circuit, which is integrated into a display driver chip and includes: a shift register, a data register, a data latch, a level shifter, a plurality of digital-to-analog converters (DACs), and a plurality of buffer amplifiers. In particular, the present invention designs the buffer amplifier to be biased between a first analog voltage and a second analog voltage, and to provide a voltage difference between the two analog voltages. For example, the voltage difference ΔV is less than 1.2V (i.e., gamma range). Thus, when designing the circuit, low-voltage-tolerant MSFET elements can be used to form the buffer amplifier. Since low voltage MOSFET components are less likely to have component mismatch, the input offset voltage error between the plurality of buffer amplifiers can be improved. At the same time, since the voltage difference is reduced, the chip power consumption of the display driver chip is also reduced.
(2)本發明同時揭示一種顯示裝置,其包括一顯示面板以及至少一個顯示驅動晶片,其中該顯示面板包括複數個X×Y個畫素電路以及X×Y個發光元件,且所述顯示驅動晶片含有如前所述本發明之源極驅動電路。並且,本發明設計所述畫素電路偏置於一第一工作電壓以及一第二工作電壓間,且令二個工作電壓之間具有一電壓差。例如,電壓差ΔV<1.2V。如此一來,進行電路設計時,可採用耐低電壓的TFT元件組成所述畫素電路。並且,由於耐低電壓的TFT元件較不易出現元件不匹配(mismatch)現象,因此可以改善相異電晶體之間的閥值電壓差異現象。(2) The present invention also discloses a display device, which includes a display panel and at least one display driver chip, wherein the display panel includes a plurality of X×Y pixel circuits and X×Y light-emitting elements, and the display driver chip contains the source driver circuit of the present invention as described above. In addition, the present invention designs the pixel circuit to be biased between a first operating voltage and a second operating voltage, and to have a voltage difference between the two operating voltages. For example, the voltage difference ΔV<1.2V. In this way, when designing the circuit, a low-voltage-resistant TFT element can be used to form the pixel circuit. Furthermore, since low-voltage TFT elements are less prone to element mismatch, the difference in threshold voltage between different transistors can be improved.
(3)並且,本發明同時提出一種資訊處理裝置,其特徵在於,包含如前所述本發明之顯示裝置。在可行的實施例中,該資訊處理裝置為選自於由頭戴式顯示裝置、智慧型電視、智慧型手機、智慧型手錶、平板電腦、一體式電腦、筆記型電腦、車載娛樂裝置、數位相機、和視訊式門口機所組成群組之中的一種電子裝置。(3) In addition, the present invention also provides an information processing device, which is characterized by comprising the display device of the present invention as described above. In a feasible embodiment, the information processing device is an electronic device selected from the group consisting of a head-mounted display device, a smart TV, a smart phone, a smart watch, a tablet computer, an all-in-one computer, a laptop computer, a car entertainment device, a digital camera, and a video door phone.
必須加以強調的是,前述本案所揭示者乃為較佳實施例,舉凡局部之變更或修飾而源於本案之技術思想而為熟習該項技藝之人所易於推知者,俱不脫本案之專利權範疇。It must be emphasized that what is disclosed in the above-mentioned case is a preferred embodiment. Any partial changes or modifications that are derived from the technical ideas of this case and are easily inferred by people familiar with the art do not deviate from the scope of the patent rights of this case.
綜上所陳,本案無論目的、手段與功效,皆顯示其迥異於習知技術,且其首先發明合於實用,確實符合發明之專利要件,懇請 貴審查委員明察,並早日賜予專利俾嘉惠社會,是為至禱。In summary, this case shows that its purpose, means and effects are all different from the known technology, and it is the first invention that is practical and indeed meets the patent requirements for invention. We sincerely request the review committee to examine this carefully and grant a patent as soon as possible to benefit the society. This is our utmost prayer.
1a:OLED顯示裝置
11a:OLED面板
111a:畫素電路
112a:OLED元件
120a:顯示控制器
121a:閘極驅動單元
122a:源極驅動單元
1221a:移位寄存器
1222a:數據寄存器
1223a:數據鎖存器
1224a:電平移位器
1225a:數位類比轉換器
1226a:緩衝放大器
123a:發光調控單元
1:顯示裝置
11:顯示面板
111:畫素電路
112:發光元件
12:顯示驅動晶片
122:源極驅動電路
1221:移位寄存器
1222:數據寄存器
1223:數據鎖存器
1224:電平移位器
1225:數位類比轉換器
1226:緩衝放大器
1a: OLED display device
11a:
圖1為習知的一種OLED顯示裝置的方塊圖; 圖2為圖1所示之畫素電路的電路拓樸圖; 圖3為圖1所示之源極驅動單元的電路方塊圖; 圖4為包含本發明之一種源極驅動電路的一顯示裝置的方塊圖; 圖5為圖4所示之源極驅動電路的方塊圖; 圖6為圖5所示之第一類比電壓和第二類比電壓的電壓準位圖; 圖7為圖4所示之畫素電路的電路拓樸圖;以及 圖8為圖7所示之第一工作電壓和第二工作電壓的電壓準位圖。 FIG. 1 is a block diagram of a known OLED display device; FIG. 2 is a circuit topology diagram of the pixel circuit shown in FIG. 1; FIG. 3 is a circuit block diagram of the source drive unit shown in FIG. 1; FIG. 4 is a block diagram of a display device including a source drive circuit of the present invention; FIG. 5 is a block diagram of the source drive circuit shown in FIG. 4; FIG. 6 is a voltage level diagram of the first analog voltage and the second analog voltage shown in FIG. 5; FIG. 7 is a circuit topology diagram of the pixel circuit shown in FIG. 4; and FIG. 8 is a voltage level diagram of the first operating voltage and the second operating voltage shown in FIG. 7.
122:源極驅動電路 122: Source drive circuit
1221:移位寄存器 1221: Shift register
1222:數據寄存器 1222: Data register
1223:數據鎖存器 1223: Data lock register
1224:電平移位器 1224:Level shifter
1225:數位類比轉換器 1225: Digital to Analog Converter
1226:緩衝放大器 1226: Buffer amplifier
Claims (7)
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Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
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TW200709157A (en) * | 2005-08-19 | 2007-03-01 | Toppoly Optoelectronics Corp | An active matrix organic light emitting diodes pixel circuit |
TW201802787A (en) * | 2016-03-21 | 2018-01-16 | 二勞額市首有限公司 | Level shifter, digital-to-analog converter, and buffer amplifier, and source driver and electronic device including the same |
US20230121344A1 (en) * | 2021-10-18 | 2023-04-20 | Samsung Display Co., Ltd. | Display device |
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Publication number | Priority date | Publication date | Assignee | Title |
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TW200709157A (en) * | 2005-08-19 | 2007-03-01 | Toppoly Optoelectronics Corp | An active matrix organic light emitting diodes pixel circuit |
TW201802787A (en) * | 2016-03-21 | 2018-01-16 | 二勞額市首有限公司 | Level shifter, digital-to-analog converter, and buffer amplifier, and source driver and electronic device including the same |
US20230121344A1 (en) * | 2021-10-18 | 2023-04-20 | Samsung Display Co., Ltd. | Display device |
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