TWI853395B - Modulation device and modulation method of output curret peak - Google Patents

Abstract

A modulation device is configured to modulate an output current peak of a power source. The modulation device includes a first comparing circuit, a second comparing circuit, and a logic control circuit. The first comparing circuit is configured to compare a first integrated value, which is generated by integrating the output current during a first period, and a first predetermined value, and generate a first comparing result when the first integrated value is larger than or equal to the first predetermined value. The second comparing circuit is configured to compare a second integrated value, which is generated by integrating the output current during a second period, and a second predetermined value, and generate a second comparing result when the second integrated value is larger than or equal to the second predetermined value. When the logic control circuit receives the first comparing result or the second comparing result, the logic control circuit outputs a reducing signal so as to reduce the output current peak.

Description

Output current peak value regulation device and regulation method

The present invention relates to a control device and a control method, and in particular to an output current peak value control device and a control method for an electronic device for providing output electric energy.

When electronic products are started, they often require external electronic equipment to provide a large current to start the electronic products. The electronic equipment can be, for example, a power supply or a source measure unit (SMU). Although the electronic equipment does not provide a large current for a long time, it is still possible that the electronic equipment triggers the protection mechanism, resulting in a prolonged startup time of the electronic product, or even a failure to start up. Therefore, the industry is in urgent need of finding a solution.

The content of the invention is intended to provide a simplified summary of the disclosure so that readers can have a basic understanding of the disclosure. This content of the invention is not a complete overview of the disclosure, and it is not intended to point out the important/key elements of the embodiments of the present case or to define the scope of the present case.

One technical aspect of the present case is a control device for controlling the output current peak value of an electronic device. The control device includes a first comparison circuit, a second comparison circuit, and a logic control circuit. The first comparison circuit is used to compare a first integral value of the output current in a first cycle with a first preset value, and to generate a first comparison result when the first integral value is greater than or equal to the first preset value. The second comparison circuit is used to compare a second integral value of the output current in a second cycle with a second preset value, and to generate a second comparison result when the second integral value is greater than or equal to the second preset value. When the logic control circuit receives the first comparison result or the second comparison result, the logic control circuit outputs a reduction signal to reduce the output current peak value.

In one embodiment, the control device further includes a third comparison circuit, which is used to compare the third integral value of the output current in the preset cycle with the third preset value after the preset cycle, and generate a third comparison result when the third integral value is less than the third preset value. When the logic control circuit receives the third comparison result, the logic control circuit outputs an increase signal to increase the output current peak value.

In one embodiment, the control device further includes an absolute value circuit, which is used to take an absolute value of the current value of the output current to generate an absolute current value. The first comparison circuit, the second comparison circuit, and the third comparison circuit are used to compare the first integral value of the absolute current value in the first cycle with the first preset value, the second integral value of the absolute current value in the second cycle with the second preset value, and the third integral value of the absolute current value in the preset cycle with the third preset value.

In one embodiment, the control device further comprises at least one integrating circuit for integrating the absolute value of the output current to generate a first integrated value in a first cycle, a second integrated value in a second cycle, and a third integrated value in a preset cycle.

In one embodiment, the regulation device further includes a peak adjustment circuit, which is used to receive a reduction signal to reduce the output current peak value of the output current, or receive an increase signal to increase the output current peak value of the output current.

Another technical aspect of the present case is a control method for controlling the output current peak value of an electronic device. The control method includes the following steps: comparing a first integrated value of the output current in a first cycle with a first preset value, and generating a first comparison result when the first integrated value is greater than or equal to the first preset value; comparing a second integrated value of the output current in a second cycle with a second preset value, and generating a second comparison result when the second integrated value is greater than or equal to the second preset value; and outputting a reduction signal in response to the first comparison result or the second comparison result to reduce the output current peak value.

In one embodiment, the control method further includes the following steps: after a preset cycle, comparing a third integrated value of the output current in the preset cycle with a third preset value, and generating a third comparison result when the third integrated value is less than the third preset value; and outputting an increase signal in response to the third comparison result to increase the output current peak value.

In one embodiment, before comparing the first integrated value of the output current in the first cycle with the first preset value and generating a first comparison result when the first integrated value is greater than or equal to the first preset value, the method further includes: taking an absolute value of the output current.

In one embodiment, the control method further includes integrating the absolute value of the output current to generate a first integrated value in a first cycle, a second integrated value in a second cycle, and a third integrated value in a preset cycle.

In one embodiment, the control method further includes: reducing the output current peak value in response to a reduction signal, or increasing the output current peak value in response to an increase signal.

Therefore, according to the technical content of the present case, the control device and control method shown in the embodiment of the present case can temporarily increase the output current peak value of the electronic device when the electronic device is started, and can flexibly adjust the output current peak time, thereby achieving the purpose of providing a larger current for turning on when the electronic device is started, and can adjust the length of time to avoid the power supply end equipment triggering the protection mechanism, thereby solving the problem of prolonged startup time or inability to start up the electronic device.

In order to make the description of the disclosure more detailed and complete, the following provides an illustrative description of the implementation and specific embodiments of the present invention; however, this is not the only form of implementing or using the specific embodiments of the present invention. The implementation covers the features of multiple specific embodiments and the method steps and their sequence for constructing and operating these specific embodiments. However, other specific embodiments may also be used to achieve the same or equivalent functions and step sequences.

Unless otherwise defined in this specification, the scientific and technical terms used herein have the same meanings as those understood and used by persons of ordinary skill in the art to which this case belongs. In addition, singular terms used in this specification include the plural form of the terms, and plural terms also include the singular form of the terms, unless otherwise conflicting with the context.

In addition, the term “coupled” as used herein may refer to two or more elements being in direct physical or electrical contact with each other, or being in indirect physical or electrical contact with each other, or may refer to two or more elements operating or moving with each other.

Please refer to FIG. 1A and FIG. 1B. FIG. 1A is a schematic diagram of an electronic device 10, a control device 100 and an electronic product 200 according to an embodiment of the present invention, and FIG. 1B is a schematic diagram of a control device 100 according to an embodiment of the present invention. As shown in the figure, the control device 100 is used to control the output current peak value (i.e., the maximum current point of the output current) of the electronic device 10 so that the electronic device 10 supplies power to the electronic product 200. The control device 100 includes a first comparison circuit 150, a second comparison circuit 160 and a logic control circuit 180. The first comparison circuit 150 and the second comparison circuit 160 are coupled to the logic control circuit 180.

In operation, the first comparison circuit 150 is used to compare the first integrated value of the output current in the first cycle with the first preset value, and generates a first comparison result when the first integrated value is greater than or equal to the first preset value. The second comparison circuit 160 is used to compare the second integrated value of the output current in the second cycle with the second preset value, and generates a second comparison result when the second integrated value is greater than or equal to the second preset value. When the logic control circuit 180 receives the first comparison result or the second comparison result, the logic control circuit 180 outputs a reduction signal to reduce the output peak value of the output current.

For example, when the electronic device is started, the output current of the electronic device at the power supply end is temporarily increased to assist the electronic device to start up. The default state of the present case is that the output peak value of the output current is high, for example, set to 5V (volts). At this time, the switch 120 of the control device 100 is switched to the side of the first comparison circuit 150 and the second comparison circuit 160 (as shown below), and the first comparison circuit 150 and the second comparison circuit 160 determine whether the output peak value of the output current needs to be switched to a low value to avoid damage to the internal components of the power supply end.

The judgment condition of the first comparison circuit 150 is to judge whether the integral value of the output current is greater than or equal to the first preset value within a first cycle. For example, the first comparison circuit 150 judges whether the integral value of the output current within 10 ms (milliseconds) is greater than or equal to the first preset value. If the integral value of the output current is greater than or equal to the first preset value, the first comparison circuit 150 generates a first comparison result.

The judgment condition of the second comparison circuit 160 is to judge whether the integral value of the output current is greater than or equal to the second preset value within a second cycle. For example, the second comparison circuit 160 will judge whether the integral value of the output current within 500 ms is greater than or equal to the second preset value. If the integral value of the output current is greater than or equal to the second preset value, the second comparison circuit 160 generates a second comparison result. It should be noted that the first preset value and the second preset value can be set to be equal or unequal according to the actual needs of the case. For example, the first default value can be set to but not limited to 60000A, and the second default value can be set to but not limited to 60000*20A, that is, the second default value can be 20 times the first default value, but the time length is 50 times (500ms/10ms).

If any of the above judgment conditions is met, the logic control circuit 180 will receive the first comparison result transmitted by the first comparison circuit 150 or the second comparison result transmitted by the second comparison circuit 160. At this time, the logic control circuit 180 outputs a reduction signal to reduce the output peak value of the output current to avoid damage to the internal components of the electronic equipment at the power supply end.

In one embodiment, the control device 100 further includes a third comparison circuit 170. The third comparison circuit 170 is coupled to the logic control circuit 180. After a preset period, the third comparison circuit 170 compares the third integral value of the output current in the preset period with the third preset value, and generates a third comparison result when the third integral value is less than the third preset value. When the logic control circuit 180 receives the third comparison result, the logic control circuit 180 outputs an increase signal to increase the output peak value of the output current.

For example, the judgment condition of the third comparison circuit 170 is to judge whether the duration exceeds a preset cycle, and to judge whether the integral value of the output current within the preset cycle is less than the preset current value. For example, the third comparison circuit 170 will judge whether the duration reaches 500 ms, and after 500 ms, the third comparison circuit 170 will judge whether the integral value of the output current within 500 ms is less than the preset value. If the integral value of the output current is less than the preset value, the third comparison circuit 170 generates a third comparison result. If the above judgment condition is met, the logic control circuit 180 will receive the third comparison result. At this time, the logic control circuit 180 outputs an increase signal to increase the output peak value of the output current.

In one embodiment, the control device 100 further includes an absolute value circuit 110. Since the output current of the power supply end electronic device can be an alternating current, the absolute value circuit 110 is required to take the absolute value of the output current to generate the absolute value of the current, so as to facilitate the subsequent integral operation. For example, the first comparison circuit 150, the second comparison circuit 160 and the third comparison circuit 170 can be used to compare the first integral value of the absolute current value in the first cycle with the first preset value, compare the second integral value of the absolute current value in the second cycle with the second preset value, and compare the third integral value of the absolute current value in the preset cycle with the third preset value.

In one embodiment, the control device 100 further includes at least one integration circuit, such as a first integration circuit 130 and a second integration circuit 140. The at least one integration circuit is used to integrate the absolute value of the output current. For example, when the switch 120 is switched to the side of the first comparison circuit 150 and the second comparison circuit 160 (such as the lower side), the first integration circuit 130 generates a first integrated value in a first cycle and transmits it to the first comparison circuit 150 for a subsequent comparison process. The first integration circuit 130 generates a second integrated value in a second cycle and transmits it to the second comparison circuit 160 for a subsequent comparison process. When the switch 120 is switched to the third comparison circuit 170 side (such as the upper side), the second integration circuit 140 generates a third integrated value within a preset period and transmits it to the third comparison circuit 170 for subsequent comparison processes. It should be noted that the switch 120 can be preset to switch to the side of the first comparison circuit 150 and the second comparison circuit 160 (as shown on the lower side). When the output peak value of the output current switches to low, the switch 120 is switched to the side of the third comparison circuit 170 (as shown on the upper side). Subsequently, when the output peak value of the output current switches to high, the switch 120 is switched again to the side of the first comparison circuit 150 and the second comparison circuit 160 (as shown on the lower side).

In one embodiment, the control device 100 further includes a peak adjustment circuit 190, which is coupled to the logic control circuit 180. The peak adjustment circuit 190 is used to receive a down-regulation signal from the logic control circuit 180 and generate a peak adjustment signal Sout to downregulate the output peak value of the output current, or the peak adjustment circuit 190 receives an up-regulation signal from the logic control circuit 180 and generates a peak adjustment signal Sout to upregulate the output peak value of the output current. It should be noted that the present invention is not limited to the structure shown in FIG. 1B, which is only used to illustrate one of the implementation methods of the present invention to make the technology of the present invention easy to understand, and the patent scope of the present invention shall be based on the scope of the invention application. Without departing from the spirit of this case, any modification and improvement made by technical personnel in this field to the practical example of this case shall still fall within the scope of the invention patent application of this case.

FIG. 2 is a waveform diagram of relevant parameters of a control device 100 as shown in FIG. 1B according to an embodiment of the present invention. As shown in the figure, the output current of the power supply is Iout. The first integral value in the first cycle is Intel. The second integral value in the second cycle is Inte2. The peak adjustment signal is Sout. In the first cycle from 0S (seconds) to 0.01S (seconds), the first integral value Intel continues to increase. However, after a first cycle, the first integral value Intel is not greater than or equal to the first preset value, so the peak adjustment signal Sout still maintains a high level. In addition, since the first integrated value Intel in the first cycle 0S to 0.01S is not greater than or equal to the first preset value, the first integrated value Intel will be cleared and recalculated from another first cycle 0.01S to 0.02S, and the comparison will be performed again, and so on. Assuming that in any first cycle, the first integrated value Intel is greater than or equal to the first preset value, the peak adjustment signal Sout will be adjusted from a high level to a low level to reduce the output peak value of the electronic device.

In the second cycle from 0S (seconds) to 0.05S (seconds), the second integrated value Inte2 continues to increase. As shown in the figure, in the interval from 0.03S to 0.04S, the second integrated value Inte2 is greater than or equal to the second preset value. Therefore, the peak adjustment signal Sout is adjusted from a high level to a low level to reduce the output peak value of the power supply. After reducing the output peak value of the power supply, it can be seen from the interval from 0.04S to 0.05S that the output current Iout is limited to a lower level.

FIG. 3 is a schematic diagram of the waveforms of the relevant parameters of the control device 100 shown in FIG. 1B according to an embodiment of the present invention. As shown in the figure, the output current of the power supply is Iout. The third integral value within the preset period is Inte3. The count value is Tcount, for example, 1count is 10us. The peak adjustment signal is Sout. After the preset period 0S to 0.05S, it is determined whether the third integral value Inte3 is less than the third preset value. It can be seen from the figure that even if the preset period 0S to 0.05S continues, the third integral value Inte3 is still less than the third preset value, therefore, the peak adjustment signal Sout is adjusted from a low level to a high level to increase the output peak value of the power supply. After the output peak value of the power supply is increased, it can be seen from the interval of 0.05S to 0.06S that the output current Iout has returned to a higher level. It should be noted that the present case is not limited to the parameters shown in Figures 2 and 3, which are only used to illustrate one of the implementation methods of the present case to make the technology of the present case easy to understand. The patent scope of the present case shall be based on the scope of the invention application. Without departing from the spirit of the present case, the modifications and embellishments made by the technical personnel in this field to the implementation example of the present case still fall within the scope of the invention application of the present case.

FIG. 4 is a schematic diagram showing a process flow of a control method 400 according to an embodiment of the present invention. To make the control method 400 easier to understand, please refer to FIG. 1B and FIG. 4 together. The detailed process flow of the control method 400 will be introduced later.

In step 410, the first integrated value of the output current in the first cycle is compared with the first preset value, and a first comparison result is generated when the first integrated value is greater than or equal to the first preset value. For example, the first comparison circuit 150 determines whether the integrated value of the output current in the first cycle (e.g., 10 ms) is greater than or equal to the first preset value. If the integrated value of the output current is greater than or equal to the first preset value, the first comparison circuit 150 generates a first comparison result.

In step 420, the second integral value of the output current in the second cycle is compared with the second preset value, and a second comparison result is generated when the second integral value is greater than or equal to the second preset value. For example, the second comparison circuit 160 determines whether the integral value of the output current in the second cycle (such as 500 ms) is greater than or equal to the second preset value. If the integral value of the output current is greater than or equal to the second preset value, the second comparison circuit 160 generates a second comparison result. It should be noted that the first preset value and the second preset value can be set to be equal or unequal according to the actual needs of the case.

In step 430, a reduction signal is outputted in response to the first comparison result or the second comparison result to reduce the output peak value of the output current. For example, if any of the above judgment conditions is met, the logic control circuit 180 receives the first comparison result or the second comparison result. At this time, the logic control circuit 180 outputs a reduction signal to reduce the output peak value of the output current to avoid damage to the internal components of the power supply end electronic equipment and trigger the protection mechanism.

In step 440, after a preset cycle, the third integral value of the output current in the preset cycle is compared with the third preset value, and a third comparison result is generated when the third integral value is less than the third preset value. For example, the third comparison circuit 170 determines whether the duration reaches 500 ms. When the duration reaches 500 ms, the third comparison circuit 170 determines whether the integral value of the output current within 500 ms is less than the current preset value. If the integral value of the output current is less than the current preset value, the third comparison circuit 170 generates a third comparison result.

In step 450, an increase signal is outputted in response to the third comparison result to increase the output peak value of the output current. For example, if the above judgment condition is met, the logic control circuit 180 receives the third comparison result, and at this time, the logic control circuit 180 outputs an increase signal to increase the output peak value of the output current.

In one embodiment, the control method 400 further includes the following steps: integrating the absolute current value of the output current to generate a first integrated value in a first cycle, a second integrated value in a second cycle, and a third integrated value in a preset cycle. For example, the first integration circuit 130 and the second integration circuit 140 are respectively used to integrate the absolute current value of the output current to generate the first integrated value in the first cycle, the second integrated value in the second cycle, and the third integrated value in the preset cycle.

In one embodiment, the control method 400 further includes the following steps: taking an absolute value of the output current to generate an absolute current value. Since the output current of the power source can be an AC current, the absolute value circuit 110 is required to take an absolute value of the output current to generate an absolute current value, so as to facilitate subsequent integration operations. For example, the first comparison circuit 150, the second comparison circuit 160 and the third comparison circuit 170 can be used to compare the first integral value of the absolute current value in the first cycle with the first preset value, compare the second integral value of the absolute current value in the second cycle with the second preset value, and compare the third integral value of the absolute current value in the preset cycle with the third preset value.

In one embodiment, the control method 400 further includes the following steps: generating a peak adjustment signal in response to a reduction signal to reduce the output peak value of the output current, or generating a peak adjustment signal in response to an increase signal to increase the output peak value of the output current. For example, the peak adjustment circuit 190 is used to receive the reduction signal from the logic control circuit 180 and generate the peak adjustment signal Sout to reduce the output peak value of the output current, or the peak adjustment circuit 190 receives the increase signal from the logic control circuit 180 and generates the peak adjustment signal Sout to increase the output peak value of the output current.

It should be noted that this case is not limited to the process shown in Figure 4, which is only used to illustrate one of the implementation methods of this case to make the technology of this case easy to understand. The scope of the patent of this case shall be based on the scope of the invention application. The modification and embellishment of the embodiment of this case by the technical personnel in this field without departing from the spirit of this case still falls within the scope of the invention application of this case.

FIG. 5 is a schematic flow chart of a control method 500 according to an embodiment of the present invention. To make the control method 500 easier to understand, please refer to FIG. 1B and FIG. 5 together. In step 501, the output peak value is preset to be high, for example, the output peak value is preset to be 5V. In step 502, the absolute value circuit 110 takes an absolute value of the output current to generate an absolute current value. In step 503, it is determined whether the output peak value is high. If the output peak value is high, the right side step in the figure is executed.

In step 504, the absolute value of the current is integrated for the first period to obtain a first integrated value. In step 505, the first comparison circuit 150 determines whether the first integrated value is greater than or equal to the first preset value. If the first integrated value is greater than or equal to the first preset value, step 506 is executed to reduce the output peak value and adjust the parameters in the control method 500 (such as the first integrated value, the second integrated value, the first count value and the second count value) to 0, and then step 502 is executed again. If the first integrated value is not greater than the first preset value, step 507 is executed to increase the first count value by 1.

In step 508, it is determined whether the first count value reaches 1000. If the first count value does not reach 1000, the process returns to step 502. If the first count value reaches 1000, the process returns to step 509 to adjust the first integral value and the first count value to 0, and then returns to step 502.

In addition, in step 510, the absolute value of the current is integrated for the second cycle to obtain a second integrated value. In step 511, the second comparison circuit 160 determines whether the second integrated value is greater than or equal to the second preset value. If the second integrated value is greater than or equal to the second preset value, step 506 is executed to reduce the output peak value and adjust the parameters in the control method 500 (such as the first integrated value, the second integrated value, the first count value and the second count value) to 0, and then step 502 is returned to execute. If the second integrated value is not greater than the second preset value, step 512 is executed to increase the second count value by 1.

In step 513, it is determined whether the second count value reaches 50000. If the second count value does not reach 50000, the process returns to step 502. If the second count value reaches 50000, the process returns to step 514, adjusts the second integral value and the second count value to 0, and then returns to step 502.

Please refer to step 503. If it is determined that the output peak value is not high, the left step in the figure is executed. In step 515, the absolute value of the current is integrated for a preset period to obtain a third integral value. In step 516, it is determined whether the third count value reaches 50,000. If the third count value does not reach 50,000, step 517 is executed to increase the third count value by 1, and then, step 502 is executed again. If the third count value reaches 50,000, step 518 is executed, and the third comparison circuit 170 will determine whether the third integral value is less than the third preset value. If the third integral value is less than the third preset value, step 520 is executed to increase the output peak value, and the parameters in the control method 500 (such as the third integral value and the third count value) are adjusted to 0, and then the process returns to step 502. If the third integral value is not less than the third preset value, step 519 is executed to adjust the third integral value and the third count value to 0, and then the process returns to step 502. It should be noted that the present invention is not limited to the process shown in FIG. 5, which is only used to illustrate one of the implementation methods of the present invention to make the technology of the present invention easy to understand, and the patent scope of the present invention shall be based on the scope of the invention application. Without departing from the spirit of this case, any modification and improvement made by technical personnel in this field to the practical example of this case shall still fall within the scope of the invention patent application of this case.

From the above implementation of the present case, it can be seen that the application of the present case has the following advantages. The control device and control method shown in the embodiment of the present case can temporarily increase the output current peak value of the electronic device at the power supply end when the electronic device is started, and can flexibly adjust the time of temporarily increasing the output current peak value, thereby achieving the purpose of providing a larger current for opening when the electronic device is started, and the length of time can be adjusted to avoid damage to the internal components of the electronic device at the power supply end and trigger the protection mechanism.

Although the above implementation method discloses a specific implementation example of the present case, it is not intended to limit the present case. A person with ordinary knowledge in the technical field to which the present case belongs can make various changes and modifications without deviating from the principle and spirit of the present case. Therefore, the scope of protection of the present case shall be based on that defined by the scope of the accompanying patent application.

10: Electronic equipment 100: Control device 110: Absolute value circuit 120: Switch 130: First integral circuit 140: Second integral circuit 150: First comparison circuit 160: Second comparison circuit 170: Third comparison circuit 180: Logical control circuit 190: Peak adjustment circuit 200: Electronic product 400: Method 410~450: Step 500: Method 501~520: Step Iout: Output current Intel: First integral value Inte2: Second integral value Inte3: Third integral value Sout: Peak adjustment signal Tcount: Count value

In order to make the above and other purposes, features, advantages and embodiments of the present invention more clearly understandable, the attached drawings are described as follows: Figure 1A is a schematic diagram of an electronic device, a control device and an electronic product according to an embodiment of the present invention. Figure 1B is a schematic diagram of a control device according to an embodiment of the present invention. Figure 2 is a schematic diagram of a waveform of relevant parameters of a control device according to an embodiment of the present invention. Figure 3 is a schematic diagram of a waveform of relevant parameters of a control device according to an embodiment of the present invention. Figure 4 is a schematic diagram of a flow chart of a control method according to an embodiment of the present invention. Figure 5 is a schematic diagram of a flow chart of a control method according to an embodiment of the present invention. According to the usual practice, the various features and components in the figure are not drawn to scale. The drawing method is to present the specific features and components related to the case in the best way. In addition, the same or similar component symbols are used to refer to similar components/parts between different figures.

Domestic storage information (please note in the order of storage institution, date, and number) None Foreign storage information (please note in the order of storage country, institution, date, and number) None

100: Control device 110: Absolute value circuit 120: Switch 130: First integration circuit 140: Second integration circuit 150: First comparison circuit 160: Second comparison circuit 170: Third comparison circuit 180: Logic control circuit 190: Peak adjustment circuit Iout: Output current Sout: Peak adjustment signal

Claims (8)

A control device is used to control an output current peak value of an output current of an electronic device. The control device comprises: an absolute value circuit, used to take an absolute value of a current value of the output current to generate an absolute current value; at least one integration circuit, used to integrate the absolute current value to generate a first integrated value in a first cycle and a second integrated value in a second cycle; a first comparison circuit, used to compare the first integrated value of the output current in the first cycle with a first preset value. and generating a first comparison result when the first integral value is greater than or equal to the first preset value; a second comparison circuit for comparing the second integral value of the output current in the second cycle with a second preset value, and generating a second comparison result when the second integral value is greater than or equal to the second preset value; and a logic control circuit, wherein when the logic control circuit receives the first comparison result or the second comparison result, the logic control circuit outputs a reduction signal to reduce the output current peak value. The control device as described in claim 1 further comprises: a third comparison circuit for comparing a third integral value of the output current in the preset cycle with a third preset value after a preset cycle, and generating a third comparison result when the third integral value is less than the third preset value; wherein when the logic control circuit receives the third comparison result, the logic control circuit outputs an increase signal to increase the output current peak value. The control device as described in claim 2, wherein the at least one integration circuit is further used to integrate the absolute current value of the output current to generate the third integrated value within the preset cycle. The control device as described in claim 3 further comprises: a peak adjustment circuit for receiving the down-regulation signal and generating a peak adjustment signal to down-regulate the output current peak value of the output current, or receiving the up-regulation signal and generating the peak adjustment signal to up-regulate the output current peak value of the output current. A control method is used to control an output current peak value of an output current of an electronic device. The control method comprises: taking an absolute value of the output current to obtain an absolute current value; integrating the absolute current value to generate a first integral value in a first cycle and a second integral value in a second cycle; comparing the first integral value of the output current in the first cycle with a first preset value, and generating a first comparison result when the first integral value is greater than or equal to the first preset value; comparing the second integral value of the output current in the second cycle with a second preset value, and generating a second comparison result when the second integral value is greater than or equal to the second preset value; and responding to the first comparison result or the second comparison result to output a reduction signal to reduce the output current peak value. The control method as described in claim 5 further includes: after a preset cycle, comparing a third integral value of the output current in the preset cycle with a third preset value, and generating a third comparison result when the third integral value is less than the third preset value; and outputting an increase signal in response to the third comparison result to increase the output current peak value. The control method as described in claim 6 further includes: integrating the absolute current value of the output current to generate the third integrated value within the preset cycle. The control method as described in claim 7 further includes: generating a peak adjustment signal in response to the down-regulation signal to reduce the output current peak value, or generating the peak adjustment signal in response to the up-regulation signal to increase the output current peak value.

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