TWI849347B - Manufacturing method of chemically plated nickel bump structure of wafer pad - Google Patents

Abstract

A method for manufacturing a chemically plated nickel bump structure of a wafer pad, wherein the chemically plated nickel bump structure includes a plurality of seed layers, each of which is formed by using an electroless nickel method in a plurality of blind holes of a plurality of photoresist layers on a wafer to form a plurality of chemically plated nickel bumps made of electroless nickel (chemically plated nickel), which effectively solves the problem that the bumps produced by the existing electroless metal method using electroless nickel (electroless nickel) have uneven size, thickness or shape or are not as expected, and is conducive to improving the yield of products.

Description

Manufacturing method of electroless nickel bump structure for wafer pad

The present invention is a method for manufacturing a chemically plated nickel bump structure, and in particular, a method for manufacturing a chemically plated nickel bump structure for a wafer pad.

In the field of semiconductor chip or wafer connection (such as solder bump), packaging or related processes, there are many prior arts, such as: Republic of China invention patents I306638, I320588, I255538, I459362, I253733, I273651, I288447, I295498, I241658, I259572, I472371, I242866, I269461, I329917, I282132, I328266, and I284949; and U.S. invention patents US8,030,767, US7,981,725, US 7,969,003, US7,960,214, US7,847,414, US7,749,806, US7,651,886, US7,538,020, US7,750,467, US7,364,944, US7,019,406, US6,507,120, US7,999,387, US7,993,967, US7,868,470, US7,868,449, US7,972,902, US7,960,825, US7,952,187, US7,944,043, US7,934,313, and US7,906,855, etc. The above-mentioned prior arts are almost all minor improvements in their technical fields. It can be seen that in the field of semiconductor chip or wafer connection, packaging or related processes, the space for technological development is already quite limited. Therefore, in this field of limited technological development space (in the field of the crowded art), if there can be a slight improvement in technology, it can also be regarded as progressive.

The bump structure and its manufacturing process of the prior art are difficult to meet the requirements of actual use. Therefore, in the technical field of the bump structure and its manufacturing method of the wafer pad, a bump structure with simplified manufacturing process, reduced manufacturing cost, bump surface hardness meeting the requirements of the subsequent process, and provided with a side wall outer protection layer is developed and designed, as disclosed in the Republic of China Patent I466255. However, the bump structure in patent I466255 uses an electroless nickel electroless metal method and a photoresist method to form a bump of appropriate height and made of electroless nickel on the surface of the catalyst layer on the surface of the pad, which is also called electroless nickel bump. The bump produced by the electroless nickel electroless metal method may have uneven size, thickness or shape or be not as expected, which affects the yield of the product.

From the above, it can be seen that a bump (also called electroless nickel bump) with uniform size, thickness or shape or an electroless nickel bump structure that meets the expected wafer pad is currently eagerly awaited by the relevant industry.

The main purpose of the present invention is to provide a method for manufacturing a chemically plated nickel bump structure of a wafer pad, wherein the chemically plated nickel bump structure includes a plurality of seed layers, each of which is formed by using an electroless nickel method in a plurality of blind holes of a plurality of photoresist layers on a wafer to form a plurality of chemically plated nickel bumps made of electroless nickel (chemically plated nickel), which effectively solves the problem that the bumps produced by the existing electroless metal method using electroless nickel (electroless nickel) have uneven size, thickness or shape or are not as expected, which is beneficial to improving the yield of products.

To achieve the above-mentioned purpose, the present invention provides a nickel-plated bump structure for wafer pads, the nickel-plated bump structure comprising a wafer, a plurality of seed layers and a plurality of nickel-plated bumps; wherein the wafer has a surface, and a plurality of pads are disposed on the surface; wherein each of the seed layers is disposed on the surface of the wafer in a covering manner and covers each of the pads; wherein each of the seed layers is electrically connected to each of the pads of the wafer; wherein each of the nickel-plated bumps is formed by using electroless nickel. At least one electroplated nickel bump with a suitable height and a desired shape is formed on the surface of each seed layer, wherein each electroplated nickel bump is electrically connected to each seed layer; wherein the position and shape of each electroplated nickel bump corresponds to and covers each solder pad of the wafer, so that each electroplated nickel bump can be connected to each seed layer by each The seed layer is electrically connected to each of the pads; wherein the electroless nickel bump structure is further manufactured by a method for manufacturing an electroless nickel bump structure, and the method for manufacturing an electroless nickel bump structure comprises the following steps: step S1: providing a wafer, the wafer having a surface, and a plurality of pads are disposed on the surface; step S2: disposing a plurality of seed layers (seed layers) on the surface of the wafer step S3: covering the surface of each seed layer with a first photoresist layer; step S4: drilling at least one first blind hole in the first photoresist layer, each of which is connected to each seed layer; step S5: drilling a hole in each seed layer using electroless nickel; A plurality of electroless nickel (electrolytic nickel) plated nickel bumps are formed in the first blind holes of the first photoresist layer by a nickel-nickel method; wherein each of the electrolytic nickel bumps is electrically connected to each of the seed layers; wherein the position and shape of each of the electrolytic nickel bumps correspond to and cover each of the pads of the wafer, so that each of the The electroless nickel bumps can be electrically connected to the pads through the seed layers; step S6: removing the first photoresist layer from the surface of the seed layers to expose the electroless nickel bumps; and step S7: removing the portions of the seed layers on the wafer that are not covered by the electroless nickel bumps, which is beneficial to improving the yield of the product.

In another preferred embodiment of the present invention, the thickness of each electroless nickel plated bump is approximately 2-14 microns (μm).

Another object of the present invention is to provide a nickel-plated bump structure for wafer pads, the nickel-plated bump structure comprising a wafer, a plurality of seed layers, a plurality of nickel-plated bumps and a plurality of top surface outer protection layers; wherein the wafer has a surface, and a plurality of pads are arranged on the surface; wherein each of the seed layers is arranged on the surface of the wafer in a covering manner and covers each of the pads; wherein each of the seed layers is electrically connected to each of the pads of the wafer; wherein each of the nickel-plated bumps is formed by using electroless nickel. At least one electroplated nickel bump with a suitable height and a desired shape is formed on the surface of each seed layer by electroplating nickel (electrochemical nickel), wherein each electroplated nickel bump is electrically connected to each seed layer, wherein the position and shape of each electroplated nickel bump corresponds to and covers each pad of the wafer, so as to Each of the electroless nickel bumps can be electrically connected to each of the pads through each of the seed layers; wherein each of the top surface outer protective layers is respectively disposed on the top surface of each of the electroless nickel bumps and electrically connected to each of the electroless nickel bumps, so that each of the top surface outer protective layers can be electrically connected to each of the pads of the wafer through each of the electroless nickel bumps, and each of the top surface outer protective layers The position and shape of the protective layer correspond to and cover each of the pads of the wafer, wherein each of the top surface outer protective layers is composed of a material selected from the group of immersion gold (IG) layer or silver (ES) layer, and is formed on the top surface of each of the electroless nickel bumps using a process selected from the group of electroless gold process or electroless silver process. wherein the electroless nickel plated bump structure is further manufactured by a method for manufacturing an electroless nickel plated bump structure, the method for manufacturing an electroless nickel plated bump structure comprising the following steps: step S1: providing a wafer, the wafer having a surface, and a plurality of pads being disposed on the surface; step S2: disposing a plurality of seed layers (seed step S3: covering the surface of each seed layer with a first photoresist layer; step S4: drilling at least one first blind hole in the first photoresist layer, each of which is connected to each seed layer; step S5: drilling a hole in each seed layer using electroless nickel; A plurality of electroless nickel (electroless nickel) electroless nickel bumps are formed in the first blind holes of the first photoresist layer by a nickel-nickel method; wherein each of the electroless nickel bumps is electrically connected to each of the seed layers; wherein the position and shape of each of the electroless nickel bumps correspond to and cover each of the solder joints of the wafer. pads, so that each of the electroless nickel-plated bumps can be electrically connected to each of the solder pads through each of the seed layers; step S6: using a process selected from the group of gold-plated processes or silver-plated processes to form a plurality of top surface outer protective layers on the top surface of each of the electroless nickel-plated bumps and corresponding to each of the electroless nickel-plated bumps, each of the top surface outer protective layers The top surface outer protective layer is electrically connected to each of the electroless nickel bumps, so that each of the top surface outer protective layers can be electrically connected to each of the pads of the wafer through each of the electroless nickel bumps, and the position and shape of each of the top surface outer protective layers correspond to and cover each of the pads of the wafer; wherein each of the top surface outer protective layers is selected from the group of immersion gold layer or silver layer Step S7: removing the first photoresist layer from the surface of each seed layer to expose each nickel plated bump and each top surface outer protective layer; and Step S8: removing the portion of each seed layer on the wafer not covered by each nickel plated bump, which is beneficial to improving the yield of the product.

In another preferred embodiment of the present invention, the thickness of each electroless nickel bump is about 2-14 micrometers (μm), the thickness of the immersion gold (IG) layer is about 0.01-0.05 micrometers (μm), the thickness of the thick gold (EG) layer is about 0.5-2.0 micrometers (μm), and the thickness of the electroless silver (ES) layer is about 0.5-2.0 micrometers (μm).

Another object of the present invention is to provide a nickel-plated bump structure for wafer pads, the nickel-plated bump structure comprising a wafer, a plurality of seed layers, a plurality of nickel-plated bumps and a plurality of top surface outer protection layers; wherein the wafer has a surface, and a plurality of pads are disposed on the surface; wherein each of the seed layers is disposed on the surface of the wafer in a covering manner and covers each of the pads, wherein each of the seed layers is electrically connected to each of the pads of the wafer; wherein each of the nickel-plated bumps is formed by using electroless nickel. At least one electroplated nickel bump with a suitable height and a desired shape is formed on the surface of each seed layer in a manner corresponding to nickel, wherein each electroplated nickel bump is electrically connected to each seed layer, wherein the position and shape of each electroplated nickel bump corresponds to and covers each solder pad of the wafer, so that each electroplated nickel bump can be electrically connected to each solder pad through each seed layer; wherein each top surface outer protective layer is respectively disposed on the top surface of each electroplated nickel bump and is electrically connected to each electroplated nickel bump. The top surface outer protective layer is electrically connected to each of the pads of the wafer through each of the electroless nickel bumps, and the position and shape of each of the top surface outer protective layers correspond to and cover each of the pads of the wafer, wherein each of the top surface outer protective layers is composed of a material selected from the group of immersion gold (IG) layers or electroless silver (ES) layers, and is formed on the top surface of each of the electroless nickel bumps by a process selected from the group of electroless gold processes or electroless silver processes; wherein each of the side wall outer protective layers is respectively arranged at The sidewall outer protective layer is formed on the annular side surface of each of the electroplated nickel bumps and is electrically connected to each of the electroplated nickel bumps, so that each of the sidewall outer protective layers can be electrically connected to each of the solder pads of the wafer through each of the electroplated nickel bumps, wherein each of the sidewall outer protective layers comprises at least one protective layer composed of a material selected from the group of immersion gold (IG) layers or electroplated silver (ES) layers, and a process selected from the group of electroplated gold processes or electroplated silver processes is used to form each of the sidewall outer protective layers on the annular side surface of each of the electroplated nickel bumps; wherein each of the electroplated nickel bumps is electrically connected to each of the solder pads of the wafer through each of the electroplated nickel bumps. The top surface outer protective layer formed on the top surface and the side wall outer protective layer formed on the side surface thereof are completely and tightly covered on the outer surface of each electroless nickel bump to form a complete outer protective layer; wherein the electroless nickel bump structure is further manufactured by a method for manufacturing an electroless nickel bump structure, and the method for manufacturing an electroless nickel bump structure comprises the following steps: step S1: providing a wafer, the wafer having a surface, and a plurality of pads are disposed on the surface; step S2: disposing a plurality of seed layers (seed step S3: covering the surface of each seed layer with a first photoresist layer; step S4: drilling at least one first blind hole in the first photoresist layer, each of which is connected to each seed layer; step S5: drilling a hole in each seed layer using electroless nickel; A plurality of electroless nickel (electroless nickel) electroless nickel bumps are formed in the first blind holes of the first photoresist layer by a nickel process; wherein each of the electroless nickel bumps is electrically connected to each of the seed layers; wherein the position and shape of each of the electroless nickel bumps correspond to and cover each of the solder pads of the wafer, so that each of the electroless nickel bumps can be electrically connected to each of the solder pads through each of the seed layers; step S6: using a process selected from the group of gold electroless processes or silver electroless processes to form a plurality of electroless nickel bumps on the top surfaces of each of the electroless nickel bumps; A plurality of top surface outer protective layers are formed corresponding to each of the electroless nickel bumps, each of the top surface outer protective layers is electrically connected to each of the electroless nickel bumps, so that each of the top surface outer protective layers can be electrically connected to each of the solder pads of the wafer through each of the electroless nickel bumps, and the position and shape of each of the top surface outer protective layers correspond to and cover each of the solder pads of the wafer; wherein each of the top surface outer protective layers is composed of a material selected from the group of immersion gold layer or silver layer; step S7: removing the first photoresist layer from the surface of each of the seed layers to expose each of the electroless nickel bumps and each top outer protective layer; step S8: removing each of the seed layers on the wafer that are not covered by each of the electroless nickel-plated nickel bumps; step S9: covering the surface of the wafer with a second photoresist layer; step S10: drilling holes through the second photoresist layer to form at least one first blind hole and at least one second blind hole, each of the first blind hole and each of the second blind holes being connected to the wafer; step S11: drilling holes in each of the first blind holes and each of the second blind holes of the second photoresist layer on the wafer using an electroless nickel method using a process selected from a gold process, or a process selected from a gold process, or a process selected from a gold process, A process in the group of silver deposition processes, to form a plurality of side wall outer protective layers on the annular side surface of each of the nickel deposition bumps, each of the side wall outer protective layers is electrically connected to each of the nickel deposition bumps, so that each of the side wall outer protective layers can be electrically connected to each of the pads of the wafer through each of the nickel deposition bumps; wherein each of the side wall outer protective layers includes at least one protective layer which is selected from a material in the group of immersion gold layer or silver deposition layer; and step S12: removing the second photoresist layer from the surface of the wafer, which is beneficial to improving the yield of the product.

In another preferred embodiment of the present invention, the thickness of each electroless nickel bump is about 2-14 micrometers (μm), the thickness of the immersion gold (IG) layer is about 0.01-0.05 micrometers (μm), the thickness of the thick gold (EG) layer is about 0.5-2.0 micrometers (μm), and the thickness of the electroless silver (ES) layer is about 0.5-2.0 micrometers (μm).

Another object of the present invention is to provide a method for manufacturing a nickel-plated bump structure of a wafer pad, the method comprising the following steps: step S1: providing a wafer, the wafer having a surface, the surface being provided with a plurality of pads; step S2: providing a plurality of seed layers on the surface of the wafer layer), and each of the seed layers is covered on the surface of the wafer and covers each of the pads; wherein each of the seed layers is electrically connected to each of the pads of the wafer; step S3: a first photoresist layer is covered on the surface of each of the seed layers; step S4: at least one blind hole is drilled on the first photoresist layer, and each of the blind holes is connected to each of the seed layers; step S5: electroless nickel is used to form a hole in each of the seed layers. A plurality of electroless nickel (electroless nickel) electroless nickel bumps with a thickness of about 2-14 micrometers (μm) are formed in the blind holes of the first photoresist layer by a nickel-nickel method; wherein each of the electroless nickel bumps is electrically connected to each of the seed layers; wherein the position and shape of each of the electroless nickel bumps correspond to and cover each of the pads of the wafer, so that each of the electroless nickel bumps can be electrically connected to each of the seed layers by the seed layers. The first photoresist layer is electrically connected to each of the pads; step S6: at least one first trench and at least one second trench are formed through the first photoresist layer, and each of the first trench and each of the second trenches penetrates each of the seed layers and is connected to the wafer; step S7: using a process selected from the group of gold deposition process or silver deposition process to form at least one top surface and a peripheral side surface of each of the nickel deposition bumps. The outer protective layer and the side wall outer protective layers, wherein each of the top surface outer protective layer and each of the side wall outer protective layers comprises at least one protective layer which is made of a material selected from the group of immersion gold layer or silver layer, so that each of the top surface outer protective layer and each of the side wall outer protective layers formed on the surrounding side surface are completely and tightly coated on the outer surface of each of the chemically plated nickel bumps to form a complete outer protective layer; wherein each of the top surface outer protective layer and Each of the side wall outer protective layers is electrically connected to each of the electroless nickel bumps, so that each of the top surface outer protective layers and each of the side wall outer protective layers can be electrically connected to each of the pads of the wafer through each of the electroless nickel bumps; step S8: removing the first photoresist layer from the surface of each of the seed layers; and step S9: removing the portion of each of the seed layers on the wafer that is not covered by each of the electroless nickel bumps, which is beneficial to improving the yield of the product.

In another preferred embodiment of the present invention, the thickness of each electroless nickel bump is about 2-14 micrometers (μm), the thickness of the immersion gold (IG) layer is about 0.01-0.05 micrometers (μm), the thickness of the thick gold (EG) layer is about 0.5-2.0 micrometers (μm), and the thickness of the electroless silver (ES) layer is about 0.5-2.0 micrometers (μm)

1: Chemically plated nickel bump structure

1a: Electroless nickel plated bump structure

1b: Electroless nickel plated bump structure

1c: Electroless nickel plated bump structure

10: Wafer

11: Surface

12: Welding pad

20: Seed layer

30: Electroless nickel plated bumps

31: Top

40: Top outer protective layer

50: Side wall outer protective layer

60: First photoresist layer

61: Blind hole

62: First groove

63: Second groove

70: Second photoresist layer

71: First blind hole

72: Second blind hole

FIG1 is a cross-sectional schematic diagram of the first embodiment of the electroless nickel plated bump structure of the wafer pad of the present invention.

Figure 2 is a schematic cross-sectional view of the wafer of the present invention.

FIG3 is a cross-sectional schematic diagram of the seed layer of the present invention being arranged coveringly on the surface of the wafer.

FIG4 is a cross-sectional schematic diagram of the first photoresist layer of the present invention being disposed coveringly on the surface of the seed layer.

Figure 5 is a schematic cross-sectional view of forming a nickel-plated bump in a blind hole of the first photoresist layer using an electroless nickel method.

FIG6 is a cross-sectional schematic diagram of removing the first photoresist layer from the surface of the seed layer.

FIG7 is a cross-sectional schematic diagram of the second embodiment of the electroless nickel-plated bump structure of the wafer pad of the present invention.

Figure 8 is a cross-sectional schematic diagram of forming a nickel-plated bump in a blind hole of a first photoresist layer using an electroless nickel method and forming a top surface outer protective layer on the nickel-plated bump.

FIG9 is a cross-sectional schematic diagram showing the removal of the first photoresist layer in FIG8 .

FIG10 is a schematic cross-sectional view of the third embodiment of the electroless nickel plated bump structure of the wafer pad of the present invention.

FIG11 is a schematic cross-sectional view of the first blind hole and the second blind hole formed by drilling through the second photoresist layer in FIG8 .

FIG. 12 is a cross-sectional schematic diagram of forming a sidewall outer protective layer on the annular side surface of the electroless nickel plated bump in the first blind hole and the second blind hole of the second photoresist layer in FIG. 11 using a process selected from the group of electroless gold process or electroless silver process.

FIG13 is a schematic cross-sectional view of the blind hole, the first trench and the second trench formed by drilling through the first photoresist layer in FIG8.

FIG14 is a cross-sectional schematic diagram of the top surface outer protective layer and the side wall outer protective layer formed in the blind hole, the first groove and the second groove of the first photoresist layer in FIG13 respectively.

FIG15 is a cross-sectional schematic diagram showing the removal of the second photoresist layer in FIG14 .

FIG16 is a schematic cross-sectional view of the fourth embodiment of the electroless nickel-plated bump structure of the wafer pad.

FIG17 is a schematic cross-sectional view of a structure of two or more electroless nickel-plated bumps of the first embodiment of the present invention.

FIG18 is a cross-sectional schematic diagram of a structure of two or more electroless nickel-plated bumps of the second embodiment of the present invention.

FIG19 is a schematic cross-sectional view of a structure of two or more electroless nickel-plated bumps of the third embodiment of the present invention.

The structure and technical features of the present invention are described in detail below with the help of diagrams. Each diagram is only used to illustrate the structural relationship and related functions of the present invention. Therefore, the size of each component in each diagram is not drawn according to the actual scale and is not used to limit the present invention.

Referring to FIGS. 1, 7, 10 and 16, the present invention provides a chemically plated nickel bump structure 1, 1a, 1b and 1c for a wafer pad. The chemically plated nickel bump structure 1, 1a, 1b and 1c can solve the problem that the bumps produced by the existing electroless metal method using electroless nickel have uneven size, thickness or shape or are not as expected. However, the chemically plated nickel bump structure 1, 1a, 1b and 1c of the present invention can be formed by different manufacturing methods, which is beneficial to improving the yield of the product. According to the different manufacturing methods of the electroless nickel bump structures 1, 1a, 1b and 1c, the electroless nickel bump structures 1, 1a, 1b and 1c can be classified into a first embodiment, a second embodiment, a third embodiment and a fourth embodiment. The following describes each embodiment with the help of drawings: The embodiment shown in Figures 1 to 5, 8 to 12 and 17 is the first embodiment of the present invention. In the first embodiment, the electroless nickel bump structure 1 includes a wafer 10, a plurality of seed layers 20, a plurality of electroless nickel bumps 30, a plurality of top surface outer protective layers 40 and a plurality of side wall outer protective layers 50.

The wafer 10 has a surface 11 as shown in FIG. 1 , and a plurality of pads 12 are disposed on the surface 11 .

Each of the seed layers 20 is disposed on the surface 11 of the wafer 10 in a covering manner and covers each of the pads 12 as shown in FIG. 1 ; wherein each of the seed layers 20 is electrically connected to each of the pads 12 of the wafer 10 .

Each of the electroless nickel bumps 30 is formed by electroless nickel (electroless nickel, chemical nickel plating) on the surface of each of the seed layers 20 to form at least one electroless nickel bump 30 with a suitable height and a desired shape as shown in FIG1 ; wherein each of the electroless nickel bumps 30 is electrically connected to each of the seed layers 20 ; wherein the position and shape of each of the electroless nickel bumps 30 correspond to and cover each of the pads 12 of the wafer 10 , so that each of the electroless nickel bumps 30 can be electrically connected to each of the pads 12 through each of the seed layers 20 .

Each of the top surface outer protective layers 40 is disposed on the top surface 31 of each of the electroless nickel plated bumps 30 and is electrically connected to each of the electroless nickel plated bumps 30 as shown in FIG. 1 , so that each of the top surface outer protective layers 40 can be electrically connected to each of the pads 12 of the wafer 10 through each of the electroless nickel plated bumps 30, and the position and shape of each of the top surface outer protective layers 40 are corresponding to the top surface 31 of each of the electroless nickel plated bumps 30. It should also cover each of the pads 12 of the wafer 10; wherein each of the top surface outer protective layers 40 is composed of a material selected from the group of immersion gold (IG) layers or silver (ES) layers, and a process selected from the group of gold or silver processes is used to form each of the top surface outer protective layers 40 on the top surface 31 of each of the nickel plated bumps 30.

Each of the side wall outer protective layers 50 is disposed on the circumferential side surface 32 of each of the electroless nickel plated bumps 30 and is electrically connected to each of the electroless nickel plated bumps 30 as shown in FIG. 1 , so that each of the side wall outer protective layers 50 can be electrically connected to each of the pads 12 of the wafer 10 through each of the electroless nickel plated bumps 30; wherein each of the side wall outer protective layers 50 is electrically connected to each of the pads 12 of the wafer 10 through each of the electroless nickel plated bumps 30. The protective layer 50 includes at least one protective layer made of a material selected from the group of immersion gold (IG) layers or ES layers, and uses a process selected from the group of ES processes to form each of the sidewall outer protective layers 50 on the annular side surface 32 of each ES nickel plated bump 30.

Among them, each of the top surface outer protective layers 40 formed on the top surface 31 of each of the electroless nickel plated bumps 30 and each of the side wall outer protective layers 50 formed on the surrounding side surface 32 are completely and tightly covered on the outer surface of each of the electroless nickel plated bumps 30 to form a complete outer protective layer as shown in FIG1 .

In addition, the electroless nickel plated bump structure 1 is manufactured by a method for manufacturing an electroless nickel plated bump structure, and the method for manufacturing an electroless nickel plated bump structure 1 includes the following steps:

Step S1: Provide a wafer 10 as shown in FIG2 . The wafer 10 has a surface 11 , and a plurality of pads 12 are disposed on the surface 11 .

Step S2: multiple seed layers 20 are provided on the surface 11 of the wafer 10 as shown in FIG3, and each seed layer 20 is provided on the surface 11 of the wafer 10 in a covering manner and covers each solder pad 12; wherein each seed layer 20 is electrically connected to each solder pad 12 of the wafer 10.

Step S3: A first photoresist layer 60 is formed on the surface of each seed layer 20 as shown in FIG4 .

Step S4: Drill at least one blind hole 61 on the first photoresist layer 60 as shown in FIG. 4 , and each blind hole 61 is connected to each seed layer 20 .

Step S5: A plurality of electroless nickel bumps 30 made of electroless nickel (electroless nickel) are formed in each blind hole 61 in each seed layer 20 by an electroless nickel method as shown in FIG. 5 ; wherein each electroless nickel bump 30 is electrically connected to each seed layer 20 ; wherein the position and shape of each electroless nickel bump 30 correspond to and cover each solder pad 12 of the wafer 10 , so that each electroless nickel bump 30 can be electrically connected to each solder pad 12 through each seed layer 20 .

Step S6: Using a process selected from the group of gold deposition process or silver deposition process, a plurality of top surface outer protection layers 40 are formed on the top surface of each of the nickel deposition bumps 30, and each of the nickel deposition bumps 30 corresponds to the top surface of each of the nickel deposition bumps 30, as shown in FIG. 8. Each of the top surface outer protection layers 40 is electrically connected to each of the nickel deposition bumps 30, so that each of the top surface outer protection layers 40 is electrically connected to each of the nickel deposition bumps 30. The protective layer 40 can be electrically connected to each of the pads 12 of the wafer 10 through each of the electroless nickel-plated bumps 30, and the position and shape of each of the top surface outer protective layers 40 correspond to and cover each of the pads 12 of the wafer 10; wherein each of the top surface outer protective layers 40 is composed of a material selected from the group of immersion gold layer or electroless silver layer.

Step S7: Remove the first photoresist layer 60 from the surface of each seed layer 20 as shown in FIG9 to expose each nickel-plated bump 30 and each top surface outer protective layer 40.

Step S8: Remove the portions of the seed layer 20 on the wafer 10 that are not covered by the nickel-plated bumps 30 as shown in FIG. 10 .

Step S9: A second photoresist layer 70 is formed on the surface 11 of the wafer 10 as shown in FIG. 11 .

Step S10: Drill through the second photoresist layer 70 to form at least one first blind hole 71 and at least one second blind hole 72 as shown in FIG. 11 . Each of the first blind holes 71 and each of the second blind holes 72 are connected to the wafer 10 .

Step S11: Using electroless nickel in the wafer 10, a process selected from the group of gold plating process or silver plating process is used in each of the first blind holes 71 and the second blind holes 72 to form a plurality of side wall outer protection layers 50 on the annular side surface 32 of each nickel plating bump 30 as shown in FIG. 12. The protective layer 50 is electrically connected to each of the electroless nickel plated bumps 30, so that each of the side wall outer protective layers 50 can be electrically connected to each of the pads 12 of the wafer 10 through each of the electroless nickel plated bumps 30; wherein each of the side wall outer protective layers 50 includes at least one protective layer which is composed of a material selected from the group of immersion gold layer or silver layer.

Step S12: Remove the second photoresist layer 70 from the surface 11 of the wafer 10 as shown in FIG1 .

Among them, the thickness of each electroless nickel plated bump 30 is about 2-14 micrometers (μm) but not limited, the thickness of the immersion gold (IG) layer is about 0.01-0.05 micrometers (μm) but not limited, the thickness of the thick gold (EG) layer is about 0.5-2.0 micrometers (μm) but not limited, and the thickness of the electroless silver (ES) layer is about 0.5-2.0 micrometers (μm) but not limited.

In addition, the electroless nickel plated bump structure 1 is manufactured in large quantities and then cut into a body one by one, but not limited to that shown in FIG. 17 .

The embodiment shown in FIGS. 2 to 7 and 18 is the second embodiment of the present invention. The electroless nickel plated bump structure 1a in the second embodiment includes a wafer 10, a plurality of seed layers 20 and a plurality of electroless nickel plated bumps 30.

The wafer 10 has a surface 11 as shown in FIG. 7 , and a plurality of pads 12 are disposed on the surface 11 .

Each of the seed layers 20 is disposed on the surface 11 of the wafer 10 in a covering manner and covers each of the pads 12 as shown in FIG. 7 ; wherein each of the seed layers 20 is electrically connected to each of the pads 12 of the wafer 10 .

Each of the electroless nickel plated bumps 30 utilizes electroless nickel (electroless nickel, chemical electroplating nickel) to form at least one electroless nickel plated bump 30 with a suitable height and desired shape on the surface of each of the seed layers 20 as shown in FIG. 7; wherein each of the electroless nickel plated bumps 30 is electrically connected to each of the seed layers 20.

The position and shape of each electroless nickel plated bump 30 correspond to and cover each solder pad 12 of the wafer 10 as shown in FIG. 7 , so that each electroless nickel plated bump 30 can be electrically connected to each solder pad 12 through each seed layer 20 .

In addition, the electroless nickel plated bump structure 1a is manufactured by a method for manufacturing an electroless nickel plated bump structure, and the method for manufacturing an electroless nickel plated bump structure 1a includes the following steps:

Step S1: Provide a wafer 10 as shown in FIG2 . The wafer 10 has a surface 11 , and a plurality of pads 12 are disposed on the surface 11 .

Step S2: multiple seed layers 20 are provided on the surface 11 of the wafer 10 as shown in FIG3, and each seed layer 20 is provided on the surface 11 of the wafer 10 in a covering manner and covers each solder pad 12; wherein each seed layer 20 is electrically connected to each solder pad 12 of the wafer 10.

Step S3: A first photoresist layer 60 is formed on the surface of each seed layer 20 as shown in FIG4 .

Step S4: Drill at least one blind hole 61 on the first photoresist layer 60 as shown in FIG. 4 , and each blind hole 61 is connected to each seed layer 20 .

Step S5: A plurality of electroless nickel bumps 30 made of electroless nickel (electroless nickel) are formed in each blind hole 61 in each seed layer 20 by using an electroless nickel (electroless nickel) method as shown in FIG. 5 ; wherein each electroless nickel bump 30 is electrically connected to each seed layer 20 ; wherein the position and shape of each electroless nickel bump 30 correspond to and cover each solder pad 12 of the wafer 10 , so that each electroless nickel bump 30 can be electrically connected to each solder pad 12 through each seed layer 20 .

Step S6: Remove the first photoresist layer 60 from the surface of each seed layer 20 as shown in FIG6 to expose each nickel-plated bump 30.

Step S7: remove the portions of the seed layer 20 on the wafer 10 that are not covered by the nickel-plated bumps 30 as shown in FIG. 7 .

The thickness of each electroless nickel plated bump 30 is about 2-14 micrometers (μm) but is not limited.

In addition, the electroless nickel plated bump structure 1a is manufactured in large quantities and then cut into a body one by one, but not limited to that shown in FIG. 18 .

The embodiment shown in Figures 2 to 5, 8 to 10 and 19 is the third embodiment of the present invention. The electroless nickel plated bump structure 1b in the third embodiment includes a wafer 10, a plurality of seed layers 20, a plurality of electroless nickel plated bumps 30 and a plurality of top surface outer protective layers 40.

The wafer 10 has a surface 11 as shown in FIG. 10 , and a plurality of pads 12 are disposed on the surface 11 .

Each of the seed layers 20 is disposed on the surface 11 of the wafer 10 in a covering manner and covers each of the pads 12 as shown in FIG. 10 ; wherein each of the seed layers 20 is electrically connected to each of the pads 12 of the wafer 10 .

Each of the electroless nickel bumps 30 is formed by electroless nickel (electroless nickel, chemical nickel plating) as shown in FIG10, so as to form at least one electroless nickel bump 30 with a suitable height and a desired shape on the surface of each of the seed layers 20; wherein each of the electroless nickel bumps 30 is electrically connected to each of the seed layers 20; wherein the position and shape of each of the electroless nickel bumps 30 correspond to and cover each of the pads 12 of the wafer 10, so that each of the electroless nickel bumps 30 can be electrically connected to each of the pads 12 through each of the seed layers 20.

Each of the top surface outer protective layers 40 is respectively disposed on the top surface 31 of each of the electroless nickel plated bumps 30 and is electrically connected to each of the electroless nickel plated bumps 30 as shown in FIG. 10 , so that each of the top surface outer protective layers 40 can be electrically connected to each of the pads 12 of the wafer 10 through each of the electroless nickel plated bumps 30, and the position and shape of each of the top surface outer protective layers 40 are Corresponding to and covering each of the pads 12 of the wafer 10; wherein each of the top surface outer protective layers 40 is composed of a material selected from the group of immersion gold (IG) layer or silver (ES) layer, and a process selected from the group of gold process or silver process is used to form each of the top surface outer protective layers 40 on the top surface 31 of each of the nickel plated bumps 30.

In addition, the electroless nickel plated bump structure 1b is manufactured by a method for manufacturing an electroless nickel plated bump structure, and the method for manufacturing an electroless nickel plated bump structure 1b includes the following steps:

Step S1: Provide a wafer 10 as shown in FIG2 . The wafer 10 has a surface 11 , and a plurality of pads 12 are disposed on the surface 11 .

Step S2: multiple seed layers 20 are provided on the surface 11 of the wafer 10 as shown in FIG3, and each seed layer 20 is provided on the surface 11 of the wafer 10 in a covering manner and covers each solder pad 12; wherein each seed layer 20 is electrically connected to each solder pad 12 of the wafer 10.

Step S3: A first photoresist layer 60 is formed on the surface of each seed layer 20 as shown in FIG4 .

Step S4: Drill at least one blind hole 61 on the first photoresist layer 60 as shown in FIG. 4 , and each blind hole 61 is connected to each seed layer 20 .

Step S5: A plurality of electroless nickel bumps 30 made of electroless nickel (electroless nickel) are formed in each blind hole 61 in each seed layer 20 by an electroless nickel method as shown in FIG. 5 ; wherein each electroless nickel bump 30 is electrically connected to each seed layer 20 ; wherein the position and shape of each electroless nickel bump 30 correspond to and cover each solder pad 12 of the wafer 10 , so that each electroless nickel bump 30 can be electrically connected to each solder pad 12 through each seed layer 20 .

Step S6: Using a process selected from the group of gold plating process or silver plating process, a plurality of top surface outer protective layers 40 are formed on the top surface of each of the nickel plating bumps 30, and each of the nickel plating bumps 30 corresponds to each of the nickel plating bumps 30 as shown in FIG. 8. Each of the top surface outer protective layers 40 is electrically connected to each of the nickel plating bumps 30, so that each of the top surface outer protective layers 40 is electrically connected to each of the nickel plating bumps 30. The protective layer 40 can be electrically connected to each of the pads 12 of the wafer 10 through each of the electroless nickel-plated bumps 30, and the position and shape of each of the top surface outer protective layers 40 correspond to and cover each of the pads 12 of the wafer 10; wherein each of the top surface outer protective layers 40 is composed of a material selected from the group of immersion gold layer or electroless silver layer.

Step S7: Remove the first photoresist layer 60 from the surface of each seed layer 20 as shown in FIG9 to expose each nickel-plated bump 30 and each top surface outer protective layer 40.

Step S8: Remove the portions of the seed layer 20 on the wafer 10 that are not covered by the nickel-plated bumps 30 as shown in FIG. 10 .

Among them, the thickness of each electroless nickel plated bump 30 is about 2-14 micrometers (μm) but not limited, the thickness of the immersion gold (IG) layer is about 0.01-0.05 micrometers (μm) but not limited, the thickness of the thick gold (EG) layer is about 0.5-2.0 micrometers (μm) but not limited, and the thickness of the electroless silver (ES) layer is about 0.5-2.0 micrometers (μm) but not limited.

In addition, the electroless nickel plated bump structure 1b is manufactured in large quantities and then cut into a body one by one, but not limited to that shown in FIG. 19 .

The embodiment shown in Figures 2 to 5 and 13 to 16 is the fourth embodiment of the present invention. The electroless nickel plated bump structure 1c in the fourth embodiment includes a wafer 10, a plurality of seed layers 20, a plurality of electroless nickel plated bumps 30, a plurality of top surface outer protective layers 40 and a plurality of side wall outer protective layers 50.

The wafer 10 has a surface 11 as shown in FIG16 , and a plurality of pads 12 are disposed on the surface 11 .

Each of the seed layers 20 is disposed on the surface 11 of the wafer 10 in a covering manner and covers each of the pads 12 as shown in FIG. 16 ; wherein each of the seed layers 20 is electrically connected to each of the pads 12 of the wafer 10 .

Each of the electroless nickel bumps 30 is formed by electroless nickel (electroless nickel, chemical nickel plating) on the surface of each of the seed layers 20 to form at least one electroless nickel bump 30 with a suitable height and a desired shape as shown in FIG. 16 ; wherein each of the electroless nickel bumps 30 is electrically connected to each of the seed layers 20 ; wherein the position and shape of each of the electroless nickel bumps 30 correspond to and cover each of the pads 12 of the wafer 10 , so that each of the electroless nickel bumps 30 can be electrically connected to each of the pads 12 through each of the seed layers 20 .

Each of the top surface outer protective layers 40 is disposed on the top surface 31 of each of the electroless nickel plated bumps 30 and is electrically connected to each of the electroless nickel plated bumps 30 as shown in FIG. 16 , so that each of the top surface outer protective layers 40 can be electrically connected to each of the pads 12 of the wafer 10 through each of the electroless nickel plated bumps 30, and the position and shape of each of the top surface outer protective layers 40 are Corresponding to and covering each of the pads 12 of the wafer 10; wherein each of the top surface outer protective layers 40 is composed of a material selected from the group of immersion gold (IG) layer or silver (ES) layer, and a process selected from the group of gold process or silver process is used to form each of the top surface outer protective layers 40 on the top surface 31 of each of the nickel plated bumps 30.

Each of the side wall outer protective layers 50 is disposed on the annular side surface 32 of each of the electroless nickel plated bumps 30 and is electrically connected to each of the electroless nickel plated bumps 30 as shown in FIG. 16 , so that each of the side wall outer protective layers 50 can be electrically connected to each of the pads 12 of the wafer 10 through each of the electroless nickel plated bumps 30; wherein each of the side wall outer protective layers 50 is electrically connected to each of the pads 12 of the wafer 10 through each of the electroless nickel plated bumps 30. The outer protective layer 50 includes at least one protective layer made of a material selected from the group of immersion gold (IG) layers or silver electroplating (ES) layers, and uses a process selected from the group of gold electroplating processes or silver electroplating processes to form each of the sidewall outer protective layers 50 on the annular side surface 32 of each of the electroplated nickel bumps 30.

Among them, each top surface outer protective layer 40 formed on the top surface 31 of each electroless nickel plated bump 30 and each side wall outer protective layer 50 formed on the surrounding side surface 32 are completely and tightly covered on the outer surface of each electroless nickel plated bump 30 as shown in FIG. 16 to form a complete outer protective layer.

Moreover, each of the top surface outer protective layers 40 and each of the side wall outer protective layers 50 are formed by the same process, and are formed simultaneously on the top surface 31 and the surrounding side surface 32 of each of the electroless nickel plated bumps 30 by a process selected from the group of electroless gold process or electroless silver process, as shown in FIG. 16 .

In addition, the electroless nickel plated bump structure 1c is manufactured by a method for manufacturing an electroless nickel plated bump structure, and the method for manufacturing an electroless nickel plated bump structure 1c includes the following steps:

Step S1: Provide a wafer 10 as shown in FIG2 . The wafer 10 has a surface 11 , and a plurality of pads 12 are disposed on the surface 11 .

Step S2: multiple seed layers 20 are provided on the surface 11 of the wafer 10 as shown in FIG3, and each seed layer 20 is provided on the surface 11 of the wafer 10 in a covering manner and covers each solder pad 12; wherein each seed layer 20 is electrically connected to each solder pad 12 of the wafer 10.

Step S3: A first photoresist layer 60 is formed on the surface of each seed layer 20 as shown in FIG4 .

Step S4: Drill at least one blind hole 61 on the first photoresist layer 60 as shown in FIG. 4 , and each blind hole 61 is connected to each seed layer 20 .

Step S5: A plurality of electroless nickel bumps 30 made of electroless nickel (electroless nickel) are formed in each blind hole 61 in each seed layer 20 by an electroless nickel method as shown in FIG. 5 ; wherein each electroless nickel bump 30 is electrically connected to each seed layer 20 ; wherein the position and shape of each electroless nickel bump 30 correspond to and cover each solder pad 12 of the wafer 10 , so that each electroless nickel bump 30 can be electrically connected to each solder pad 12 through each seed layer 20 .

Step S6: drilling holes through the first photoresist layer 60 to form at least one first trench 62 and at least one second trench 63 as shown in FIG. 13, and each of the first trenches 62 and each of the second trenches 63 penetrates each of the seed layers 20 and connects to the wafer 10; wherein each of the first trenches 62 and each of the second trenches 63 is located at the circumferential side surface 32 of each of the electroless nickel-plated bumps 30;.

Step S7: Using a process selected from the group of gold immersion processes or silver immersion processes, at least one top surface outer protective layer 40 and a plurality of side wall outer protective layers 50 are formed on the top surface 31 and the surrounding side surface 32 of each of the nickel plated bumps 30, as shown in FIG. 14, wherein each of the top surface outer protective layers 40 and each of the side wall outer protective layers 50 includes at least one protective layer which is selected from the group of gold immersion layers or silver immersion layers. 0 and each of the side wall outer protective layers 50 formed on its annular side surface 32 completely and tightly cover the outer surface of each of the electroless nickel plated bumps 30 to form a complete outer protective layer; wherein each of the top surface outer protective layers 40 and each of the side wall outer protective layers 50 are electrically connected to each of the electroless nickel plated bumps 30, so that each of the top surface outer protective layers 40 and each of the side wall outer protective layers 50 can be electrically connected to each of the pads 12 of the wafer 10 through each of the electroless nickel plated bumps 30.

Step S8: Remove the first photoresist layer 60 from the surface of each seed layer 20 as shown in FIG. 15 .

Step S9: remove the portions of the seed layer 20 on the wafer 10 that are not covered by the nickel-plated bumps 30 as shown in FIG. 16 .

Among them, the thickness of each electroless nickel plated bump 30 is about 2-14 micrometers (μm) but not limited, the thickness of the immersion gold (IG) layer is about 0.01-0.05 micrometers (μm) but not limited, the thickness of the thick gold (EG) layer is about 0.5-2.0 micrometers (μm) but not limited, and the thickness of the electroless silver (ES) layer is about 0.5-2.0 micrometers (μm) but not limited.

In addition, the electroless nickel plated bump structure 1b is mass-produced in multiple quantities before being cut into individual pieces one by one, but there is no limit (not shown).

The above are only preferred embodiments of the present invention, which are only illustrative and not restrictive. A person skilled in the art will understand that many changes, modifications, and even equivalent changes can be made within the spirit and scope defined by the claims of the present invention, but they will all fall within the scope of protection of the present invention.

1: Chemically plated nickel bump structure

10: Wafer

11: Surface

12: Welding pad

20: Seed layer

30: Electroless nickel plated bumps

31: Top

40: Top outer protective layer

50: Side wall outer protective layer

Claims (1)

A method for manufacturing a nickel-plated bump structure of a wafer pad comprises: step S1: providing a wafer, the wafer having a surface, and a plurality of pads are disposed on the surface; step S2: disposing a plurality of seed layers on the surface of the wafer Step S3: a first photoresist layer is formed on the surface of each of the seed layers; Step S4: at least one blind hole is formed on the first photoresist layer, and each of the blind holes is connected to each of the seed layers; Step S5: electroless nickel is used to form a hole in each of the seed layers; Step S6: a first photoresist layer is formed on the surface of each of the seed layers; Step S7: at least one blind hole is formed on the first photoresist layer; Step S8: at least one blind hole is formed on each of the seed layers; Step S9: at least one blind hole is formed on each of the seed layers; Step S10: at least one blind hole is formed on each of the seed layers; Step S11: at least one blind hole is formed on each of the seed layers; Step S12: at least one blind hole is formed on each of the seed layers; Step S13: at least one blind hole is formed on each of the seed layers; Step S14: at least one blind hole is formed on each of the seed layers; Step S15: at least one blind hole is formed on each of the seed layers; Step S16: at least one blind hole is formed on each of the seed layers; Step S17: at least one blind hole is formed on each of the seed layers; Step S18: at least one blind hole is formed on each of the seed layers; Step S19 ...2: at least one blind hole is formed on each of the seed layers; Step S13: at least one blind hole is formed on each of the seed layers; Step S14: at least one blind hole is formed on each of the seed layers; Step S15: at least one blind hole is formed on each of the seed layers; Step S16: at least one blind hole is formed on each of the A plurality of electroless nickel (electroless nickel) electroless nickel bumps having a thickness of about 2-14 micrometers (μm) are formed in the blind holes of the first photoresist layer by a nickel-nickel method; wherein each of the electroless nickel bumps is electrically connected to each of the seed layers; wherein the position and shape of each of the electroless nickel bumps correspond to and cover each of the pads of the wafer, so that each of the electroless nickel bumps can be electrically connected to each of the pads through each of the seed layers; step S6: in the first At least one first trench and at least one second trench are formed through the photoresist layer, and each of the first trench and each of the second trenches further penetrates each of the seed layers and is connected to the wafer; wherein each of the first trench and each of the second trenches is located at the peripheral side surface of each of the electroless nickel plated bumps; step S7: using a process selected from the group of electroless gold process or electroless silver process to form at least one top surface outer protective layer and a plurality of side wall outer protective layers on the top surface and the peripheral side surface of each of the electroless nickel plated bumps The top outer protective layer and the side wall outer protective layer each include at least one protective layer selected from a group consisting of an immersion gold layer with a thickness of about 0.01-0.05 micrometers (μm), a thick gold layer with a thickness of about 0.5-2.0 micrometers (μm), or a silver layer with a thickness of about 0.5-2.0 micrometers (μm), so that each top outer protective layer and each side wall outer protective layer formed on the surrounding side surface are completely and tightly coated on each silver layer. The outer surface of the nickel plated bump is plated to form a complete outer protective layer; wherein each of the top outer protective layer and each of the side wall outer protective layer is electrically connected to each of the nickel plated bumps, so that each of the top outer protective layer and each of the side wall outer protective layer can be electrically connected to each of the pads of the wafer through each of the nickel plated bumps; step S8: removing the first photoresist layer from the surface of each of the seed layers; and step S9: removing the portion of each of the seed layers on the wafer that is not covered by each of the nickel plated bumps.